Acer Aspire 5517 5532 - COMPAL LA-5481P - REV 1.0sec PDF

A B C D E
1 1
2
Compal Confidential 2
NCWG0/H0 Schematics Document

AMD S1g1 / RS780MN/ SB710
2009 / 06 / 24
3
LA-5481 3
Rev:1.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/03/08 Deciphered Date 2010/03/12 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, MB A5481
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
hexainf@hotmail.com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Custom
401743 C
GRATIS - FOR FREE

A B C D
Date: Wednesday, June 24, 2009 Sheet
E
1 of 47
5 4 3 2 1
Compal confidential
Project Code: NCWG0/H0 Clock Generator AMD S1g1 CPU
Thermal Sensor DDRII 533/667/800 DDRII-SO-DIMM X2
File Name : LA-5481P SLG8SP626
ADM1032ARM 638P PGA page 10,11
ICS9LPRS488BKLFT page 6,7,8,9
page 8 page 17 Dual Channel
D D
H_A#(3..31) H_D#(0..63)
HT 16x16 1000MHZ
CRT
page 24 ATI-RS780MN
465 BGA
LCD CONN
page 12,13,14,15,16
page 25
A-Link Express
4 x PCIE
PCIE X1
USB 2.0
C C
Camera USB conn

Mini card 10/100 LAN ATI-SB710 X2
CardReader
RTS5159
WLAN AR8114 / AR8132 549 BGA
page 31 page 26 HDA Codec
HD Audio AMP & Audio Jack
ALC272 page 40
page 18,19,20,21,22 page 39 TPA6017
MDC Conn.
page 41
RJ45 CONN HeadPhone
page 27
Out
SATA0 HDD Conn.
page 23
LPC BUS MIC In
B B
SATA2
ODD Conn.
page 23
ENE KB926
Power On/Off CKT / LID switch / Power OK CKT Ver:D3 page 28
page 37
Second HDD/ODD
DC/DC Interface CKT. CIR/LED RTC CKT. Int. KBD
page 41 page 38 page 18 page 29 SATA1 HDD Conn.
Touch Pad
CONN. page 29 SATA3 ODD Conn.
Power Circuit DC/DC SPI BIOS
page 30
page 42~48
A A

SCHEMATIC, MB A5481
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DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
401743
Date: Wednesday, June 24, 2009 Sheet 2 of 47
5 4 3 2 1
5 4 3 2 1
SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Voltage Rails
Full ON HIGH HIGH HIGH HIGH ON ON ON ON
S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF

D
VIN Adapter power supply (19V) D
B+ AC or battery power rail for power circuit. S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
+CPU_CORE Core voltage for CPU
S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+0.9V 0.9V switched power rail for DDR terminator
+1.2V_HT 1.2V switched power rail ON OFF
+1.5VS 1.5V switched power rail ON OFF OFF
Board ID / SKU ID Table for AD channel
+1.8V 1.8V power rail for DDR ON ON*
+1.8VS 1.8V switched power rail OFF
Vcc 3.3V +/- 5%
+2.5VS 2.5V switched power rail ON OFF OFF
Ra/Rc/Re 100K +/- 5%
Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
+3VALW 3.3V always on power rail ON ON ON*
+3VS 3.3V switched power rail ON OFF OFF
0 0 0 V 0 V 0 V
+5VALW 5V always on power rail ON ON ON*
1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+5VS 5V switched power rail ON OFF OFF
2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+VSB VSB always on power rail ON ON ON*
3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+RTCVCC RTC power ON ON ON
4 56K +/- 5% 1.036 V 1.185 V 1.264 V
5 100K +/- 5% 1.453 V 1.650 V 1.759 V
C C
6 200K +/- 5% 1.935 V 2.200 V 2.341 V
7 NC 2.500 V 3.300 V 3.300 V
BOARD ID Table
External PCI Devices Board ID PCB Revision BTO Option Table
Device IDSEL# REQ#/GNT# Interrupts
0 No Support VaryBright
BTO Item BOM Structure
1
10/100 Lan 8114@
2
GIGA Lan 8132@
3 Support VaryBright
17" ID 17@
4
15" ID 15@
5
Support VaryBright VARY@
6
7
B B
EC SM Bus1 address EC SM Bus2 address PROJECT ID Table

Device Address Device Address SKU ID SKU
Smart Battery 0001 011X b ADM1032 1001 100X b 0 NCWG0
1
2
3 NAL00
4
5
SB600 SM Bus 1 address SB600 SM Bus 2 address 6
7 NCWH0
Device Address Device Address
Clock Generator 1101 001Xb New Card
A DDR DIMM0 A
1001 000Xb
DDR DIMM2 1001 010Xb
Wireless Lan

SCHEMATIC, MB A5481
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401743
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Sheet 3 of 47
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DIMMA
DDR_A_CLK[1..2]
D D
CPU CLK CPU
DIMMB
DDR_B_CLK[1..2]
200MHZ S1G1
SOCKET
H_CLKI[1:0] Host Bus H_CLKO[1:0]
C C
SBLINK_CLK
100MHZ
NBSRC_CLK
14.31818MHz ATI
100MHZ
EXTERNAL NB
CLK GEN. HTREFCLK RS780MN
SLG8SP626 / ICS9LPRS488
66MHZ
NB_OSC
14.318MHZ
CLK_14M_SB
B B
14.318MHZ
SB_OSCIN
CLK_PCIE_MINI
14.318MHZ
CLK_PCIE_LAN
100MHZ
100MHZ
SBSRC_CLKP
ATI
100MHZ
SB
SB710
CLK_PCI_LPC EC
CLK_48M_USB 33MHZ ENE
48MHZ KB926D3
RTC SATA
32.768K Hz
Mini PCI Socket LAN 25M Hz
32.768K Hz
Mini card Atheros
A
AR8114/AR8132 A

SCHEMATIC, MB A5481
Custom C
401743
5 4 3 2 1
5 4 3 2 1
AMD CPU
S1G1 socket
+2.5VS
PU21
APL5915KAI VDDA 2.5V 250 mA
VIN PU12 +CPU_CORE 0.9V
AC ADAPTOR ISL6264CRZ-T VDD 24.5 A
0.95V
19V 65W
VDDIO 1.8V 3.6 A
D
BATT+ D
BATTERY VTT 0.9V 1.75 A
11.1V
+1.2VALW +1.2V_HT
2.2Ah/6-cell U46 VLDT 1.2V 500 mA
AO4430
+NB_CORE
PU17 DDRII SODIMMX2
BATTERY CHARGER PU18
B+ ISL6228HRTZ-T
BQ24751ARHDR +1.2VALW VDD_MEM 1.8V 6.08 A
+1.8V +0.9V
PU22 VTT_MEM 0.9V 500 mA
APL5331KAC
NB RS780MN
VDDC 1.0-1.1V
10 A
+1.2VALW VDD_HT
PU20 +1.1VS 680 mA
APL5912 PLLVDD
PU19 +1.8V +3VS 1.1V 65 mA
TPS51117RGYR KAC-TRL VDDPCIE
2.5 A
C
+1.2VALW VDDHTRX C
680 mA
VDDHTTX 1.2V
400 mA
AVDDQ
+1.8V U37 +1.8VS 4 mA
AO4430 AVDDDI
20 mA
PLLVDD18
+3VALW U41 20 mA
PU16 AO4468 VDDA18HTPLL
ISL6237IRZ-T 20 mA
VDDA18PCIE 1.8V
700 mA
VDDA18PCIEPLL
PU23 120 mA
APL5915KAI VDD18
10 mA
+5VALW VDDLT18
300 mA
VDDLTP18
+1.5VS 15 mA
AVDD
+3VS 3.3V 110 mA
VDD33
60 mA
+5VS U7 +5VS SB SB710

B
U4 AO4468 +1.2V_HT B
TPS2061DRG4 VDD 510mA
S5_1.2V 113 mA
USB_PHY_1.2V 197 mA
+USB_VCCA
AVDDCK_1.2V 62 mA
CKVDD_1.2 1.2V
+3VS
PCIE_PVDD 43 mA
PCIE_VDDR 600 mA
AVDD_SATA 567 mA
PLLVDD_SATA_1 93 mA
S5_3.3V 32 mA
FAN Control Realtek EC LAN AVDDC 17 mA
USB X2 APL5607 RTS5159 ENE KB926 Atheros AR8114 Mini Card ICS9LPRS488B
AVDD TX/RX 658 mA
+5V VDDQ 3.3V 131 mA
Dual +5VS 500mA +3.3VS 300mA +3.3VALW 30mA +3.3VALW 201mA +1.5VS 500mA +3.3V 400mA
+3.3VS 3mA +3.3VS 1A VDD33_18 71 mA
1.5A +3.3VALW 330mA +1.2V
AVDDCK_3.3V 47 mA
A A
XTLVDD_SATA 6 mA
RTC
Bettary VBAT 3V
LCD panel Audio AMP Audio Codec
15.6" TPA6017A2 ALC272 SATA
B+ 300mA +5V 25mA +5V 45mA +5V 3A Issued Date 2009/3/8 Deciphered Date 2010/03/12 Title
+3.3 350mA +3.3VS 25mA +3.3V THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, MB A5481
Custom C
401743
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Sheet 5 of 47
GRATIS - FOR FREE

5 4 3 2 1
D H_CADIP[0..15] H_CADOP[0..15] D
<12> H_CADIP[0..15] H_CADOP[0..15] <12>
H_CADIN[0..15] H_CADON[0..15]
<12> H_CADIN[0..15] H_CADON[0..15] <12>
+1.2V_HT
JCPU1A
D4 VLDT_A3 VLDT_B3 AE5 1 2
VLDT=500mA D3 AE4 C84 4.7U_0805_10V4Z
VLDT_A2 VLDT_B2
D2 VLDT_A1 VLDT_B1 AE3
D1 VLDT_A0 VLDT_B0 AE2
H_CADIP15 H_CADOP15
H_CADIN15
N5
P5
L0_CADIN_H15 L0_CADOUT_H15 T4
T3 H_CADON15 Reserve when PVT
H_CADIP14
H_CADIN14
M3
L0_CADIN_L15
L0_CADIN_H14
L0_CADOUT_L15
L0_CADOUT_H14 V5 H_CADOP14
H_CADON14 +5VS
FAN1 Conn +5VS
for cos down
M4 L0_CADIN_L14 L0_CADOUT_L14 U5
H_CADIP13 L5 V4 H_CADOP13 C92 10U_0805_10V4Z
L0_CADIN_H13 L0_CADOUT_H13
1
H_CADIN13 M5 V3 H_CADON13 1 2
H_CADIP12 L0_CADIN_L13 L0_CADOUT_L13 H_CADOP12 <BOM Structure> D13
K3 L0_CADIN_H12 L0_CADOUT_H12 Y5
2
H_CADIN12 K4 W5 H_CADON12 @ 1SS355_SOD323-2
H_CADIP11 L0_CADIN_L12 L0_CADOUT_L12 H_CADOP11 R247
H3 L0_CADIN_H11 L0_CADOUT_H11 AB5
H_CADIN11 H4 AA5 H_CADON11 0_0603_5%
2
H_CADIP10 L0_CADIN_L11 L0_CADOUT_L11 H_CADOP10 U1 @D4
@ D4 BAS16_SOT23-3
G5 L0_CADIN_H10 L0_CADOUT_H10 AB4 @
H_CADIN10 H5 AB3 H_CADON10 1 8 1 2
1
H_CADIP9 L0_CADIN_L10 L0_CADOUT_L10 H_CADOP9 EN GND
F3 L0_CADIN_H9 L0_CADOUT_H9 AD5 2 VIN GND 7
H_CADIN9 F4 AC5 H_CADON9 +VCC_FAN1 3 6
H_CADIP8 L0_CADIN_L9 L0_CADOUT_L9 H_CADOP8 VOUT GND C97
E5 L0_CADIN_H8 L0_CADOUT_H8 AD4 <28> EN_DFAN1 1 2 4 VSET GND 5
H_CADIN8 F5 AD3 H_CADON8 R733 0_0402_5% 1 10U_0805_10V4Z
C H_CADIP7 L0_CADIN_L8 L0_CADOUT_L8 H_CADOP7 C760 APL5607KI-TRG_SO8 C
N3 L0_CADIN_H7 L0_CADOUT_H7 T1 1 2
H_CADIN7 N2 R1 H_CADON7 @
L0_CADIN_L7 L0_CADOUT_L7 +3VS
HTT Interface
H_CADIP6 L1 U2 H_CADOP6 0.01U_0402_25V4Z C96
H_CADIN6 L0_CADIN_H6 L0_CADOUT_H6 H_CADON6 2 1000P_0402_50V7K
M1 L0_CADIN_L6 L0_CADOUT_L6 U3
H_CADIP5 L3 V1 H_CADOP5 1 2
L0_CADIN_H5 L0_CADOUT_H5
1
H_CADIN5 L2 U1 H_CADON5 <BOM Structure>
H_CADIP4 L0_CADIN_L5 L0_CADOUT_L5 H_CADOP4 R37
J1 L0_CADIN_H4 L0_CADOUT_H4 W2
H_CADIN4 K1 W3 H_CADON4 10K_0402_5%
H_CADIP3 L0_CADIN_L4 L0_CADOUT_L4 H_CADOP3
H_CADIN3
G1 L0_CADIN_H3 L0_CADOUT_H3 AA2
H_CADON3
40mil JP12
H1 AA3
2
H_CADIP2 L0_CADIN_L3 L0_CADOUT_L3 H_CADOP2 +VCC_FAN1
G3 L0_CADIN_H2 L0_CADOUT_H2 AB1 1
H_CADIN2 G2 AA1 H_CADON2
L0_CADIN_L2 L0_CADOUT_L2 <28> FAN_SPEED1 2
H_CADIP1 E1 AC2 H_CADOP1
H_CADIN1 L0_CADIN_H1 L0_CADOUT_H1 H_CADON1 3
F1 L0_CADIN_L1 L0_CADOUT_L1 AC3 1
H_CADIP0 E3 AD1 H_CADOP0 C91 CONN@
H_CADIN0 L0_CADIN_H0 L0_CADOUT_H0 H_CADON0 1000P_0402_50V7K ACES_85205-03001
E2 L0_CADIN_L0 L0_CADOUT_L0 AC1
2
<12> H_CLKIP1 J5
K5
L0_CLKIN_H1 L0_CLKOUT_H1 Y4
Y3
H_CLKOP1 <12> +3VS LDO FAN
<12> H_CLKIN1 L0_CLKIN_L1 L0_CLKOUT_L1 H_CLKON1 <12>
<12> H_CLKIP0 J3 L0_CLKIN_H0 L0_CLKOUT_H0 Y1 H_CLKOP0 <12>
1
<12> H_CLKIN0 J2 L0_CLKIN_L0 L0_CLKOUT_L0 W1 H_CLKON0 <12>
R40
10K_0402_5% JP38
1 2 H_CTLIP1_R P3 T5 H_CTLOP1_R 1 2 @ +VCC_FAN1 1
<12> H_CTLIP1 L0_CTLIN_H1 L0_CTLOUT_H1 H_CTLOP1 <12> 1
check AMD R45 1 20_0402_5% H_CTLIN1_R P4 R5 H_CTLON1_R R41 1 2 0_0402_5% 2
<12> H_CTLIN1 H_CTLON1 <12>
2
R46 0_0402_5% L0_CTLIN_L1 L0_CTLOUT_L1 R44 0_0402_5% FANPWN 2
<28> FANPWM 3 3
H_CTLIP0 N1 R2 H_CTLOP0 4
<12> H_CTLIP0 L0_CTLIN_H0 L0_CTLOUT_H0 H_CTLOP0 <12> 4
H_CTLIN0 P1 R3 H_CTLON0
<12> H_CTLIN0 L0_CTLIN_L0 L0_CTLOUT_L0 H_CTLON0 <12>
CONN@
FOX_PZ63823-284S-41F ACES_85205-0400
CONN@
Athlon 64 S1
B Processor Socket PWM FAN B
+1.2V_HT
R2 2 @ 1 51_0402_1% H_CTLIP1_R
R3 2 @ 1 51_0402_1% H_CTLIN1_R
AMD : 49.9 1%
ATI : 51 1%
+1.2V_HT
250 mil
VLDT CAP.
1 1 1 1 1 1
C86 C82 C90 C89 C83 C85
4.7U_0805_10V4Z 4.7U_0805_10V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 180P_0402_50V8J 180P_0402_50V8J
2 2 2 2 2 <BOM Structure> 2 <BOM Structure>
<BOM Structure> <BOM Structure>

Near CPU Socket
A A

SCHEMATIC, MB A5481
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401743 C
5 4 3 2 1
A B C D E
Processor DDR2 Memory Interface

<11> DDR_B_D[63..0]
JCPU1C
DDR_A_D[63..0] <10>
+1.8V DDR_B_D63 AD11 AA12 DDR_A_D63
4 DDR_B_D62 MB_DATA63 MA_DATA63 DDR_A_D62 4
AF11 MB_DATA62 MA_DATA62 AB12
DDR_B_D61 AF14 AA14 DDR_A_D61
MB_DATA61 MA_DATA61
2
DDR_B_D60 AE14 AB14 DDR_A_D60

R4 DDR_B_D59 MB_DATA60 MA_DATA60 DDR_A_D59
Y11 MB_DATA59 MA_DATA59 W11
1K_0402_1% DDR_B_D58 AB11 Y12 DDR_A_D58
+CPU_M_VREF DDR_B_D57 MB_DATA58 MA_DATA58 DDR_A_D57
AC12 MB_DATA57 MA_DATA57 AD13
DDR_B_D56 AF13 AB13 DDR_A_D56
1
DDR_B_D55 MB_DATA56 MA_DATA56 DDR_A_D55

(15/20, <6") AF15 MB_DATA55 MA_DATA55 AD15
1000P_0402_50V7K
0.1U_0402_16V4Z

MB_DATA54 MA_DATA54
2
1 1 DDR_B_D53 AC18 AB17 DDR_A_D53

MB_DATA53 MA_DATA53
C16
C100
R5 DDR_B_D52 AF19 Y17 DDR_A_D52

1K_0402_1% DDR_B_D51 MB_DATA52 MA_DATA52 DDR_A_D51
AD14 MB_DATA51 MA_DATA51 Y14
DDR_B_D50 AC14 W14 DDR_A_D50
2 2 DDR_B_D49 MB_DATA50 MA_DATA50 DDR_A_D49
AE18 W16
1

AD18 MB_DATA48 MA_DATA48 AD17
DDR_B_D47 AD20 Y18 DDR_A_D47
AC20 MB_DATA46 MA_DATA46 AD19
+CPU_M_VREF DDR_B_D45 AF23 AD21 DDR_A_D45
JCPU1B +0.9V DDR_B_D44 MB_DATA45 MA_DATA45 DDR_A_D44
AF24 MB_DATA44 MA_DATA44 AB21
W17 M_VREF VTT1 D10 AE20 MB_DATA42 MA_DATA42 AA18
C10 DDR_B_D41 AD22 AA20 DDR_A_D41
TP1 VTT_SENSE VTT2 DDR_B_D40 MB_DATA41 MA_DATA41 DDR_A_D40
Y10 VTT_SENSE VTT3 B10 AC22 MB_DATA40 MA_DATA40 Y20
AD10 DDR_B_D39 AE25 AA22 DDR_A_D39
VTT4 DDR_B_D38 MB_DATA39 MA_DATA39 DDR_A_D38
(10/10, <1") VTT5 W10 AD26 MB_DATA38 MA_DATA38 Y22
+1.8V R7 1 2 M_ZN AE10 AC10 DDR_B_D37 AA25 W21 DDR_A_D37
R6 M_ZN VTT6 MB_DATA37 MA_DATA37
2 1 39.2_0402_1% M_ZP AF10
M_ZP VTT7 AB10 DDR_B_D36 AA26 MB_DATA36 MA_DATA36 W22 DDR_A_D36
39.2_0402_1% AA10 DDR_B_D35 AE24 AA21 DDR_A_D35
VTT8 DDR_B_D34 MB_DATA35 MA_DATA35 DDR_A_D34
VTT9 A10 AD24 MB_DATA34 MA_DATA34 AB22
DDR_B_D33 AA23 AB24 DDR_A_D33
DDR_CS3_DIMMA# DDR_A_CLK2 DDR_B_D32 MB_DATA33 MA_DATA33 DDR_A_D32
V19 Y16 AA24 Y24
3
<10>
<10>
DDR_CS3_DIMMA#
DDR_CS2_DIMMA#
DDR_CS2_DIMMA# J22
MA0_CS_L3
MA0_CS_L2
DDRII Cmd/Ctrl//Clk MA0_CLK_H2
MA0_CLK_L2 AA16 DDR_A_CLK#2
DDR_A_CLK2
DDR_A_CLK#2
<10>
<10>
DDR_B_D31 G24
MB_DATA32
MB_DATA31
MA_DATA32
MA_DATA31 H22 DDR_A_D31
3
DDR_CS1_DIMMA# V22 E16 DDR_A_CLK1 DDR_B_D30 G23 H20 DDR_A_D30
<10> DDR_CS1_DIMMA# MA0_CS_L1 MA0_CLK_H1 DDR_A_CLK1 <10> MB_DATA30 MA_DATA30
DDR_CS0_DIMMA# T19 F16 DDR_A_CLK#1 DDR_B_D29 D26 E22 DDR_A_D29
<10> DDR_CS0_DIMMA# MA0_CS_L0 MA0_CLK_L1 DDR_A_CLK#1 <10> MB_DATA29 MA_DATA29
DDR_B_D28 C26 E21 DDR_A_D28
DDR_CS3_DIMMB# DDR_B_CLK2 DDR_B_D27 MB_DATA28 MA_DATA28 DDR_A_D27
<11> DDR_CS3_DIMMB# Y26 MB0_CS_L3 MB0_CLK_H2 AF18 DDR_B_CLK2 <11> G26 MB_DATA27 MA_DATA27 J19
DDR_CS2_DIMMB# J24 AF17 DDR_B_CLK#2 DDR_B_D26 G25 H24 DDR_A_D26
<11> DDR_CS2_DIMMB# MB0_CS_L2 MB0_CLK_L2 DDR_B_CLK#2 <11> MB_DATA26 MA_DATA26
DDR_CS1_DIMMB# W24 A17 DDR_B_CLK1 DDR_B_D25 E24 F22 DDR_A_D25
<11> DDR_CS1_DIMMB# MB0_CS_L1 MB0_CLK_H1 DDR_B_CLK1 <11> MB_DATA25 MA_DATA25
DDR_CS0_DIMMB# U23 A18 DDR_B_CLK#1 DDR_B_D24 E23 F20 DDR_A_D24
<11> DDR_CS0_DIMMB# MB0_CS_L0 MB0_CLK_L1 DDR_B_CLK#1 <11> MB_DATA24 MA_DATA24
DDRII Data
DDR_B_D23 C24 C23 DDR_A_D23
DDR_CKE1_DIMMB DDR_B_ODT1 DDR_B_D22 MB_DATA23 MA_DATA23 DDR_A_D22
<11> DDR_CKE1_DIMMB H26 MB_CKE1 MB0_ODT1 W23 DDR_B_ODT1 <11> B24 MB_DATA22 MA_DATA22 B22
DDR_CKE0_DIMMB J23 W26 DDR_B_ODT0 DDR_B_D21 C20 F18 DDR_A_D21
<11> DDR_CKE0_DIMMB MB_CKE0 MB0_ODT0 DDR_B_ODT0 <11> MB_DATA21 MA_DATA21
DDR_CKE1_DIMMA J20 V20 DDR_A_ODT1 DDR_B_D20 B20 E18 DDR_A_D20
<10> DDR_CKE1_DIMMA MA_CKE1 MA0_ODT1 DDR_A_ODT1 <10> MB_DATA20 MA_DATA20
DDR_CKE0_DIMMA J21 U19 DDR_A_ODT0 DDR_B_D19 C25 E20 DDR_A_D19
<10> DDR_CKE0_DIMMA MA_CKE0 MA0_ODT0 DDR_A_ODT0 <10> MB_DATA19 MA_DATA19
DDR_B_D18 D24 D22 DDR_A_D18
<10> DDR_A_MA[15..0] DDR_B_MA[15..0] <11> MB_DATA18 MA_DATA18
DDR_A_MA15 K19 J25 DDR_B_MA15 DDR_B_D17 A21 C19 DDR_A_D17
DDR_A_MA14 MA_ADD15 MB_ADD15 DDR_B_MA14 DDR_B_D16 MB_DATA17 MA_DATA17 DDR_A_D16
K20 MA_ADD14 MB_ADD14 J26 D20 MB_DATA16 MA_DATA16 G18
DDR_A_MA13 V24 W25 DDR_B_MA13 DDR_B_D15 D18 G17 DDR_A_D15
K24 MA_ADD12 MB_ADD12 L23 C18 MB_DATA14 MA_DATA14 C17
DDR_A_MA11 L20 L25 DDR_B_MA11 DDR_B_D13 D14 F14 DDR_A_D13
R19 MA_ADD10 MB_ADD10 U25 C14 MB_DATA12 MA_DATA12 E14
DDR_A_MA9 L19 L24 DDR_B_MA9 DDR_B_D11 A20 H17 DDR_A_D11
L22 MA_ADD8 MB_ADD8 M26 A19 MB_DATA10 MA_DATA10 E17
DDR_A_MA7 L21 L26 DDR_B_MA7 DDR_B_D9 A16 E15 DDR_A_D9
M19 MA_ADD6 MB_ADD6 N23 A15 MB_DATA8 MA_DATA8 H15
DDR_A_MA5 M20 N24 DDR_B_MA5 DDR_B_D7 A13 E13 DDR_A_D7
M24 MA_ADD4 MB_ADD4 N25 D12 MB_DATA6 MA_DATA6 C13
DDR_A_MA3 M22 N26 DDR_B_MA3 DDR_B_D5 E11 H12 DDR_A_D5
N22 MA_ADD2 MB_ADD2 P24 G11 MB_DATA4 MA_DATA4 H11
DDR_A_MA1 N21 P26 DDR_B_MA1 DDR_B_D3 B14 G14 DDR_A_D3
R21 MA_ADD0 MB_ADD0 T24 A14 MB_DATA2 MA_DATA2 H14
DDR_B_D1 A11 F12 DDR_A_D1
DDR_A_BS#2 MB_DATA1 MA_DATA1
<10> DDR_A_BS#2 K22 MA_BANK2 MB_BANK2 K26 DDR_B_BS#2 DDR_B_BS#2 <11>
DDR_B_D0 C11 MB_DATA0 MA_DATA0 G12 DDR_A_D0
DDR_A_BS#1 R20 T26 DDR_B_BS#1
2 <10> DDR_A_BS#1 MA_BANK1 MB_BANK1 DDR_B_BS#1 <11> <11> DDR_B_DM[7..0] DDR_A_DM[7..0] <10> 2
DDR_A_BS#0 T22 U26 DDR_B_BS#0 DDR_B_DM7 AD12 Y13 DDR_A_DM7
<10> DDR_A_BS#0 MA_BANK0 MB_BANK0 DDR_B_BS#0 <11> MB_DM7 MA_DM7
DDR_B_DM6 AC16 AB16 DDR_A_DM6
DDR_A_RAS# MB_DM6 MA_DM6
<10> DDR_A_RAS# T20 MA_RAS_L MB_RAS_L U24 DDR_B_RAS# DDR_B_RAS# <11>
DDR_B_DM5 AE22 MB_DM5 MA_DM5 Y19 DDR_A_DM5
DDR_A_CAS# U20 V26 DDR_B_CAS# DDR_B_DM4 AB26 AC24 DDR_A_DM4
<10> DDR_A_CAS# MA_CAS_L MB_CAS_L DDR_B_CAS# <11> MB_DM4 MA_DM4
DDR_A_WE# U21 U22 DDR_B_WE# DDR_B_DM3 E25 F24 DDR_A_DM3
<10> DDR_A_WE# MA_WE_L MB_WE_L DDR_B_WE# <11> MB_DM3 MA_DM3
DDR_B_DM2 A22 E19 DDR_A_DM2
CONN@ FOX_PZ63823-284S-41F DDR_B_DM1 MB_DM2 MA_DM2 DDR_A_DM1
B16 MB_DM1 MA_DM1 C15
Athlon 64 S1 DDR_B_DM0 A12 E12 DDR_A_DM0
Processor MB_DM0 MA_DM0
Socket DDR_B_DQS7 AF12 W12 DDR_A_DQS7
<11> DDR_B_DQS7 MB_DQS_H7 MA_DQS_H7 DDR_A_DQS7 <10>
DDR_B_DQS#7 AE12 W13 DDR_A_DQS#7
<11> DDR_B_DQS#7 MB_DQS_L7 MA_DQS_L7 DDR_A_DQS#7 <10>
DDR_B_DQS6 AE16 Y15 DDR_A_DQS6
DDR_B_DQS#6 AD16 W15 DDR_A_DQS#6
DDR_B_DQS5 AF21 AB19 DDR_A_DQS5
DDR_B_DQS#5 AF22 AB20 DDR_A_DQS#5
PLACE CLOSE TO PROCESSOR DDR_B_DQS4 AC25 AD23 DDR_A_DQS4
DDR_B_DQS#4 AC26 AC23 DDR_A_DQS#4
WITHIN 1.5 INCH <11> DDR_B_DQS#4
DDR_B_DQS3 MB_DQS_L4 MA_DQS_L4 DDR_A_DQS3
DDR_A_DQS#4 <10>
<11> DDR_B_DQS3 F26 MB_DQS_H3 MA_DQS_H3 G22 DDR_A_DQS3 <10>
DDR_B_DQS#3 E26 G21 DDR_A_DQS#3
DDR_B_DQS2 A24 C22 DDR_A_DQS2
DDR_A_CLK2 DDR_B_CLK2 DDR_B_DQS#2 A23 C21 DDR_A_DQS#2
1 1 DDR_B_DQS1 D16 G16 DDR_A_DQS1
DDR_B_DQS#1 C16 G15 DDR_A_DQS#1
C102 C17 DDR_B_DQS0 C12 G13 DDR_A_DQS0
1.5P_0402_50V8C 1.5P_0402_50V8C <11> DDR_B_DQS0 MB_DQS_H0 MA_DQS_H0 DDR_A_DQS0 <10>
DDR_B_DQS#0 B12 H13 DDR_A_DQS#0
2 2 <11> DDR_B_DQS#0 MB_DQS_L0 MA_DQS_L0 DDR_A_DQS#0 <10>
DDR_A_CLK#2 DDR_B_CLK#2
DDR_A_CLK1 DDR_B_CLK1 CONN@ FOX_PZ63823-284S-41F

1 1 Athlon 64 S1
Processor Socket
C104 C105
1.5P_0402_50V8C 1.5P_0402_50V8C
1 DDR_A_CLK#1 2 DDR_B_CLK#1 2 1

SCHEMATIC, MB A5481
hexainf@hotmail.com AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
401743 0.1
GRATIS - FOR FREE A B C D

E
Sheet 7 of 46
5 4 3 2 1
+1.8VS
2
R344
300_0402_5%
+2.5VDDA
VDDA=300mA
L4 <15/20>
1
LDT_RST# +2.5VS 1 2 3300P_0402_50V7K
<17> LDT_RST#
1 FCM2012CF-800T06_2P
1 1 1 1
C721 C113 +
0.01U_0402_25V4Z 150U_D2_6.3VM C116 C118 C22
@ 0.22U_0603_16V4Z +1.8V
2 2 2 2 2
D 4.7U_0805_10V4Z JCPU1D VID1: For compatibility D
<BOM Structure> F8 AF6 CPU_THERMTRIP#_R CPU_VID1 1 2 with future processors
VDDA2 THERMTRIP_L CPU_PROCHOT#_1.8 R24 300_0402_5%
F9 VDDA1 PROCHOT_L AC7 <BOM Structure>
<BOM Structure> CPU_PRESENT# 1 2
+1.8VS LDT_RST# B7 R64 1K_0402_5%
<BOM Structure>
H_PWRGD RESET_L CPU_TEST26_BURNIN#
A7 PWROK 1 2
LDT_STOP# F10 R27 300_0402_5%
LDTSTOP_L
2
VID5 A5 CPU_VID5 <45>

R346 2 1 CPU_SIC AF4 C6
SIC VID4 CPU_VID4 <45>
300_0402_5% R13 300_0402_5% AF5 A6 CPU_TEST21_SCANEN 1 2
SID VID3 CPU_VID3 <45>
A4 R47 300_0402_5%
VID2 CPU_VID2 <45>
+1.2V_HT R61 1 2 44.2_0402_1% CPU_HTREF1 P6 C5 CPU_VID1 <45>
1
H_PWRGD R16 HTREF1 VID1

<17> H_PWRGD 1 2 44.2_0402_1% CPU_HTREF0 R6 HTREF0 VID0 B5 CPU_VID0 <45>
(5/10, >1")
1 CPU_PRESENT_L AC6 CPU_PRESENT#
C720 F6
<45> CPU_VCC_SENSE VDD_FB_H
0.01U_0402_25V4Z (10/5/5/5/10) E6 A3
<45> CPU_VSS_SENSE VDD_FB_L PSI_L PSI_L <45> +1.8V
@
2 TP26
W9 VDDIO_FB_H
TP3 Y9 2 1 CPU_TEST25_H_BYPASSCLK_H
VDDIO_FB_L R65 510_0402_5%
<16> CLK_CPU_BCLK 1 2 3900P_0402_50V7K CPU_CLKIN_SC_P A9 CLKIN_H
C109 CPU_CLKIN_SC_N A8 2 1 CPU_TEST25_L_BYPASSCLK_L
CLKIN_L
1
+1.8VS R68 510_0402_5%
CPU_DBRDY G10 E10 CPU_DBREQ# 2 1 CPU_TEST19_PLLTEST0
R22 DBRDY DBREQ_L R69 300_0402_5%
2
169_0402_1% CPU_TMS AA9 2 1 CPU_TEST18_PLLTEST1

R342 CPU_TCK TMS CPU_TDO R66 300_0402_5%
AC9 AE9
2
CPU_TRST# TCK TDO
300_0402_5% <16> CLK_CPU_BCLK# 1 2 AD9 TRST_L
C23 3900P_0402_50V7K CPU_TDI AF9 R53
TDI 80.6_0402_1%
1
LDT_STOP# CPU_TEST25_H_BYPASSCLK_H E9 C9 CPU_TEST29_H_FBCLKOUT_P 1 2

C <13,17> LDT_STOP# TEST25_H TEST29_H C
CPU_TEST25_L_BYPASSCLK_L E8 C8 CPU_TEST29_L_FBCLKOUT_N
CPU_TEST19_PLLTEST0 TEST25_L TEST29_L
1 G9 TEST19 <BOM Structure>
C719 CPU_TEST18_PLLTEST1 H10 ROUTE AS 80 Ohm DIFFERENTIAL PAIR
TEST18
MISC
0.01U_0402_25V4Z AA7 PLACE IT CLOSE TO CPU WITHIN 1"
@ TEST13
C2 TEST9
2 TP5 TP6
D7 TEST17 TEST24 AE7
TP30 E7 AD7 TP7
TP8 TEST16 TEST23 TP9
F7 TEST15 TEST22 AE8
TP28 C7 AB8 CPU_TEST21_SCANEN
TP31 TEST14 TEST21 TP29
AC8 TEST12 TEST20 AF7
+3VS C3 J7
C119 TEST7 TEST28_H
AA6 TEST6 TEST28_L H8
0.1U_0402_16V4Z CPU_THERMDC W7 AF8
(10/10) CPU_THERMDA THERMDC TEST27 CPU_TEST26_BURNIN#
1 2 W8 THERMDA TEST26 AE6
Y6 TEST3 TEST10 K8
AB6 TEST2 TEST8 C4
P20 RSVD0 RSVD8 H16

U3 P19 B18
RSVD1 RSVD9
1 VDD SCLK 8 EC_SMB_CK2 <28> N20 RSVD2
N19 RSVD3 RSVD10 B3
CPU_THERMDA 2 7 C1
D+ SDATA EC_SMB_DA2 <28> RSVD11
1 2 CPU_THERMDC 3 6 H6
C120 2200P_0402_50V7K D- ALERT# RSVD12 +1.8V
RSVD13 G6
4 5 D5 +3VALW
THERM# GND RSVD14
1
R24 +1.8V +3VALW
RSVD15
1
ADM1032ARMZ-2REEL_MSOP8 W18 R18
RSVD16 R25
<BOM Structure> R26 RSVD4 RSVD17 R23
1
F75383M_MSOP8 R25 AA8 1K_0402_5% @ 1K_0402_5%
B RSVD5 RSVD18 R8 R17 B
P22 H18
2
RSVD6 RSVD19
SMBus Address: 1001110X (b) R22 H19
2 2
RSVD7 RSVD20 300_0402_5% 10K_0402_5%
2
B
B
Q2
2
FOX_PZ63823-284S-41F Q3 MMBT3904_NL_SOT23-3
E
CONN@ CPU_THERMTRIP#_R 3 1H_THERMTRIP# 3 1 MAINPWON <39,41>
C
@
MMBT3904_NL_SOT23-3
H_THERMTRIP# <18>
AMD: suggest DBREQ need pull high

+1.8V
@ 220_0402_5% R33
@ 220_0402_5% R38
@ 220_0402_5% R34
@ 220_0402_5% R35
220_0402_5% R36
+1.8V
HDT Connector
1
1
JP3
R20
1 2
2
3 4 300_0402_5%
CPU_DBREQ#
5 6
2
CPU_DBRDY 7 8
CPU_TCK
9 10 CPU_PROCHOT#_1.8
11 12 1 2 H_PROCHOT_R# <17>
CPU_TMS +3VS R52 0_0402_5%
CPU_TDI
13 14
CPU_TRST#
15 16
17 18
5
CPU_TDO
A 19 20 LDT_RST# A
2
P
21 22 HDT_RST# B
23 24 4 Y
26 A 1 SB_PWRGD <18,33>
G
NOTE: HDT TERMINATION IS REQUIRED U51

NC7SZ08P5X_NL_SC70-5
FOR REV. Ax SILICON ONLY.
3
@ SAMTEC_ASP-68200-07 <BOM Structure>

SCHEMATIC, MB A5481
5 4 3 2 1
5 4 3 2 1
JCPU1F
AA4 VSS1 VSS66 J6
+CPU_CORE +CPU_CORE AA11 J8
JCPU1E VSS2 VSS67
AA13 J10
VDD(+CPU_CORE) decoupling. AC4
AD2
VDD1
VDD2
VDD43
VDD44
V12
V14
AA15
AA17
VSS3
VSS4
VSS5
VSS68
VSS69
VSS70
J12
J14
G4 VDD3 VDD45 W4 AA19 VSS6 VSS71 J16
H2 VDD4 VDD46 Y2 AB2 VSS7 VSS72 J18
+CPU_CORE J9 J15 AB7 K2
D VDD5 VDD47 VSS8 VSS73 D
J11 VDD6 VDD48 K16 AB9 VSS9 VSS74 K7
J13 VDD7 VDD49 L15 AB23 VSS10 VSS75 K9
K6 VDD8 VDD50 M16 AB25 VSS11 VSS76 K11
1 1 1 1 1 K10 VDD9 VDD51 P16 AC11 VSS12 VSS77 K13
K12 VDD10 VDD52 T16 AC13 VSS13 VSS78 K15
+ C26 + C32 + C27 + C28 + C29 K14 U15 AC15 K17
330U_D2E_2.5VM_R9M 330U_D2E_2.5VM_R9M 330U_D2E_2.5VM_R9M 330U_D2E_2.5VM_R9M 330U_D2E_2.5VM_R9M VDD11 VDD53 VSS14 VSS79
L4 VDD12 VDD54 V16 AC17 VSS15 VSS80 L6
@ L7 +1.8V AC19 L8
2 2 2 2 2 VDD13 VSS16 VSS81
L9 VDD14 AC21 VSS17 VSS82 L10
L11 VDD15 VDDIO1 H25 AD6 VSS18 VSS83 L12
L13 J17 AD8 L14
Near CPU Socket M2
VDD16
VDD17
VDDIO2
VDDIO3 K18 AD25
VSS19
VSS20
VSS84
VSS85 L16
M6 VDD18 VDDIO4 K21 AE11 VSS21 VSS86 L18
M8 VDD19 VDDIO5 K23 AE13 VSS22 VSS87 M7
+CPU_CORE
Power
M10 VDD20 VDDIO6 K25 AE15 VSS23 VSS88 M9
N7 VDD21 VDDIO7 L17 AE17 VSS24 VSS89 M11
N9 VDD22 VDDIO8 M18 AE19 VSS25 VSS90 M17
N11 VDD23 VDDIO9 M21 AE21 VSS26 VSS91 N4
1 1 1 1 1 1 1 1 1 P8 VDD24 VDDIO10 M23 AE23 VSS27 VSS92 N8
C33 C36 C34 C35 C178 C41 C190 C39 C128 P10 M25 B4 N10
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M VDD25 VDDIO11 VSS28 VSS93
R4 VDD26 VDDIO12 N17 B6 VSS29 VSS94 N16
R7 VDD27 VDDIO13 P18 B8 VSS30 VSS95 N18
2 2 2 <BOM Structure> 2 2 2 2 2 2
Ground
R9 VDD28 VDDIO14 P21 B9 VSS31 VSS96 P2
R11 VDD29 VDDIO15 P23 B11 VSS32 VSS97 P7
T2 VDD30 VDDIO16 P25 B13 VSS33 VSS98 P9
+CPU_CORE +CPU_CORE +CPU_CORE T6 R17 B15 P11
VDD31 VDDIO17 VSS34 VSS99
T8 VDD32 VDDIO18 T18 B17 VSS35 VSS100 P17
T10 VDD33 VDDIO19 T21 B19 VSS36 VSS101 R8
<BOM Structure> T12 VDD34 VDDIO20 T23 B21 VSS37 VSS102 R10
1 1 1 1 T14 VDD35 VDDIO21 T25 B23 VSS38 VSS103 R16
C129 C151 C122 C47 U7 U17 B25 R18
0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.01U_0402_25V7K 180P_0402_50V8J VDD36 VDDIO22 VSS39 VSS104
U9 VDD37 VDDIO23 V18 D6 VSS40 VSS105 T7
C C
U11 VDD38 VDDIO24 V21 D8 VSS41 VSS106 T9
2 2 2 2
U13 V23 D9 T11
Under CPU Socket V6
VDD39
VDD40
VDDIO25
VDDIO26 V25 D11
VSS42
VSS43
VSS107
VSS108 T13
V8 VDD41 VDDIO27 Y25 D13 VSS44 VSS109 T15
V10 VDD42 D15 VSS45 VSS110 T17
D17 VSS46 VSS111 U4
D19 VSS47 VSS112 U6
FOX_PZ63823-284S-41F D21 VSS48 VSS113 U8
CONN@ D23 U10
VDDIO decoupling. Athlon 64 S1
Processor Socket
D25
E4
VSS49
VSS50
VSS51
VSS114
VSS115
VSS116
U12
U14
F2 VSS52 VSS117 U16
F11 VSS53 VSS118 U18
F13 VSS54 VSS119 V2
+1.8V F15 V7
+1.8V VSS55 VSS120
F17 VSS56 VSS121 V9
F19 VSS57 VSS122 V11
F21 VSS58 VSS123 V13
1 1 1 1 F23 VSS59 VSS124 V15
C170 C181 C124 C147 F25 V17
22U_0805_6.3V6M 22U_0805_6.3V6M 0.22U_0603_16V4Z 0.22U_0603_16V4Z VSS60 VSS125
H7 VSS61 VSS126 W6
H9 VSS62 VSS127 Y21
2 2 2 2
H21 VSS63 VSS128 Y23
H23 VSS64 VSS129 N6
<BOM Structure> J4 VSS65
FOX_PZ63823-284S-41F
Under CPU Socket CONN@
Athlon 64 S1
+0.9V Processor Socket
Near Power Supply
B VTT decoupling. C66 +
1
C: Change to NBO CAP B
Between CPU Socket and DIMM

+1.8V 150U_D2_6.3VM
2
1 1 1 1
C157 C182 C68 C188
0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z +0.9V
2 2 2 2
<BOM Structure> 1 1 1 1 1 1 1 1
180PF Qt'y follow the distance between C155 C146 C184 C173 C72 C145 C180 C121
+1.8V +1.8V CPU socket and DIMM0. <2.5inch> 4.7U_0805_10V4Z 4.7U_0805_10V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 1000P_0402_50V7K 1000P_0402_50V7K 180P_0402_50V8J 180P_0402_50V8J
2 2 2 2 2 2 2 2 <BOM Structure>
1 1 1 1 1 1
C175 C159 C189 C136 C156 C158 <BOM Structure> <BOM Structure> <BOM Structure> <BOM Structure> <BOM Structure>
0.01U_0402_25V7K 0.01U_0402_25V7K 180P_0402_50V8J 180P_0402_50V8J 180P_0402_50V8J 180P_0402_50V8J
2 2 2 2 2 2
Near CPU Socket Right side.
<BOM Structure> <BOM Structure> <BOM Structure> <BOM Structure> +0.9V
+1.8V 1 1 1 1 1 1 1 1
C73 C70 C127 C185 C164 C163 C152 C179
4.7U_0805_10V4Z 4.7U_0805_10V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 1000P_0402_50V7K 1000P_0402_50V7K 180P_0402_50V8J 180P_0402_50V8J
1 2 2 2 2 2 2 2 2
1 1 1 1
+ C162
C76 C167 C187 C132 <BOM Structure> <BOM Structure> <BOM Structure>
A 4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z 220U_D2_4VM_R15 A
2 <BOM Structure> 2 2 2 <BOM Structure> 2 Near CPU Socket Left side.

SCHEMATIC, MB A5481
401743 C
GRATIS - FOR FREE 5 4 3 2

1
Sheet 9 of 46
5 4 3 2 1
+1.8V +1.8V +DIMM_VREF +1.8V
+0.9V +1.8V
1
0.1U_0402_16V4Z
R398 RP1
JDIMM2 C507 DDR_A_MA11 8 1 1 2
1 2 1 1 DDR_A_MA7 7 2 C81 0.1U_0402_16V4Z
VREF VSS DDR_A_D4 1K_0402_1% DDR_A_MA6
3 VSS DQ4 4 6 3 1 2
C503
4.7U_0805_10V4Z
DDR_A_D0 5 6 DDR_A_D5 DDR_A_MA2 5 4 C139 0.1U_0402_16V4Z
2
DDR_A_D1 DQ0 DQ5
7 DQ1 VSS 8
DDR_A_DM0 2 2 47_0804_8P4R_5%
9 VSS DM0 10
D DDR_A_DQS#0 RP2 D
11 DQS0# VSS 12
DDR_A_DQS0 13 14 DDR_A_D6 DDR_CKE0_DIMMA 8 1 1 2
DQS0 DQ6
1
15 16 DDR_A_D7 R397 DDR_CS2_DIMMA# 7 2 C192 0.1U_0402_16V4Z
DDR_A_D2 VSS DQ7 DDR_A_BS#2
17 DQ2 VSS 18 6 3 1 2
DDR_A_D3 19 20 DDR_A_D12 DDR_A_MA12 5 4 C88 0.1U_0402_16V4Z
DQ3 DQ12 DDR_A_D13 1K_0402_1%
21 VSS DQ13 22
DDR_A_D8 23 24 47_0804_8P4R_5%
2
DDR_A_D9 DQ8 VSS DDR_A_DM1 RP3
25 DQ9 DM1 26
27 28 DDR_A_MA4 8 1 1 2
DDR_A_DQS#1 VSS VSS DDR_A_CLK1 DDR_A_MA0 C117 0.1U_0402_16V4Z
29 DQS1# CK0 30 DDR_A_CLK1 <7> 7 2
DDR_A_DQS1 31 32 DDR_A_CLK#1 DDR_A_BS#1 6 3 1 2
DQS1 CK0# DDR_A_CLK#1 <7>
33 34 DDR_CS0_DIMMA# 5 4 C144 0.1U_0402_16V4Z
DDR_A_D10 VSS VSS DDR_A_D14 <BOM Structure>
35 DQ10 DQ14 36
DDR_A_D11 37 38 DDR_A_D15 47_0804_8P4R_5% <BOM Structure>
DQ11 DQ15 RP4
39 VSS VSS 40
DDR_A_MA9 8 1 1 2
DDR_A_MA8 7 2 C114 0.1U_0402_16V4Z
41 42 DDR_A_MA5 6 3 1 2
DDR_A_D16 VSS VSS DDR_A_D20 DDR_A_MA3 C95 0.1U_0402_16V4Z
43 DQ16 DQ20 44 5 4
DDR_A_D17 45 46 DDR_A_D21 DDR_A_D[0..63]
DQ17 DQ21 <7> DDR_A_D[0..63] 47_0804_8P4R_5%
47 VSS VSS 48 <BOM Structure>
DDR_A_DQS#2 49 50 DDR_A_DM[0..7] RP5
DQS2# NC <7> DDR_A_DM[0..7]
DDR_A_DQS2 51 52 DDR_A_DM2 8 1 1 2
DQS2 DM2 DDR_A_DQS[0..7] DDR_A_MA1 C193 0.1U_0402_16V4Z
53 VSS VSS 54 <7> DDR_A_DQS[0..7] 7 2
DDR_A_D18 55 56 DDR_A_D22 DDR_A_MA10 6 3 1 2
DDR_A_D19 DQ18 DQ22 DDR_A_D23 DDR_A_MA[0..15] DDR_A_BS#0 C125 0.1U_0402_16V4Z
57 DQ19 DQ23 58 <7> DDR_A_MA[0..15] 5 4
59 VSS VSS 60
DDR_A_D24 61 62 DDR_A_D28 DDR_A_DQS#[0..7] 47_0804_8P4R_5% <BOM Structure>
DDR_A_D25 DQ24 DQ28 DDR_A_D29 <7> DDR_A_DQS#[0..7] RP6
63 DQ25 DQ29 64
65 66 DDR_A_WE# 8 1 1 2
C DDR_A_DM3 VSS VSS DDR_A_DQS#3 DDR_A_CAS# C103 0.1U_0402_16V4Z C
67 DM3 DQS3# 68 7 2
69 70 DDR_A_DQS3 DDR_CS1_DIMMA# 6 3 1 2
NC DQS3 DDR_A_ODT1 C99 0.1U_0402_16V4Z
71 VSS VSS 72 5 4
DDR_A_D26 73 74 DDR_A_D30 <BOM Structure>
DDR_A_D27 DQ26 DQ30 DDR_A_D31 47_0804_8P4R_5%
75 DQ27 DQ31 76 <BOM Structure>
77 78 RP7
DDR_CKE0_DIMMA VSS VSS DDR_CKE1_DIMMA DDR_A_RAS#
<7> DDR_CKE0_DIMMA 79 CKE0 NC/CKE1 80 DDR_CKE1_DIMMA <7> 8 1 1 2
81 82 DDR_A_ODT0 7 2 C107 0.1U_0402_16V4Z
DDR_CS2_DIMMA# VDD VDD DDR_A_MA15 DDR_A_MA13
<7> DDR_CS2_DIMMA# 83 NC NC/A15 84 6 3 1 2
DDR_A_BS#2 85 86 DDR_A_MA14 DDR_CS3_DIMMA# 5 4 C98 0.1U_0402_16V4Z
<7> DDR_A_BS#2 BA2 NC/A14 <BOM Structure>
87 VDD VDD 88
DDR_A_MA12 89 90 DDR_A_MA11 47_0804_8P4R_5% <BOM Structure>
DDR_A_MA9 A12 A11 DDR_A_MA7 RP8
91 A9 A7 92
DDR_A_MA8 93 94 DDR_A_MA6 DDR_CKE1_DIMMA 8 1 1 2
A8 A6 DDR_A_MA15 C101 0.1U_0402_16V4Z
95 VDD VDD 96 7 2
DDR_A_MA5 97 98 DDR_A_MA4 DDR_A_MA14 6 3 1 2
DDR_A_MA3 A5 A4 DDR_A_MA2 C191 0.1U_0402_16V4Z
99 A3 A2 100 5 4
DDR_A_MA1 101 102 DDR_A_MA0
A1 A0 47_0804_8P4R_5%
103 VDD VDD 104 <BOM Structure>
DDR_A_MA10 105 106 DDR_A_BS#1
A10/AP BA1 DDR_A_BS#1 <7>
DDR_A_BS#0 107 108 DDR_A_RAS#
<7> DDR_A_BS#0 BA0 RAS# DDR_A_RAS# <7>
DDR_A_WE# 109 110 DDR_CS0_DIMMA#
<7> DDR_A_WE# WE# S0# DDR_CS0_DIMMA# <7>
111 VDD VDD 112
DDR_A_CAS# 113 114 DDR_A_ODT0
<7> DDR_A_CAS# CAS# ODT0 DDR_A_ODT0 <7>
DDR_CS1_DIMMA# 115 116 DDR_A_MA13
<7> DDR_CS1_DIMMA# NC/S1# NC/A13
117 VDD VDD 118 <BOM Structure>
DDR_A_ODT1 119 120 DDR_CS3_DIMMA#
<7> DDR_A_ODT1 NC/ODT1 NC DDR_CS3_DIMMA# <7>
121 VSS VSS 122
DDR_A_D32 123 124 DDR_A_D36
DDR_A_D33 DQ32 DQ36 DDR_A_D37
125 DQ33 DQ37 126
B B
127 VSS VSS 128
DDR_A_DQS#4 129 130 DDR_A_DM4
DDR_A_DQS4 DQS4# DM4
131 DQS4 VSS 132
133 134 DDR_A_D38
DDR_A_D34 VSS DQ38 DDR_A_D39
135 DQ34 DQ39 136
DDR_A_D35 137 138
DQ35 VSS DDR_A_D44
139 VSS DQ44 140
DDR_A_D40 141 142 DDR_A_D45
DDR_A_D41 DQ40 DQ45
143 DQ41 VSS 144
145 146 DDR_A_DQS#5
DDR_A_DM5 VSS DQS5# DDR_A_DQS5
147 DM5 DQS5 148
149 VSS VSS 150
DDR_A_D42 151 152 DDR_A_D46
153 DQ43 DQ47 154
155 VSS VSS 156
DDR_A_D48 157 158 DDR_A_D52
159 DQ49 DQ53 160
161 VSS VSS 162
163 164 DDR_A_CLK2
NC,TEST CK1 DDR_A_CLK2 <7>
165 166 DDR_A_CLK#2
VSS CK1# DDR_A_CLK#2 <7>
DDR_A_DQS#6 167 168
DDR_A_DQS6 DQS6# VSS DDR_A_DM6
169 DQS6 DM6 170
171 VSS VSS 172
DDR_A_D50 173 174 DDR_A_D54
175 DQ51 DQ55 176
177 VSS VSS 178
DDR_A_D56 179 180 DDR_A_D60
181 DQ57 DQ61 182
183 VSS VSS 184
DDR_A_DM7 185 186 DDR_A_DQS#7
A DM7 DQS7# DDR_A_DQS7 A
187 VSS DQS7 188
DDR_A_D58 189 190
DDR_A_D59 DQ58 VSS DDR_A_D62
191 DQ59 DQ62 192
193 194 DDR_A_D63
SB_CK_SDAT VSS DQ63
<11,16,18,31> SB_CK_SDAT 195 SDA VSS 196
SB_CK_SCLK 197 198 R12 1 2 10K_0402_5%
<11,16,18,31> SB_CK_SCLK SCL SAO
199 200 R10 1 2 10K_0402_5%
+3VS
1 203
VDDSPD
GND
SA1
GND 204
C448 2005/10/11 2010/03/12 Title
FOX_AS0A426-M2RN-7F
Issued Date Deciphered Date
2
0.1U_0402_16V4Z CONN@ THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, MB A5481
DIMM2 REV H:5.2mm (BOT) MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2 1
5 4 3 2 1
+1.8V +1.8V +DIMM_VREF
+0.9V +1.8V
RP9
0.1U_0402_16V4Z
DDR_B_MA2 8 1 2 1
4.7U_0805_10V4Z
C202
C198
JDIMM1 DDR_B_MA0 7 2 C196 0.1U_0402_16V4Z
1 2 1 1 DDR_B_BS#1 6 3 1 2
VREF VSS DDR_B_D4 DDR_B_RAS# C209 0.1U_0402_16V4Z
3 VSS DQ4 4 5 4
DDR_B_D0 5 6 DDR_B_D5
DDR_B_D1 DQ0 DQ5 47_0804_8P4R_5%
7 DQ1 VSS 8
DDR_B_DM0 2 2
9 VSS DM0 10
D DDR_B_DQS#0 RP10 D
11 DQS0# VSS 12
DDR_B_DQS0 13 14 DDR_B_D6 DDR_B_MA11 8 1 2 1
DQS0 DQ6 DDR_B_D7 DDR_B_MA7 C197 0.1U_0402_16V4Z
15 VSS DQ7 16 7 2
DDR_B_D2 17 18 DDR_B_MA6 6 3 1 2
DDR_B_D3 DQ2 VSS DDR_B_D12 DDR_B_MA4 C211 0.1U_0402_16V4Z
19 DQ3 DQ12 20 5 4
21 22 DDR_B_D13
DDR_B_D8 VSS DQ13 47_0804_8P4R_5%
23 DQ8 VSS 24
DDR_B_D9 25 26 DDR_B_DM1
DQ9 DM1 RP11
27 VSS VSS 28
DDR_B_DQS#1 29 30 DDR_B_CLK1 8 1 2 1
DQS1# CK0 DDR_B_CLK1 <7>
DDR_B_DQS1 31 32 DDR_B_CLK#1 DDR_CS2_DIMMB# 7 2 C205 0.1U_0402_16V4Z
DQS1 CK0# DDR_B_CLK#1 <7>
33 34 DDR_B_BS#2 6 3 1 2
DDR_B_D10 VSS VSS DDR_B_D14 DDR_CKE0_DIMMB C213 0.1U_0402_16V4Z
35 DQ10 DQ14 36 5 4
DDR_B_D11 37 38 DDR_B_D15
DQ11 DQ15 47_0804_8P4R_5%
39 VSS VSS 40
RP12
41 42 DDR_B_MA5 8 1 2 1
DDR_B_D16 VSS VSS DDR_B_D20 DDR_B_MA8 C199 0.1U_0402_16V4Z
43 DQ16 DQ20 44 7 2
DDR_B_D17 45 46 DDR_B_D21 DDR_B_MA9 6 3 1 2
DQ17 DQ21 DDR_B_MA12 C200 0.1U_0402_16V4Z
47 VSS VSS 48 5 4
DDR_B_DQS#2 49 50
DDR_B_DQS2 DQS2# NC DDR_B_DM2 DDR_B_D[0..63] 47_0804_8P4R_5%
51 DQS2 DM2 52 <7> DDR_B_D[0..63]
53 VSS VSS 54
DDR_B_D18 55 56 DDR_B_D22 DDR_B_DM[0..7] RP13
DQ18 DQ22 <7> DDR_B_DM[0..7]
DDR_B_D19 57 58 DDR_B_D23 DDR_B_BS#0 8 1 2 1
DQ19 DQ23 DDR_B_DQS[0..7] DDR_B_MA10 C206 0.1U_0402_16V4Z
59 VSS VSS 60 <7> DDR_B_DQS[0..7] 7 2
DDR_B_D24 61 62 DDR_B_D28 DDR_B_MA1 6 3 1 2
DDR_B_D25 DQ24 DQ28 DDR_B_D29 DDR_B_MA[0..15] DDR_B_MA3 C201 0.1U_0402_16V4Z
63 DQ25 DQ29 64 <7> DDR_B_MA[0..15] 5 4
65 VSS VSS 66
C DDR_B_DM3 67 68 DDR_B_DQS#3 DDR_B_DQS#[0..7] 47_0804_8P4R_5% C
DM3 DQS3# DDR_B_DQS3 <7> DDR_B_DQS#[0..7]
69 NC DQS3 70
71 72 RP14
DDR_B_D26 VSS VSS DDR_B_D30 DDR_B_ODT1
73 DQ26 DQ30 74 8 1 2 1
DDR_B_D27 75 76 DDR_B_D31 DDR_CS1_DIMMB# 7 2 C210 0.1U_0402_16V4Z
DQ27 DQ31 DDR_B_CAS#
77 VSS VSS 78 6 3 1 2
DDR_CKE0_DIMMB 79 80 DDR_CKE1_DIMMB DDR_B_WE# 5 4 C208 0.1U_0402_16V4Z
<7> DDR_CKE0_DIMMB CKE0 NC/CKE1 DDR_CKE1_DIMMB <7>
81 VDD VDD 82
DDR_CS2_DIMMB# 83 84 DDR_B_MA15 47_0804_8P4R_5%
<7> DDR_CS2_DIMMB# NC NC/A15
DDR_B_BS#2 85 86 DDR_B_MA14
<7> DDR_B_BS#2 BA2 NC/A14
87 88 RP15
DDR_B_MA12 VDD VDD DDR_B_MA11 DDR_CS0_DIMMB#
89 A12 A11 90 8 1 2 1
DDR_B_MA9 91 92 DDR_B_MA7 DDR_B_ODT0 7 2 C194 0.1U_0402_16V4Z
DDR_B_MA8 A9 A7 DDR_B_MA6 DDR_B_MA13
93 A8 A6 94 6 3 1 2
95 96 DDR_CS3_DIMMB# 5 4 C207 0.1U_0402_16V4Z
DDR_B_MA5 VDD VDD DDR_B_MA4
97 A5 A4 98
DDR_B_MA3 99 100 DDR_B_MA2 47_0804_8P4R_5%
DDR_B_MA1 A3 A2 DDR_B_MA0
101 A1 A0 102
103 104 RP16
DDR_B_MA10 VDD VDD DDR_B_BS#1
105 A10/AP BA1 106 DDR_B_BS#1 <7> 8 1 2 1
DDR_B_BS#0 107 108 DDR_B_RAS# DDR_CKE1_DIMMB 7 2 C212 0.1U_0402_16V4Z
<7> DDR_B_BS#0 BA0 RAS# DDR_B_RAS# <7>
DDR_B_WE# 109 110 DDR_CS0_DIMMB# DDR_B_MA15 6 3 1 2
<7> DDR_B_WE# WE# S0# DDR_CS0_DIMMB# <7>
111 112 DDR_B_MA14 5 4 C195 0.1U_0402_16V4Z
DDR_B_CAS# VDD VDD DDR_B_ODT0
<7> DDR_B_CAS# 113 CAS# ODT0 114 DDR_B_ODT0 <7>
DDR_CS1_DIMMB# 115 116 DDR_B_MA13 47_0804_8P4R_5%
<7> DDR_CS1_DIMMB# NC/S1# NC/A13
117 VDD VDD 118
DDR_B_ODT1 119 120 DDR_CS3_DIMMB#
<7> DDR_B_ODT1 NC/ODT1 NC DDR_CS3_DIMMB# <7>
121 VSS VSS 122
DDR_B_D32 123 124 DDR_B_D36
DDR_B_D33 DQ32 DQ36 DDR_B_D37
125 DQ33 DQ37 126
B B
127 VSS VSS 128
DDR_B_DQS#4 129 130 DDR_B_DM4
DDR_B_DQS4 DQS4# DM4
131 DQS4 VSS 132
133 134 DDR_B_D38
DDR_B_D34 VSS DQ38 DDR_B_D39
135 DQ34 DQ39 136
DDR_B_D35 137 138
DQ35 VSS DDR_B_D44
139 VSS DQ44 140
DDR_B_D40 141 142 DDR_B_D45
DDR_B_D41 DQ40 DQ45
143 DQ41 VSS 144
145 146 DDR_B_DQS#5
DDR_B_DM5 VSS DQS5# DDR_B_DQS5
147 DM5 DQS5 148
149 VSS VSS 150
DDR_B_D42 151 152 DDR_B_D46
153 DQ43 DQ47 154
155 VSS VSS 156
DDR_B_D48 157 158 DDR_B_D52
159 DQ49 DQ53 160
161 VSS VSS 162
163 164 DDR_B_CLK2
NC,TEST CK1 DDR_B_CLK2 <7>
165 166 DDR_B_CLK#2
VSS CK1# DDR_B_CLK#2 <7>
DDR_B_DQS#6 167 168
DDR_B_DQS6 DQS6# VSS DDR_B_DM6
169 DQS6 DM6 170
171 VSS VSS 172
DDR_B_D50 173 174 DDR_B_D54
175 DQ51 DQ55 176
177 VSS VSS 178
DDR_B_D56 179 180 DDR_B_D60
181 DQ57 DQ61 182
183 VSS VSS 184
DDR_B_DM7 185 186 DDR_B_DQS#7
A DM7 DQS7# DDR_B_DQS7 A
187 VSS DQS7 188
DDR_B_D58 189 190
DDR_B_D59 DQ58 VSS DDR_B_D62
191 DQ59 DQ62 192
193 194 DDR_B_D63
SB_CK_SDAT VSS DQ63
<10,16,18,31> SB_CK_SDAT 195 SDA VSS 196
SB_CK_SCLK 197 198 R11 1 2 10K_0402_5% +3VS
<10,16,18,31> SB_CK_SCLK SCL SAO
199 200 R9 1 2 10K_0402_5%
+3VS
1 201
VDDSPD
GND
SA1
GND 202
C21 2005/10/11 2010/03/12 Title
FOX_AS0A426-MARG-7F
Issued Date Deciphered Date
2
0.1U_0402_16V4Z CONN@ THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, MB A5481
DIMM1 REV H:9.2mm (BOT) MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2 1
hexainf@hotmail.com
GRATIS - FOR FREE
5 4 3 2 1
U22B
D4 GFX_RX0P GFX_TX0P A5
C4 GFX_RX0N PART 2 OF 6 GFX_TX0N B5
A3 GFX_RX1P GFX_TX1P A4
B3 GFX_RX1N GFX_TX1N B4
C2 GFX_RX2P GFX_TX2P C3
C1 GFX_RX2N GFX_TX2N B2
E5 GFX_RX3P GFX_TX3P D1
F5 GFX_RX3N GFX_TX3N D2
G5 GFX_RX4P GFX_TX4P E2
G6 GFX_RX4N GFX_TX4N E1
H5 GFX_RX5P GFX_TX5P F4
D H6 F3 D
GFX_RX5N GFX_TX5N
J6 GFX_RX6P GFX_TX6P F1
J5 GFX_RX6N GFX_TX6N F2
J7 GFX_RX7P GFX_TX7P H4
J8 GFX_RX7N GFX_TX7N H3
L5 GFX_RX8P GFX_TX8P H1
L6 GFX_RX8N GFX_TX8N H2
M8 GFX_RX9P GFX_TX9P J2
L8 GFX_RX9N GFX_TX9N J1
PCIE I/F GFX

P7 GFX_RX10P GFX_TX10P K4
M7 GFX_RX10N GFX_TX10N K3
P5 GFX_RX11P GFX_TX11P K1
M5 GFX_RX11N GFX_TX11N K2
R8 GFX_RX12P GFX_TX12P M4
P8 GFX_RX12N GFX_TX12N M3
R6
R5
GFX_RX13P GFX_TX13P M1
M2
Check SW Routing
GFX_RX13N GFX_TX13N
P4 GFX_RX14P GFX_TX14P N2 AN_RS780MN1, Only suggest pair0~3 can
P3 GFX_RX14N GFX_TX14N N1 usage for power save.
T4 GFX_RX15P GFX_TX15P P1
T3 GFX_RX15N GFX_TX15N P2
AE3 AC1 PCIE_ITX_PRX_P0 C600 1 2 0.1U_0402_16V7K

<31> PCIE_PTX_C_IRX_P0 GPP_RX0P GPP_TX0P PCIE_ITX_C_PRX_P0 <31>
AD4 AC2 PCIE_ITX_PRX_N0 C601 1 2 0.1U_0402_16V7K WLAN
<31> PCIE_PTX_C_IRX_N0 GPP_RX0N GPP_TX0N PCIE_ITX_C_PRX_N0 <31>
AE2 AB4 PCIE_ITX_PRX_P1 C602 1 2 0.1U_0402_16V7K
<25> PCIE_PTX_C_IRX_P1 GPP_RX1P GPP_TX1P PCIE_ITX_C_PRX_P1 <25>
AD3 AB3 PCIE_ITX_PRX_N1 C605 1 2 0.1U_0402_16V7K LAN
<25> PCIE_PTX_C_IRX_N1 GPP_RX1N GPP_TX1N PCIE_ITX_C_PRX_N1 <25>
AD1 GPP_RX2P GPP_TX2P AA2
AD2 GPP_RX2N PCIE I/F GPP GPP_TX2N AA1
V5 GPP_RX3P GPP_TX3P Y1
W6 GPP_RX3N GPP_TX3N Y2
C U5 Y4 C
GPP_RX4P GPP_TX4P H_CADOP[0..15] H_CADIP[0..15]
U6 GPP_RX4N GPP_TX4N Y3 <6> H_CADOP[0..15] H_CADIP[0..15] <6>
U8 GPP_RX5P GPP_TX5P V1
U7 V2 H_CADON[0..15] H_CADIN[0..15]
GPP_RX5N GPP_TX5N <6> H_CADON[0..15] H_CADIN[0..15] <6>
<17> SB_RX0P AA8 AD7 SB_TX0P_C C259 1 2 0.1U_0402_16V7K

SB_RX0P SB_TX0P SB_TX0P <17>
<17> SB_RX0N Y8 AE7 SB_TX0N_C C272 1 2 0.1U_0402_16V7K
SB_RX0N SB_TX0N SB_TX0N <17>
<17> SB_RX1P AA7 AE6 SB_TX1P_C C254 1 2 0.1U_0402_16V7K
SB_RX1P SB_TX1P SB_TX1P <17>
<17> SB_RX1N Y7 AD6 SB_TX1N_C C252 1 2 0.1U_0402_16V7K U22A
SB_RX1N SB_TX1N SB_TX1N <17>
<17> SB_RX2P AA5 PCIE I/F SB AB6 SB_TX2P_C C168 1 2 0.1U_0402_16V7K H_CADOP0 Y25 D24 H_CADIP0
SB_RX2P SB_TX2P SB_TX2P <17> HT_RXCAD0P HT_TXCAD0P
<17> SB_RX2N AA6 AC6 SB_TX2N_C C261 1 2 0.1U_0402_16V7K H_CADON0 Y24 PART 1 OF 6 D25 H_CADIN0
SB_RX2N SB_TX2N SB_TX2N <17> HT_RXCAD0N HT_TXCAD0N
<17> SB_RX3P W5 AD5 SB_TX3P_C C248 1 2 0.1U_0402_16V7K H_CADOP1 V22 E24 H_CADIP1
SB_RX3P SB_TX3P SB_TX3P <17> HT_RXCAD1P HT_TXCAD1P
<17> SB_RX3N Y5 AE5 SB_TX3N_C C275 1 2 0.1U_0402_16V7K H_CADON1 V23 E25 H_CADIN1
SB_RX3N SB_TX3N SB_TX3N <17> HT_RXCAD1N HT_TXCAD1N
H_CADOP2 V25 F24 H_CADIP2
R29 1.27K_0402_1% H_CADON2 HT_RXCAD2P HT_TXCAD2P H_CADIN2
PCE_CALRP(PCE_BCALRP) AC8 1 2 V24 HT_RXCAD2N HT_TXCAD2N F25
AB8 R32 1 2 2K_0402_1% +1.1VS H_CADOP3 U24 F23 H_CADIP3
PCE_CALRN(PCE_BCALRN) H_CADON3 HT_RXCAD3P HT_TXCAD3P H_CADIN3
U25 HT_RXCAD3N HT_TXCAD3N F22
RS780M_FCBGA528 H_CADOP4 T25 H23 H_CADIP4
H_CADON4 HT_RXCAD4P HT_TXCAD4P H_CADIN4
T24 HT_RXCAD4N HT_TXCAD4N H22
HYPER TRANSPORT CPU I/F

RS780MN-SA00002DR30 Ver:A13 H_CADOP5 P22 J25 H_CADIP5
P23 HT_RXCAD5N HT_TXCAD5N J24
H_CADOP6 P25 K24 H_CADIP6
P24 HT_RXCAD6N HT_TXCAD6N K25
H_CADOP7 N24 K23 H_CADIP7
N25 HT_RXCAD7N HT_TXCAD7N K22
H_CADOP8 AC24 F21 H_CADIP8

HT Link AC25 HT_RXCAD8N HT_TXCAD8N G21
RS780M Display Port Support (muxed on GFX) H_CADOP9 AB25 G20 H_CADIP9
When tune trace length, must H_CADON9 HT_RXCAD9P HT_TXCAD9P H_CADIN9
AB24 HT_RXCAD9N HT_TXCAD9N H21
B keep 1:4 on self-trace H_CADOP10 AA24 J20 H_CADIP10 B
GFX_TX0,TX1,TX2 and TX3 H_CADON10 HT_RXCAD10P HT_TXCAD10P H_CADIN10
AA25 HT_RXCAD10N HT_TXCAD10N J21
DP0 H_CADOP11 Y22 J18 H_CADIP11
AUX0 and HPD0 H_CADON11 HT_RXCAD11P HT_TXCAD11P H_CADIN11
Y23 HT_RXCAD11N HT_TXCAD11N K17
H_CADOP12 W21 L19 H_CADIP12
W20 HT_RXCAD12N HT_TXCAD12N J19
GFX_TX4,TX5,TX6 and TX7 H_CADOP13 V21 M19 H_CADIP13
DP1 H_CADON13 HT_RXCAD13P HT_TXCAD13P H_CADIN13
V20 HT_RXCAD13N HT_TXCAD13N L18
AUX1 and HPD1 H_CADOP14 U20 M21 H_CADIP14
U21 HT_RXCAD14N HT_TXCAD14N P21
H_CADOP15 U19 P18 H_CADIP15
U18 HT_RXCAD15N HT_TXCAD15N M18
<6> H_CLKOP0 T22 HT_RXCLK0P HT_TXCLK0P H24 H_CLKIP0 <6>

<6> H_CLKON0 T23 HT_RXCLK0N HT_TXCLK0N H25 H_CLKIN0 <6>
<6> H_CLKOP1 AB23 HT_RXCLK1P HT_TXCLK1P L21 H_CLKIP1 <6>
<6> H_CLKON1 AA22 HT_RXCLK1N HT_TXCLK1N L20 H_CLKIN1 <6>
H_CTLOP0 M22 M24 H_CTLIP0
<6> H_CTLOP0 HT_RXCTL0P HT_TXCTL0P H_CTLIP0 <6>
H_CTLON0 M23 M25 H_CTLIN0
<6> H_CTLON0 HT_RXCTL0N HT_TXCTL0N H_CTLIN0 <6>
H_CTLOP1 R21 P19 H_CTLIP1
<6> H_CTLOP1 HT_RXCTL1P HT_TXCTL1P H_CTLIP1 <6>
Check AMD H_CTLON1 R20 R18 H_CTLIN1
<6> H_CTLON1 HT_RXCTL1N HT_TXCTL1N H_CTLIN1 <6>
1 R67 2 C23 B24 1 R79 2
HT_RXCALP HT_TXCALP
A24 HT_RXCALN HT_TXCALN B25
301_0402_1%~D 301_0402_1%~D
Place within 1" RS780M_FCBGA528 Place within 1"
layout 4/8 RS780MN-SA00002DR30 Ver:A13 layout 4/8
A A

SCHEMATIC, MB A5481
Custom C
401743
5 4 3 2 1
5 4 3 2 1
+3VS
L8
1 2 +AVDD1 <110mA>
MBK2012170YZF_0805 C40 1
+1.8VS +NB_HTPVDD +1.8VS 22U_0805_6.3V6M
L10 L23
+AVDD2 2
1 2 <65mA> 1 2
MBK2012221YZF 0805 1 MBK2012170YZF_0805 1
U22C
C78 C265 F12 A22 GMCH_TXOUT0+ <24>
2.2U_0603_6.3V4Z +1.8VS 2.2U_0603_6.3V4Z AVDD1(NC) TXOUT_L0P(NC)
2 2
E12 AVDD2(NC) PART 3 OF 6 TXOUT_L0N(NC) B22 GMCH_TXOUT0- <24>
D D
<20mA> F14 AVDDDI(NC) TXOUT_L1P(NC) A21 GMCH_TXOUT1+ <24>
L25 G15 B21 GMCH_TXOUT1- <24>
+AVDDQ AVSSDI(NC) TXOUT_L1N(NC)
1 2 <4mA> H15 AVDDQ(NC) TXOUT_L2P(NC) B20 GMCH_TXOUT2+ <24>
MBK2012170YZF_0805 1 H14 A20 GMCH_TXOUT2- <24>
AVSSQ(NC) TXOUT_L2N(DBG_GPIO0)
TXOUT_L3P(NC) A19
+1.8VS +VDDA18HTPLL C267 E17 B19
L24 2.2U_0603_6.3V4Z C_Pr(DFT_GPIO5) TXOUT_L3N(DBG_GPIO2)
CRT/TVOUT
F17 Y(DFT_GPIO2)
2
1 2 <20mA> F15 COMP_Pb(DFT_GPIO4) TXOUT_U0P(NC) B18 GMCH_TZOUT0+ <24>
MBK2012221YZF 0805 1 A18 GMCH_TZOUT0- <24>
GMCH_CRT_R TXOUT_U0N(NC)
<23> GMCH_CRT_R G18 RED(DFT_GPIO0) TXOUT_U1P(PCIE_RESET_GPIO3) A17 GMCH_TZOUT1+ <24>
C266 G17 B17 GMCH_TZOUT1- <24>
2.2U_0603_6.3V4Z GMCH_CRT_G REDb(NC) TXOUT_U1N(PCIE_RESET_GPIO2)
<23> GMCH_CRT_G E18 GREEN(DFT_GPIO1) TXOUT_U2P(NC) D20 GMCH_TZOUT2+ <24>
2
F18 GREENb(NC) TXOUT_U2N(NC) D21 GMCH_TZOUT2- <24>
1 2 GMCH_CRT_R GMCH_CRT_B E19 D18
<23> GMCH_CRT_B BLUE(DFT_GPIO3) TXOUT_U3P(PCIE_RESET_GPIO5)
R55 140_0402_1% F19 D19
GMCH_CRT_G BLUEb(NC) TXOUT_U3N(NC)
1 2
R60 150_0402_1% GMCH_CRT_HSYNC A11 B16 GMCH_TXCLK+ <24>
+1.8VS +VDDA18PCIEPLL <15,23> GMCH_CRT_HSYNC DAC_HSYNC(PWM_GPIO4) TXCLK_LP(DBG_GPIO1)
1 2 GMCH_CRT_B GMCH_CRT_VSYNC B11 A16 GMCH_TXCLK- <24>
<15,23> GMCH_CRT_VSYNC DAC_VSYNC(PWM_GPIO6) TXCLK_LN(DBG_GPIO3)
L5 R62 150_0402_1% GMCH_CRT_CLK F8 D16 GMCH_TZCLK+ <24>
<23> GMCH_CRT_CLK DAC_SCL(PCE_RCALRN) TXCLK_UP(PCIE_RESET_GPIO4)
1 2 <20mA> GMCH_CRT_DATA E8 D17 GMCH_TZCLK- <24>
<23> GMCH_CRT_DATA DAC_SDA(PCE_TCALRN) TXCLK_UN(PCIE_RESET_GPIO1)
MBK2012221YZF 0805 1
R59 1 2 715_0402_1% G14 L51
C31 DAC_RSET(PWM_GPIO1) +VDDLTP18 +VDDLTP18
Close to U22 Ball VDDLTP18(NC) A13 <15mA> 1 2 +1.8VS
2.2U_0603_6.3V4Z +NB_PLLVDD +NB_PLLVDD A12 B13 1 MBC1608121YZF_0603
2 +NB_HTPVDD PLLVDD(NC) VSSLTP18(NC)
+NB_HTPVDD D14 PLLVDD18(NC)
B12 A15 <300mA> +VDDLT18 C449
LVTM
PLLVSS(NC) VDDLT18_1(NC) 2.2U_0603_6.3V4Z
B15
PLL PWR
VDDLT18_2(NC) 2
+VDDA18HTPLL H17 VDDA18HTPLL VDDLT33_1(NC) A14
VDDLT33_2(NC) B14
+VDDA18PCIEPLL D7 VDDA18PCIEPLL1
C +1.1VS E7 C14 L49 C
L50 +NB_PLLVDD R319 0_0402_5% VDDA18PCIEPLL2 VSSLT1(VSS) +VDDLT18
VSSLT2(VSS) D15 1 2 +1.8VS
1 2 <120mA> 1 2 NB_RESET# D8 C16 1 1 MBC1608121YZF_0603
<15,17,25,28,31> PLT_RST# SYSRESETb VSSLT3(VSS)
MBK2012221YZF 0805 1 A10 C18
<18> NB_PWRGD POWERGOOD VSSLT4(VSS)
+1.8VS 1 2 NB_LDTSTOP# C10 C20 C115 C455
C400 R326 300_0402_5% NB_ALLOW_LDTSTOP LDTSTOPb VSSLT5(VSS) 0.1U_0402_16V4Z 4.7U_0805_10V4Z
NB_PGRGD (SB) C12 E20
PM
2.2U_0603_6.3V4Z ALLOW_LDTSTOP VSSLT6(VSS) 2 2
Output, OD VSSLT7(VSS) C22
2
<16> CLK_NBHT C25 HT_REFCLKP
<16> CLK_NBHT# C24 HT_REFCLKN
CLK_NB_14.318M E11 REFCLK_P/OSCIN(OSCIN)
CLOCKs
CLK_NB_14.318M F11 E9 R49 1 2 0_0402_5% GMCH_ENVDD <24>
<16> CLK_NB_14.318M REFCLK_N(PWM_GPIO3) LVDS_DIGON(PCE_TCALRP)
LVDS_BLON(PCE_RCALRP) F7
@ @ +1.1VS 1 2 1 2 T2 G12 VARY_ENBKL R50 1 2 0_0402_5% ENBKL <28>
<16> CLK_NBGFX GFX_REFCLKP LVDS_ENA_BL(PWM_GPIO2)
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
1 2 1 2 R58 R43 T1
<16> CLK_NBGFX# GFX_REFCLKN
2 VARY@ 1
4.7K_0402_5% 4.7K_0402_5% R57 1 VARY@ 2 0_0402_5% GMCH_INVT_PWM <24>
C691 R637 U1
22P_0402_50V8J 10_0402_5% GPP_REFCLKP R51 1 VARY@ 2 0_0402_5%
U2 GPP_REFCLKN
For EMI <16> CLK_SBLINK_BCLK V4
2
GPPSB_REFCLKP(SB_REFCLKP)
<16> CLK_SBLINK_BCLK# V3 GPPSB_REFCLKN(SB_REFCLKN) R15 R54 R56
<24> GMCH_LCD_CLK GMCH_LCD_CLK B9
+3VS GMCH_LCD_DATA I2C_CLK
<24> GMCH_LCD_DATA A9
B8
I2C_DATA MIS. TMDS_HPD(NC) D9
D10 2 @ 1
DDC_DATA0/AUX0N(NC) HPD(NC) R328 10K_0402_5%
A8 DDC_CLK0/AUX0P(NC)
R323 1 2 4.7K_0402_5% GMCH_LCD_CLK +3VS 2 @ 1 1 2 B7 D12 1 2 SUS_STAT# <18>
R327 10K_0402_5% R552 2K_0402_1% DDC_CLK1/AUX1P(NC) SUS_STAT#(PWM_GPIO5) R48 0_0402_5%
A7 DDC_DATA1/AUX1N(NC)
R322 1 2 4.7K_0402_5% GMCH_LCD_DATA AE8 SUS_STAT_R# <15> Strap Pin
POWER_SEL THERMALDIODE_P
<42> POWER_SEL 1 2 B10 STRP_DATA THERMALDIODE_N AD8
B R488 1 2 4.7K_0402_5% GMCH_CRT_CLK R320 @ 0_0402_5% B
G11 RSVD TESTMODE D13 1 2
R493 1 2 4.7K_0402_5% GMCH_CRT_DATA R343
POWER_SEL C8 1.8K_0402_5%
<15> AUX_CAL AUX_CAL(NC)
LOW 1.1V Strap pin RS780M_FCBGA528
HIGH 1.0V RS780MN-SA00002DR30 Ver:A13
+1.8VS
2
R28
300_0402_5%
1
R85 0_0402_5% R553 0_0402_5%
1 2 NB_LDTSTOP# 1 2 NB_ALLOW_LDTSTOP
<8,17> LDT_STOP# <17> ALLOW_LDTSTOP
LDT_STP# (SB) LDTSTOP# (NB) SB: I/ OD ALLOW_LDTSTOP (NB)
Output, OD In Lagcy mode: Input, 1.8V signal can be used In Lagcy mode: Output,OD
In CLMC mode: Output, OD In CLMC mode: Input, 1.8Vsignal can be used
A A

Size
SCHEMATIC, MB A5481
Document Number Rev
Custom C
401743
1
Sheet 13 of 47
GRATIS - FOR FREE

5 4 3 2 1
U22F
A25 VSSAHT1 VSSAPCIE1 A2
D23 VSSAHT2 PART 6/6 VSSAPCIE2 B1
E22 VSSAHT3 VSSAPCIE3 D3
G22 VSSAHT4 VSSAPCIE4 D5
G24 VSSAHT5 VSSAPCIE5 E4
G25 VSSAHT6 VSSAPCIE6 G1
L14 0.1U_0402_16V4Z 0.1U_0402_16V4Z H19 G2
+VDDHT VSSAHT7 VSSAPCIE7
+1.1VS 2 1 J22 VSSAHT8 VSSAPCIE8 G4
FBMA-L11-201209-221LMA30T_0805 L17 H7
VSSAHT9 VSSAPCIE9
1 1 1 1 1 L22 VSSAHT10 VSSAPCIE10 J4
L16 L24 R7
C108 C131 C249 C253 C126 VSSAHT11 VSSAPCIE11
2 1 +1.1VS L25 VSSAHT12 VSSAPCIE12 L1
D FBMA-L11-201209-221LMA30T_0805 M20 L2 D
2 2 2 2 2 U22E VSSAHT13 VSSAPCIE13
<1.1A> N22 VSSAHT14 VSSAPCIE14 L4
22U_0805_6.3V6M 0.1U_0402_16V4Z 0.1U_0402_16V4Z J17 A6 +VDDA11PCIE 1 2 P20 L7
VDDHT_1 VDDPCIE_1 C19 VSSAHT15 VSSAPCIE15
K16 VDDHT_2 PART 5/6 VDDPCIE_2 B6 1 2 22U_0805_6.3V6M R19 VSSAHT16 VSSAPCIE16 M6
L16 C6 C15 22U_0805_6.3V6M R22 N4
L22 VDDHT_3 VDDPCIE_3 VSSAHT17 VSSAPCIE17
M16 VDDHT_4 VDDPCIE_4 D6 R24 VSSAHT18 VSSAPCIE18 P6
2 1 0.1U_0402_16V4Z 0.1U_0402_16V4Z +VDDHTRX P16 E6 C42 1 2 1U_0402_6.3V4Z R25 R1
VDDHT_5 VDDPCIE_5 C59 1U_0402_6.3V4Z VSSAHT19 VSSAPCIE19
FBMA-L11-201209-221LMA30T_0805
0.68A R16
T16
VDDHT_6 VDDPCIE_6 F6
G7 C44
1
1
2
2 1U_0402_6.3V4Z
H20
U22
VSSAHT20 VSSAPCIE20 R2
R4
1 1 1 1 1 VDDHT_7 VDDPCIE_7 VSSAHT21 VSSAPCIE21
<680mA> H8 C38 1 2 1U_0402_6.3V4Z V19 V7
VDDPCIE_8 VSSAHT22 VSSAPCIE22
GROUND
C154 C257 C219 C264 C273 H18 J9 W22 U4
VDDHTRX_1 VDDPCIE_9 VSSAHT23 VSSAPCIE23
G19 VDDHTRX_2 VDDPCIE_10 K9 1 2 W24 VSSAHT24 VSSAPCIE24 V8
2 2 2 2 2 C51
F20 VDDHTRX_3 VDDPCIE_11 M9 1 2 0.1U_0402_16V4Z W25 VSSAHT25 VSSAPCIE25 V6
22U_0805_6.3V6M 0.1U_0402_16V4Z 0.1U_0402_16V4Z E21 L9 C43 0.1U_0402_16V4Z Y21 W1
VDDHTRX_4 VDDPCIE_12 VSSAHT26 VSSAPCIE26
D22 VDDHTRX_5 VDDPCIE_13 P9 AD25 VSSAHT27 VSSAPCIE27 W2
B23 VDDHTRX_6 VDDPCIE_14 R9 VSSAPCIE28 W4
A23 VDDHTRX_7 VDDPCIE_15 T9 L12 VSS11 VSSAPCIE29 W7
L21 V9 M14 W8
0.1U_0402_16V4Z 0.1U_0402_16V4Z +VDDHTTX VDDPCIE_16 VSS12 VSSAPCIE30
+1.2V_HT 2 1 <680mA> AE25 VDDHTTX_1 VDDPCIE_17 U9 N13 VSS13 VSSAPCIE31 Y6
AD24 @ L7 P12 AA4
FBMA-L11-201209-221LMA30T_0805 VDDHTTX_2 VSS14 VSSAPCIE32
1 1 1 1 1 AC23 VDDHTTX_3 VDDC_1 K12 +1.1VS 2 1 +NB_CORE P15 VSS15 VSSAPCIE33 AB5
AB22 J14 FBMA-L11-201209-221LMA30T_0805 R11 AB1
C262 C130 C258 C171 C255 VDDHTTX_4 VDDC_2 VSS16 VSSAPCIE34
AA21 VDDHTTX_5 VDDC_3 U16 2 1 R14 VSS17 VSSAPCIE35 AB7
Y20 J11 FBMA-L11-201209-221LMA30T_0805 T12 AC3
2 2 2 2 2 VDDHTTX_6 VDDC_4 @ L6 VSS18 VSSAPCIE36
W19 VDDHTTX_7 VDDC_5 K15 U14 VSS19 VSSAPCIE37 AC4
POWER
22U_0805_6.3V6M 0.1U_0402_16V4Z 0.1U_0402_16V4Z V18 M12 U11 AE1
VDDHTTX_8 VDDC_6 VSS20 VSSAPCIE38
U17 VDDHTTX_9 VDDC_7 L14 <7.6A> U15 VSS21 VSSAPCIE39 AE4
T17 VDDHTTX_10 VDDC_8 L11 V12 VSS22 VSSAPCIE40 AB2
R17 VDDHTTX_11 VDDC_9 M13 W11 VSS23
P17 VDDHTTX_12 VDDC_10 M15 W15 VSS24
C M17 N12 AC12 AE14 C
VDDHTTX_13 VDDC_11 VSS25 VSS1
330U_D2E_2.5VM_R9M
C110
C112
C57
C123
C215
C256
C80
C218
C251
C18
C20
L9 N14 1 AA14 D11
0.1U_0402_16V4Z 0.1U_0402_16V4Z +VDDA18PCIE VDDC_12 VSS26 VSS2
+1.8VS 2 1 <700mA> J10 VDDA18PCIE_1 VDDC_13 P11 1 1 1 1 1 1 1 1 1 2 2 Y18 VSS27 VSS3 G8
C10
FBMA-L11-201209-221LMA30T_0805 P10 P13 + AB11 E14
VDDA18PCIE_2 VDDC_14 VSS28 VSS4
1 1 1 1 1 1 1 K10 VDDA18PCIE_3 VDDC_15 P14 AB15 VSS29 VSS5 E15
22U_0805_6.3V6M
22U_0805_6.3V6M
C52
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
M10 VDDA18PCIE_4 VDDC_16 R12 AB17 VSS30 VSS6 J15
22U_0805_6.3V6M C53 C37 C55 C58 C56 C62 2 2 2 2 2 2 2 2 2 1 1 2
L10 VDDA18PCIE_5 VDDC_17 R15 AB19 VSS31 VSS7 J12
W9 VDDA18PCIE_6 VDDC_18 T11 AE20 VSS32 VSS8 K14
2 22U_0805_6.3V6M 2 2 2 2 2 2
H9 VDDA18PCIE_7 VDDC_19 T15 AB21 VSS33 VSS9 M11
4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z T10 U12 K11 L15
VDDA18PCIE_8 VDDC_20 VSS34 VSS10
R10 VDDA18PCIE_9 VDDC_21 T14
Y9 J16 RS780M_FCBGA528
VDDA18PCIE_10 VDDC_22
AA9 VDDA18PCIE_11 RS780MN-SA00002DR30 Ver:A13
AB9 VDDA18PCIE_12 VDD_MEM1(NC) AE10
AD9 VDDA18PCIE_13 VDD_MEM2(NC) AA11
AE9 VDDA18PCIE_14 VDD_MEM3(NC) Y11
U10 VDDA18PCIE_15 VDD_MEM4(NC) AD10
VDD_MEM5(NC) AB10
+1.8VS <10mA> F9 VDD18_1 VDD_MEM6(NC) AC10
G9 VDD18_2
1 +1.8VS <25mA> AE11 VDD18_MEM1(NC) VDD33_1(NC) H11 <60mA> +3VS
C398 AD11 H12
1U_0402_6.3V4Z VDD18_MEM2(NC) VDD33_2(NC)
1 1
RS780M_FCBGA528
2 C93 C61
RS780MN-SA00002DR30 Ver:A13 0.1U_0402_16V4Z 0.1U_0402_16V4Z U22D
2 2
PAR 4 OF 6
AB12 MEM_A0(NC) MEM_DQ0/DVO_VSYNC(NC) AA18
AE16 MEM_A1(NC) MEM_DQ1/DVO_HSYNC(NC) AA20
V11 MEM_A2(NC) MEM_DQ2/DVO_DE(NC) AA19
B AE15 Y19 B
MEM_A3(NC) MEM_DQ3/DVO_D0(NC)
AA12 MEM_A4(NC) MEM_DQ4(NC) V17
AB16 MEM_A5(NC) MEM_DQ5/DVO_D1(NC) AA17
AB14 MEM_A6(NC) MEM_DQ6/DVO_D2(NC) AA15
AD14 MEM_A7(NC) MEM_DQ7/DVO_D4(NC) Y15
AD13 MEM_A8(NC) MEM_DQ8/DVO_D3(NC) AC20
AD15 MEM_A9(NC) MEM_DQ9/DVO_D5(NC) AD19
SBD_MEM/DVO_I/F
AC16 MEM_A10(NC) MEM_DQ10/DVO_D6(NC) AE22
AE13 MEM_A11(NC) MEM_DQ11/DVO_D7(NC) AC18
AC14 MEM_A12(NC) MEM_DQ12(NC) AB20
Y14 MEM_A13(NC) MEM_DQ13/DVO_D9(NC) AD22
MEM_DQ14/DVO_D10(NC) AC22
AD16 MEM_BA0(NC) MEM_DQ15/DVO_D11(NC) AD21
AE17 MEM_BA1(NC)
AD17 MEM_BA2(NC) MEM_DQS0P/DVO_IDCKP(NC) Y17
MEM_DQS0N/DVO_IDCKN(NC) W18
W12 MEM_RASb(NC) MEM_DQS1P(NC) AD20
Y12 MEM_CASb(NC) MEM_DQS1N(NC) AE21
AD18 MEM_WEb(NC)
AB13 MEM_CSb(NC) MEM_DM0(NC) W17
AB18 MEM_CKE(NC) MEM_DM1/DVO_D8(NC) AE19
V14 MEM_ODT(NC)
IOPLLVDD18(NC) AE23 +1.8VS
V15 MEM_CKP(NC) IOPLLVDD(NC) AE24 +1.1VS
W14 MEM_CKN(NC)
IOPLLVSS(NC) AD23
AE12 MEM_COMPP(NC)
AD12 MEM_COMPN(NC) MEM_VREF(NC) AE18 1 2
R351 0_0402_5%
RS780M_FCBGA528
A A
RS780MN-SA00002DR30 Ver:A13

SCHEMATIC, MB A5481
Custom C
401743
5 4 3 2 1
5 4 3 2 1
DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb
<13,23> GMCH_CRT_VSYNC 2 1 +3VS Enables the Test Debug Bus using GPIO. (VSYNC)
R341 3K_0402_5% 1 : Disable (RS780)
D 2 1 D
R337 @ 3K_0402_5% 0 : Enable (Rs780)
DFT_GPIO1: LOAD_EEPROM_STRAPS
<13> AUX_CAL 1 2 Selects Loading of STRAPS from EPROM

@ R315 150_0402_1% 1 : Bypass the loading of EEPROM straps and use Hardware Default Values
@ 0 : I2C Master can load strap values from EEPROM if connected, or use
RS780 DFT_GPIO1 <13> SUS_STAT_R# 2 1 PLT_RST# <13,17,25,28,31>
default values if not connected
RS740/RX780: DFT_GPIO1 RS780:SUS_STAT
D22 CH751H-40PT_SOD323-2
C C
RS780 use HSYNC to enable SIDE PORT
RS780 use HSYNC to enable SIDE PORT RS740/RS780: Enables Side port memory ( RS780 use HSYNC#)
0. Enable (RS780)
2 1
1 : Disable(RS780)
<13,23> GMCH_CRT_HSYNC +3VS
R332 3K_0402_5%
2 @ 1
R331 3K_0402_5%
B B
A A

Size
SCHEMATIC, MB A5481
Document Number Rev
Custom C
401743
hexainf@hotmail.com
5 4 3 2
1
Sheet 15 of 47
GRATIS - FOR FREE

5 4 3 2 1
+1.2V_HT +VDDCLK_IO
+3VS +3VS_CLK
L31
L30 1 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
1 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 FBMA-L11-201209-221LMA30T_0805 C367 C138 C278 C404 C295 C274 C160 C140 C268 C294 C297
FBMA-L11-201209-221LMA30T_0805 C260 C142 C298 C293 C280 C135 C263
22U_0805_6.3V6M 1U_0402_6.3V4Z
2 2 2 2 2 2 2 2 2 2 2
2 2 2 2 2 2 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
22U_0805_6.3V6M 0.1U_0402_16V4Z 0.1U_0402_16V4Z
1U CLOSE PIN 69
D L36 D
+3VS_CLK 1 2 +3VS_CLKVDDA
FBMA-L11-201209-221LMA30T_0805
1 1 U15
C161
C141
+3VS_CLK 22U_0805_6.3V6M 0.1U_0402_16V4Z ICS 9LPRS488
2 2
49 VDDA SMBCLK 1
SB_CK_SCLK <10,11,18,31>
48 GNDA SMBDAT 2
SB_CK_SDAT <10,11,18,31>
+3VS_CLK 62 41 SRC_SLOW
VDDREF SB_SRC_SLOW# CLK_CPU_BCLK <8>
2
66 GNDREF
2
C277 2 1 R169
R112 R187 0.1U_0402_16V4Z 261_0402_1% CPU
8.2K_0402_5% @ @ +VDDCLK_IO 12 56 CLK_CPU 1 2
8.2K_0402_5% VDDSRC_IO CPUKG0T_LPRS CLK_CPU# R170 1
18 55 2 47.5_0402_1% CLK_CPU_BCLK# <8>
1
VDDSRC_IO CPUKG0C_LPRS R168 47.5_0402_1%
28
1
VDDATIG_IO
37 VDDSB_SRC_IO
SEL_SATA 53 60 CLK_HTT 1 2 +3VS_CLK
VDDCPU_IO HTT0T_LPRS / 66 M CLK_NBHT <13>
SEL_HT66 59 CLK_HTT# R175 1 2 0_0402_5% NB HTT
+3VS_CLK HTT0C_LPRS / 66 M CLK_NBHT# <13>
R172 0_0402_5%
2
1
+3VS_CLK 3 VDDDOT
R182 R188 17 40 R161
@ VDDSRC SB_SRC0T_LPRS
8.2K_0402_5% 29 VDDATIG SB_SRC0C_LPRS 39 8.2K_0402_5%
R490 8.2K_0402_5%
8.2K_0402_5% 38 VDDSB_SRC
R495 8.2K_0402_5%
44
1
2
VDDSATA
2
+3VS 54 35
VDDCPU SB_SRC1T_LPRS
2
L35 61 34 SRC_SLOW
C VDDHTT SB_SRC1C_LPRS C
1 2 69 VDD48
FBM-L11-160808-800LMT_0603
1
1 2 33 CLK_ATIG0 1 2 CLK_NBGFX <13>
1
C282 @ 2.2U_0603_6.3V4Z ATIG0T_LPRS CLK_ATIG0# R174 1

32 2 0_0402_5% CLK_NBGFX# <13> NB GFX R111
1
ATIG0C_LPRS R176 0_0402_5% @

1 2 8.2K_0402_5%
C281 0.1U_0402_16V4Z 24 CLKREQ0 #
31
2
ATIG1T_LPRS
51 30
LAN request <25> LAN_CLKREQ# CLKREQ1# ATIG1C_LPRS
50
MiniCard1 request <31> MINI1_CLKREQ# CLKREQ2#
26
ATIG2T_LPRS
43 CLKREQ3# ATIG2C_LPRS 25
42 CLKREQ4#
23 CLK_SRC0 1 2
SRC0T_LPRS CLK_PCIE_LAN <25>
22 CLK_SRC0# R189 1 2 0_0402_5% LAN
SRC0C_LPRS CLK_PCIE_LAN# <25>
R190 0_0402_5%
63 REF2/SEL_27 SRC1T_LPRS 21
External 14MHz CLK R109 33_0402_5% 20
SEL_SATA SRC1C_LPRS
for SB710 <17> CLK_14M_SB 1 2 64 REF1/SEL_SATA
1 2 SEL_HT66 65 16 CLK_SRC2 1 2
<13> CLK_NB_14.318M REF0/SEL_HTT66 SRC2T_LPRS CLK_PCIE_MINI1 <31>
R179 158_0402_1% 15 CLK_SRC2# R197 1 2 0_0402_5% MiniCard
SRC2C_LPRS CLK_PCIE_MINI1# <31>
1 2 R196 0_0402_5%
R178 90.9_0402_1%
2 1 CLK_48M_0 71 14
<27> CLK_48M_SD R194 33_0402_5% 48MHz_0 SRC3T_LPRS
SRC3C_LPRS 13
2 1 CLK_48M_1 70 SRC 0 LAN
<18> CLK_48M_USB R193 33_0402_5% 48MHz_1
B CLK_SRC4 B
SRC4T_LPRS 10 1 2 CLK_SBLINK_BCLK <13> SRC 1
CLK_SRC4# R200 1 2 0_0402_5%
SRC4C_LPRS 9 CLK_SBLINK_BCLK# <13> NB A LINK
CLK_XTAL_IN 67 R199 0_0402_5% SRC 2 MINI1 (WLAN)
X1
CLK_XTAL_OUT 68 8 SRC 3 NEW CARD
X2 SRC5T_LPRS
SRC5C_LPRS 7
CLK_XTAL_OUT SRC 4 NB-Alink
CLK_XTAL_IN 6 46 CLK_SRC6 1 2 SRC 5
GNDDOT SRC6T/SATAT_LPRS CLK_SBSRC_BCLK <17>
11 45 CLK_SRC6# R163 1 2 0_0402_5% SB RCLK
GNDSRC SRC6C/SATAC_LPRS CLK_SBSRC_BCLK# <17>
19 R164 0_0402_5% SRC 6 SB-Alink
GNDSRC
27 GNDATIG
36 GNDSB_SRC SRC7T_LPRS/27MHz_SS 5
Y4 47 GNDSATA SRC7C_LPRS/27MHz_NS 4
52 GNDCPU
2 1 FUJICOM 58 GNDHTT NB CLOCK INPUT TABLE
72 GND48
14.31818MHZ_20P_6X1430004201 73 57 2 1 +3VS_CLK NB CLOCKS RS740 RX780 RS780
GNDPAD PD# R173 8.2K_0402_5%
1 1
C290 C288 1 HT_REFCLKP
C299 66M SE(SINGLE END) 100M DIFF 100M DIFF
33P_0402_50V8J 33P_0402_50V8J ICS9LPRS488AKLFT_MLF72_10x10 @ HT_REFCLKN NC 100M DIFF 100M DIFF
2 2 1U_0402_6.3V4Z
2 REFCLK_P
Main--SLG8SP626VTR-SA00001Z310 14M SE (3.3V) 14M SE (1.8V) 14M SE (1.1V)
Second--ICS9LPRS488CKLFT-SA000023H10 REFCLK_N NC NC vref
GFX_REFCLK 100M DIFF 100M DIFF 100M DIFF(IN/OUT)*
GPP_REFCLK NC 100M DIFF NC

A A
GPPSB_REFCLK 100M DIFF 100M DIFF 100M DIFF
1 configure as single-ended 66MHz output SEL_27M 1 configure as 27M and 27M_SS output
SEL_HTT66
No used
0* configure as differential 100MHz output 0 configure as SRC_7 output Issued Date 2005/03/08 Deciphered Date 2010/03/12 Title
1* SS 100M SATA SRC6 output THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
SCHEMATIC, MB A5481 Rev
SEL_SATA AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0 SS 100M SATA SRC6 output Custom C
* default
401743
5 4 3 2 1
5 4 3 2 1
U10A
A_RST# N2
SB700 P4
A_RST# PCICLK0
Part 1 of 5 PCICLK1 P3
PCI CLKS
C172 1 2 0.1U_0402_16V7K SB_RX0P_C V23 P1
<12> SB_RX0P PCIE_TX0P PCICLK2 PCI_CLK2 <21>
C246 1 2 0.1U_0402_16V7K SB_RX0N_C V22 P2
<12> SB_RX0N PCIE_TX0N PCICLK3 PCI_CLK3 <21>
C402 1 2 0.1U_0402_16V7K SB_RX1P_C V24 T4 Strap pin
<12> SB_RX1P PCIE_TX1P PCICLK4 PCI_CLK4 <21>
C176 1 2 0.1U_0402_16V7K SB_RX1N_C V25 T3
<12> SB_RX1N PCIE_TX1N PCICLK5/GPIO41 PCI_CLK5 <21>
C183 1 2 0.1U_0402_16V7K SB_RX2P_C U25
<12> SB_RX2P PCIE_TX2P
C186 1 2 0.1U_0402_16V7K SB_RX2N_C U24
<12> SB_RX2N PCIE_TX2N
C204 1 2 0.1U_0402_16V7K SB_RX3P_C T23
<12> SB_RX3P PCIE_TX3P
C214 1 2 0.1U_0402_16V7K SB_RX3N_C T22 N1
<12> SB_RX3N PCIE_TX3N PCIRST#
PCI EXPRESS INTERFACE

D U22 D
<12> SB_TX0P PCIE_RX0P
<12> SB_TX0N U21 PCIE_RX0N AD0 U2
<12> SB_TX1P U19 PCIE_RX1P AD1 P7
<12> SB_TX1N V19 PCIE_RX1N AD2 V4
<12> SB_TX2P R20 PCIE_RX2P AD3 T1
<12> SB_TX2N R21 PCIE_RX2N AD4 V3
<12> SB_TX3P R18 PCIE_RX3P AD5 U1
<12> SB_TX3N R17 PCIE_RX3N AD6 V1
AD7 V2
R127 2 1 562_0402_1% T25 T2
R131 2.05K_0402_1% T24 PCIE_CALRP AD8
+PCIE_VDDR 2 1 PCIE_CALRN AD9 W1
AD10 T9
+1.2V_HT 1 2 +SB_PCIEVDD <43mA> P24 R6
L59 PCIE_PVDD AD11
2 1 AD12 R7
MBC1608121YZF_0603 C468 C472 P25 R5
PCIE_PVSS AD13
AD14 U8
1 2 A_RST# 1U_0402_6.3V4Z
AD15 U5
R135 @ 8.2K_0402_5% 1
2.2U_0402_6.3V6M 2 Y7
AD16
AD17 W8
AD18 V9
AD19 Y8
AD20 AA8
AD21 Y4
+3VALW Y3
C177 AD22
Y2 PCI_AD23
AD23 PCI_AD23 <21>
2 1 AA2 PCI_AD24
AD24 PCI_AD24 <21>
AB4 PCI_AD25
AD25 PCI_AD25 <21>
5
0.1U_0402_16V4Z U11 N25 AA1 PCI_AD26

<16> CLK_SBSRC_BCLK PCIE_RCLKP/NB_LNK_CLKP AD26 PCI_AD26 <21>
2 N24 AB3 PCI_AD27
P
B <16> CLK_SBSRC_BCLK# PCIE_RCLKN/NB_LNK_CLKN AD27 PCI_AD27 <21>

4 PLT_RST# AB2 PCI_AD28
C Y PLT_RST# <13,15,25,28,31> AD28 PCI_AD28 <21> C
A_RST# 1 K23 AC1
A NB_DISP_CLKP AD29
G
K22 NB_DISP_CLKN AD30 AC2

1
NC7SZ08P5X_NL_SC70-5 AD1
3
R293 @ AD31
M24 W2
PCI INTERFACE
NB_HT_CLKP CBE0#
M25 NB_HT_CLKN CBE1# U7
100K_0402_5% AA7
CBE2#
2 1 P17 Y1
2
R134 @ 33_0402_5% CPU_HT_CLKP CBE3#

M18 CPU_HT_CLKN FRAME# AA6
DEVSEL# W5
M23 SLT_GFX_CLKP IRDY# AA5
M22 SLT_GFX_CLKN TRDY# Y5
PAR U6
J19 GPP_CLK0P STOP# W6
J18 GPP_CLK0N PERR# W4
SERR# V7
L20 GPP_CLK1P REQ0# AC3
L19 GPP_CLK1N REQ1# AD4
REQ2# AB7
M19 GPP_CLK2P REQ3#/GPIO70 AE6
External 14MHz for SB710 M20 GPP_CLK2N REQ4#/GPIO71 AB6
AD2
CLOCK GENERATOR
GNT0#
N22 GPP_CLK3P GNT1# AE4
@ R101 20M_0402_5% P22 AD5
GPP_CLK3N GNT2#
1 2 GNT3#/GPIO72 AC6
<16> CLK_14M_SB L18 25M_48M_66M_OSC GNT4#/GPIO73 AE5
C203 CLKRUN# AD6 1 2 PM_CLKRUN# <28>
1
V5 R149 0_0402_5%
SB_32KHI R635 LOCK#
1 2 J21 25M_X1
@ 10_0402_5% AD3
Y2 INTE#/GPIO33
18P_0402_50V8J AC4
INTF#/GPIO34
1
B 4 3 AE2 B
2
R91 OUT NC INTG#/GPIO35

1 J20 25M_X2 INTH#/GPIO36 AE3
20M_0603_5% 1 2
IN NC C690
@ 22P_0402_50V8J G22 CLK_LPC_EC R108 1 2 22_0402_5% CLK_PCI_EC
C403 CLK_PCI_EC <21,28>
2
32.768KHZ_12.5P_MC-306 2 LPCCLK0
1 2 SB_32KHO SB_32KHI A3
LPCCLK1 E22
H24
LPCCLK1 <21> STRAP PIN
X1 LAD0 LPC_AD0 <28>
LAD1 H23 LPC_AD1 <28>
18P_0402_50V8J J25
LAD2 LPC_AD2 <28>
J24
RTC XTAL
LAD3 LPC_AD3 <28>
LPC
Close to SB SB_32KHO B3 H25
X2 LFRAME# LPC_FRAME# <28>
LDRQ0# H22
LDRQ1#/GNT5#/GPIO68 AB8
BMREQ#/REQ5#/GPIO65 AD7
SERIRQ V15 SERIRQ <28>
<13> ALLOW_LDTSTOP F23 ALLOW_LDTSTP

<8> H_PROCHOT_R# F24
F22
PROCHOT# RTCCLK C3
C2 1 @ 2
RTC_CLK <21> STRAP PIN
<8> H_PWRGD LDT_PG INTRUDER_ALERT# +RTCVCC
<8,13> LDT_STOP# G25 CPU B2 R107 1M_0402_5%
LDT_STP# VBAT +RTCVCC +RTCBATT
<8> LDT_RST# G24 LDT_RST#
RTC
D5
R556 1K_0402_5%
1 2 2 1 3
LDT_PG: OD pin 218S7EALA11FG_BGA528_SB700 R385 510_0402_5%
C405 1 1 C134 W=20mils
0.1U_0402_16V4Z
1
1U_0402_6.3V4Z
0.1U_0402_16V4Z
SB710 Ver:A14 <SA000030740> @ R379 C339
1
2
0_0603_5%
A 2 2 A
for Clear CMOS 2 BAS40-04_SOT23-3
+CHGRTC

Size
SCHEMATIC, MB A5481
Document Number Rev
Custom C
401743
5 4 3 2 1
hexainf@hotmail.com
GRATIS - FOR FREE
5 4 3 2 1
U10D @
1 @ 2 1 2
Part 4 of 5 R124 33_0402_5% C269 22P_0402_50V8J
E1
SB700
<28> EC_SWI# PCI_PME#/GEVENT4#
E2 RI#/EXTEVNT0# USBCLK/14M_25M_48M_OSC C8 CLK_48M_USB <16>
CRT_DET_R H7 SLP_S2/GPM9# USB_RCOMP 1
<28> PM_SLP_S3# F5 SLP_S3# USB_RCOMP G8 2
G1 R390 11.8K_0402_1%
<28> PM_SLP_S5# SLP_S5#
ACPI / WAKE UP EVENTS
USB MISC
<28> PBTN_OUT# H2 PWR_BTN#
D H1 D
<8,33> SB_PWRGD PWR_GOOD
+3VS 1 2 SUS_STAT#_L <13> SUS_STAT#
SUS_STAT# 1 2 SUS_STAT#_L K3 SUS_STAT#
R395 4.7K_0402_5% R555 0_0402_5% TP10 H5 E6
TP11 TEST2 USB_FSD13P
H4 TEST1 USB_FSD13N E7
TP12 H3 OHCI4 Disable
TEST0
USB 1.1
<28> EC_GA20 Y15 GA20IN/GEVENT0# USB_FSD12P F7
<28> EC_KBRST# W15 KBRST#/GEVENT1# USB_FSD12N E8
<28> EC_SCI# K4 LPC_PME#/GEVENT3#
<28> EC_SMI# K24 LPC_SMI#/EXTEVNT1# USB_HSD11P H11
F1 S3_STATE/GEVENT5# USB_HSD11N J10
J2 SYS_RESET#/GPM7#
<31> SB_PCIE_WAKE# H6 WAKE#/GEVENT8# USB_HSD10P E11
F2 BLINK/GPM6# USB_HSD10N F11
H_THERMTRIP# J6
<8> H_THERMTRIP# SMBALERT#/THRMTRIP#/GEVENT2#
NB_PWRGD W14 A11
<13> NB_PWRGD NB_PWRGD USB_HSD9P
USB_HSD9N B11
RSMRST# D3 EHCI1 Disable
<28> RSMRST# RSMRST#
USB_HSD8P C10
USB_HSD8N D10
1 2 RSMRST#
R389 2.2K_0402_5% AE18 G11
SATA_IS0#/GPIO10 USB_HSD7P
+3VS 1 2 AD18 CLK_REQ3#/SATA_IS1#/GPIO6 USB_HSD7N H12
SKU ID: UMA R404 @ 2.2K_0402_5% AA19
SKUID SMARTVOLT1/SATA_IS2#/GPIO4
Combine NAL00 SW code 1 2 W17 CLK_REQ0#/SATA_IS3#/GPIO0 USB_HSD6P E12
R410 2.2K_0402_5% V17 E14
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39 USB_HSD6N
W20 CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
W21 C12 USB20_P5
USB 2.0
<35> SB_SPKR SPKR/GPIO2 USB_HSD5P USB20_P5 <31>
<10,11,16,31> SB_CK_SCLK SB_CK_SCLK AA18 D12 USB20_N5 MiniCard1(WLAN)
SCL0/GPOC0# USB_HSD5N USB20_N5 <31>
CLK Gen, WLAN, DDR
<10,11,16,31> SB_CK_SDAT SB_CK_SDAT W18 SDA0/GPOC1# USB20_P4
K1 SCL1/GPOC2# USB_HSD4P B12 USB20_P4 <27>
C +3VS USB20_N4 S3 Power off C
K2 SDA1/GPOC3# USB_HSD4N A12 USB20_N4 <27> Card Reader
AA20 DDC1_SCL/GPIO9
GPIO
Y18 G12 USB20_P3
DDC1_SDA/GPIO8 USB_HSD3P USB20_P3 <24>
R409 1 2 2.2K_0402_5% SB_CK_SCLK C1 G14 USB20_N3 Camera
LLB#/GPIO66 USB_HSD3N USB20_N3 <24>
Y19 SMARTVOLT2/SHUTDOWN#/GPIO5
R399 1 2 2.2K_0402_5% SB_CK_SDAT G5 H14
DDR3_RST#/GEVENT7# USB_HSD2P
USB_HSD2N H15
A13 USB20_P1
USB_HSD1P USB20_P1 <32>
B13 USB20_N1 M/B conn S3 Wake Up
USB_HSD1N USB20_N1 <32>
B14 USB20_P0
USB_HSD0P USB20_P0 <32>
B9 A14 USB20_N0 M/B conn
USB_OC6#/IR_TX1/GEVENT6# USB_HSD0N USB20_N0 <32>
B8 USB_OC5#/IR_TX0/GPM5#
A8 A18
USB OC
<28> EC_LID_OUT# USB_OC4#/IR_RX0/GPM4# IMC_GPIO8
MDC: option A9 USB_OC3#/IR_RX1/GPM3# IMC_GPIO9 B18
E5 USB_OC2#/GPM2# IMC_PWM0/IMC_GPIO10 F21
USB_OC#1 F8 D21
<32> USB_OC#1 USB_OC1#/GPM1# SCL2/IMC_GPIO11
R119 33_0402_5% 1 2 USB_OC#0 E4 F19
<35> HDA_BITCLK_AUDIO <32> USB_OC#0 USB_OC0#/GPM0# SDA2/IMC_GPIO12
R118 33_0402_5% 1 @ 2 HDA_BITCLK E20
<34> HDA_BITCLK_MDC SCL3_LV/IMC_GPIO13
R121 33_0402_5% 1 2 M1 E21
<34> HDA_SDOUT_MDC AZ_BITCLK SDA3_LV/IMC_GPIO14
R120 33_0402_5% 1 2 HDA_SDOUT M2 E19
<35> HDA_SDOUT_AUDIO AZ_SDOUT IMC_PWM1/IMC_GPIO15
HDA_SDIN0 J7 D19 STRAP PIN
<35> HDA_SDIN0 AZ_SDIN0/GPIO42 IMC_PWM2/IMC_GPO16 GPIO16 <21>
HDA_SDIN1
<34> HDA_SDIN1 J8
L8
AZ_SDIN1/GPIO43 IMC_PWM3/IMC_GPO17 E18 GPIO17 <21> STRAP PIN
HD AUDIO
AZ_SDIN2/GPIO44
M3 AZ_SDIN3/GPIO46 IMC_GPIO18 G20
R123 33_0402_5% 1 2 HDA_SYNC L6 G21
<34> HDA_SYNC_MDC AZ_SYNC IMC_GPIO19
R125 33_0402_5% 1 2 M4 D25
<35> HDA_SYNC_AUDIO AZ_RST# IMC_GPIO20
L5 AZ_DOCK_RST#/GPM8# IMC_GPIO21 D24
INTEGRATED uC
IMC_GPIO22 C25
B R117 33_0402_5% 1 2 HDARST# C24 B
<35> HDA_RST_AUDIO# IMC_GPIO23
R122 33_0402_5% 1 2 B25
<34> HDA_RST_MDC# IMC_GPIO24
IMC_GPIO25 C23
STRAP PIN<21> HDARST#
IMC_GPIO26 B24
IMC_GPIO27 B23
IMC_GPIO28 A23
IMC_GPIO29 C22
IMC_GPIO30 A22
IMC_GPIO31 B22
+3VALW
IMC_GPIO32 B21
+3VS A21 SB Power Domain :S5
R393 2 @ 10K_0402_5% HDA_SDIN0 IMC_GPIO33
1 H19 IMC_GPIO0 IMC_GPIO34 D20
2
HDA_SDIN1
H20 IMC_GPIO1 IMC_GPIO35 C20 High: CRT Plugged
INTEGRATED uC
R391 2 @ 10K_0402_5%
1 H21 A20 R413
@ SPI_CS2#/IMC_GPIO2 IMC_GPIO36
1 2 F25 IDE_RST#/F_RST#/IMC_GPO3 IMC_GPIO37 B20
R116 2 @ 10K_0402_5%
1 HDA_BITCLK R126 2.2K_0402_5% B19 100K_0402_5%
IMC_GPIO38
D22 A19
1
IMC_GPIO4 IMC_GPIO39
E24 IMC_GPIO5 IMC_GPIO40 D18
E25 C18 CRT_DET 1 @ 2 CRT_DET_R
+3VALW IMC_GPIO6 IMC_GPIO41 R558 0_0402_5%
D23 IMC_GPIO7
1
D
<23> CRT_DET# 2
Q40 G
R525 1 @ 2 100K_0402_5% EC_LID_OUT# 218S7EALA11FG_BGA528_SB700 2N7002_SOT23 S
3
R415 1 2 10K_0402_5% SB_PCIE_WAKE# SB710 Ver:A14 <SA000030740>
A A

SCHEMATIC, MB A5481
Custom C
401743
5 4 3 2 1
5 4 3 2 1
Port Number Pri/SEC,Mas/Slave assignment SATA drive controlled by
Port 0 Primary master SATA controler

D D
Port 1 Secondary master SATA controler
Port 2 Primary slave SATA controler
U10B Port 3 Secondary slave SATA controler
AD9
SB700 AA24 Port 4 Primary (Secondary) master PATA controler
Main <22> SATA_STX_DRX_P0
<22> SATA_STX_DRX_N0 AE9
SATA_TX0P
SATA_TX0N Part 2 of 5
IDE_IORDY
IDE_IRQ AA25
Y22
HDD <22> SATA_DTX_C_SRX_N0 AB10 SATA_RX0N
IDE_A0
IDE_A1 AB23 Port 5 Primary (Secondary) slave PATA controler
<22> SATA_DTX_C_SRX_P0 AC10 SATA_RX0P IDE_A2 Y23
IDE_DACK# AB24
AE10 AD25
2nd <22> SATA_STX_DRX_P1
<22> SATA_STX_DRX_N1 AD10
SATA_TX1P
SATA_TX1N
IDE_DRQ
IDE_IOR# AC25
AC24
HDD <22> SATA_DTX_C_SRX_N1 AD11 SATA_RX1N
IDE_IOW#
IDE_CS1# Y25
<22> SATA_DTX_C_SRX_P1 AE11 SATA_RX1P IDE_CS3# Y24
AB12 AD24
Main <22> SATA_STX_DRX_P2
<22> SATA_STX_DRX_N2 AC12
SATA_TX2P
SATA_TX2N
IDE_D0/GPIO15
IDE_D1/GPIO16 AD23
ATA 66/100/133
AE22 D36 CH751H-40PT_SOD323-2
ODD <22> SATA_DTX_C_SRX_N2 AE12 SATA_RX2N
IDE_D2/GPIO17
IDE_D3/GPIO18 AC22 +3VALW 2
@
1
<22> SATA_DTX_C_SRX_P2 AD12 SATA_RX2P IDE_D4/GPIO19 AD21
IDE_D5/GPIO20 AE20
AD13 AB20
C
2nd <22> SATA_STX_DRX_P3
<22> SATA_STX_DRX_N3 AE13
SATA_TX3P
SATA_TX3N
IDE_D6/GPIO21
IDE_D7/GPIO22 AD19 @ R557 C677 @ 0.1U_0402_16V4Z
C
AE19 2 1 1 2
SERIAL ATA
+3VALW
ODD <22> SATA_DTX_C_SRX_N3 AB14 SATA_RX3N
IDE_D8/GPIO23
IDE_D9/GPIO24 AC20
0_0603_5%
<22> SATA_DTX_C_SRX_P3 AC14 SATA_RX3P IDE_D10/GPIO25 AD20
IDE_D11/GPIO26 AE21
AE14 AB22 +SB_SPI_VCC
SATA_TX4P IDE_D12/GPIO27
AD14 SATA_TX4N IDE_D13/GPIO28 AD22
IDE_D14/GPIO29 AE23
2
AD15 SATA_RX4N IDE_D15/GPIO30 AC23
AE15 R549 R554 R559
SATA_RX4P 1K_0402_5%
27P_0402_50V8J 1 2 C276 SATA_X1 AB16 @ @ @ 10K_0402_5%
SATA_TX5P
AC16
1
SATA_TX5N
1
G6 SB_SI_SPI_SO
R150 SPI_DI/GPIO12 SB_SO_SPI_SI 10K_0402_5% U40
AE16 SATA_RX5N SPI_DO/GPIO11 D2
25MHZ_20P Y3 AD16 D1 SB_SPICLK SB_SPICS# 1 CE# 8
10M_0402_5% SATA_RX5P SPI_CLK/GPIO47 SB_HOLD# VDD SB_SPICLK
F4 3 WP# 6
SPI ROM
2
SATA_CAL SPI_HOLD#/GPIO31 SB_SPICS# SB_HOLD# @ SCK SB_SO_SPI_SI

2 1 V12 F3 1 2 7 HOLD# 5
2
27P_0402_50V8J 1 SATA_CAL SPI_CS1#/GPIO32 SI

2 C279 SATA_X2 R400 1K_0402_1% R551 0_0402_5% 4 VSS SO 2 SB_SI_SPI_SO
SATA_X1 Y12 U15
SATA_X1 LAN_RST#/GPIO13 MX25L8005M2C-15G_SOP8
ROM_RST#/GPIO14 J1
SATA_X2 AA12 @
SATA_X2
+3VS R401 1 2 10K_0402_5% FANOUT0/GPIO3 M8
<34> SATA_LED# W11 SATA_ACT#/GPIO67 FANOUT1/GPIO48 M5
+1.2V_HT M7
L64 FANOUT2/GPIO49
Reserve For Debug
2 1 +PLLVDD_SATA <93mA> AA11 P5
BLM18PG121SN1D_0603 PLLVDD_SATA FANIN0/GPIO50
FANIN1/GPIO51 P8
SATA PWR
1 1 <6mA> W12 XTLVDD_SATA FANIN2/GPIO52 R8
C530 C497
TEMP_COMM C6
B 2.2U_0603_6.3V4Z 0.1U_0402_16V4Z B6 B
2 2 TEMPIN0/GPIO61
TEMPIN1/GPIO62 A6
TEMPIN2/GPIO63 A5
HW MONITOR TEMPIN3/TALERT#/GPIO64 B5 EC_THERM# <28>
VIN0/GPIO53 A4 2 1 ACIN <28,37,38,40>

+3VS L62 B4 D25 CH751H-40PT_SOD323-2
+XTLVDD_SATA VIN1/GPIO54
2 1 VIN2/GPIO55 C4
BLM18PG121SN1D_0603 2 1 D4 R377 1 2 100K_0402_5% +3VS
VIN3/GPIO56
C493 C496 VIN4/GPIO57 D5
D6 R378 1 @ 2 100K_0402_5% for ACIN level issue
VIN5/GPIO58 +3VALW
1U_0402_6.3V4Z 0.1U_0402_16V4Z A7
1 2 VIN6/GPIO59
VIN7/GPIO60 B7
+3VALW
L55
F6 <5mA> +SB_AVDD 2 1
AVDD BLM18PG121SN1D_0603
1 1
AVSS G7
C457
2.2U_0603_6.3V4Z
2 2
218S7EALA11FG_BGA528_SB700
C456
SA00001S570 Ver:A12 0.1U_0402_16V4Z
A A

SCHEMATIC, MB A5481
Custom C
401743
1
Sheet 19 of 47
GRATIS - FOR FREE

5 4 3 2 1
U10C U10E
<131mA> SB700 <510mA>
+SB_VDD
+3VS L9
M9
VDDQ_1
Part 3 of 5
VDD_1 L15
M12
1
R418
2
0_0805_5%
+1.2V_HT SB700 A2
C524 22U_0805_6.3V6M VDDQ_2 VDD_2 VSS_1
1 2 T15 VDDQ_3 VDD_3 M14 1 2 VSS_2 A25
U9 N13 C528 22U_0805_6.3V6M B1
CORE S0
D C604 1U_0402_6.3V4Z VDDQ_4 VDD_4 C484 1U_0402_6.3V4Z VSS_3 D
1 2 U16 VDDQ_5 VDD_5 P12 2 1 VSS_4 D7
C603 1 2 1U_0402_6.3V4Z U17 P14 C487 2 1 1U_0402_6.3V4Z T10 F20
VDDQ_6 VDD_6 AVSS_SATA_1 VSS_5
PCI/GPIO I/O
C508 1 2 1U_0402_6.3V4Z V8 R11 C475 2 1 1U_0402_6.3V4Z U10 G19
C489 1U_0402_6.3V4Z VDDQ_7 VDD_7 C471 1U_0402_6.3V4Z AVSS_SATA_2 VSS_6
1 2 W7 VDDQ_8 VDD_8 R15 2 1 U11 AVSS_SATA_3 VSS_7 H8
C512 1 2 1U_0402_6.3V4Z Y6 T16 C492 2 1 0.1U_0402_16V4Z U12 K9
C529 0.1U_0402_16V4Z VDDQ_9 VDD_9 C485 0.1U_0402_16V4Z AVSS_SATA_4 VSS_8
1 2 AA4 VDDQ_10 2 1 V11 AVSS_SATA_5 VSS_9 K11
C490 1 2 0.1U_0402_16V4Z AB5 V14 K16
C465 0.1U_0402_16V4Z VDDQ_11 AVSS_SATA_6 VSS_10
1 2 AB21 VDDQ_12 W9 AVSS_SATA_7 VSS_11 L4
Y9 AVSS_SATA_8 VSS_12 L7
<71mA> L28 Y17 L12
+1.2V_CKVDD AVSS_SATA_11 VSS_15
+3VS Y20 VDD33_18_1 CKVDD_1.2V_1 L21 2 1 +1.2V_HT AA9 AVSS_SATA_12 VSS_16 L14
AA21 L22 FBMA-L11-160808-221LMT 0603 AB9 L16
VDD33_18_2 CKVDD_1.2V_2 AVSS_SATA_13 VSS_17
1 @ 2 AA22 L24 C515 1 2 1U_0402_6.3V4Z AB11 M6
IDE/FLSH I/O
CLKGEN I/O
C516 22U_0805_6.3V6M VDD33_18_3 CKVDD_1.2V_3 AVSS_SATA_14 VSS_18
AE25 VDD33_18_4 CKVDD_1.2V_4 L25 AB13 AVSS_SATA_15 VSS_19 M10
C495 1 @ 2 0.1U_0402_16V4Z C285 1 2 1U_0402_6.3V4Z AB15 M11
C518 AVSS_SATA_16 VSS_20
1 @ 2 0.1U_0402_16V4Z AB17 AVSS_SATA_17 VSS_21 M13
C522 1 2 0.1U_0402_16V4Z C521 2 1 0.1U_0402_16V4Z AC8 M15
@ AVSS_SATA_18 VSS_22
AD8 AVSS_SATA_19 VSS_23 N4
C523 2 1 0.1U_0402_16V4Z AE8 N12
AVSS_SATA_20 VSS_24
VSS_25 N14
+PCIE_VDDR C284 1 2 10U_0805_10V4Z P6
L65 POWER VSS_26
VSS_27 P9
+1.2V_HT 2 1 <600mA> VSS_28 P10
FBMA-L11-201209-221LMA30T_0805 A15 P11
AVSS_USB_1 VSS_29
P18 PCIE_VDDR_1 B15 AVSS_USB_2 VSS_30 P13
1 2 P19 +3VALW C14 P15
C250 22U_0805_6.3V6M PCIE_VDDR_2 AVSS_USB_3 VSS_31
P20 PCIE_VDDR_3 <32mA> D8 AVSS_USB_4 VSS_32 R1
1 2 P21 A17 +S5_3V 1 2 D9 R2
A-LINK I/O
C C520 4.7U_0805_10V4Z PCIE_VDDR_4 S5_3.3V_1 R416 0_0805_5% AVSS_USB_5 VSS_33 C
R22 PCIE_VDDR_5 S5_3.3V_2 A24 D11 AVSS_USB_6 VSS_34 R4
C467 1 2 1U_0402_6.3V4Z R24 B17 1 2 D13 R9
PCIE_VDDR_6 S5_3.3V_3 AVSS_USB_7 VSS_35
GROUND
R25 J4 C481 22U_0805_6.3V6M D14 R10
PCIE_VDDR_7 S5_3.3V_4 AVSS_USB_8 VSS_36
3.3V_S5 I/O
C247 1 2 0.1U_0402_16V4Z J5 1 2 D15 R12
C514 1 S5_3.3V_5 AVSS_USB_9 VSS_37
2 0.1U_0402_16V4Z S5_3.3V_6 L1 C483 2.2U_0603_6.3V4Z E15 AVSS_USB_10 VSS_38 R14
S5_3.3V_7 L2 1 2 F12 AVSS_USB_11 VSS_39 T11
+1.2V_SATA C525 2 1 2.2U_0603_6.3V4Z F14 T12
L63 C510 2 AVSS_USB_12 VSS_40
<567mA> 1 0.1U_0402_16V4Z G9 AVSS_USB_13 VSS_41 T14
+1.2V_HT 2 1 AA14 C470 2 1 0.1U_0402_16V4Z H9 U4
FBMA-L11-201209-221LMA30T_0805 AVDD_SATA_1 C504 0.1U_0402_16V4Z +1.2VALW AVSS_USB_14 VSS_42
AB18 AVDD_SATA_4 H17 AVSS_USB_15 VSS_43 U14
AA15 AVDD_SATA_2 <113mA> J9 AVSS_USB_16 VSS_44 V6
1 2 AA17 G2 +S5_1.2V R528 0_0603_5% J11 Y21
CORE S5
AVDD_SATA_3 S5_1.2V_1 AVSS_USB_17 VSS_45
SATA I/O
C526 22U_0805_6.3V6M AC18 G4 J12 AB1
C517 1 AVDD_SATA_5 S5_1.2V_2 +1.2VALW AVSS_USB_18 VSS_46
2 1U_0402_6.3V4Z AD17 AVDD_SATA_6 2 1 J14 AVSS_USB_19 VSS_47 AB19
C527 1 2 1U_0402_6.3V4Z AE17 <197mA> L29 C460 2 1 1U_0402_6.3V4Z J15 AB25
C509 1 AVDD_SATA_7 +1.2_USB AVSS_USB_20 VSS_48
2 0.1U_0402_16V4Z 2 1 C461 1U_0402_6.3V4Z K10 AVSS_USB_21 VSS_49 AE1
C511 1 2 0.1U_0402_16V4Z A10 FBMA-L11-160808-221LMT 0603 K12 AE24
USB_PHY_1.2V_1 AVSS_USB_22 VSS_50
USB_PHY_1.2V_2 B10 1 2 K14 AVSS_USB_23
C271 22U_0805_6.3V6M K15
C286 2 AVSS_USB_24
1 0.1U_0402_16V4Z PCIE_CK_VSS_9 P23
C270 2 1 0.1U_0402_16V4Z R16
R419 2 PCIE_CK_VSS_10
1 1K_0402_5% Reserve for SB700 leakage voltage issue PCIE_CK_VSS_11 R19
+AVDD_USB T17
L26 PCIE_CK_VSS_12
<658mA> PCIE_CK_VSS_13 U18
+3VALW 2 1 A16 AVDDTX_0 V5_VREF AE7 <1mA> +V5_VREF R417 2 1 1K_0402_5% +5VS H18 PCIE_CK_VSS_1 PCIE_CK_VSS_14 U20
FBMA-L11-201209-221LMA30T_0805 B16 2 2 J17 V18
AVDDTX_1 PCIE_CK_VSS_2 PCIE_CK_VSS_15
C16 AVDDTX_2 AVDDCK_3.3V J16 <47mA> +AVDDCK_3.3V 1 2 +3VS J22 PCIE_CK_VSS_3 PCIE_CK_VSS_16 V20
C217 1 2 10U_0805_10V4Z D16 C513 C519 K25 V21
AVDDTX_3 PCIE_CK_VSS_4 PCIE_CK_VSS_17
C216 1 2 10U_0805_10V4Z D17 K17 <62mA> +AVDDCK_1.2V 1U_0603_10V4Z D27 CH751H-40PT_SOD323-2 M16 W19
PLL
C458 1U_0402_6.3V4Z AVDDTX_4 AVDDCK_1.2V 0.1U_0402_16V4Z 1 1 PCIE_CK_VSS_5 PCIE_CK_VSS_18

1 2 E17 AVDDTX_5 M17 PCIE_CK_VSS_6 PCIE_CK_VSS_19 W22
USB I/O
B B
C459 1 2 1U_0402_6.3V4Z F15 AVDDRX_0 AVDDC E9 <17mA> +AVDDC M21 PCIE_CK_VSS_7 PCIE_CK_VSS_20 W24
C466 1 2 0.1U_0402_16V4Z F17 P16 W25
C494 0.1U_0402_16V4Z AVDDRX_1 L54 PCIE_CK_VSS_8 PCIE_CK_VSS_21
1 2 F18 AVDDRX_2
C469 1 2 0.1U_0402_16V4Z G15 2 1 +3VALW F9 L17
AVDDRX_3 BLM18PG121SN1D_0603 AVSSC AVSSCK
G17 AVDDRX_4 Part 5 of 5
G18 AVDDRX_5 2.2U_0603_6.3V4Z 2 1 C463 218S7EALA11FG_BGA528_SB700
0.1U_0402_16V4Z 2 1 C462 SB710 Ver:A14 <SA000030740>

218S7EALA11FG_BGA528_SB700
SB710 Ver:A14 <SA000030740>
L56
+AVDDCK_1.2V 2 1 +1.2V_HT
BLM18PG121SN1D_0603
2.2U_0603_6.3V4Z 2 1 C464
0.1U_0402_16V4Z 2 1 C491
L58
+AVDDCK_3.3V 2 1 +3VS
BLM18PG121SN1D_0603
2.2U_0603_6.3V4Z 2 1 C498
A A
0.1U_0402_16V4Z 2 1 C499

SCHEMATIC, MB A5481
Custom C
401743
5 4 3 2 1
5 4 3 2 1
REQUIRED STRAPS NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK
D D
LPC_CLK0
PCI_CLK2 PCI_CLK3 PCI_CLK4 PCI_CLK5 CLK_PCI_EC LPC_CLK1 RTC_CLK AZ_RST_CD# GP17 GP16
PULL BOOTFAIL USE RESERVED RESERVED ENABLE PCI CLKGEN INTERNAL EC Internal pull up
HIGH TIMER DEBUG MEM BOOT ENABLED RTC ENABLED
ENABLED STRAPS H,H = Reserved
DEFAULT
H,L = SPI ROM
EXT. RTC
PULL BOOTFAIL IGNORE DISABLE PCI CLKGEN (PD on X1, EC
LOW TIMER DEBUG MEM BOOT DISABLED apply DISABLED L,H = LPC ROM (Default L,NC)
DISABLED STRAPS 32KHz to DEFAULT L,L = FWH ROM
DEFAULT DEFAULT DEFAULT DEFAULT RTC_CLK)
+3VS +3VS +3VS +3VS +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW
1
1
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
R145
R138
R144
R146
R136
R89
R394
R142
R87
R494
2
2
C @ @ @ @ @ @ @ @ @ C
<17> PCI_CLK2
<17> PCI_CLK3
<17> PCI_CLK4
<17> PCI_CLK5
DEBUG STRAPS
<17,28> CLK_PCI_EC SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]
<17> LPCCLK1
<17> RTC_CLK
<18> HDARST#
<18> GPIO17
<18> GPIO16
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
1
1
R386
R137
R94
R143
R133
R141
R132
R129
R96
R130
USE USE PCI USE ACPI USE IDE USE DEFAULT RESERVED
PULL LONG PLL BCLK PLL PCIE STRAPS
HIGH
2
2
@ @ @ @ RESET
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT
PULL USE BYPASS BYPASS BYPASS IDE USE EEPROM

SHORT PCI PLL ACPI PLL PCIE STRAPS
DEBUG STRAPS LOW
RESET BCLK
B B
<17> PCI_AD28
<17> PCI_AD27
<17> PCI_AD26
<17> PCI_AD25
<17> PCI_AD24
<17> PCI_AD23
1
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
R156
R148
R158
R157
R147
R159
2
2
@ @ @ @ @ @
A A

Size
SCHEMATIC, MB A5481
Document Number Rev
Custom C
401743
1
Sheet 21 of 47
GRATIS - FOR FREE

5 4 3 2 1
+5VS +3VS
+5VS
0.1U_0402_16V4Z 0.1U_0402_16V4Z
Placea caps. near ODD CONN.
0.1U_0402_16V4Z
1 1 1 1 1 1 1 1
C351 C349 C347 C346 1 1 1 1
C360
C363 C366 C368 C150 C149
10U_0805_10V4Z 10U_0805_10V4Z C153 C148
2 2 2 2 2 2 2 2 10U_0805_10V4Z
D D
2 2 2 2
0.1U_0402_16V4Z 1000P_0402_50V7K 0.1U_0402_16V4Z 1000P_0402_50V7K 1U_0402_6.3V4Z
1000P_0402_50V7K
SATA HDD CONN SATA ODD CONN
JSATA2
JSATA1
1 GND
C289 1 2 0.01U_0402_25V7K SATA_STX_C_DRX_P0 2 1
<19> SATA_STX_DRX_P0 C291 1 HTX+ GND
<19> SATA_STX_DRX_N0 2 0.01U_0402_25V7K SATA_STX_C_DRX_N0 3 HTX- <19> SATA_STX_DRX_P2
C308 1 2 0.01U_0402_25V7K SATA_STX_C_DRX_P2 2 A+
4 +5VS C307 1 2 0.01U_0402_25V7K SATA_STX_C_DRX_N2 3
GND <19> SATA_STX_DRX_N2 A-
C302 1 2 0.01U_0402_25V7K SATA_DTX_SRX_N0 5 4
<19> SATA_DTX_C_SRX_N0 C305 1 HRX- GND
<19> SATA_DTX_C_SRX_P0 2 0.01U_0402_25V7K SATA_DTX_SRX_P0 6 HRX+ 1 <19> SATA_DTX_C_SRX_N2
C311 1 2 0.01U_0402_25V7K SATA_DTX_SRX_N2 5 B-
7 C370 C312 1 2 0.01U_0402_25V7K SATA_DTX_SRX_P2 6
GND + <19> SATA_DTX_C_SRX_P2 B+
7 GND
@
R544
150U_D2_6.3VM 2
+3VS 1 2 8 VCC3.3 1 2 8 DP
9 R617 @ 1K_0402_1% 9
C 0_0805_5% VCC3.3 +5V C
10 VCC3.3 +5VS 10 +5V
11 GND 11 MD
12 GND 12 GND GND 15
R545 13 13 14
GND GND GND
+5VS 1 2 14 VCC5
Close to SATA HDD
15 VCC5
0_0805_5% 16 SANTA_206401-1_13P
VCC5 CONN@
17 GND
18 RESERVED
19 GND KALA0 used
20 VCC12
21 VCC12 GND 24
22 VCC12 GND 23
OCTEK_SAT-22SU1G_NR
CONN@
KALA0 used
JP2
1 1 2 2 +5VS
C314 1 2 0.01U_0402_25V7K SATA_STX_C_DRX_P1 3 4
<19> SATA_STX_DRX_P1 3 4
C313 1 2 0.01U_0402_25V7K SATA_STX_C_DRX_N1 5 6
<19> SATA_STX_DRX_N1 5 6
7 8
Second HDD <19> SATA_DTX_C_SRX_N1
C316 1 2 0.01U_0402_25V7K SATA_DTX_SRX_N1 9
7
9
8
10 10
C315 1 2 0.01U_0402_25V7K SATA_DTX_SRX_P1 11 12
<19> SATA_DTX_C_SRX_P1 11 12
13 13 14 14
B C318 1 B
<19> SATA_STX_DRX_P3 2 0.01U_0402_25V7K SATA_STX_C_DRX_P3 15 15 16 16 +3VS
C317 1 2 0.01U_0402_25V7K SATA_STX_C_DRX_N3 17 18
<19> SATA_STX_DRX_N3 17 18
19 20
Second ODD <19> SATA_DTX_C_SRX_N3
C320 1 2 0.01U_0402_25V7K SATA_DTX_SRX_N3 21
19
21
20
22 22
C319 1 2 0.01U_0402_25V7K SATA_DTX_SRX_P3 23 24
<19> SATA_DTX_C_SRX_P3 23 24
25 25 26 26
27 27 28 28
29 30
GND
GND
GND
GND
GND
GND
29 30
ACES_88018-304G
31
32
33
34
35
36
CONN@
+5VS +3VS
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
1 1 1 1 1 1 1
C574 C577 C579 C580 C572 C573 C571
2 2 2 2 2 2 2
1000P_0402_50V7K 10U_0805_10V4Z 1000P_0402_50V7K 10U_0805_10V4Z

A A

SCHEMATIC, MB A5481
B C
401743
5 4 3 2 1
A B C D E
D18 D19 D20

CRT Connector @ @ @
DAN217_SC59 DAN217_SC59 DAN217_SC59
+5VS +R_CRT_VCC
W=40mils
+CRT_VCC
D17 F1 W=40mils
1
2 1 1 2
RB491D_SC59-3 1.1A_6VDC_FUSE
1
C407
3
0.1U_0402_16V4Z
2
+5VS
1 1
L32 JCRT1
CRT_R 1 2 CRT_R_L 6
<13> GMCH_CRT_R
FCM2012CF-800T06_2P 11
L34 1
CRT_G 1 2 CRT_G_L 7
<13> GMCH_CRT_G
FCM2012CF-800T06_2P 12
L33 2
CRT_B 1 2 CRT_B_L 8
<13> GMCH_CRT_B
FCM2012CF-800T06_2P 13
3
1
1 1 1 1 1 1 9
R339 R338 R340 C408 C412 C414 C413 C410 C409 14 KAW60 used
4
140_0402_1% 6P_0402_50V8D 6P_0402_50V8D 6P_0402_50V8D 10
150_0402_1% 2 8P_0402_50V8D 2 8P_0402_50V8D 2 8P_0402_50V8D 2 2 2
15 SUYIN_070549FR015S208CR
2
C406 5
150_0402_1% 100P_0402_50V8J CONN@
16
17
+CRT_VCC HSYNC_L
1 2
L38 MBC1608121YZF_0603
1 2 2 1 D_DDC_DATA
C434 0.1U_0402_16V4Z R360 10K_0402_5% 1 2 VSYNC_L
L37 MBC1608121YZF_0603 1
1
U36 C411
10P_0402_50V8J
10P_0402_50V8J
1 1
OE#
P
CRT_DET# <18>
1 2 CRT_HSYNC 2 4 D_CRT_HSYNC 68P_0402_50V8J
<13,15> GMCH_CRT_HSYNC A Y 2
R354 0_0402_5% C424 C423
G
D_DDC_CLK
2
74AHCT1G125GW_SOT353-5 2 2
3
1 R636
2 +CRT_VCC C422 2
100K_0402_5%
1 2 68P_0402_50V8J
1
C433 0.1U_0402_16V4Z 2
1
U35
OE#
P
1 2 CRT_VSYNC 2 4 D_CRT_VSYNC +CRT_VCC
<13,15> GMCH_CRT_VSYNC A Y
R356 0_0402_5%
G
74AHCT1G125GW_SOT353-5
3
Close to Conn side
+CRT_VCC
+3VS
1
R77 R72
6.8K_0402_5% 6.8K_0402_5%
2
G
2
2
D_DDC_DATA 1 3
GMCH_CRT_DATA <13>
S
Q50
2
BSH111 1N_SOT23-3
G
3 3
D_DDC_CLK 1 3 GMCH_CRT_CLK <13>
S
Q51
BSH111 1N_SOT23-3
4 4

SCHEMATIC, MB A5481
hexainf@hotmail.com THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Rev
C
401743
GRATIS - FOR FREE MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A B C D E
5 4 3 2 1
+3VS
INVT_PWM
1
1 1
D21 C416
C426 BAS16_SOT23-3 1U_0402_6.3V4Z
LCD POWER CIRCUIT 2
@ 0.1U_0402_16V4Z @
2
@
D D
2
+3VS
+LCDVDD +3VALW
1
C77
1
2
@ 4.7U_0805_10V4Z
R274
300_0603_5% R348
2 LCD/PANEL CONN.
2N7002DW-T/R7_SOT363-6
100K_0402_5% W=60mils
6 2
3
S
G Q23 JLVDS1
2 1 2 42 GND GND 41
Q22A
R278 1K_0402_5% AO3413_SOT23-3 +INVPWR_B+ 40 39 DAC_BRIG

40 39 DAC_BRIG <28>
2 1
D 38 37 INVT_PWM
1
38 37
2
+LCDVDD DISPOFF#
W=60mils +3VS
EDID_LCD_CLK
36 36 35 35
<13> GMCH_LCD_CLK 34 33 +LCDVDD
1
34 33
3
2N7002DW-T/R7_SOT363-6
R347 C431 +LCDVDD <13> GMCH_LCD_DATA EDID_LCD_DAT 32 31

2 0.047U_0402_16V7K 32 31
Q22B
30 30 29 29
@ 100K_0402_5% 1 1 28 27
<13> GMCH_TZOUT0-
1
GMCH_ENVDD 5 C415 C420 28 27

<13> GMCH_ENVDD <13> GMCH_TZOUT0+ 26 26 25 25 GMCH_TXOUT0- <13>
24 24 23 23 GMCH_TXOUT0+ <13>
1
4.7U_0805_10V4Z 0.1U_0402_16V4Z 22 21
<13> GMCH_TZOUT1+
4
R345 2 2 22 21
<13> GMCH_TZOUT1- 20 20 19 19 GMCH_TXOUT1- <13>
10K_0402_5% 18 17
18 17 GMCH_TXOUT1+ <13>
<13> GMCH_TZOUT2+ 16 16 15 15
C 14 13 C
<13> GMCH_TZOUT2- GMCH_TXOUT2+ <13>
2
14 13
12 12 11 11 GMCH_TXOUT2- <13>
<13> GMCH_TZCLK- 10 10 9 9
<13> GMCH_TZCLK+ 8 8 7 7 GMCH_TXCLK- <13>
6 6 5 5 GMCH_TXCLK+ <13>
R759 1 2 0_0402_5% USB20_CMOS_N3 4 3
<18> USB20_N3 4 3
R760 1 2 0_0402_5% USB20_CMOS_P3 2 1 R761 1 2 0_0603_5% +3VS
<18> USB20_P3 2 1 R762 1 2 0_0603_5% +3VALW
L77 ACES_88242-4001 @
4 3 CONN@ 1
4 3
KALA0 used
1 2 C768 0.1U_0402_16V4Z
1 2 2
@ WCM2012F2S-900T04_0805
EC_INVT_PWM 1 2 INVT_PWM
<28> EC_INVT_PWM
R764 0_0402_5%
GMCH_INVT_PWM 1 VARY@ 2
<13> GMCH_INVT_PWM
R767 0_0402_5%
+3VS +INVPWR_B+
B VARYBRIGHT FUNCTION L20 2 B

1 B+
W=40mils FBMA-L11-201209-221LMA30T_0805
1
R1 L15 2 1
+3VS +3VS @ FBMA-L11-201209-221LMA30T_0805
1 2 4.7K_0402_5% 1 1
R763 0_0402_5% C379 C362
2
1
R769 0_0402_5%
EC_INVT_PWM 2 @ 1 R30 R39 BKOFF# 1 2 DISPOFF# 680P_0402_50V7K 68P_0402_50V8J
<28> BKOFF# 2 2
@ @ D2 RB751V_SOD323
2
4.7K_0402_5% 4.7K_0402_5% @
2
1 2
2
R21 4.7K_0402_5% 1 6 1 @ 2 INVT_PWM R414

R768 0_0402_5% @
Q52A 100K_0402_5% +LCDVDD
1
R770 0_0402_5% 2N7002DW-T/R7_SOT363-6 D
1
GMCH_INVT_PWM 2 @ 1 2 Q69
G 2N7002_SOT23-3
5
S DAC_BRIG C371 1 2 220P_0402_50V7K 1 1

3
1 2 C383 C382
R23 4.7K_0402_5% 4 3 INVT_PWM C372 1 2 220P_0402_50V7K @
10U_0805_10V4Z 0.1U_0402_16V4Z
Q52B DISPOFF# C377 1 2 2
2 220P_0402_50V7K
2N7002DW-T/R7_SOT363-6
A A

SCHEMATIC, MB A5481
Custom C
401743
5 4 3 2 1
5 4 3 2 1
+3V_LAN +3V_LAN
1 8114@ 2 +1.8_VDD/LX
R820 0_0603_5%
1
1 2 C932
1
R821 R822
Place Close to Chip
L88 8132@ 4.7UH_1008HC-472EJFS-A_5%_1008
0.1U_0402_16V4Z 4.7K_0402_5% 4.7K_0402_5%
+AVDD_CEN 2 LAN_MIDI0+ R843 2 1 49.9_0402_1% C978 1 2 0.1U_0402_16V4Z
2
U84 LAN_MIDI0- R845 2 1 49.9_0402_1%
R8441 2 0_0603_5% 1 2 +2.5V_VDDH/VDD17 1 2 +2.5V_VDDH 1 8
R824 8132@ 0_0603_5% R825 8114@ 0_0603_5% A0 VCC LAN_MIDI1+ R846 2
1 2 A1 WP 7 1 49.9_0402_1% C979 1 2 0.1U_0402_16V4Z
D C933 C934 3 6 TWSI_SCL D
A2 SCL TWSI_SDA LAN_MIDI1- R847 2
4 GND SDA 5 1 49.9_0402_1%
4.7U_0805_10V4Z 0.1U_0402_16V4Z
8132@ 2 8132@ AT24C02BN-SH-T_SO8
@
U85
2 1 +1.8_VDD/LX 1 29 TWSI_SCL
C936 8114@ 1U_0603_10V4Z VDD18O TWSI_CLK TWSI_SDA
TWSI_DATA 30
+3V_LAN 2 VDD33
8114@ 47 LAN_ACTIVITY#
LED_ACTn LAN_ACTIVITY# <26>
WAKEn C935 2 1 1U_0603_10V4Z +2.5V_VDDH/VDD17 6 48 LAN_LINK#
VDDHO LED_10_100n LAN_LINK# <26>
8114: Internal PU C982 2 1 0.1U_0402_16V7K CTR12 5 CTR12 LED_DUPLEXn 27 1 2 LAN_CLKREQ# <16>
8132: OD 8132@ R261 0_0402_5%
3 13 LAN_MIDI0+ LAN_MIDI0+ <26>
<13,15,17,28,31> PLT_RST# PERSTn TRXP0
<28> EC_PME# 4 14 LAN_MIDI0- LAN_MIDI0- <26>
8114@ WAKEn TRXN0 LAN_MIDI1+
TRXP1 17 LAN_MIDI1+ <26>
+3V_LAN 1 2 2 1 7 18 LAN_MIDI1- LAN_MIDI1- <26>
R829 4.7K_0402_5% C937 1000P_0402_50V7K VBG1P18V TRXN1
Layout Notice : Close to chip
<16> CLK_PCIE_LAN 2 1 41 11 AVDDVCO1
C938 0.1U_0402_16V7K REFCLKP AVDDL_REG AVDDVCO2
AVDDL/AVDDL_REG 42
2 1 40 +3V_LAN
<16> CLK_PCIE_LAN# REFCLKN
A
t
h
e
r
o
s
C939 0.1U_0402_16V7K
43 1 2 0.1U_0402_16V4Z
<12> PCIE_ITX_C_PRX_P1 RX_P +1.2_DVDDL
+3VALW R830 0_1206_5%
DVDDL0 28
<12> PCIE_ITX_C_PRX_N1 44 RX_N DVDDL1 32
C 45 1 1 1 C
PCIE_PTX_IRX_P1 DVDDL2 C944 C941 C942 C945
<12> PCIE_PTX_C_IRX_P1 2
C940
1
0.1U_0402_16V7K
38 TX_P AR8114A 10/100 LAN DVDDL3 46
<12> PCIE_PTX_C_IRX_N1 2 1 PCIE_PTX_IRX_N1 37 8 +1.2_AVDDL 4.7U_0805_10V4Z

C943 0.1U_0402_16V7K TX_N AVDDL0 2 2 2
AVDDL1 16
Place Close to Chip LAN_X1 9
AVDDL2 22
36
LAN_X2 XTLO AVDDL3 0.1U_0402_16V4Z 0.1U_0402_16V4Z
10 XTLI AVDDL4 39
31 15 +2.5V_VDDH
Y8 SMCLK AVDDH0
33 SMDATA AVDDH1 19
LAN_X1 1 2 LAN_X2 25
AVDDH2
20 +3V_LAN
25MHZ_20P NC_0
1 1 2 1 12 RBIAS NC_1 21
R831 2.37K_0402_1% 34 23
C946 C947 TESTMODE NC_2
NC_3 24 1
1
27P_0402_50V8J 27P_0402_50V8J 26
2 2 NC_4 C948 R832
49 GND NC_5 35 1 8132@ 2+2.5V_VDDH
0.1U_0402_16V4Z 10K_0402_1% R833 0_0402_5%
3
8114@ 2 Q73 8114@
AR8114-AL1E_QFN48_6X6
2
1 CTR12
change to AR8132L-AL1E 1
C949
NJT4030PT1G_SOT223 0.1U_0402_16V4Z
4
2
8114@ 8132@
+1.2_AVDDL 2
B Place Close to Pin 28324546 C950

1 1
C951 B
+1.2_AVDDL 10U_0805_10V4Z 0.1U_0402_16V4Z
L89 FBMA-L11-201209-221LMA30T_0805 C953 C955 8114@ 8114@
+1.2_DVDDL +1.2_DVDDL 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 2
1 2
8114@ 1 1 1 1 1
C952
8132@ 8114@ 0.1U_0402_16V4Z
2 2 2 2 2
R835 0_0603_5% C983 C954
1 2 1 2 AVDDVCO1 1U_0603_10V4Z 0.1U_0402_16V4Z
R834 @ 1 1
0_0603_5% C956
1000P_0402_50V7K C957
1U_0603_10V4Z
2 2
Place Close to Pin816223639
Place Close to Pin151925
C984 C963 C965
C960 +1.2_AVDDL 1U_0603_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
R546 1 2 0_0805_5% AVDDVCO2 +2.5V_VDDH 0.1U_0402_16V4Z 1 1 1 1 1 1
1 1 1 1 C966
C961
C958 8132@ 8114@ 0.1U_0402_16V4Z
0.1U_0402_16V4Z 2 2 2 2 2 2
0.1U_0402_16V4Z
2 2 2 2 C962 C964
C959 0.1U_0402_16V4Z 0.1U_0402_16V4Z
1U_0603_10V4Z
A A
8114: R546 need change to bead

SCHEMATIC, MB A5481
B
401743 C

1
25 of 47
5 4 3 2 1
+AVDD_CEN
C967
1 2
2
220P_0402_50V7K
R836
0_0603_5%
JRJ1
2 1 LAN_ACTIVITY#_R 12
1
D T1 <25> LAN_ACTIVITY# R837 510_0402_5% Amber LED+ D
2 1 11 Amber LED-
<25> LAN_MIDI0+ LAN_MIDI0+ 1 16 RJ45_MIDI0+ R14 5.11K_0402_1% 16
LAN_MIDI0- RD+ RX+ RJ45_MIDI0- SHLD2
<25> LAN_MIDI0- 2 RD- RX- 15 8 PR4-
3 CT CT 14 SHLD1 15
4 NC NC 13 7 PR4+
5 NC NC 12
6 11 RJ45_MIDI1- 6
LAN_MIDI1+ CT CT RJ45_MIDI1+ PR2-
<25> LAN_MIDI1+ 7 TD+ TX+ 10
<25> LAN_MIDI1- LAN_MIDI1- 8 9 RJ45_MIDI1- 5
TD- TX- PR3-
4 PR3+
350uH_NS0013LF
RJ45_MIDI1+ 3 PR2+
1
RJ45_MIDI0- 2 PR1-
SHLD2 14
LAN_TCT R839 R840 RJ45_MIDI0+ 1
75_0402_1% 75_0402_1% PR1+
SHLD1 13
LAN_LINK# 10
2
<25> LAN_LINK# Green LED-
1 1
C969 C970 2 1 9
+3V_LAN Green LED+
R838 510_0402_5%
0.1U_0402_16V4Z RJ45_GND FOX_JM36113-L2R8-7F
2 2 CONN@
1
0.1U_0402_16V4Z C968
220P_0402_50V7K
2
C C
RJ45_GND 1 2 LANGND
1 1
C973
1000P_1206_2KV7K C974 C975
4.7U_0805_10V4Z
2 2
0.1U_0402_16V4Z
LAN_LINK#
LAN_ACTIVITY#_R 1 2 LAN_ACTIVITY#_R
C976
2
@ 68P_0402_50V8J
D16
@
LAN_LINK# 1 2
C977
H1 H14 H19 H26 H25 H24 H23 H17 @ 68P_0402_50V8J PJDLC05_SOT23-3
H_3P4 H_3P4 H_3P4 H_3P4 H_3P4 H_3P4 H_3P4 H_3P4
1
@ @ @ @ @ @ @ @
1
B H7 H9 H4 H18 H16 B
H_3P4 H_3P4 H_3P4 H_3P4 H_4P2
@ @ @ @ @
1
H11 H10 H20 H6

H_4P2 H_4P2 H_3P4 H_2P8
@ @ @ @
1
H5 H8 H2 H3 H12 H22 H27

H_2P8 H_4P0N H_3P3 H_3P3 H_3P3 H_3P3 H_2P3
@ @ @ @ @ @ @
1
H15 H21
H_4P2 H_4P6X4P0N
A @ @ A
1
FD1 FD2 FD3 FD4 Security Classification Compal Secret Data Compal Electronics, Inc.
@ @ @ @
SCHEMATIC, MB A5481
1
FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom C
401743
5 4 3 2 1
5 4 3 2 1
2 1
R675 0_0402_5%
U77
2 1 1 AV_PLL
C851 0.1U_0402_16V4Z 3
@ +3V_CARD NC
+3VALW 1 2 7 NC
R548 0_0805_5% +XDPWR_SDPWR_MSPWR 9 CARD_3V3
+3VS 1 2 11 D3V3
R547 0_0805_5% 33 10 1 2
D3V3 VREG
1 1 C853 MS_D4 22 C860 1U_0402_6.3V4Z
D
+3VS C852 30 D
@ 0.1U_0402_16V4Z NC
8 3V3_IN
4.7U_0603_6.3V6K RST# 44
2 2 MODE_SEL RST#
45 MODE_SEL
2
XTLO 47 43 XDCLE
XTLI XTLO XD_CLE_SP19 XDCE#
48 XTLI XD_CE#_SP18 42
@ R674 41 XDALE
100K_0402_5% USB20_N4 XD_ALE_SP17 SDDAT2_XDRE#
<18> USB20_N4 4 DM SD_DAT2/XD_RE#_SP16 40
USB20_P4 5 39 SDDAT3_XDWE#
<18> USB20_P4
1
DP SD_DAT3/XD_WE#_SP15 XD_RDY
<34> 5IN1_LED# 14 GPIO0 XD_RDY_SP14 38
1 2 RST# 37 SDDAT4_XDWP#_MSD7
R335 0_0402_5% SD_DAT4/XD_WP#/MS_D7_SP13 SDDAT5_XDD0_MSD6
SD_DAT5/XD_D0/MS_D6_SP12 35
34 SDCLK_XDD1_MSCLK_L 2 1 SDCLK_XDD1_MSCLK
SD_CLK/XD_D1/MS_CLK_SP11 SDDAT6_XDD7_MSD3 R671 0_0402_5%
1 SD_DAT6/XD_D7/MS_D3_SP10 31
29 MS_INS#
C854 MS_INS#_SP9 SDDAT7_XDD2_MSD2
1U_0402_6.3V4Z 27 SDDAT0_XDD6_MSD0
2 SD_DAT0/XD_D6/MS_D0_SP7 SDDAT1_XDD3_MSD1
25 XDD5_MSBS
XD_D5_SP5 XDD4_SDDAT1
XD_D4/SD_DAT1_SP4 23
21 SDCD
MODE_SEL SD_CD#_SP3 SDWP
SD_WP_SP2 20
19 XDCD
XD_CD#_SP1
EEDI 18
1
1 XTAL_CTR
R680 2 13 XTAL_CTR 2 1 +3VS If Open , use 12MHz. crystal
@ C855 RREF XTAL_CTR R681 0_0603_5%
0_0402_5% MS_D5 24 If Pull high , use CLKGEN 48MHz.
47P_0402_50V8J 12
2 DGND
32 15
2
C
DGND EEDO C
EECS 16
6 AGND EESK 17
46 36 SD_CMD
AGND SD_CMD
2
<16> CLK_48M_SD 1 2 R678
R676 0_0402_5% 6.19K_0402_1% RTS5159-GR_LQFP48_7X7
R672
@ 0_0402_5%
1
1 2 XTLI
C856 6P_0402_50V8D
1
R673
10_0402_5%
1
@ Y7
2
1 12MHZ_16PF_6X12000012
C858
2
10P_0402_50V8J
2 @
1 2 XTLO
C857 6P_0402_50V8D
EMI
+CARDPWR
+CARDPWR
B +CARDPWR JREAD1 B
3 XD-VCC SD-VCC 21
MS-VCC 28
SDDAT5_XDD0_MSD6 32
SDCLK_XDD1_MSCLK XD-D0 SDCLK_XDD1_MSCLK
1 1 1 10 XD-D1 7 IN 1 CONN SD_CLK 20
SDDAT7_XDD2_MSD2 9 14 SDDAT0_XDD6_MSD0
C477 C342 C480 SDDAT1_XDD3_MSD1 XD-D2 SD-DAT0 XDD4_SDDAT1
8 XD-D3 SD-DAT1 12
0.1U_0402_16V4Z XDD4_SDDAT1 7 30 SDDAT2_XDRE#
Close to CLK_SD_48M via 2 2 2 XDD5_MSBS 6
XD-D4 SD-DAT2
29 SDDAT3_XDWE#
SDDAT0_XDD6_MSD0 XD-D5 SD-DAT3 SDDAT4_XDWP#_MSD7
5 XD-D6 SD-DAT4 27
10U_0805_10V4Z 0.1U_0402_16V4Z SDDAT6_XDD7_MSD3 4 23 SDDAT5_XDD0_MSD6
+5VS XD-D7 SD-DAT5 SDDAT6_XDD7_MSD3
SD-DAT6 18
SDDAT3_XDWE# 34 16 SDDAT7_XDD2_MSD2
SDDAT4_XDWP#_MSD7 XD-WE SD-DAT7 SD_CMD
33 XD-WP SD-CMD 25
XDALE 35 1 SDCD
XDCD XD-ALE SD-CD-SW
40 XD-CD
1 C859 XD_RDY 39 XD-R/B SD-WP-SW 2 SDWP
+XDPWR_SDPWR_MSPWR SDDAT2_XDRE# 38
0.1U_0402_16V4Z +CARDPWR XDCE# XD-RE
37 XD-CE
XDCLE 36 26 SDCLK_XDD1_MSCLK
2 XD-CLE MS-SCLK SDDAT0_XDD6_MSD0
MS-DATA0 17 1
11 15 SDDAT1_XDD3_MSD1 C862
7IN1 GND MS-DATA1 SDDAT7_XDD2_MSD2 @
31 7IN1 GND MS-DATA2 19
1 2 24 SDDAT6_XDD7_MSD3 22P_0402_50V8J
EMI R318 0_0603_5% MS-DATA3
22 MS_INS# 2
MS-INS XDD5_MSBS
MS-BS 13
41 7IN1 GND
2
1 42 7IN1 GND
A A
R295 C348 TAITW_R015-B10-LM
100K_0402_5% 0.1U_0402_16V4Z CONN@ JAWD0 used
2
1

SCHEMATIC, MB A5481
B
401743 C

1
27 of 47
5 4 3 2 1
CLK_PCI_EC +3VALW
1
L48
R633 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 2 +EC_VCCA
@ 10_0402_5% 1 1 C567 1 1 2 2 FBMA-L11-160808-800LMT_0603
C569
C476 C557 C568 C561
1
Please close to EC pin
2
1 1000P_0402_50V7K 1000P_0402_50V7K C566
2 2 2 2 1 1
C689 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z BATT_OVP C672 1 100P_0402_50V8J
2
ECAGND
@ 22P_0402_50V8J
2 BATT_TEMP C673 1 100P_0402_50V8J
2
D
For EC Tools D
ACIN C676 1 2 100P_0402_50V8J
111
125
KSI[0..7]
22
33
96
67
<29,34> KSI[0..7] Place on MiniCard
9
U27 +3VALW
KSO[0..17] JP37
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
<29,34> KSO[0..17]
1 1
+3VALW 2 E51RXD_P80CLK
2 E51RXD_P80CLK <31>
R632 47K_0402_5% 3 E51TXD_P80DATA
3 E51TXD_P80DATA <31>
2 1 ECRST# 1 21 4
<18> EC_GA20 GA20/GPIO00 INVT_PWM/PWM1/GPIO0F EC_INVT_PWM <24> 4
<18> EC_KBRST# 2 KBRST#/GPIO01 BEEP#/PWM2/GPIO10 23 BEEP# <35>
2 1 3 26 ACES_85205-0400
<17> SERIRQ SERIRQ# FANPWM1/GPIO12 FANPWM <6>
C549 0.1U_0402_16V4Z 4 27 CONN@
<17> LPC_FRAME# LFRAME# ACOFF/FANPWM2/GPIO13 ACOFF <40>
<17> LPC_AD3 5 LAD3
<17> LPC_AD2 7 LAD2 PWM Output
8 63 BATT_TEMP
<17> LPC_AD1 LAD1 BATT_TEMP/AD0/GPIO38 BATT_TEMP <41>
+3VALW BATT_OVP
<17> LPC_AD0 10 LAD0 LPC & MISC BATT_OVP/AD1/GPIO39 64 BATT_OVP <40>
ADP_I/AD2/GPIO3A 65 ADP_I <40>
12 AD Input 66 AD_BID0
<17,21> CLK_PCI_EC PCICLK AD3/GPIO3B
R514 2 @ 1 10K_0402_5% EC_PME# 13 75 R656
<13,15,17,25,31> PLT_RST# PCIRST#/GPIO05 AD4/GPIO42
ECRST# 37 76 AD_PID0 1 2 0_0402_5%
R729 1 ECRST# SELIO2#/AD5/GPIO43
2 2.2K_0402_5% EC_SMB_CK1 <18> EC_SCI# 20 SCI#/GPIO0E
<17> PM_CLKRUN# 38 CLKRUN#/GPIO1D
R730 1 2 2.2K_0402_5% EC_SMB_DA1 68 +3VALW
DAC_BRIG/DA0/GPIO3C DAC_BRIG <24>
EN_DFAN1/DA1/GPIO3D 70 EN_DFAN1 <6>
R19 1 2 100K_0402_5% LID_SW# DA Output 71 U45
IREF/DA2/GPIO3E IREF <40>
5
KSI0 55 72
KSI0/GPIO30 DA3/GPIO3F CALIBRATE# <40>
KSI1 56 2
P
R634 2 KSI1/GPIO31 B
1 47K_0402_5% KSO1 KSI2 57 KSI2/GPIO32 Y 4 RSMRST#
RSMRST# <18>
KSI3 58 83 EC_MUTE# EC_RSMRST# 1
KSI3/GPIO33 PSCLK1/GPIO4A EC_MUTE# <36> A
G
C R639 2 1 47K_0402_5% KSO2 KSI4 59 84 C
KSI4/GPIO34 PSDAT1/GPIO4B
1
KSI5 60 85 TP_LOCK_LED# 1 @ NC7SZ08P5X_NL_SC70-5
TP_LOCK_LED# <34>
3
KSI6 KSI5/GPIO35 PSCLK2/GPIO4C R657
EC test-mode issue 61 KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D 86
KSI7 62 87 TP_CLK @ C762 R740 @ 10K_0402_5%
+3VS KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_CLK <29>
KSO0 39 88 TP_DATA 0.1U_0402_16V4Z @
KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F TP_DATA <29> 2
KSO1 40 10K_0402_5%
2
R731 2.2K_0402_5% KSO2 KSO1/GPIO21
41 KSO2/GPIO22
1 2 EC_SMB_CK2 KSO3 42 97
KSO3/GPIO23 SDICS#/GPXOA00 3S/4S# <40>
KSO4 43 98
KSO4/GPIO24 SDICLK/GPXOA01 65W/90W# <40>
EC_SMB_DA2 KSO5
1
R732
2
2.2K_0402_5% KSO6
44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99
LID_SW#
EC_VLDT_EN <33>
45 KSO6/GPIO26 Matrix SDIDI/GPXID0 109 LID_SW# <34>
KSO7 46 SPI Device Interface
+5VS KSO8 KSO7/GPIO27
47 KSO8/GPIO28
KSO9 48 119
KSO9/GPIO29 SPIDI/RD# EC_SI_SPI_SO <30>
2 1 TP_CLK KSO10 49 KSO10/GPIO2A SPIDO/WR# 120 EC_SO_SPI_SI <30> Project ID
4.7K_0402_5% R208 KSO11 +3VALW
50 KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58 126 EC_SPICLK <30>
2 1 TP_DATA KSO12 51 128 EC_SPICS#/FSEL# <30>
Please see page 3.
4.7K_0402_5% R207 KSO13 KSO12/GPIO2C SPICS#
52 KSO13/GPIO2D
2
KSO14 53
KSO15 KSO14/GPIO2E 17@ R186
@ ENBKL KSO16
54 KSO15/GPIO2F CIR_RX/GPIO40 73 0--NCWG0
1 2 81 KSO16/GPIO48 CIR_RLC_TX/GPIO41 74 Ra
R519 10K_0402_5% KSO17 82 89 FSTCHG
FSTCHG <40>
100K_0402_5% 3--NAL00
KSO17/GPIO49 FSTCHG/SELIO#/GPIO50
90 BATT_GRN_LED# <34> 7--NCWH0
1
BATT_CHGI_LED#/GPIO52 AD_PID0
CAPS_LED#/GPIO53 91 CAPS_LED# <34>
EC_SMB_CK1 77 GPIO 92
<41> EC_SMB_CK1 SCL1/GPIO44 BATT_LOW_LED#/GPIO54 BATT_AMB_LED# <34>
2
EC_SMB_DA1 78 93 1
<41> EC_SMB_DA1 SDA1/GPIO45 SUSP_LED#/GPIO55 PWR_LED <34>
EC_SMB_CK2 79 SM Bus 95 15@ R534 C309
<8> EC_SMB_CK2 SCL2/GPIO46 SYSON/GPIO56 SYSON <37,44>
EC_SMB_DA2 80 121 Rb
<8> EC_SMB_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 VR_ON <45>
R460 0_0402_5% 127 ACIN 100K_0402_5% 0.1U_0402_16V4Z
B AC_IN/GPIO59 ACIN <19,37,38,40> 2 B
1 2 EC_THERM#_R
<19> EC_THERM#
1
@
6 100 EC_RSMRST#
<18> PM_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03
<18> PM_SLP_S5# 14 PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 101 EC_LID_OUT# <18>
<18> EC_SMI# 15 EC_SMI#/GPIO08 EC_ON/GPXO05 102 EC_ON <33>
16 LID_SW#/GPIO0A EC_SWI#/GPXO06 103 EC_SWI# <18>
17 SUSP#/GPIO0B ICH_PWROK/GPXO06 104 EC_PWROK <33>
18 PBTN_OUT#/GPIO0C GPO BKOFF#/GPXO08 105 BKOFF# <24>
19 EC_PME#/GPIO0D GPIO WL_OFF#/GPXO09 106 WL_OFF# <31>
25 EC_THERM#/GPIO11 GPXO10 107
<6> FAN_SPEED1 28 FAN_SPEED1/FANFB1/GPIO14 GPXO11 108
+3VALW Board ID <VB support>
29 FANFB2/GPIO15
E51TXD_P80DATA 30 Please see page 3.
E51RXD_P80CLK 31 EC_TX/GPIO16
EC_RX/GPIO17 PM_SLP_S4#/GPXID1 110 VGATE <45>
2
<33> ON/OFF 32 ON_OFF/GPIO18 ENBKL/GPXID2 112 ENBKL <13>
34 114 R219
<34> PWR_SUSP_LED PWR_LED#/GPIO19 GPXID3 EAPD <35>
36 GPI 115 EC_THERM#_R Ra @
<34> NUM_LED# NUMLED#/GPIO1A GPXID4
116 100K_0402_5%
GPXID5 SUSP# <33,37,43>
117 PBTN_OUT# <18>
1
GPXID6 AD_BID0
GPXID7 118 EC_PME# <25>
EC_CRY1 122 XCLK1
2
EC_CRY2 123 124 1
EC_CRY1 EC_CRY2 XCLK0 V18R R215 C306
1
AGND
C674 Rb
GND
GND
GND
GND
GND
1 1 8.2K_0402_5% 0.1U_0402_16V4Z
C344 C343 4.7U_0805_10V4Z 2
1
1
KB926QFD2_LQFP128_14X14 2
11
24
35
94
113
69
15P_0402_50V8J 15P_0402_50V8J 20mil

OUT
IN
2 2 L69
A Chagne to D3 version ECAGND 1 2
A
FBMA-L11-160808-800LMT_0603
NC
NC
2
Y1 Security Classification Compal Secret Data Compal Electronics, Inc.

32.768KHZ_12.5P_MC-306
SCHEMATIC, MB A5481
Custom C
401743
5 4 3 2 1
For 17" For 15"
Left Right Left Right
SW4 SW5 SW2 SW3
17@ SMT1-05-A_4P 17@ SMT1-05-A_4P 15@ SMT1-05-A_4P 15@ SMT1-05-A_4P
BTN_L 3 1 BTN_R 3 1 BTN_L 3 1 BTN_R 3 1
4 2 4 2 4 2 4 2
5
6
5
6
5
6
5
6
TP_CLK BTN_R
TP_DATA BTN_L
2
D15
TP_DATA C169 1 2 100P_0402_50V8J D14
TP_CLK C174 1 2 100P_0402_50V8J

PJDLC05_SOT23-3 PJDLC05_SOT23-3
1
To TP/B Conn. Change to SCA00000200
JTP1
+5VS
+5VS TP_CLK 6
<28> TP_CLK 5
TP_DATA
<28> TP_DATA 4
BTN_L C137
BTN_R 3
2 0.1U_0402_16V4Z
1
ACES_85201-0605
CONN@
KALA0 used
KSI[0..7]
KSI[0..7] <28,34>
KB1 for 15"
INT_KBD Conn. KSO[0..17]
KSO[0..17] <28,34> KB2 for 17"
(Left) JKB1 (Left) JKB2
KSO15 C243 1 2 100P_0402_50V8J KSO7 C231 1 2 100P_0402_50V8J KSO0 26 28 KSO0 26 28

KSO1 KSO0 G2 KSO1 KSO0 G2
25 KSO1 G1 27 25 KSO1 G1 27
KSO14 C242 1 2 100P_0402_50V8J KSO6 C230 1 2 100P_0402_50V8J KSO2 24 KSO2 24
KSO3 KSO2 KSO3 KSO2
23 KSO3 23 KSO3
KSO5 KSO4 KSO5 KSO4
21 KSO5 21 KSO5
KSO7 KSO6 KSO7 KSO6
19 KSO7 19 KSO7
KSO8 18 KSO8 18
KSI0 C239 1 100P_0402_50V8J KSO3 C227 1 100P_0402_50V8J KSO9 KSO8 KSO9 KSO8
2 2 17 KSO9 17 KSO9
KSO10 16 KSO10 16
KSO11 C238 1 100P_0402_50V8J KSI4 C226 1 100P_0402_50V8J KSO11 KSO10 KSO11 KSO10
2 2 15 KSO11 15 KSO11
KSO12 14 KSO12 14
KSO10 C237 1 100P_0402_50V8J KSO2 C225 1 100P_0402_50V8J KSO13 KSO12 KSO13 KSO12
2 2 13 KSO13 13 KSO13
KSO14 12 KSO14 12
KSI1 C236 1 100P_0402_50V8J KSO1 C224 1 100P_0402_50V8J KSO15 KSO14 KSO15 KSO14
2 2 11 KSO15 11 KSO15
KSO16 10 KSO16 10
KSO17 KSO16 KSO17 KSO16
9 KSO17 9 KSO17
KSI2 C235 1 2 100P_0402_50V8J KSO0 C223 1 2 100P_0402_50V8J KSI0 8 KSI0 8
KSI1 KSI0 KSI1 KSI0
7 KSI1 7 KSI1
KSO9 C234 1 2 100P_0402_50V8J KSI5 C222 1 2 100P_0402_50V8J KSI2 6 KSI2 6
KSI3 KSI2 KSI3 KSI2
5 KSI3 5 KSI3
KSI3 C233 1 2 100P_0402_50V8J KSI6 C221 1 2 100P_0402_50V8J KSI4 4 KSI4 4
KSI5 KSI4 KSI5 KSI4
3 KSI5 3 KSI5
KSO8 C232 1 2 100P_0402_50V8J KSI7 C220 1 2 100P_0402_50V8J KSI6 2 KSI6 2
KSI7 KSI6 KSI7 KSI6
1 KSI7 1 KSI7
(Right) ACES_88747-2601
(Right) ACES_88747-2601
KSO16 C245 1 2 100P_0402_50V8J CONN@ CONN@
KSO17 C244 1 2 100P_0402_50V8J

SCHEMATIC, MB A5481
Custom C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401743
hexainf@hotmail.com MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
GRATIS - FOR FREE
+3VALW 1 2 C675 1 2 0.1U_0402_16V4Z
R618 0_0603_5%
+SPI_VCC
U17
<28> EC_SPICS#/FSEL# 1 CE# VDD 8

2 1 SPI_WP# 3 6 EC_SPICLK_R R620 1 2 0_0402_5%
WP# SCK EC_SPICLK <28>
+3VALW R619 2 1 4.7K_0402_5% SPI_HOLD# 7 5 EC_SO_SPI_SI_R R622 1 2 0_0402_5%
HOLD# SI EC_SO_SPI_SI <28>
R621 4.7K_0402_5% 4 2 EC_SI_SPI_SO_R R623 1 2 0_0402_5%
VSS SO EC_SI_SPI_SO <28>
MX25L8005M2C-15G_SOP8
SA00000XT00 : S IC FL 8M MX25L8005M2C-15G SOP 8P

ENE suggestion SPI Frequency over 66MHz
SST: 50MHz R257 C296
MXIC: 70MHz EC_SPICLK_R 1 2 1 2
ST: 40MHz @ 22_0402_5% @ 10P_0402_50V8J
ONLY MXIC used in this project (66MHz)
U44
EC_SPICS#/FSEL# 1 8 +SPI_VCC
SPI_WP# CS# VCC EC_SPICLK_R
3 WP# SCLK 6
SPI_HOLD# 7 5 EC_SO_SPI_SI
HOLD# SI EC_SI_SPI_SO
4 GND SO 2
MX25L512AMC-12G_SO8
@
Reserved for BIOS simulator.
Footprint SO8
SPI ROM Footprint 150mil

SCHEMATIC, MB A5481
Custom C
401743
A B C D E
1 1
+3VS_WLAN +1.5VS +3VALW
1 1 1 1 1 1
C442 C441 C439 C438 C440 C437
4.7U_0805_10V4Z 0.1U_0402_16V4Z 4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

2 2 2 2 2 2
For Wireless LAN

+3VS_WLAN R487 1 2 0_1206_5% +3VS
R653 0_0402_5% JMINI2
<18> SB_PCIE_WAKE# 1 2 1 1 2 2 +3VS_WLAN
@ 3 4
3 4
5 5 6 6 +1.5VS
<16> MINI1_CLKREQ# 7 7 8 8
9 9 10 10
<16> CLK_PCIE_MINI1# 11 11 12 12
<16> CLK_PCIE_MINI1 13 13 14 14
2 2
15 15 16 16 Mini Card Power Rating
R655 0_0402_5%
Power Primary Power (mA) Auxiliary Power (mA)
17 17 18 18
19 20 WL_OFF#_R 1 2 Peak Normal Normal
19 20 WL_OFF# <28>
21 22 PLT_RST#
21 22 PLT_RST# <13,15,17,25,28>
23 24 R246 1 2 0_0603_5% +3VS +3VS 1000 750
<12> PCIE_PTX_C_IRX_N0 23 24
25 26 R243 1 2 0_0603_5% +3VALW
<12> PCIE_PTX_C_IRX_P0 25 26
27 28 @ +3VALW 330 250 250 (wake enable)
27 28
29 29 30 30 SB_CK_SCLK <10,11,16,18>
<12> PCIE_ITX_C_PRX_N0 31 31 32 32 SB_CK_SDAT <10,11,16,18> +1.5VS 500 375 5 (Not wake enable)
<12> PCIE_ITX_C_PRX_P0 33 33 34 34
35 35 36 36 USB20_N5 <18>
37 37 38 38 USB20_P5 <18>
+3VS_WLAN 39 39 40 40
41 41 42 42
43 44 (MINI1_LED#) 1 2
43 44 WL_ON_LED# <34>
45 45 46 46
47 48 R752 0_0402_5%
47 48
1
E51TXD_P80DATA R654 1 2 0_0402_5% E51TXD_P80DATA_R 49 50
<28> E51TXD_P80DATA 49 50
E51RXD_P80CLK 51 52 R550
<28> E51RXD_P80CLK 51 52 @100K_0402_5%
G1
G2
G3
G3
For MINICARD Port80 Debug
2
53 FOX_AS0B226-S99N-7F
54
55
56
CONN@
+3VALW
H:9.9mm
3 3
4 4

SCHEMATIC, MB A5481
B
401743 C
GRATIS - FOR FREE

A B C D
E
Sheet 31 of 47
A B C D E
1 1
USB CONN. 1 & 2

+USB_VCCA +USB_VCCA
W=80mils W=80mils
1 1
1 1
C478+ C474 C1 + C2
@
150U_D2_6.3VM 470P_0402_50V7K 150U_D2_6.3VM 470P_0402_50V7K
2 2 2 2
JUSB1 JUSB2
1 VCC 1 VCC
USB20_N0 R598 1 @ 2 0_0402_5% USB20_N0_R 2 USB20_N1 R599 1 @ 2 0_0402_5% USB20_N1_R 2
<18> USB20_N0 D- <18> USB20_N1 D-
USB20_P0 R600 1 2 0_0402_5% USB20_P0_R 3 USB20_P1 R601 1 2 0_0402_5% USB20_P1_R 3
<18> USB20_P0 D+ <18> USB20_P1 D+
@ 4 @ 4
GND GND
5 GND1 5 GND1
L67 6 L68 6
GND2 GND2
4 4 3 3 7 GND3 4 4 3 3 7 GND3
8 GND4 8 GND4
1 2 SUYIN_020173MR004G565ZR 1 2 SUYIN_020173MR004G565ZR
1 2 CONN@ 1 2 CONN@
KALA0 used KALA0 used
WCM2012F2S-900T04_0805 WCM2012F2S-900T04_0805
2 2
D31
USB20_N0_R 6 3 USB20_N1_R
+3VALW CH3 CH2
1
+USB_VCCA 5 Vp Vn 2
R42
+5VALW +USB_VCCA
U4 100K_0402_5%
1 8 USB20_P1_R 4 1 USB20_P0_R
2
GND OUT CH4 CH1

2 IN OUT 7 2 1 USB_OC#1 <18>
3 6 R171 10K_0402_5% R677 0_0402_5% CM1293-04SO_SOT23-6
IN OUT
1 4 EN# FLG 5 1 2 USB_OC#0 <18>
C111 1
TPS2061DRG4_SO8 C133
4.7U_0805_10V4Z
2 0.1U_0402_16V4Z
2
<37,43> SYSON#
3 3
4 4

SCHEMATIC, MB A5481
B C
401743
A B C D E
A B C D E
Power ON Circuit For South Bridge
+3VS
+3VALW +3VALW
1
note:T1 minimum 15ms,T2 minimum 33ms/maximum 500ms, 1
1
U13A U13B SUSP# goes to low after SB_PWRGD goes to low for power
R192 SN74LVC14APWLE_TSSOP14 SN74LVC14APWLE_TSSOP14
14
14
180K_0402_5% down.
T1
P
2
1 I O 2 3 I O 4 1 2 SB_PWRGD <8,18>
R191 @ 0_0402_5%
G
D
1 VLDT_EN
2 C322
<37> SUSP
7
G
Q11 S 1U_0603_10V4Z NB_PWRGD
3
2N7002_SOT23 2
<28> EC_PWROK 1 2
R198 0_0402_5%
SB_PWRGD
+3VS T2
For +1.2HT SUSP#
+3VALW +3VALW
1
+1.8VS
R195
U13C U13D
14
14
10K_0402_1% SN74LVC14APWLE_TSSOP14 SN74LVC14APWLE_TSSOP14
D12
P
2
SUSP# 1 2 5 6 9 8 1 2
<28,37,43> SUSP# I O I O VLDT_EN <37,42>
2 R180 @ 0_0402_5%
G
G
CH751H-40PT_SOD323-2 C321
2 2
7
7
0.1U_0402_16V4Z 1 2
1 <28> EC_VLDT_EN
R183 0_0402_5%
+3VALW +3VALW
U13E U13F
TOP Side
14
14
SN74LVC14APWLE_TSSOP14 SN74LVC14APWLE_TSSOP14 +3VALW
2 @ 1
Power Button
P
P
11 I O 10 13 I O 12
R765 10K_0603_5%
G
2
2 @ 1 R281
7
R766 10K_0603_5% 100K_0402_5%

Bottom Side
1
D10
2 ON/OFF <28>
ON/OFFBTN# 1
<34> ON/OFFBTN#
3 51ON#
51ON# <38>
DAN202UT106_SC70-3
1
3 3
2
C358 D11
1000P_0402_50V7K RLZ20A_LL34
1
2
1
D Q17
EC_ON 2
<28> EC_ON
G 2N7002_SOT23
R290 S
3
10K_0402_5%
@ SW10
SMT1-05-A_4P
1 3
ON/OFFBTN#
2 4
6
5
MP would remove
4 4

SCHEMATIC, MB A5481
B
401743 C

E
Sheet 33 of 47
PWR_LED#
MDC Conn.
3
JMDC1
Q68B R254 0_0402_5%
5 2N7002DW-T/R7_SOT363-6 1 2 1 2
<28> PWR_LED GND1 RES0 +3VALW
HDA_SDOUT_MDC 3 4
<18> HDA_SDOUT_MDC IAC_SDATA_OUT RES1
1
5 6 +3VALW
4
R291 HDA_SYNC_MDC GND2 3.3V
<18> HDA_SYNC_MDC
R357 1
7 IAC_SYNC GND3 8 20mil 1
<18> HDA_SDIN1 2 33_0402_5% 9 IAC_SDATA_IN GND4 10 C3
100K_0402_5% HDA_RST_MDC# 11 12 HDA_BITCLK_MDC
<18> HDA_RST_MDC# IAC_RESET# IAC_BITCLK HDA_BITCLK_MDC <18>
1U_0603_10V4Z
1
2
R256
GND
GND
GND
GND
GND
GND
PWR_SUSP_LED# ACES_88018-124G 0_0402_5%
13
14
15
16
17
18
2
CONN@
1
Connector for MDC Rev1.5 C432
6
22P_0402_50V8J
Q68A 2
2 2N7002DW-T/R7_SOT363-6
<28> PWR_SUSP_LED For EMI
1
1
R292
100K_0402_5%
2
LED1
To PWR LED/B
R251 1K_0402_5%
1 2 2 1 PWR_LED# +5VS +3VALW +5VALW +3VS
+5VS YG
R250 1.2K_0402_5% JP14

+5VALW 1 2 4 3 PWR_SUSP_LED#
A 1 +5VALW +5VS +3VS +3VALW
2
HT-297UD/CB BLUE/AMB 3
4
HARVATEK
5 LID_SW# C435 C436 C444 C445
6 LID_SW# <28>
LED2 TP_LOCK_LED#
7 TP_LOCK_LED# <28>
R253 1K_0402_5% KSO0 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
8 KSO0 <28,29>
+5VALW 1 2 2 1 BATT_GRN_LED# BATT_GRN_LED# <28> KSI2
YG 9 KSI2 <28,29>
PWR_SUSP_LED#
R252 1.2K_0402_5% 10 PWR_LED#
BATT_AMB_LED# 11 ON/OFFBTN#
+5VALW 1 2 4 A 3 BATT_AMB_LED# <28> 12 ON/OFFBTN# <33>
KSI1
13 KSI1 <28,29>
WL_ON_LED#
14 WL_ON_LED# <31>
HT-297UD/CB BLUE/AMB MEDIA_LED#
15 NUM_LED#
HARVATEK NUM_LED# <28>
16 CAPS_LED#
17 CAPS_LED# <28>
18
19
BLUE/AMB LED 20
ACES_85201-20051
CONN@
+3VS
KSO0 Q67A
2
KSI1 WL_BTN# 2N7002DW-T/R7_SOT363-6
KSI2 TP_LOCK_BTN# 6 1 5IN1_LED# <27>
KSI3 MEDIA_LED# 3 4 SATA_LED# <19>
KSI4 Q67B
5
KSI5 2N7002DW-T/R7_SOT363-6 +3VS
KSI6

SCHEMATIC, MB A5481
B C
401743
A B C D E F G H
1 2
R784 0_0805_5%
+3VS +VDDA
+5VAMP
U81
60mil 40mil
1
+5VS L80 1 2 1 IN
1
R783 FBMA-L11-201209-221LMA30T_0805 5 +VDDA 4.75V
OUT
C106
C899
C900
D38 20K_0402_1% 2
R789 L81 1 GND
2 1 1 1
1 RB751V_SOD323 10K_0402_5% FBMA-L11-201209-221LMA30T_0805 1
3 4 1 2
2
C902 SHDN BYP C901
22U_0805_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2 MONO_IN @ @ G9191-475T1U_SOT23-5 0.01U_0402_25V7K
1U_0402_6.3V4Z 2 2 2
1
R786
2 HD Audio Codec (output = 300 mA)
1
C 2.4K_0402_1%
C903 1 R787 Q72
<28> BEEP# 2 1 2 2
1U_0402_6.3V4Z B
560_0402_5% E
3
2SC2411KT146_SOT23-3
C904 1 R788
<18> SB_SPKR 2 1 2
1U_0402_6.3V4Z
1
560_0402_5%
D37
RB751V_SOD323
L82
2 10mil MBK1608121YZF_0603
0.1U_0402_16V4Z +3VS_DVDD 1 2 +3VS
1 1 1
C905 C906 C907
+AVDD_HDA
10U_0805_10V4Z
2 2 2
L83 1 2 0.1U_0402_16V4Z 40mil
+VDDA
FBM-L11-160808-800LMT_0603 1 1 1 0.1U_0402_16V4Z
C909 C910
2 C908 2
10U_0805_10V4Z
25
38
9
2 2 2 U82
0.1U_0402_16V4Z
DVDD
AVDD1
AVDD2
DVDD_IO
14 35 AMP_LEFT
LINE2_L LOUT1_L AMP_LEFT <36>
15 36 AMP_RIGHT
LINE2_R LOUT_R AMP_RIGHT <36>
16 MIC2_L LOUT2_L 39
17 MIC2_R LOUT2_R 41
23 LINE1_L SPDIFO2 45
24 LINE1_R DMIC_CLK1/2 46
18 LINE1_VREFO NC 43
20 LINE2_VREFO DMIC_CLK3/4 44 1 2 1 2 C914

R792 0_0402_5% 22P_0402_50V8J For EMI
19 MIC2_VREFO
BITCLK 6 HDA_BITCLK_AUDIO <18>
MIC1_L 1 2 MIC1_C_L 21
<36> MIC1_L MIC1_L
C915 4.7U_0805_6.3V6K
MIC1_R 1 2 MIC1_C_R 22 8 1 2 HDA_SDIN0 <18>
<36> MIC1_R MIC1_R SDATA_IN
C916 4.7U_0805_6.3V6K R793 33_0402_5%
MONO_IN 12 37
PCBEEP_IN MONO_OUT
CBP 29
3 2.2U_0402_6.3V6M 3
<18> HDA_RST_AUDIO# 11 RESET#
31 C917 1 2
CPVEE
<18> HDA_SYNC_AUDIO 10 SYNC 10mil 1
MIC1_VREFO 28 MIC1_VREFO_L
<18> HDA_SDOUT_AUDIO 5 C918 HP_RIGHT
SDATA_OUT HP_RIGHT <36>
32 HP_RIGHT 2.2U_0402_6.3V6M
HPOUT_R 2 HP_LEFT
2 GPIO0/DMIC_DATA1/2 HP_LEFT <36>
3 GPIO1/DMIC_DATA3/4 CBN 30
R794 2 1 20K_0402_1% SENSE_A 13 10mil
<36> MIC_PLUG# SENSE A
R795 2 1 5.11K_0402_1% SENSE_B 34 27 CODEC_VREF
<36> HP_PLUG# SENSE B VREF
1 1
10U_0805_10V4Z
0.1U_0402_16V4Z
<28> EAPD 1 2 47 EAPD JDREF 40
20K_0402_1%
C919
C920
R796 0_0402_5%
1
update this table 48 33 HP_LEFT
SPDIFO1 HPOUT_L 2 2
R797
4 DVSS1 AVSS1 26
7 DVSS2 AVSS2 42
2
ALC272-VA2-GR_LQFP48_7X7
Sense Pin Impedance Codec Signals 1
R798
2
0_0805_5%
1
R799
2
0_0805_5%
Change to ALC272X
39.2K PORT-A (PIN 39, 41) DGND AGND
1 2 1 2
R800 0_0805_5% R801 0_0805_5%
20K PORT-B (PIN 21, 22)
SENSE A
1 2 1 2
10K PORT-C (PIN 23, 24) R802 0_0805_5% R803 0_0805_5%
5.1K PORT-D (PIN 35, 36)

4 4
GND GNDA GND GNDA
39.2K PORT-E (PIN 14, 15)
20K PORT-F (PIN 16, 17)

SENSE B
10K PORT-G (PIN 43, 44) Security Classification Compal Secret Data Compal Electronics, Inc.
5.1K PORT-H (PIN 45, 46) SCHEMATIC, MB A5481
B
401743 C
GRATIS - FOR FREE

A B C D E F
Date:
G
Wednesday, June 24, 2009 Sheet 35
H
of 47
A B C D E
+5VAMP
0.1U_0402_16V4Z Int. Speaker Conn.
1 1
1 C921 C922 JSPK1 1
10U_0805_10V4Z SPKL+ R804 1 2 0_0603_5% SPK_L+ 1
2 2 SPKL- R805 1 SPK_L- 1
2 0_0603_5% 2 2
20mil Left
2
10 dB D39 3 G1
+5VAMP 4 G2
@
1
ACES_88266-02001
16
15
6
U83 R809 @ R806 PJDLC05_SOT23-3 CONN@
100K_0402_5% 100K_0402_5%
VDD
PVDD1
PVDD2
1
C923 1 2 0.47U_0603_10V7K 7 2 GAIN0
RIN+ GAIN0
3 GAIN1
GAIN1
JSPK2
1
1 2 1 2 AMP_C_RIGHT 17 SPKR+ R810 1 2 0_0603_5% SPK_R+ 1
<35> AMP_RIGHT C924 3900P_0402_50V7K R808 0_0603_5% RIN- SPKR+ @ R811 R812 SPKR- R807 1 1
ROUT+ 18 2 0_0603_5% SPK_R- 2 2
100K_0402_5% 100K_0402_5% 20mil Right
2
14 SPKR- D40 3
2
C925 1 ROUT- G1
2 0.47U_0603_10V7K 9 LIN+ 4 G2
@
4 SPKL+ ACES_88266-02001
LOUT+ PJDLC05_SOT23-3 CONN@
1 2 1 2 AMP_C_LEFT 5
<35> AMP_LEFT C971 3900P_0402_50V7K R813 0_0603_5% LIN- SPKL-
LOUT- 8
1
2 2
NC 12
EC_MUTE# BYPASS 10 Keep 10 mil width

<28> EC_MUTE# 19 SHUTDOWN
2
GND5
GND1
GND2
GND3
GND4
C927
0.47U_0603_10V7K
1 LINE Out/Headphone Out
21
20
13
11
1
TPA6017A2_TSSOP20 JHP1
8
7
2 2
C928 C929
HP_PLUG# 5
<35> HP_PLUG#
20mil 330P_0402_50V7K 330P_0402_50V7K
1 1
4
<35> HP_RIGHT HP_RIGHT 1 2 HPOUT_R_1 1 2 HPOUT_R_2 3

R814 56.2_0402_1% L84 FBM-11-160808-700T_0603 6
<35> HP_LEFT HP_LEFT 1 2 HPOUT_L_1 1 2 HPOUT_L_2 2
R815 56.2_0402_1% L85 FBM-11-160808-700T_0603 1
SINGA_2SJ-E351-S03
CONN@
3 3
MIC1_VREFO_L MIC1_VREFO_L
MIC JACK
2
RB751V_SOD323 RB751V_SOD323 JMIC1
D41 D42 8
7
1 1
1 1
MIC_PLUG# 5
<35> MIC_PLUG#
R816 R817
4.7K_0402_5% 4.7K_0402_5% 4
2
<35> MIC1_R 1 2 1 2 FBM-11-160808-700T_0603 MIC2_R_1 3
R818 1K_0603_1% L86 6
<35> MIC1_L 1 2 1 2 FBM-11-160808-700T_0603 MIC2_L_1 2
R819 1K_0603_1% L87 1
1 1
SINGA_2SJ-E351-S01
C930 C931 CONN@
220P_0402_50V7K 220P_0402_50V7K
2 2
(HDA Jack)
4 4

SCHEMATIC, MB A5481
B C
401743
A B C D E
A B C D E
+5VALW
+3VALW TO +3VS
+5VALW TO +5VS
2
+3VS R167
10K_0402_5%
+5VALW +5VS
1 1 U7
1
+3VALW C559 C562 8 1 SUSP
D S <33> SUSP
7 D S 2
U41 10U_0805_10V4Z 1U_0603_10V4Z 6 3 1 1
2 2 D S C166 C165
8 D S 1 5 D G 4
1
R508 D Q12
1 7 D S 2 1
6 3 100K_0402_5% 1 AO4468_SO8 10U_0805_10V4Z 1U_0603_10V4Z 2
D S 2 2 <28,33,43> SUSP#
5 4 1 2 5VS_GATE 1 2 +VSB G 2N7002_SOT23
D G
1
R562 20K_0402_1% C143 S
3
AO4468_SO8 4.7U_0805_10V4Z R586
2 10K_0402_5%
1 Q29 R728 0_0402_5%
2
1
C560 D 5VS_GATE
1 2
2
100K_0402_5%
C570 2 SUSP
1
10U_0805_10V4Z 0.1U_0603_25V7K G
1
2
2 R500 S 2N7002_SOT23-3
3
@ C658
0.1U_0603_25V7K
1
2
+5VALW
2
D Q58
<19,28,38,40> ACIN ACIN 2 R31
G 2N7002_SOT23-3 10K_0402_5%
@ S
3
1
SYSON#
<32,43> SYSON#
+1.2VALW TO +1.2V_HT
1
D Q5
SYSON 2
+1.2V_HT <28,44> SYSON
G 2N7002_SOT23
+1.8V TO +1.8VS
1
2 S 2
3
+1.8V
+1.2VALW R589
U37 1 1 100K_0402_5%
8 1 +1.8VS C756 C757
2
D S
2
7 D S 2
6 3 U46 1U_0603_10V4Z 10U_0805_10V4Z R698 +1.2VALW
D S 2 2 470_0805_5%
5 D G 4 1 1 8 D S 1
C447 C446 7 2
AO4430_SOIC8 D S
6 3 1
1
10U_0805_10V4Z 1U_0603_10V4Z D S
1 5 D G 4 1 2 +VSB
2 2 R699 + C30
1
C443 AO4430_SOIC8 33K_0402_5% 220U_B2_2.5VM_R25M +5VALW
1
4.7U_0805_10V4Z D Q63 D Q64
2 1 2
C759 2 VLDT_EN# 2
2
0.1U_0603_25V7K 2 G G 2N7002_SOT23-3
C758 S 2N7002_SOT23-3 S R725
3
2
1 2 R563 5VS_GATE For PWR request 10K_0402_5%
60.4K_0402_1% 4.7U_0805_10V4Z
1
2
VLDT_EN#
C632 R700
0.1U_0603_25V7K 33K_0402_5%
1
1
D Q66
12/30 Change R563 to 60.4K
2
VLDT_EN 2
<33,42> VLDT_EN
G 2N7002_SOT23
1
S
3
1
D
ACIN 2 Q65 R726
3 G 100K_0402_5% 3
2N7002_SOT23
S
2
+0.9V +2.5VS +1.5VS +1.8V +3VS +1.8VS +5VS +NB_CORE +1.1VS
2
2
R604 R587 R588 R26 R224 R270 R181 R184 R185
470_0402_5% 470_0402_5% 470_0402_5% 470_0402_5% 470_0402_5% 470_0402_5% 470_0402_5% 470_0402_5% 470_0402_5%
1
1
1
1
D D D D D D D D D
2 SYSON# 2 SUSP 2 SUSP 2 SYSON# 2 SUSP 2SUSP 2 SUSP 2 VLDT_EN# 2 SUSP
G G G G G G G G G
S Q34 S Q35 S Q36 S Q6 S Q14 S Q15 S Q10 S Q13 S Q16
3
3
2N7002_SOT23 2N7002_SOT23 2N7002_SOT23 2N7002_SOT23 2N7002_SOT23 2N7002_SOT23 2N7002_SOT23 2N7002_SOT23 2N7002_SOT23
4 4

SCHEMATIC, MB A5481
B
401743 C

E
37 of 47
A B C D
DC231000500
PJP1 PR1
SINGA_2DC-G756I200 ADPIN PL1 VIN 1M_0402_5%
SMB3025500YA_2P 1 2
1 1 2 VIN VIN
VS
1
G 2
560P_0402_50V7K
12P_0402_50V8J
G @ PR3 PR4
560P_0402_50V7K
84.5K_0402_1%
12P_0402_50V8J
1 3 10K_0402_5% 1
1
PC1
PR6
8
PC2
PC3
PC4
PR5 PR160 22K_0402_5%
2
0_0402_5% 10K_0402_5% 3 1 2
P
2
2
+
1 2 1 2 1 0
<19,28,37,40> ACIN
20K_0402_1%
- 2
1
PR7
PU1A
1
PC6
0.1U_0603_25V7K
LM358DT_SO8 PC5
4
PR8 PD3 1000P_0402_50V7K
2
10K_0402_5% GLZ4.3B_LL34-2
2
2
2
PR9
10K_0402_5%
1 2
RTCVREF
- PBJ1 +
+RTCBATT
2 1
+RTCBATT
Vin Dectector
Min. Typ Max.
ML1220T13RE H-->L 16.976V 17.525V 17.728V
2 45@ 2
L-->H 17.430V 17.901V 18.384V
VIN
2 PD4
LL4148_LL34-2 PJ1 PJ2
+3VALWP 2 2 1 1 +3VALW +1.5VSP 2 2 1 1 +1.5VS
PD5
1
LL4148_LL34-2 JUMP_43X118 JUMP_43X118

BATT+ 2 1
1
PR10 PR11
PQ1 68_1206_5% 68_1206_5%
TP0610K-T1-E3_SOT23-3 PJ3 PJ4
PR12 2 1 2 1
+5VALWP +5VALW +0.9VP +0.9V
2
200_0603_5% 2 1 2 1
CHGRTCP 1 2 N1 3 1 JUMP_43X118 JUMP_43X79
VS
1
3 PR13 PC8 3
PJ5
100K_0402_1% PC7 0.1U_0603_25V7K PJ6
0.22U_1206_25V7K 2 1 +1.8VP 2 1 +1.8V
+VSBP +VSB
2
PR14 2 1 2 1
2
22K_0402_1% JUMP_43X39 JUMP_43X118

1 2
<33> 51ON#
PJ7 PJ8
+1.2VALWP 2 2 1 1 +1.2VALW +1.1VSP 2 2 1 1 +1.1VS
RTCVREF
1
JUMP_43X118 JUMP_43X118
PR15
PU2 200_0603_5%
PR16 PR17 G920AT24U_SOT89-3
560_0603_5% 560_0603_5% 3.3V PJ21 PJ10
2
1 2 1 2 3 2 N2 2 1 2 1
OUT IN +NB_COREP 2 1 +NB_CORE +2.5VSP 2 1 +2.5VS
+CHGRTC
JUMP_43X118 JUMP_43X118
1
GND PC10
PC9 1U_0805_25V4Z
10U_0805_10V4Z 1
2
4 4

SCHEMATIC, MB A5481
B C
401743
A B C D
A B C D
ISL6237_B+
ISL6237_B+
PJ17 PR18
JUMP_43X118 0_0805_5%
2 2 1 1 1 2
B+
2200P_0402_50V7K
2200P_0402_50V7K
4.7U_1206_25V6K
4.7U_1206_25V6K
4.7U_1206_25V6K
4.7U_1206_25V6K
1 1
5
6
7
8
PC15
PC16
PC17
@ PC203
8
7
6
5
1
PC20
680P_0402_50V7K VL
PC18
PC19
1U_0603_10V6K
2
2
PQ3
2
2
PQ2 PC21 AO4466_SO8
2
AO4466_SO8 0.1U_0603_25V7K
4.7U_0805_6.3V6K
4
1
PC22
4
PC23
1
+5VALWP
3
2
1
PL4
1
2
3
PL5 10UH_MSCDRI-104A-100M-E_4.6A_20%
7
10UH_MSCDRI-104A-100M-E_4.6A_20% PC24 2 1
1 2 1U_0603_10V6K
LDO
VIN
VCC
+3VALWP 33 19 1 2
TP PVCC
5
6
7
8
1
4.7_1206_5%
1
8
7
6
5
PR23
DH3 26 15 DH5
PR19 PR20 UGATE2 UGATE1 PR21 2.2_0603_5% PQ5
4.7_1206_5% PQ4 2 1 BST3A 24 17 BST5A 2 1 AO4712_SO8
BOOT2 BOOT1
2
1 AO4712_SO8 2.2_0603_5%
2
2
63.4K_0402_1%
PR22 PC27 4
2
PC25 + 0_0402_5% 4 PC26 0.1U_0603_25V7K
2
680P_0402_50V7K
330U_6.3V_M 0.1U_0603_25V7K
1
1
PR24
<BOM Structure> LX3 25 16 LX5 1
1
2 PHASE2 PHASE1
PC29
PC28
3
2
1
2
680P_0402_50V7K + PC30
1
2
3
DL3 23 18 DL5 330U_6.3V_M
1
LGATE2 LGATE1
2
2 2
2
10K_0402_1%
PGND 22
2
FB3 30 OUT2
PR26
@ PR25
10K_0402_1% 10
OUT1
VL 32
1
REFIN2
1
11 FB5
2VREF_ISL6237 FB1
1 2 1 REF
PC31 0.22U_0603_10V7K
BYP 9
8 LDOREFIN
+3.3VALWP Ipeak=4.26A ; Then set Imax=4.26A @ PR27 0_0402_5%
29 2 1 VL
Choke DCRmax=26.5m ohm, DCRtyp=23m ohm SKIP
Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical) PR28 0_0402_5%
1 2
Vlimit=(5E-06 * 316K)/10=158mV 20 28
PD6 PR29 NC POK2
Ilimit=158mV/(18m*1.2) ~ 158mV/15m
GLZ5.1B_LL34-2 100K_0402_1%
=7.31A~10.53A 1 2 1 2 4 13 SPOK <41,44>
Iocp=Ilimit+Delta I/2 VS EN_LDO POK1 PR31
2
200K_0402_5%
365K_0402_1%
=7.76A~10.98A
2
PR30
14 12 ILM1 2 1
EN1 ILIM1
Delta I=0.908A (Freq=300KHz) PC32
0.22U_0603_25V7K
1
27 31 ILIM2 2 1
GND
3 3
TON
1
EN2 ILIM2
1
NC
2
0_0402_5%
PD7 PR32
VL
2
@ PR33 PU3 316K_0402_1%
21
PR34
0_0402_5% ISL6237IRZ-T_QFN32_5X5
2
1SS355_SOD323-2
2
PR35
1
1
1U_0603_10V6K
806K_0603_1%
2VREF_ISL6237 1
check this part PR37 @ PR38 PR36

+5VALWP Ipeak=6.87A ; Imax=4.81A
1
2
0_0402_5% 47K_0402_5% PC33 0_0402_5%
2 1 1 2 Choke DCRmax=26.5m ohm, DCRtyp=23m ohm
2VREF_ISL6237 2
1
Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical)
0.047U_0603_16V7K
<8,41> MAINPWON
Vlimit=(5E-06 * 365K)/10=182.5mV
1
PC34
Ilimit=182.5mV/(18m*1.2) ~ 182.5mV/15m
2
=8.44A ~ 12.16A
1
@ PC35 Iocp=Ilimit+Delta I/2

3
0.047U_0402_16V7K
2
=8.90A ~ 12.62A
Delta I=0.921A (Freq=400KHz)
2 PQ6
TP0610K-T1-E3_SOT23-3
4 4
1

SCHEMATIC, MB A5481
401743 C
GRATIS - FOR FREE A B C
D
Sheet 39 of 47
A B C D E
B+
PQ7 PQ8
AO4407A_SO8 AO4407A_SO8 PR39
VIN 8 1 1 8 0.015_2512_1%
7 2 2 7 PJ11
6 3 3 6 1 4 2 1 CHG_B+
2 1
1
5 5
2
2200P_0402_25V7K
4.7U_1206_25V6K
4.7U_1206_25V6K
2 3 JUMP_43X118 PR41
PR40 CHGEN# PC36 100K_0402_1%
2
0.01U_0402_25V7K
3.3_1210_5% 0.01U_0402_25V7K
1
100K_0402_1%
PC37
PC38
PC39
2
1
PC41 PC45
1
2
5
6
7
8
3
2
1
PC40
PR42
1 0.1U_0402_16V7K PU4 1U_0805_25V6K 1
1 2 1 28 PVCC 1 2 PQ9
CHGEN PVCC
1
@ AO4407A_SO8
1
PR43 PR44 /BATDRV 4
2
3.3_1210_5% PC42 PC43 2.2_0603_5% PQ10
0.1U_0603_25V7K 0.1U_0603_25V7K 27 BTST 1 2 4 AO4466_SO8
2
BTST
2
2
PR45 @PD11
@ PD11
340K_0402_1% 1 2 ACN 2 26 DH_CHG
1
PR274 ACP ACN HIDRV
3
3
2
1
5
6
7
8
PC44 RLZ24B_LL34 0_0805_5% ACP PR46
1
2.2U_0805_25V6K 1 2 4 25 LX_CHG PL6 0.02_2512_1%
2
ACDET ACDRV PH PD8 10UH_PCMB104T-100MS_6A_20%

5 ACDET
2 1 1 2 1 2 1 4
BATT+
10U_1206_25V6M
Place close to back to back MOS
10U_1206_25V6M
LL4148_LL34-2 PC46
REGN
2 3
2
0.1U_0603_25V7K
5
6
7
8
PC48
24751_VREF PR47 PC47
PC137
CELLS GND 3 Cell 54.9K_0402_1% ACSET 6 10U_1206_25V6M
ACSET
24
2
REGN
VREF 4 Cell
1
2
1
PC49 PQ11
1
@ PR49
@PR49 1U_0603_10V6K 4 AO4466_SO8
100K_0402_1% PR50 PC51 PR48
2
2
0_0402_5% 0.47U_0603_16V7K 4.7_1206_5%

1 2 1 2 7
1
PR51 ACOP DL_CHG

23
3
2
1
2
340K_0402_1% LODRV
CELLS
1
1
22 PC50
@ PQ12 OVPSET PGND 680P_0402_50V7K PC52
8 OVPSET
1
D 2N7002W-T/R7_SOT323-3 0.1U_0402_16V7K
2
2 2
2 3S/4S# <28> 1 2
G 9 21 ACOFF <28>
AGND LEARN
2
S
3
1
PR52
54.9K_0402_1% PC53 PC54
24751_VREF 20 CELLS 0.1U_0603_25V7K 0.1U_0603_25V7K
Cells selector
2
CELLS
1
24751_VREF 10 VREF
1
PC55
1U_0603_10V6K
+3VALWP
2
PR53 19 SE_CHG+
SRP
3
S
100K_0402_1% G
1 2 PQ13_GATE 2 11 18 SE_CHG-
PQ13 VDAC SRN
SI2301BDS-T1-E3_SOT23-3 17
BAT
1
Input OVP : 22.3V
1
D
LI-4S :18.0V----BATT-OVP=2.001V PC56 VADJ 12
1
0.1U_0603_25V7K VADJ PC57

Input UVP : 17.26V
2
BATT-OVP=0.1112*VMB ACSET 0.1U_0603_25V7K Icharge Setting
2
Fsw : 300KHz TP 29
LI-3S :13.5V----BATT-OVP=1.5012V ACGOOD# For 2200mA, Icharge=0.8C=0.8*2*2.2=3.52A
13 ACGOOD ICHG setting PR55
BATT-OVP=0.1112*VMB 17.4K_0402_1% Icharge=(Vsrset/Vdac)*(0.1/PR46)
VMB 16 SRSET 2 1
Per cell=3.5V /BATDRV 14
SRSET IREF <28> IREF=((100k/(100K+17.4K))/3.3)*(0.1/0.02)=Icharge
BATDRV
1
PR56
1
10_0603_5% PR57 IREF=0.7748*Icharge
1
15 1 2 100K_0402_1% @PC58
@PC58
IADAPT 0.01U_0402_25V7K
2
VS PR58 BQ24751ARHDR_QFN28_5X5 24751_VREF
2
CP Point Setting 340K_0402_1%
1
3 RTCVREF 3
2
2
0.01U_0402_25V7K
CP point=Iadapter*85% PC59
100K_0402_5%
100P_0402_50V8J @ PR59
2
65W adapter R=(100K*100K)/(100K+100K)=50K 100K_0402_1%
1
PC60
PR244
24751_VREF 24751_VREF ADP_I <28> @ PR61
1
Vacset=3.3*(50K/(50K+64.9K))=1.436V 0_0402_5% 24751_VREF
1
200K_0402_1%
PR60 1 2
2
1
100K_0402_1%
CP POINT=(1.436V/3.3V)*(0.1/0.015)=2.901A 499K_0402_1% ACIN <19,28,37,38>
1
1
1
PR63
PQ13_GATE
1
D
PR62
@ PR64
2
8
PR65 PU1B 887K_0402_1% ACGOOD# 2 @ PQ14
1
10K_0402_1% LM358DT_SO8 D @ PQ16 G 2N7002W-T/R7_SOT323-3
5
P
+ PQ15 SI2301BDS-T1-E3_SOT23-3 @ PR66

1 2 7 0 2 S
2
3
<28> BATT_OVP 6 PC61 G SSM3K7002F_SC59-3 0_0402_5%
-
G
S
0.1U_0402_16V7K REGN VADJ
D
S 3 1 1 2
3
1
24751_VREF
0.01U_0402_25V7K
ACOFF 1 2 2
4
PR67 G
1
PC62
105K_0402_1%
G
S
3
2
1
2
340K_0402_1%
499K_0402_0.1%
PQ17 @ PR69
2
1
PR68
SSM3K7002F_SC59-3 100K_0402_1% @PC63

@PC63 PR72
2
PR71
PR70 1000P_0402_50V7K 100K_0402_5%
2
PR73 210K_0402_0.1%
2
64.9K_0402_1%
2
1
24751_VREF 1 2 ACSET CHGEN#
2
1
D
1
1
@ PQ18 D
2
<28> CALIBRATE# G 2N7002W-T/R7_SOT323-3 2 PQ19
<28> FSTCHG
PR74 S G 2N7002W-T/R7_SOT323-3
3
100K_0402_1% S
3
1
2
PR75 Charger ADJ Calibrate#

4 100K_0402_1% 4
1
<28> 65W/90W# 2 4.0V L=0

2
G
PQ20 S
3
2N7002W-T/R7_SOT323-3 4.2V 1.8755V
4.3V 2.8132V
CP setting 4.35V H=3.3V SCHEMATIC, MB A5481
B C
401743
A B C D E
A B C D
PH1 under CPU botten side :

CPU thermal protection at 92 degree C
VL
1
VL 1
VL
VMB
2
PJP2
SUYIN_250133MR007G115ZL PL7 PR76
1
SMB3025500YA_2P 47K_0402_1%
1 1 BATT_S1 1 2 BATT+ PH1 PC64
MAINPWON <8,39>
2 100K_0603_1%_TSM1A104F4361RZ 0.1U_0603_25V7K PR77
1
2 47K_0402_1%
3 3
1
4 EC_SMCA 1 2
2
4 EC_SMDA PC65 PC66 PR78 PQ21
5 5
8
6 1000P_0402_50V7K 0.01U_0402_25V7K 11.3K_0402_1% DTC115EUA_SC70-3
2
6 PD9
7 1 2 3
P
7 +
8 8 O 1 2 1 2
9 TM_REF1 2
9 -
G
PU5A LL4148_LL34-2
PR83 LM393DG_SO8
4
6.49K_0402_1%
3
2
0.22U_0603_16V7K
<BOM Structure>
2 1 +3VALWP
PR79 PR80
13.3K_0402_1%
100_0402_1% 100_0402_1%
1
PC67
PR82
1
1000P_0402_50V7K
PR81
100K_0402_1%
1
PR85 2 1 VL
1
1K_0402_1%
PC68
2
2
1
2 2
BATT_TEMP <28>
PR84
EC_SMB_CK1 <28>
100K_0402_1%
EC_SMB_DA1 <28>
2
PJP3
1 1 2 2
3 3 4 4
5 5 6 6
7 7 8 8 PH2 near main Battery CONN :

EC_SMCA 9 9 10 10 BAT. thermal protection at 75 degree C
11 12 EC_SMDA
11 12
13 13 14 14
VL
15 15 16 16
2
17 17 18 18
@ PR86
19 20 VL 47K_0402_1%
19 20 @ PR87
SUYIN_200109MS020G209ZR 47K_0402_1%
1
1 2
1
3 PQ22 3
TP0610K-T1-E3_SOT23-3
@ PH2
100K_0603_1%_TH11-4H104FT VL
B+ 3 1 +VSBP
2
0.22U_1206_25V7K
0.1U_0603_25V7K
@ PR89
1
8
6.49K_0402_1% @ PD10
1
1
PC69
PC70
PR88 1 2 5 LL4148_LL34-2
P
100K_0402_1% +
O 7 2 1
@ @ TM_REF1 6
2
G
PR90 PU5B
2
1
VL 22K_0402_1% LM393DG_SO8
4
1 2 @ PC71 @ PR91
0.22U_0603_16V7K 22.1K_0402_1%
2
2
PR92
100K_0402_1%
PR93
1
0_0402_5% D
1 2 2 PQ23
<39,44> SPOK G 2N7002W-T/R7_SOT323-3
0.1U_0402_16V7K
S
3
1
PC72
@
2
4 4

SCHEMATIC, MB A5481
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
401743 C
GRATIS - FOR FREE A B C
D
Sheet 41 of 47
5 4 3 2 1
PL16
FBMA-L11-322513-151LMA50T_1210
NB_51117_B+ 1 2
B+
10U_1206_25VAK
D D
PC206
1
5
+ @ PC300
2
68U_25V_M_R0.44
PR246 4
267K_0402_1%
1 2
PQ35
SIS412DN-T1-GE3_POWERPAK8-5
3
2
1
BST_NBCOREP
PC209
PR247 PR248 0.1U_0603_25V7K PL13
15
14
+NB_COREP
1
1.3K_0402_5% PU12 0_0603_5% 1.8UH_MSCDRI-104A-1R8N-E_9.5A_30%
1 2 1 2BST_NBCOREP_11 2 1 2
EN_PSV
TP
VBST
<33,37> VLDT_EN
1
PR249 2 13 DH_NBCOREP
TON DRVH
1
47K_0402_5% PC208
0.1U_0402_16V7K 3 12 LX_NBCOREP PR250
2
VOUT LL
5
6
7
8
4.7_1206_5% 1
2
4 11 +5VALW
D
D
D
D
V5FILT TRIP + PC210
2
5 10 330U_D2E_6.3VM_R25M
VFB V5DRV
1
DL_NBCOREP 2
6 PGOOD DRVL 9 4 G
PGND
PC211
GND
PR251 680P_0603_50V8J
2
1
S
S
S
12K_0402_1%
300_0603_5%
1
+5VALW 1 2 @ PC213
@PC213 TPS51117RGYR_QFN14_3.5x3.5 PC212
3
2
1
C C
PR252
47P_0402_50V8J 4.7U_0805_10V6K PQ36
2
1 2 FDS6670AS_NL_SO8
1
PC214
2
1U_0603_10V6K
2
PR253
3.57K_0402_1%
1 2
1
PR255
PR254 30K_0402_1% +3VS
10K_0402_1%
2
2
PR256
PR257 10K_0402_5%
1
D 10K_0402_1%
1
PQ37 2 1 2
2N7002W-T/R7_SOT323-3 G
2
VFB=0.75V S +1.2VALW
3
B @ PR258 B
Rton=267K, Freq=298KHz 10K_0402_1% +3VS
PC215
2
2
0.1U_0402_16V7K +5VALW
Ipeak=7A Imax=5.32A
1
1
Delta I=((19-1.1)*(1.1/19))/(1.8U*298K)=1.93A @ PR259
@PR259 PJ22
1
Rtrip=12K 10K_0402_5% JUMP_43X79
1/2DeltaI=0.96A @
1
2
Rdson=9m~11.5m BOM control (R*C>1ms) PC227
2
Iocp=9.05A~14.30A PR260 1U_0402_6.3V6K
2
1
D
10K_0402_1%
PQ38 2 1 2 POWER_SEL
POWER_SEL <13>
1
2N7002W-T/R7_SOT323-3 G PC230
S 4.7U_0805_6.3V6K
3
6
PU15
2
@PR261
@ PR261 5
VCNTL
10K_0402_1% VIN
7 POK
VOUT 4 +1.1VSP
H 1.017V
1
0.01U_0402_25V7K
PR273 3
VOUT
22U_0805_6.3V6M
PC226
12_0402_5%
PC229
VLDT_EN 1 2 8 2
<33,37> VLDT_EN EN FB
1
PR272
GND
2
1
9 1.3K_0402_1%
L 1.1V PC228 PR270 VIN
2
1U_0603_10V6K 10K_0402_5% APL5912-KAC-TRL_SO8
1
2
1
<BOM Structure>
A PR271 A
3.24K_0402_1%
2
SCHEMATIC, MB A5481
Size
Document Number Rev
C
401743
5 4 3 2 1
5 4 3 2 1
+1.8V
1
PJ12
1
JUMP_43X79
2
D D
PU6
2
1 VIN VCNTL 6 +3VALW
2 GND NC 5
1
1
PC73 3 7 PC74
4.7U_0805_6.3V6K PR94 REFEN NC 1U_0402_6.3V6K PU7
2
1K_0402_1% 4 8 APL5508-25DC-TRL_SOT89-3
VOUT NC
9 +3VS 2 3
2
GND IN OUT
+2.5VSP
RT9173DPSP_SO8
1
GND
1
0.1U_0402_16V7K
@PR95
@ PR95 @ PQ24 PC78
+0.9VP
1
0_0402_5% 2N7002W-T/R7_SOT323-3 D 1U_0402_6.3V6K 1 PC79 @ PR98
@PR98
PC75
<32,37> SYSON# 1 2 2 PR96 4.7U_0805_6.3V6K 150_1206_5%
2
1
G 1K_0402_1%
2
1
S PC76
3
@PC77
@ PC77 10U_0805_6.3V6M
2
0.1U_0402_16V7K
C C
+1.8V
+5VALW
1 1
PJ14
JUMP_43X79
1
B PC83 B
1U_0402_6.3V6K
2
2
6
5 PC84
VCNTL
VIN 4.7U_0805_6.3V6K
7 POK
4
2
VOUT
PR101 3
100K_0402_5% VOUT
+1.5VSP
1
<28,33,37> SUSP# 1 2 8 EN FB 2
1
GND
9 PR102 PC85
VIN
2
1.54K_0402_1% 0.01U_0402_25V7K
2
PR103 PC86 PC87

1
0.1U_0402_16V7K PU8 22U_0805_6.3V6M

2
47K_0402_5% APL5915KAI-TRL_SO8
2
1
1
PR104
1.74K_0402_1%
2
A A

SCHEMATIC, MB A5481
Custom
401743 C

1
Sheet 43 of 47
5 4 3 2 1
PL14
FBMA-L11-322513-151LMA50T_1210
1.8_51117_B+ 1 2
B+
5
6
7
8
1
PC88 @ PC204
10U_1206_25VAK 680P_0402_50V7K
PR200
2
PR106 0_0603_5%
267K_0402_1% 1 2 4
PR107 1 2 PQ25
0_0402_5% AO4466_SO8
1 2
D <28,37> SYSON D
3
2
1
PR108 PC90 PL8
0_0603_5% 0.1U_0603_25V7K 1.8UH_MSCDRI-104A-1R8N-E_9.5A_30%
15
14
1
1
VFB=0.75V @PC89
@PC89
PU9 BST_1.8V 1 2BST_1.8V-1 1 2 1 2 +1.8VP
EN_PSV
TP
VBST
Vo=VFB*(1+PR111/PR112)=0.75*(1+14K/10K)=1.8V 0.1U_0402_16V7K
2
2 13 DH_1.8V
Rton=267K=>Faw=297KHz TON DRVH
1
3 12 LX_1.8V 1
VOUT LL
5
6
7
8
@ PR201
VFB=0.75V 4.7_1206_5% + PC91
4 11 +5VALW
D
D
D
D
V5FILT TRIP 330U_6.3V_M
5 10 PQ26
2
VFB V5DRV FDS6670AS_NL_SO8 2
6 9 DL_1.8V 4 G
PGOOD DRVL
PGND
PR109
GND
1
16.2K_0402_1%
300_0603_5% @ PC171
S
S
S
PR110
1 2 @ PC93 PC92 680P_0402_50V7K
+5VALW 47P_0402_50V8J TPS51117RGYR_QFN14_3.5x3.5 4.7U_0805_10V6K
3
2
1
2
1 2
1
2
PC94
1U_0603_10V6K
2
Cout ESR=15m ohm

Ipeak=11.96A, Imax=8.372A PR111
14K_0402_1%
Delta I=((19-1.8)*(1.8/19))/(L*Fsw)
1 2
((19-1.8)*(1.8/19))/(1.8u*297000)=3.048A
C =>1/2DeltaI=1.524A C
1
PR112
10K_0402_1%
2
Rtrip=16.2K
Iocp=12.39A~20.69A
PL15
FBMA-L11-322513-151LMA50T_1210
1.2_51117_B+ 1 2 B+
5
6
7
8
1
PC95 @ PC205
10U_1206_25VAK 680P_0402_50V7K
PQ39
2
PR114 AO4466_SO8
B 267K_0402_1% B
PR115 1 2 4
0_0402_5%
1 2
<39,41> SPOK
3
2
1
PR116 PC97 PL9
0_0603_5% 0.1U_0603_25V7K 1.8UH_MSCDRI-104A-1R8N-E_9.5A_30%
15
14
1
@PC96
@PC96
PU10 BST_1.2V 1 2BST_1.2V-1 1 2 1 2 +1.2VALWP
EN_PSV
TP
VBST
0.1U_0402_16V7K
2
1
2 13 DH_1.2V
TON DRVH @ PR203
5
6
7
8
VFB=0.75V 3 12 LX_1.2V 4.7_1206_5% 1
VOUT LL PQ40
Vo=VFB*(1+PR119/PR120)=0.75*(1+6.04K/10K)=1.203V
D
D
D
D
VFB=0.75V FDS6670AS_NL_SO8 + PC98
4 11 +5VALW
1 2
Rton=267K=>Fsw=298KHz V5FILT TRIP 330U_D2E_2.5VM
5 10 @ PC172
VFB V5DRV 680P_0402_50V7K 2
4 G
6 9 DL_1.2V
2
PGOOD DRVL
PGND
PR117
GND
S
S
S
12K_0402_1%
300_0603_5%
PR118
1 2 @ PC100 PC99
+5VALW
3
2
1
47P_0402_50V8J TPS51117RGYR_QFN14_3.5x3.5 4.7U_0805_10V6K
7
1 2
1
PC101
1U_0603_10V6K
2
A A
1.2VP Ipeak=7.4A ; Imax=5.180A PR119
6.34K_0402_1%
Delta I=((19-1.2)*(1.2/19))/(L*Fsw) 1 2
((19-1.2)*(1.2/19))/(1.8u*298000)=2.10A
=>1/2DeltaI=1.05A
1
Rdson=11.5m/9m ohm Security Classification Compal Secret Data Compal Electronics, Inc.
set Rtrip=12K PR120 2008/06/11 2010/03/12 Title
10K_0402_1% Issued Date Deciphered Date
Icop_min=9.11A SCHEMATIC, MB A5481
2
Iocp_max=14.38A AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom C
401743
5 4 3 2 1
5 4 3 2 1
@PD100
@ PD100
RB751V-40TE17_SOD323-2
2 1
VR_ON
<28>
+3VS CPU_VID5 <8>
<8>
PSI_L
CPU_VID4 <8>
2
CPU_VID3 <8>
0_0402_5%
PL10
PR204 CPU_VID2 <8> FBMA-L18-453215-900LMA90T_1812
D D
10K_0402_5% CPU_B+ 1 2
CPU_VID1 <8> B+
2200P_0402_50V7K
CPU_VID0 <8>
0_0402_5%
10U_1206_25V6M
10U_1206_25V6M
1
2
<28> VGATE
PR205
5
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
PC200
PC174
PC175
+ PC201
2
+3VS PQ29 220U_25V_M
1
1
SI7686DP-T1-E3_SO8
2
2
2
PR206
PR207 PC176
VCC_PRM 2.2_0603_5% 0.22U_0603_25V7K 4
1
2
2
10K_0402_5%
10K_0402_5%
PR211
PR213
PR245
PR214
PR208
PR209
2
PR210
PR212
R212
UG_CPU1
3
2
1
@
@P
1
1000P_0402_50V7K
150K_0402_1%
0.047U_0402_16V7K
PL11
+CPU_CORE
2
1000P_0402_50V7K
36.5K_0402_1%
2 0.36UH_PCMC104T-R36MN1R17_30A_20%
2
6.81K_0402_1%
4.02K_0402_1%
PHASE_CPU1
40
39
38
37
36
35
34
33
32
31
1 2
2
PC178
C178
PR217
PC179
PR215
2
5
6
7
8
5
6
7
8
PR216
PR218
VID0
BOOT1
PGOOD
PSI_L
VID5
VID4
VID3
VID2
VID1
VR_ON
1
10K_0402_1%
PC177
@
@P
2
1_0402_5%
PQ30 PQ31
1
4.7_1206_5%
1 30 AO4456_SO8 AO4456_SO8 PR242
1
SET UGATE1
2
PR221
PR222
3.65K_0805_1%
10K_0402_1%
PR219
2 RBIAS PHASE1 29 4 4
PR220
PC180
1
3 28 LG_CPU1 0.22U_0603_16V7K
1
OFS PGND1
1 2
1
4 27 PR223 0_0402_5%
3
2
1
3
2
1
SOFT LGATE1
680P_0603_50V8J
2 1 CPU_ISEN2
C +5VS C
PR224 PC181 5 26
OCSET PVCC
PC183
97.6K_0402_1% 470P_0402_50V7K 2 1 CPU_ISEN1 VCC_PRM
1 2 1 2 6 25 PC182
PC184 VW PU11 LGATE2 4.7U_0603_6.3V6K Rs
2
220P_0402_50V8J 7 ISL6264CRZ-T_QFN40_6X6 24
COMP PGND2 VSUM
1 2
8 FB PHASE2 23
9 22 UG_CPU2
PR226 VDIFF UGATE2
1K_0402_1% 10 21 2 1
VSEN BOOT2 PR225
DROOP
2 1
ISEN2
ISEN1
VSUM
1000P_0402_50V7K
PR227 PC185 41 2.2_0603_5%
GND
VDD
RTN
DFB
GND PAD
2
2
VIN
255_0402_1% 1000P_0402_50V7K
VO
2
1 2 1 2 @PC186
@ PC186 CPU_B+
PC187
C187
0.068U_0402_16V7K
1
11
12
13
14
15
16
17
18
19
20
2200P_0402_50V7K
1
10U_1206_25V6M
10U_1206_25V6M
@
@P PC188
2
2 1 0.22U_0603_25V7K
<8> CPU_VCC_SENSE
PC202
PC190
PC191
CPU_ISEN1
PR228 `'&?'&`'&'& ~'&0~'&'&'&'&'&P|'& |'&'&@}'& {'&'&`z'&0z'&`{'&Py'& y'&'&`x'&'& w'&0w'&'&'&0x'&'&Pu'& u'&'&@v'&'&'&`s'&0s'&`t'&0t'& r'&'&`q'&0p'&'&pr'&?'&`?&?'&?'&P?
PQ32 & ?&?'&0?&?'&p?&`?&0?&`?&0?&?'&?'&`?&?'&p?& ?&?'&?'&0?&?'&p?& ?&?'&@?&?'&?'&P?&0?&`?&0?&?'&p?&`?&?'&@ '&?'&p?& ?&?'&0?&?'&p?& ?&?
1
1000P_0402_50V7K
PR229 0_0402_5% 180P_0402_50V8J SI7686DP-T1-E3_SO8

2
10_0402_5% 1 2 CPU_ISEN2
PC192
C192
+CPU_CORE 2 1 PR230 PR231

1K_0402_1% 1.4K_0402_1% 4
1
from output Bulk Cap @

@P 2 1 1 2 +5VS
PR232
10_0402_5% B+
3
2
1
10_0402_5%
1 2
2
Close to Phase1 Choke PL11 PL12
+CPU_CORE
10_0603_5%
PR233
B VCC_PRM 0.36UH_PCMC104T-R36MN1R17_30A_20% B
2
PHASE_CPU2 1 2
10K_0603_5%_TSM1A103J4302RE
PR235
2 1
<8> CPU_VSS_SENSE
2
5
6
7
8
5
6
7
8
11K_0402_1%
10K_0402_1%
1
PH3
PR234
2
1_0402_5%
PR236
0.22U_0402_6.3V6K
0_0402_5% PQ33 PQ34

1
0.022U_0402_16V7K
0.22U_0402_6.3V6K
AO4456_SO8 AO4456_SO8 PR243

2
2
PC193
PR239
PR240
4.7_1206_5%
3.65K_0805_1%
10K_0402_1%
1
1
PC194
PC195
1U_0402_6.3V6K
Rn=(PR241+PH3)//(PR236)=5.875k, Rseuq=Rs/2=1.825K 4 4
PR237
PR238
0.01U_0402_50V7K
Vdcrequ=Io*(DCR/2), PC198
1
1
2
1
PC197
2.61K_0402_1%
0.22U_0603_16V7K
Vn=Vdcrequ*(Rn/(Rsequ+Rn))
2
PC196
1 2
1
=Io*(DCR/2)*(Rn/(Rsequ+Rn))
PR241
CPU_ISEN1
2
3
2
1
3
2
1
=Io*(DCR/2)*G1
1
680P_0603_50V8J
LG_CPU2
1
PC199
CPU_ISEN2 VCC_PRM
Vdroop=Vn/Rdroop1*(Rdroop1+Rdroop2)
=Vn*(1+(Rdroop2/Rdroop1)) VSUM
2
=Vn*(1+(PR231/PR230))
=Vn*G2 Rn VSUM
=>Vdroop=Vn*(1+(PR231/PR230))=Io*Rdroop
=>Io*(DCR/2)*G1*G2=Io*Rdroop
=>Rdroop=1.007m ohm
Iocp_min*Rdroop>Rocset*10uA
=>25A*1.007m ohm>Rocset*10uA
=>choose Rocset=2.74K
=>Iocp_min*1.007m ohm>2.74K*10u
A A
=Iocp_min>27.209A
Iocp_max*Rdroop>Rocset*10.4uA
=>Icop_max>28.297A
Iocp=~27.209A~28.297A
SCHEMATIC, MB A5481
hexainf@hotmail.com THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Rev
C
401743
GRATIS - FOR FREE MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2 1
5 4 3 2 1
Version change list (P.I.R. List) Page 1 of 1

for PWR
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
D HW required to adjust from 1.14V to HW required to adjust from 1.14V to Change PR271 from SD034300180 (S RES 1/16W 3K +-1% D
1 1.12V 1.12V 0.1 42 0402) to SD034324180 (S RES 1/16W 3.24K 0402 1%) 09, 05/07 to PVT
2 Power sequense adjust. HW required to adjust power sequense. 0.1 42 Add PC208 SE076104K80 (S CER CAP .1U 16V K X7R 0402) 09, 05/07 to PVT
Change PR247 from SD028000080 (S RES 1/16W 0 +-5%

3 Power sequense adjust. HW required to adjust power sequense. 0.1 42 0402) to SD028130180 (S RES 1/16W 1.3K 0402 5%) 09, 05/07 to PVT
4 NB_COREP working frequency has

Because NB_COREP working frequency will be gitter
while system at heavy loading. Change to larger ESR
Change PC210 from SGA19331D00 (S POLY C 330U 2.5V M
D2 TPE LESR15M H1.8) to SGA00002B00 (S POLY C 330U
issue. 0.1 42 09, 05/07 to PVT
Cap will be solve. 6.3V M D2E ESR25M TPE H1.8)
5 BOM error BOM error 0.1 42 Add PR270 SD28100280(S RES 1/16W 10K 0402 5%) 09, 05/07 to PVT
Change PR103 from SD028470280(S RES 1/16W 47K 0402 5%)

6 BOM error BOM error 0.1 42 to SD028100280(S RES 1/16W 10K 0402 09, 05/07 to PVT
5%)
7
C C
10
11
B 12 B
13
14
15
16
17
18
A A

SCHEMATIC, MB A5481
5 4 3 2 1
5 4 3 2 1
Version change list (P.I.R. List) for HW
Item Reason for change Modify List PG# Date Item Reason for change Modify List Rev. PG#
1 PWR update circuit 4/9 26
2 27
D D
BOM change R118 reserve P.18 4/9

3 BOM change Change R178, R179 to 90.9/158 ohm P.16 4/9 28
4 BOM change R30, R39 reserve P.24 4/9 29
5 BOM change Add C30 P.38 4/9 30
6 BOM change Add R634, R639 P.28 4/9 31
7 BOM change C383 Reserve P.24 4/9 32
8 Pop R419 P.20 4/10 33
9 PWR update circuit 5/15
10 For Panel flash issue R1,D2 Reserve, pop R763 P.24 5/18
11 For Panel flash issue Add R414 and non-pop P.24 5/18
C C
12 Lid_SW intial issue Add R19 P.28 5/18

13 HPET timer issue Change C288,C290 to 33P P.16 5/18
14 BOM change change C276,C279 10P to 27P P.19 5/19
15
16
17
18
19
20
B 21 B
22
23
24
25
A A

SCHEMATIC, MB A5481
Custom
401743 C
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A B C D E

NCWG0/H0 Schematics Document

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Camera USB conn

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S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW

S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF

EC SM Bus1 address EC SM Bus2 address PROJECT ID Table

Clock Generator 1101 001Xb New Card

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CPU CLK CPU

H_CLKI[1:0] Host Bus H_CLKO[1:0]

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+5VS U7 +5VS SB SB710

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<BOM Structure> <BOM Structure>

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Processor DDR2 Memory Interface

DDR_B_D60 AE14 AB14 DDR_A_D60

DDR_B_D55 MB_DATA56 MA_DATA56 DDR_A_D55

DDR_B_D54 AF16 AB15 DDR_A_D54

1 1 DDR_B_D53 AC18 AB17 DDR_A_D53

R5 DDR_B_D52 AF19 Y17 DDR_A_D52

DDR_B_D48 MB_DATA49 MA_DATA49 DDR_A_D48

DDR_A_CLK1 DDR_B_CLK1 CONN@ FOX_PZ63823-284S-41F

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VID5 A5 CPU_VID5 <45>

H_PWRGD R16 HTREF1 VID1

169_0402_1% CPU_TMS AA9 2 1 CPU_TEST18_PLLTEST1

LDT_STOP# CPU_TEST25_H_BYPASSCLK_H E9 C9 CPU_TEST29_H_FBCLKOUT_P 1 2

P20 RSVD0 RSVD8 H16

AMD: suggest DBREQ need pull high

NOTE: HDT TERMINATION IS REQUIRED U51

@ SAMTEC_ASP-68200-07 <BOM Structure>

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Between CPU Socket and DIMM

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+1.8V +1.8V +DIMM_VREF +1.8V

+1.8V +1.8V +DIMM_VREF

PCIE I/F GFX

AE3 AC1 PCIE_ITX_PRX_P0 C600 1 2 0.1U_0402_16V7K

<17> SB_RX0P AA8 AD7 SB_TX0P_C C259 1 2 0.1U_0402_16V7K

HYPER TRANSPORT CPU I/F

H_CADOP8 AC24 F21 H_CADIP8

<6> H_CLKOP0 T22 HT_RXCLK0P HT_TXCLK0P H24 H_CLKIP0 <6>

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<13> AUX_CAL 1 2 Selects Loading of STRAPS from EPROM

RS780 use HSYNC to enable SIDE PORT

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C282 @ 2.2U_0603_6.3V4Z ATIG0T_LPRS CLK_ATIG0# R174 1

ATIG0C_LPRS R176 0_0402_5% @

GFX_REFCLK 100M DIFF 100M DIFF 100M DIFF(IN/OUT)*

GPP_REFCLK NC 100M DIFF NC

PCI EXPRESS INTERFACE