JOURNAL OF APPLIED PHYSICS 99, 031101 共2006兲

APPLIED PHYSICS REVIEWS–FOCUSED REVIEW

Adhesive wafer bonding

F. Niklausa兲
Microsystem Technology, Department of Signals, Sensors and Systems, Royal Institute of Technology (KTH),
SE-100 44 Stockholm, Sweden and Center for Integrated Electronics, Rensselaer Polytechnic Institute,
Troy, New York 12180
G. Stemme
Microsystem Technology, Department of Signals, Sensors and Systems, Royal Institute of Technology (KTH),
SE-100 44 Stockholm, Sweden
J. -Q. Lu and R. J. Gutmann
Center for Integrated Electronics, Rensselaer Polytechnic Institute, Troy, New York 12180
共Received 29 August 2005; accepted 5 January 2006; published online 9 February 2006兲
Wafer bonding with intermediate polymer adhesives is an important fabrication technique for
advanced microelectronic and microelectromechanical systems, such as three-dimensional
integrated circuits, advanced packaging, and microfluidics. In adhesive wafer bonding, the polymer
adhesive bears the forces involved to hold the surfaces together. The main advantages of adhesive
wafer bonding include the insensitivity to surface topography, the low bonding temperatures, the
compatibility with standard integrated circuit wafer processing, and the ability to join different types
of wafers. Compared to alternative wafer bonding techniques, adhesive wafer bonding is simple,
robust, and low cost. This article reviews the state-of-the-art polymer adhesive wafer bonding
technologies, materials, and applications. © 2006 American Institute of Physics.
关DOI: 10.1063/1.2168512兴

TABLE OF CONTENTS B. Film and device transfer for integration of

I. INTRODUCTION. . . . . . . . . . . . . . . . . . . . . . . . . . . .
II. ADHESIVE BONDING MECHANISMS. . . . . . . .
III. POLYMER ADHESIVES. . . . . . . . . . . . . . . . . . . . .
A. Hardening and polymerization of polymers. .
B. General properties of polymers. . . . . . . . . . . .
C. Deposition of polymers on wafer surfaces. . .
D. Polymer adhesives for wafer bonding. . . . . . .
IV. ADHESIVE WAFER BONDING
TECHNOLOGY. . . . . . . . . . . . . . . . . . . . . . . . . . . .
A. Wafer bonding tools and wafer-to-wafer
alignment techniques. . . . . . . . . . . . . . . . . . . .
B. Adhesive wafer bonding processes. . . . . . . . .
1. Adhesive wafer bonding with
unpatterned adhesive layers. . . . . . . . . . . . .
2. Adhesive wafer bonding with patterned
adhesive layers. . . . . . . . . . . . . . . . . . . . . . .
V. BOND CHARACTERIZATION. . . . . . . . . . . . . . . .
A. Bond interface imaging. . . . . . . . . . . . . . . . . .
B. Bond strength measurements. . . . . . . . . . . . . .
C. Bond hermeticity measurements. . . . . . . . . . .
VI. APPLICATIONS OF ADHESIVE WAFER
BONDING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A. Fabrication of three-dimensional integrated
circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
a兲
Electronic mail: frank.niklaus@s3.kth.se
MEMS and electronic circuits. . . . . . . . . . . . . 18
C. Temporary adhesive bonding for film and
1
device transfer using handling wafer. . . . . . . . 19
4 D. Wafer-level packaging. . . . . . . . . . . . . . . . . . . 21
6 E. Fabrication of microfluidic and bioMEMS
6 components. . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6 VII. FUTURE DEVELOPMENTS AND
7 CONCLUSIONS. . . . . . . . . . . . . . . . . . . . . . . . . . . 24
7
9 I. INTRODUCTION
9 Bonding two substrates or wafers together has been an
11 important process in the fabrication of both microelectronic
systems and microelectromechanical systems 共MEMS兲 for
11 years. Wafer bonding enables the fabrication of unique types
of substrates and allows fabrication and packaging of com-
12 plex three-dimensional 共3D兲 microcomponents. Historically,
14 some of the earliest uses of wafer bonding were in fabrica-
15 tion and packaging of pressure sensors.1,2 The main commer-
15 cial applications of wafer bonding are the fabrication of
16 silicon-on-insulator 共SOI兲 substrates and packaging of inertia
and pressure sensors for automotive and consumer
17 products.3–6
The wide variety of wafer bonding techniques include
17 direct bonding,4–6 anodic bonding,4–6 solder bonding,7 eutec-
tic bonding,8 thermocompression bonding,9 direct metal-to-
metal bonding,10 ultrasonic bonding,11 low-temperature melt-

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031101-2 Niklaus et al. J. Appl. Phys. 99, 031101 共2006兲

TABLE I. Commonly used wafer bonding techniques 共Refs. 1–15兲.

Wafer bonding Typical bonding Application

technique conditions Advantages and disadvantages areas

Direct bonding 600– 1200 ° C ⫹ high bond strength SOI wafer

Room-temperature ⫹ hermetic fabrication
schemes have been ⫹ resistant to high temperatures
reported ⫺ high surface flatness required
Small or no bond ⫺ high bond temperatures not always
pressure compatible with electronic wafers

Anodic bonding 150– 500 ° C ⫹ high bond strength Sensor

200– 1500 V ⫹ hermetic packaging
No bond pressure ⫹ resistant to high temperature
⫺ bond temperatures in combination
with voltage not always compatible
with electronic wafers

Solder bonding 150– 450 ° C ⫹ high bond strength Bump and flip-
Low bond pressure ⫹ hermetic chip bonding
⫹ compatible with electronic wafers
⫺ solder flux

Eutectic bonding 200– 400 ° C ⫹ high bond strength Hermetic

Low to moderate ⫹ hermetic packaging
bond pressure ⫹ compatible with electronic wafers Bump and flip-
⫺ sensitive to native oxides at chip bonding
surfaces

Thermocompression 350– 600 ° C ⫹ hermetic Wire bonding

bonding and 100– 800 MPa ⫹ compatible with electronic wafers Bump and flip-
direct metal-to- 共high bond ⫺ very high net forces for full wafer chip bonding,
metal bonding pressure兲 bonding required e.g., 3D-ICs
⫺ high surface flatness required

Ultrasonic bonding Room temperature ⫹ compatible with electronic wafers Wire bonding
up to 250 ° C ⫺ only demonstrated for small bond
High bond areas
pressure

Low-temperature 400– 1100 ° C ⫹ high bond strength Sensor

melting glass Low to moderate ⫹ hermetic packaging
bonding bond pressure ⫺ bond temperatures not always
compatible with electronic wafers

Adhesive bonding Room temperature ⫹ high bond strength MEMS, Sensor

up to 400 ° C ⫹ low bond temperature packaging,
Low to moderate ⫹ works practically with any 3D-ICs,
bond pressure substrate material including temporary bonds
electronic wafers
⫺ no hermetic bonds
⫺ limited temperatures stability

ing glass bonding,12 and adhesive bonding.13–16 Table I
liststhese wafer bonding techniques and their main character-
istics.
In direct or fusion bonding, two wafers are contacted
without the assistance of any significant pressure, electrical
fields, or intermediate layers. Direct wafer bonding typically
involves wafer surface preparation and cleaning, room tem-
perature contacting of the wafers and an annealing step to
increase the bond strength. Very flat wafer surfaces are re-
quired to achieve reliable and high yield bonds. Typical an-
nealing temperatures for silicon-to-silicon direct bonding are
between 600 and 1200 ° C. Room-temperature silicon-to-
silicon bonding schemes with special wafer surface treat-
ments have also been reported. Direct bonding usually leads
to strong bonds and is widely used in SOI technology.
Anodic or field assisted bonding is based on joining an
electron conducting material 共e.g., silicon兲 and a material
with ion conductivity 共e.g., alkali-containing glass兲. The two
contacted wafers are heated to 180– 500 ° C to mobilize the
ions while a voltage of 200– 1500 V is applied. The voltage
creates a large electric field that pulls the wafer surfaces into
intimate contact and fuses them together. Due to the high
forces of attraction that are created by the electric field, an-
odic bonding is more tolerant to surface roughness than di-

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031101-3 Niklaus et al.
rect bonding. Anodic bonding usually leads to strong and
hermetic bonds and is widely used for microsensor fabrica-
tion and for hermetic sealing of micromachined devices.
In solder bonding, layers of metal or metal-alloy-based
solders are used to bond two wafers. Usually metal layers are
deposited on both wafers. The metal solders can be applied
by sputtering, evaporation, chemical-vapor deposition, elec-
troless plating, electroplating, or by another suitable tech-
nique. The wafers are brought into close contact and are
heated to the melting temperature of the solder. The solder
reflows and wets both wafer surfaces, which causes intimate
contact and bonding of the surfaces. A popular solder mate-
rial is lead-tin 共Pb–Sn兲 solder, that melts at a temperature of
360 ° C. The gold-tin 共Au–Sn兲 and tin-copper 共Sn–Cu兲 sol-
ders are also suitable solder materials. Most solder bonding
processes use flux to remove oxides from the metal surfaces.
Any oxides present at the metal surfaces can prevent the
wetting of the surfaces with the liquid solder, which causes
poor bonding. The advantages of solder bonding are the low
bonding temperatures and the ability to join various wafer
materials with a hermetic bond. The solder reflow process
can also tolerate, to some extent, particles and structures at
the wafer surfaces. Solder bonding is widely used to create
electrical contacts in flip-chip bonding.
Eutectic bonding is a variation of solder bonding in
which the low melting temperatures of certain alloys are
used to bond at low temperatures. This effect can be used to
join two wafers with dissimilar surface materials. When the
wafers are brought into intimate contact, diffusion mecha-
nisms between the surface materials cause the creation of an
alloy at the bond interface. The alloy has a lower melting
temperature than the individual materials. Thus, the melting
of the alloy occurs only in a very thin layer directly at the
bond interface. The most commonly used material combina-
tion is silicon 共Si兲 and gold 共Au兲 with a eutectic temperature
of 363 ° C. Also, other material combinations such as lead
共Pb兲 and tin 共Sn兲 have been used for eutectic bonding. Eu-
tectic bonding can result in strong and hermetic bonds at low
temperatures and is often used for the hermetic sealing of
micromachined transducers. The disadvantage of eutectic
bonding is the difficulty to obtain complete bonding over
large areas due to native oxides at the material surfaces
which prevents the bonding from occurring.
Thermocompression bonding, metal-to-metal direct
bonding, and ultrasonic bonding are related bonding schemes
in which two surfaces are brought into close contact by ap-
plying pressure and heat. Typically at least one of the sur-
faces consists of a metal. The applied pressure and heat
causes plastic deformation and fusion of the opposing sur-
faces. Instead of directly heating the bond interface, the heat
can also be applied by ultrasonic energy 共ultrasonic bond-
ing兲. The application of ultrasonic energy also has the advan-
tage that native oxides, particles, and surface nonuniformities
at the bond interface are removed by scrubbing the surfaces
at the bond interface. Common materials for thermocompres-
sion bonding, metal-to-metal direct bonding, and ultrasonic
bonding are gold to gold, copper to copper, aluminum to
gold, and aluminum to glass bonding. Typical bonding pa-
rameters for gold to gold thermocompression bonding are
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J. Appl. Phys. 99, 031101 共2006兲
pressures of about 300 MPa and temperatures of about
500 ° C. The disadvantage of thermocompression and ultra-
sonic bonding is that large net forces are required when
bonding larger wafer areas. Thus, thermocompression bond-
ing, metal-to-metal direct bonding, and ultrasonic bonding
are mainly used in wire bonding schemes and in bump bond-
ing schemes.
In low-temperature melting glass bonding an inorganic
low-temperature melting glass layer is used as the interme-
diate bonding material. The glass or glass frit layer is depos-
ited on one or both of the wafers, e.g., by spraying, screen-
printing, extrusion, sedimentation, or spin coating. The
wafers are brought into intimate contact and heated. The
glass deforms or reflows and makes sufficiently close contact
with the wafer surfaces to create a bond between them. Two
different types of glasses are available: Devitrifying glasses
and vitreous glasses. Devitrifying glasses are thermosetting
materials, which crystallize during the heating process. The
melting point of these glasses is permanently increased after
the curing process. Vitreous glasses are thermoplastic mate-
rials, which melt and flow at the same melting temperature
each time they are thermally processed. Glasses with curing
temperatures between ⬍400 and 1100 ° C are available. The
advantages of low-temperature melting glass bonding are the
ability to join various wafer materials and to achieve her-
metic bonds. Other advantages include their relatively low
bonding temperatures and their tolerance of particles and
structures at the wafer surfaces, to some extend. Low-
temperature melting glass bonding is often used in fabrica-
tion and hermetic packaging of microsensors.
In adhesive bonding, an intermediate adhesive layer is
used to create a bond between two surfaces to hold them
together. Although successfully used in many industries in-
cluding airplane, aerospace, and car manufacturing industries
to join various similar and dissimilar materials, adhesive
bonding did not have a significant role during initial semi-
conductor wafer bonding research. The review article “Ad-
hesive bonding in microelectronics and photonics” from Ya-
cobi et al.17 and the book Adhesive Bonding in Photonics
Assembly and Packaging from Yacobi and Hubert18 summa-
rize the applications of adhesive bonding for microelectronic
and photonic components and are largely concerned with
relatively small bonding areas 共chip-level bonding兲. In con-
trast to these applications, recent research and development
of adhesive wafer bonding involves bonding of large sub-
strates using the well-defined and defect-free intermediate
adhesive layers. In some applications, precise wafer-to-wafer
alignment of the bonded wafer pairs is required. Recent de-
velopments of reliable and high yield adhesive bonding pro-
cesses have made adhesive wafer bonding a generic and in
some cases enabling wafer bonding technique for a variety of
applications.
In the most commonly used adhesive wafer bonding pro-
cesses, a polymer adhesive is applied to one or both of the
wafer surfaces to be bonded. After joining the wafer surfaces
that are covered with the polymer adhesive, pressure is ap-
plied to force the wafer surfaces into intimate contact. The
polymer adhesive is then converted from a liquid or vis-
coelastic state into a solid state, typically done by exposing
031101-4 Niklaus et al.
the polymer adhesive with heat or ultraviolet 共UV兲 light. The
main advantages of adhesive wafer bonding include the rela-
tively low bonding temperatures 共depending on the polymer
material between room temperature and 450 ° C兲, the insen-
sitivity to the topology of the wafer surfaces, the compatibil-
ity with standard complementary metal-oxide semiconductor
共CMOS兲 wafers and the ability to join practically any wafer
materials. Adhesive wafer bonding does not require special
wafer surface treatments such as planarization and excessive
cleaning. Structures and particles at the wafer surfaces can be
tolerated and compensated to some extent by the polymer
adhesive. While adhesive wafer bonding is a comparably
simple, robust, and low-cost process, concerns such as lim-
ited temperature stability and limited data about the long-
term stability of many polymer adhesives in demanding en-
vironments need to be considered. Also, adhesive wafer
bonding does not provide hermetically sealed bonds towards
gasses and moisture.13,16,17
This article reviews the state-of-the-art adhesive wafer
bonding technologies, materials, and applications using syn-
thetic organic adhesives, which are typically composed of
polymers. This review does not include wafer bonding using
metals,7–11 low-temperature melting glasses,12 or other mate-
rials that are sometimes referred to as intermediate adhe-
sives.
II. ADHESIVE BONDING MECHANISMS
The basic principle that all bonding techniques have in
common is that two materials adhere to each other if they are
brought in sufficiently close contact. The cohesion of atoms
and molecules within a solid material as well as the adhesion
of atoms and molecules in between two solid materials is
ensured by four basic bond types, which are
1. Covalent bonds
2. Van der Waals bonds
3. Metallic bonds
4. Ionic bonds
These bond types are based on electromagnetic 共coulom-
bic兲 forces resulting from the attraction of opposing electri-
cal charges. Covalent bonds and van der Waals bonds are the
dominant bonding mechanisms in most wafer bonding tech-
niques. Metallic bonds occur only in metals and ionic bonds
occur in ionic materials. Table II shows a comparison of the
typical energy content of the different bond types and Fig. 1
shows the energy content of a covalent and two van der
Waals bonds versus the distance between atoms. To accom-
plish covalent and van der Waals bonds, the atoms of two
opposing surfaces must be less than 0.3– 0.5 nm apart19 as
depicted in Fig. 1. The resulting bonds have varying energies
that depend on the surface materials and the distance be-
tween the atoms of the surfaces, but none of the bonds ex-
tend further than 0.5 nm.4,19 Macroscopically flat surfaces,
such as the surfaces of polished silicon 共Si兲 wafers, have a
root-mean-square roughness of 0.3– 0.8 nm. Nevertheless,
the profile depth 共peak to valley兲 of these surfaces is several
nanometers, which typically prevents bonding over larger
surface areas. Figure 2共a兲 shows a schematic drawing of the
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J. Appl. Phys. 99, 031101 共2006兲
TABLE II. Comparison of the energy content of various bond types 共Refs. 6
and 19兲.
Energy content
Bond type 共kJ/mol兲
Ionic bonds 590–1050
Covalent bonds 563–710
Metallic bonds 113–347
Van der Waals 共intermolecular兲 bonds
Hydrogen bonds with fluorine ⬍42
Hydrogen bonds without fluorine 10–26
Other dipole-dipole bonds 4–21
Dipole-induce dipole bonds ⬍2
Dispersion bonds 0.08–42
contact interface of two solid surfaces that are macroscopi-
cally flat, but exhibit surface roughness on a microscopic
level. In order to bring two material surfaces in sufficiently
close contact to achieve bonding, at least one material sur-
face must deform to fit the other. This deformation may be
accomplished by plastic or elastic deformation, by diffusion
of a solid material or by wetting of a surface with a liquid
material. Practically all wafer bonding techniques uses one
of these mechanisms to establish bonding between wafer sur-
faces.
Several theories for adhesive bonding have been pro-
posed, including 共a兲 adsorption theory, 共b兲 chemical bonding,
共c兲 diffusion theory, 共d兲 electrostatic attraction, 共e兲 mechani-
cal interlocking, and 共f兲 weak boundary layer theory. The
adsorption theory relates adhesion to the interatomic and in-
termolecular attractive forces and has found substantial ex-
perimental support. In the adsorption theory, the wetting of a
surface by the adhesive is a key factor in determining the
strength of the adhesive bond as described below. A detailed
discussion of the proposed alternative theories for adhesion
can be found in Refs. 17–19.
In adhesive wafer bonding, a polymer adhesive is placed
in between the bonded wafer pair, bearing the forces
FIG. 1. The energy content of covalent and two van der Waals bonds vs the
distance between atoms 共Ref. 19兲.
031101-5 Niklaus et al.
FIG. 2. 共a兲 Contact interface of two macroscopically flat solid surfaces, 共b兲
boundary layer of a solid surface and a liquid that is not wetting and 共c兲 one
that is wetting the surface 共Ref. 19兲.
involved to hold the wafer surfaces together. Wafer bonding
with polymer adhesives is, like most bonding techniques,
based on the fact that atoms and molecules adhere to each
other when they are brought in sufficiently close contact. For
atoms and molecules to adhere, they must be brought to a
distance of less than 0.5 nm. When an intermediate polymer
adhesive is used to join two solid-state surfaces, the polymer
adhesive deforms to fit the surfaces to be bonded. Polymer
adhesives are typically in a liquid or semiliquid phase during
part of the bonding process and wet the surfaces to be
bonded by flowing into the troughs of the surface profile.
The liquid polymer adhesive must then harden into a mate-
rial that is capable of bearing the forces involved to hold the
surfaces together. Wetting of the surfaces by the liquid or
semiliquid polymer adhesive is critical in adhesive bonding.
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J. Appl. Phys. 99, 031101 共2006兲
FIG. 3. Surface energy of different solid and liquid materials 共Ref. 19兲.
Figure 2共b兲 shows a schematic drawing of a liquid that does
not wet the surface and Fig. 2共c兲 shows a liquid that does wet
the surface. For wetting to occur, the solid surface must have
a greater surface energy than the liquid. The surface energy
is a result of unbalanced cohesive forces at the material sur-
face. A higher cohesive force between the atoms or mol-
ecules of a material correlates to a higher surface energy.19
The surface energies of different solid and liquid materials
are listed in hierarchical order in Fig. 3. A liquid can wet a
solid material only if placed on a lower level in Fig. 3, i.e., if
the liquid has a lower surface energy than the solid.
The degree of wetting of a surface with a liquid adhesive
can be reduced by surface contaminants, such as the weakly
adsorbed organic molecules or by condensed moisture. The
degree of wetting can also be influenced by the microscopic
surface profile and by dust particles on the surface. Clean
and contaminant free surfaces can be achieved with cleaning
procedure using solvents, oxidants, strong acids, or bases.
Surface pretreatment with adhesion promoters can signifi-
cantly improve the wettability of a surface. Adhesion pro-
moters typically consist of a very thin coating of a few
monolayers that bonds well to the surface and that enhances
the bonding of the polymer adhesive to the surface. Specific
adhesion promotes are often recommended by the material
suppliers for certain combinations of surface material and
polymer adhesive. A detailed discussion of surface energy
measurements and surface wettability can be found in Ref.
17.
The more complete the polymer adhesive flows into and
fills the troughs of a surface profile the better is the resulting
bond quality and the long-term stability of the bond. Polymer
adhesives that have low viscosity and low shrinkage during
hardening generally achieve better filling of the troughs of a
surface profile which decreases the amount of unfilled space
at the bond interface. Small molecules such as water or gas
molecules can creep or diffuse in the unfilled space at the
boundary layer between the adhesive and the surface and
may decrease the bond energy or affect the materials at the
boundary layer.
031101-6 Niklaus et al.
III. POLYMER ADHESIVES
Polymers are large molecules 共macromolecules兲 consist-
ing of large numbers of linked small molecules 共monomers兲.
The joining process of the monomers is called polymeriza-
tion. The molecular chains, typically 0.2– 1 nm wide and up
to several hundreds of nanometers long,20,21 and their inter-
nal structure determine the specific properties of polymers.
Polymers can be placed into the four broad material classes
共I兲 thermoplastics, 共II兲 thermosettings, 共III兲 elastomers, and
共IV兲 hybrid polymers. Thermoplastic polymers solidify by
cooling and can be remelted. Thermosetting polymers un-
dergo cross-linking to form a three-dimensional network and,
unlike thermoplastics, cannot be remelted or reshaped. How-
ever, they do flow for a short time when heated the first time
to achieve cross-linking. The distinguishing characteristics of
elastomeric materials are their ability to sustain large defor-
mations 共five to ten times the unstretched dimensions兲 with
relatively low stresses and their ability to spontaneously re-
cover their original shape without rupturing. Hybrid poly-
mers are alloys and blends of polymers from the three pre-
vious classes, which form materials whose properties and
characteristics can be quite different from the individual
components. In principle, polymers from all four material
classes can be used as adhesive materials.20,21
A. Hardening and polymerization of polymers
A polymer adhesive must exist in a liquid, semiliquid, or
viscoelastic phase during the adhesive bonding process to
achieve sufficiently close contact with the surfaces to be
bonded. The adhesive must then transform into a solid ma-
terial to achieve a lasting bond. The three basic ways for
polymer adhesives to harden and transform from a liquid
phase into a solid phase are19
• Polymers dissolved in water or in solvents harden
when the water or solvents are evaporated, are called
drying adhesives.
• Thermoplastic polymers melt when heated to their
melting temperature and solidify upon cooling below
their melting temperature, are called hot melts.
• Polymer precursors cure 共polymerize兲 by chemical re-
actions that form larger molecules or molecular chains,
with the polymer precursor either in a liquid phase
共e.g., resins兲 prior to curing or transform from a solid
into a liquid phase for some time during the curing
process. The curing process can be triggered or main-
tained by various mechanisms such as, e.g.,
共1兲 Mixing of two or more components (e.g., two-component
epoxies)
共2兲 Heating (e.g., many thermosetting adhesives and ep-
oxies)
共3兲 Illumination with light (e.g., UV light curable adhesives)
共4兲 Presence of moisture (e.g., some polyurethanes and cy-
anoacrylates)
共5兲 Absence of oxygen (e.g., anaerobic adhesives)
In practical cases, the above mentioned hardening and
curing principles are very often combined in various ways.
For example, solvent-based epoxies both dry and cure. Sol-
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J. Appl. Phys. 99, 031101 共2006兲
vents in thermosetting materials are often employed to real-
ize low viscosity adhesives, with the solvents evaporated be-
fore or during the curing 共polymerization兲 process. Another
example of combining the hardening and curing principles is
a two component adhesive for which the start of the curing
process is triggered with UV light illumination. The curing
process continues to proceed even after the UV light illumi-
nation is removed. Very often, the polymerization process of
UV curable polymers can be supported and intensified by
additional heat treatment. Tacky, pressure sensitive adhe-
sives, such as used on tapes, are highly viscous polymers that
deform and flow very slowly into surface troughs to bond to
a surface. These types of polymer adhesives remain highly
viscous, do not harden and provide comparably low bond
strength. Commonly used hardening methods for polymer
adhesives in the semiconductor industry are the evaporation
of solvents 共drying兲, thermal curing, two component curing,
UV light curing, and the combination of evaporation of sol-
vents together with thermal curing or UV light curing.20,21
B. General properties of polymers
Most polymers can be used as adhesive and a large num-
ber of polymer materials are commercially available that
have widely varying material properties and chemistries.20,21
Polymers typically have excellent cohesive properties and
adhere well to a large variety of substrate materials. In gen-
eral, polymers are hard and brittle, but soften when heated.
The transformation of a polymer from a hard 共glassy兲 state to
a rubberlike state is called the glass transition; the tempera-
ture at which this occurs is the glass transition temperature.
All polymers creep if influenced by a load, an effect
called the viscoelastic effect. The amount of creep is depen-
dent on the ambient temperature and the time during which
the load is present. Different types of polymers have differ-
ent creep strengths 共load-bearing capabilities兲.19–21
Polymers are subject to similar environmental concerns
as other materials such as glass and metals. They are affected
by chemicals, temperature, radiation 共ultraviolet and gamma
radiation兲, stress, and biological deterioration and thus, their
properties can change over time.19
Polymers are typically several orders of magnitude more
permeable to moisture than glass or metals as depicted in
Fig. 4.22 Water molecules with dimensions of slightly more
than 0.1 nm diffuse in the free space between the molecular
chains of polymers. Thus, polymers cannot be directly used
to achieve hermetically sealed cavities and bonds.19,22
Thermoplastic polymers have a useful temperature range
up to 200– 300 ° C and are limited at the low temperature
end by their brittleness. Thermoplastic polymers can be elon-
gated and deformed to a large extend when heated and if the
temperature is further increased, they are converted to a vis-
cous melt. Typically they have poor creep resistance but
good peel strength. Chemical resistance ranges from poor to
excellent depending on the polymer.19–21
Thermosetting polymers can operate at temperatures up
to 300– 450 ° C, are more rigid than thermoplastics, and gen-
erally offer better chemical resistance. Cross-linked thermo-
setting polymers cannot flow but continue to soften until
031101-7 Niklaus et al.
FIG. 4. Times scale for moisture to penetrate inside various materials 共Ref.
22兲.
degradation occurs when exposed to increasing temperatures.
Typically they have good creep resistance but only fair peel
strength.19–21
Elastomeric polymers can operate over a broad tempera-
ture range up to about 260 ° C. They have high peel strength,
low overall strength, and high flexibility. Chemical resistance
is variable depending on the elastomer.19–21
Hybrid polymers can have the properties of all the other
material classes but with a more balanced combination.
Some high performance polymers, e.g., polybenzimidazoles
共PBI兲, can survive temperatures of up to 760 ° C for short
times without degradation. Specialized polymer adhesives
can have very low water absorption and are comparably
good diffusion barriers for moisture.19–21
C. Deposition of polymers on wafer surfaces
Most applications for adhesive wafer bonding in micro-
electronics and MEMS require uniform thicknesses of the
intermediate bonding material of 0.1– 100 ␮m. There are
several ways to obtain uniform polymer layers in this thick-
ness range. The most common method in electronic and
MEMS fabrication technology is the spin coating of a liquid
polymer precursor on a wafer.13 The viscosity of the polymer
precursor and the spin speed of the wafer determine the re-
sulting layer thickness. Highly uniform coatings with very
well defined thicknesses and smooth surfaces can be
achieved.
The spray coating,23 electrodeposition,24 stamping,16
screen printing,19 brushing,19 and dispensing15 of liquid poly-
mer precursors are alternative methods that are relatively
easy to use. However, these methods often do not achieve the
uniformity and thickness control of spin-coated layers. A less
frequently used method to deposit thin polymer films is
chemical-vapor deposition.24 Some polymers are available as
thin films or sheets.20,21 These films can be laminated to a
wafer surface. The thickness uniformity of laminated poly-
mer layers depends on the tolerances of the films as delivered
from the material supplier.
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J. Appl. Phys. 99, 031101 共2006兲
D. Polymer adhesives for wafer bonding
Several aspects must be considered when selecting a
polymer adhesive for a specific adhesive wafer bonding ap-
plication. Selection of previously accepted polymer materials
eases incorporation of any industrial process, particularly in
the electronic industry. In particular, good availability, mini-
mum material and process incompatibilities, and applicable a
priori characterization can be expected. The polymer adhe-
sive, including the solvents and impurities involved must be
compatible with the wafer surface materials, with devices
that are integrated in the wafer surfaces 共e.g., CMOS cir-
cuitry兲, as well as with the previously deposited films, and
subsequent processing procedures. Many material suppliers
offer adhesion promoters together with their polymer mate-
rials to enhance the adhesion between specific substrate ma-
terials and polymer adhesives. The physical properties of
polymer adhesives, such as thermal stability, mechanical sta-
bility, and creep strength have to be considered when choos-
ing a polymer for an adhesive wafer bonding application.
The chemical resistance to acids, bases, or solvents is an-
other important factor that must be considered. Many pro-
cesses in electronic and MEMS fabrication technologies in-
volve solvents and enchants to which the polymer adhesive
may be exposed. In applications where the polymer adhesive
remains as a functional material on the device, chemical sta-
bility and aging effects are critical. In applications where the
wafer bonding is of temporary nature, the polymer adhesive
at the bond interface should be easily etchable or dissolvable.
In these cases the long-term stability and aging effects of the
polymer are not very crucial.
Table III lists some polymer adhesives that have been
proposed for adhesive wafer bonding for various application
areas.13–16,25–223 In general, semiconductor wafers are not po-
rous or permeable to liquids and gases. If volatile substances,
such as solvents or water, evolve from the polymer adhesive
during the hardening process, they cannot escape the thin
bond line in between the wafers. The volatile substances get
trapped as voids and deteriorate the bond interface. Thus, the
polymer adhesives that use the evaporation of solvents or
water for hardening during bonding are generally not suit-
able for adhesive wafer bonding applications. The same is
true for the polymer adhesives that outgas or otherwise pro-
duce by-products during the hardening process after the wa-
fers are joined.13,70 For example, many polyimide coatings
used by the electronic industry produce water vapor as by-
product during the curing 共imidization兲 process.13,55,70 Thus,
only thermoplastic polyimides, which are being fully imi-
dized prior to wafer bonding and that can melt again during
the bonding process will provide void-free bond interfaces.
For polymer adhesive in which the evaporation of solvents or
water does not occur in the final hardening step, the evapo-
ration can be done before the wafers are joined for bonding.
However, it is important that the volatile substances, such as
water, are not created during the final curing process of the
polymer adhesive after the wafers are joined.13,70
Drying or outgassing polymer adhesives may be used for
adhesive wafer bonding applications if at least one of the two
bonded substrate materials are permeable to moisture216 or if
031101-8 Niklaus et al. J. Appl. Phys. 99, 031101 共2006兲

TABLE III. Polymers for adhesive wafer bonding.

Polymer adhesives Features References

Epoxies - thermosetting materials 25, 27, 29, 33–35, 39, 40, 46, 48, 69, 91, 150, 151, 158, 197,
- thermal curing and 190, 209, and 220
two component curing
- strong and chemically stable
bond

UV epoxies 共e.g., SU8兲
- thermosetting materials 15, 42, 47, 57, 66, 78, 80, 85, 89, 109, 111, 127, 139, 150, 151,
- UV curing 共one of the substrates 158, 161, 162, 170, 173, 184, 190, 211, 213, 214, and 218
has to be transparent to UV light兲
- strong and chemically stable bond
- bonding with patterned films

Positive photoresists - thermoplastic materials 13, 41, 59, and 70

- hot melt
- void formation at the bond
interface, weak bond

Negative photoresists
- thermosetting materials 13, 27, 31, 41, 59, 70, 73, 75, 89, 107, 112, and 147
- thermal curing and UV curing
- weak bond
- low thermal and chemical
stability
- bonding with patterned films

Benzocyclobutene 共BCB兲
- thermosetting materials
- thermal curing
- high yield on wafer scale
- very strong, chemically and
thermally stable bond
- bonding with patterned films
13, 14, 16, 49, 59, 60, 62, 65, 68, 70–72, 76, 77, 82–84, 87, 88,
94, 96, 97, 101, 106, 108, 113, 114, 116–120, 129, 132, 133,
136–138, 142, 143, 145, 152, 159, 160, 164–167, 175–188, 181,
182, 189, 194, 196, 198–200, 202, 203, 205, 207, 208, 210, and
212

Flare - thermosetting materials 14, 84, and 97

- thermal curing
- high yield
- bonding with patterned films

Polymethylmeth- - thermoplastic materials 28, 30, 122, 139, 171, 186, 191, and 221
acrylate 共PMMA兲 - hot melt

Polydimethylsiloxane - elastomeric materials 32, 54, 155, 157, 174, 206, 216, and 217
共PDMS兲 - thermal curing

Fluoropolymers - thermoplastic and 53, 58, and 92

thermosetting materials
- thermal curing or hot melt
- chemically very stable bond
- bonding with patterned films

Polyimides - thermosetting and 13, 27, 33, 36–38, 55, 59, 70, 98, 123, 28, 156, and 163
thermoplastic materials
- thermal curing and hot melt
- void formation during
imidization process
- mainly chip-scale process
- bonding with patterned films

Methylsilsesquioxane - thermosetting materials 62

共MSSQ兲 - thermal curing
- very strong, chemically and
thermally stable bond
- void formation during curing
process

Polyetheretherketone - thermoplastic materials 26

共PEEK兲 - hot melt

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031101-9 Niklaus et al. J. Appl. Phys. 99, 031101 共2006兲

TABLE III. 共Continued.兲

Polymer adhesives Features References

Thermosetting - thermosetting materials 67

copolyesters 共ATSP兲 - thermal curing

Thermoplastic - thermoplastic materials 88

copolymers 共PVDC兲 - hot melt

Parylene - thermoplastic materials 104, 125, 168, 169, 185, 204, and 222
- hot melt

Liquid-crystal - thermoplastic materials 110

polymer 共LCP兲 - hot melt
- very good moisture barrier
- not available as a liquid
polymer precursor

Waxes - thermoplastic materials 33 and 57

- hot melt
- low thermal stability
- mainly for temporary bonds

the ventilation channels are incorporated in the bond
line,36,55,90,128 allowing the volatile substances from the bond
interface to be discharged.
Thermal curing of thermosetting polymers13,70 or melt-
ing of thermoplastic polymers90,128 are suitable techniques
for polymer bonding of wafers that consist of identical ma-
terials or wafers that consist of materials with similar coef-
ficients of thermal expansion. When two wafers with dis-
similar materials with different coefficients of thermal
expansion are bonded, the bonded wafer stack bends after
cooling down to room temperature since the wafer bond is
created at an elevated temperature. The wafer with the higher
coefficient of thermal expansion is expanded more and con-
sequently shrinks more during the cooling to room tempera-
ture than the wafer with the lower coefficient of thermal
expansion. The resulting stresses in the wafer stack at room
temperature can bend and even crack the wafers. Large co-
efficient of thermal expansion differences of the substrate
materials and high bonding temperatures increase this effect.
For example, bonding at room temperature with two compo-
nent or UV-curable epoxies can prevent thermally induced
stresses. However, when using UV curable polymer adhe-
sives at least one of the substrate materials must be transpar-
ent to UV light.15,42,57,111,170,173
If the polymer adhesive is in a solid or gel-like state
prior to the curing process and if curing of the polymer is
promoted by curing parameters other than time only, wafers
with deposited adhesives coatings can be stored in between
the adhesive deposition process and the bonding process.
Polymer adhesives with such characteristics are thermoplas-
tic polymers or solvent-based thermosetting polymers
共B-stage polymers兲 that are in a solid or gel-like state after
the solvents are evaporated. Polymer adhesives that work
specifically well for adhesive wafer bonding applications are
B-stage polymers 关e.g., benzocyclobutene 共BCB兲 and
SU8兴13–15,49,60,66,158 and most thermoplastic adhesives 关e.g.,
Polymethylmeth-acrylate 共PMMA兲, copolymers and
waxes兴.28,30,33,57,122,139,171,186,191
IV. ADHESIVE WAFER BONDING TECHNOLOGY
Most applications of adhesive wafer bonding require
well defined and high yield bond interfaces and often precise
alignment of the bonded wafers. To achieve the bonding re-
sults with repeatable high quality, the bonding process and
parameters, as well as wafer-to-wafer alignment where re-
quired, must be precisely controlled. Bonding parameters
such as bonding pressure, bonding temperature, chamber
pressure, and temperature ramping profile have significant
impact on the resulting bonding quality and defect density.
The influence and mechanisms of the adhesive wafer bond-
ing parameters are presented in this section, along with a
brief description of the commercial equipment available for
both the wafer bonding and wafer alignment. Examples of
bonding procedures and suitable bonding parameters for wa-
fer bonding with unpatterned polymer adhesives and for wa-
fer bonding with patterned polymer adhesives 共selective or
localized bonding兲 are presented.
A. Wafer bonding tools and wafer-to-wafer alignment
techniques
A wafer bonder typically consists of a vacuum chamber,
a mechanism for joining the wafers inside the vacuum cham-
ber, a wafer chuck, and a bond tool. Figure 5共a兲 shows sche-
matic drawings of a typical commercial wafer bonder. The
wafer stack is placed between the bottom wafer chuck and
the bond tool. Thus, the wafer stack can be pressed together
with the bond tool using a controlled pressure 共force per
wafer or bond area兲. The wafer stack can be heated through
the bottom wafer chuck and the top chuck 共bond tool兲. The
top chuck can be a stiff flat plate or stiff flat plate with a soft
plate or sheet in between the top chuck and the wafer stack.
Soft plates or sheets typically adapt better to the nonunifor-
mities of the wafer stack and thus distribute the pressure
more evenly over the wafer stack.
The leading suppliers of wafer bonding equipment pres-
ently are Electronic Vision Group 共Austria兲 and Karl Suss

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031101-10 Niklaus et al.
FIG. 5. Schematic drawings of 共a兲 a commercial wafer bonder and 共b兲 a
substrate lamination tool.
AG 共Germany兲, with equipment also available from AML
共United Kingdom兲 and Ayumi 共Japan兲. Logitech 共United
Kingdom兲 and Dynatex 共USA兲 offer substrate lamination
tools that are typically used for temporarily laminating sub-
strates on handling wafers, for chemical mechanical polish-
ing 共CMP兲 and wafer grinding processes. A substrate lami-
nation tool typically consists of a low-pressure chamber with
a hotplate as bottom chuck and an elastic top membrane as
shown in Fig. 5共b兲. The top membrane can be gas-
pressurized and thus, applies pressure to the wafer stack on
the hotplate. While the substrate lamination tools do not al-
low precise wafer-to-wafer-aligned bonding and are usually
restricted to bonding temperatures below 200 ° C, the com-
plexity and cost of ownership of the substrate lamination
tools are significantly lower than those of traditional wafer
bonders. Printed circuit board lamination tools have also
been used for adhesive wafer bonding.209
For many adhesive wafer bonding applications, accurate
alignment is essential between the bonded wafers. Different
techniques have been implemented for precise wafer-to-
wafer alignment during bonding.13,106,123,163,198,200,205,223–227
Commonly used wafer alignment techniques are 共a兲 wafer
backside alignment with digitized image, 共b兲 the Smart-
View® method, 共c兲 intersubstrate microscope, 共d兲 infrared
共IR兲 transmission microscopy, 共e兲 transparent wafer and op-
tical microscope, and 共f兲 through-wafer holes and optical mi-
croscope. Figures 6共a兲–6共f兲 shows schematic views of these
wafer-to-wafer alignment mechanisms.226
For wafer backside alignment as shown in Fig. 6共a兲, one
wafer has alignment keys on the wafer side that faces the
bond interface 共wafer frontside兲, while the second wafer has
the alignment keys on the wafer side that faces away from
the bond interface 共wafer backside兲. These alignment keys
are aligned to structures at the front side 共wafer side that
faces towards the bond interface兲 of the same wafer. An im-
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J. Appl. Phys. 99, 031101 共2006兲
FIG. 6. Techniques for precise wafer-to-wafer alignment 共Ref. 226兲.
age of the alignment keys of the first wafer is digitized and
stored. The second wafer is superimposed and alignment to
the alignment keys on the digitized image.
For the SmartView® method as shown in Fig. 6共b兲, a
pair of top and bottom side microscopes in combination with
a precision alignment stage are used to align the wafers.
First, the positions of the top and bottom microscopes are
calibrated. The top wafer is then moved between the micro-
scopes and the alignment key position is registered and
stored by the bottom microscope. After the top wafer is re-
tracted, the bottom wafer is brought in between the micro-
scopes and aligned to the existing digitized image of the top
wafer. Finally, the two wafers are automatically moved into
alignment by calculating the relative X and Y locations of the
alignment keys on each wafer and moving the wafers into
the final alignment position.
For alignment with an intersubstrate microscope, the in-
tersubstrate microscope is inserted in between two wafers
and can view simultaneously both the top and bottom wafer
surfaces with the alignment keys 关see Fig. 6共c兲兴. After the
wafers are aligned relative to each other, the intersubstrate
microscope is retracted and then the wafers are moved in
vertical direction to join the wafer surfaces.
For infrared transmission microscopy as shown in Fig.
6共d兲, an infrared light source is placed on one side and an
infrared imaging sensor is placed on the opposite side of a
wafer pair. The alignment keys at the wafer surfaces are
visible in the infrared image and thus, the wafers can be
aligned relative to each other. This method can only be used
if both wafers are transparent in the infrared spectrum. In
order to get good image quality, the wafer surfaces should be
polished and the metal lines or patterned surfaces need to be
avoided in the alignment areas.
031101-11 Niklaus et al.
If at least one of the wafers is transparent in the visible
light spectrum, an optical microscope can be used to view
the alignment keys at the wafer surfaces and thus, the wafers
can be aligned relative to each other 关see Fig. 6共e兲兴.
Through wafer via holes can be fabricated 共e.g., by deep
etching兲 in one of the wafers. An optical microscope can be
used to view the alignment keys at the wafer surfaces and
thus, the wafers can be aligned relative to each other 关see
Fig. 6共f兲兴.
The above described wafer-to-wafer alignment schemes
are typically executed on dedicated wafer alignment tools.
After aligning the wafers relative to each other, they are
clamped on a transport fixture. The transport fixture is trans-
ferred from the alignment tool to the bond chamber, where
the bonding process takes place as described in Sec. IV B.
The transport fixture may or may not provide spacers that are
placed between the wafers to prevent them from becoming
attached to each other outside the bond chamber. Some bond
tool suppliers have implemented wafer-to-wafer alignment
mechanisms directly in the bond tool, although a long bond-
ing time makes a cluster tool more attractive in high-volume
manufacturing.
All of the above mentioned alignment techniques can be
used in combination with adhesive wafer bonding. Currently
achievable wafer-to-wafer alignment accuracies with some
of these techniques are in the range of 1 ␮m in laboratory-
environments and in the range of 2 – 3 ␮m for device fabri-
cation. Wafer-to-wafer alignment capabilities below 1 ␮m
should be achievable with additional equipment and process
development.224–226 However, the adhesive wafer bonding
based on softening, deforming, and hardening of the interme-
diate polymer adhesives may cause additional problems for
the achievable postbond wafer-to-wafer alignment accuracy.
When the wafer stack is pressed together with the bond tool
during the bonding process, shear forces acting in parallel to
the bond line almost inevitably occur. If the polymer adhe-
sive obtains a low viscous phase during the bonding process,
these shear forces result in the wafers shifting relative to
each other. Although the initial alignment accuracy between
the wafers may be 1 – 3 ␮m before the bonding, the wafer-
to-wafer alignment during the adhesive bonding process can
increase significantly 共⬎10 ␮m兲. To prevent such a large
alignment shift while the intermediate polymer is in a low
viscous state, surface structures, which create additional
friction,13,105 mechanical interlocking structures,123,163 or self
alignment structures13,223 that interlock the wafers, can be
introduced at the bond interface. Partially cross-linked ther-
mosetting polymer adhesives, which do not reflow and trans-
form into a low viscous phase during the bonding process,
can also be used to prevent bonding-induced
misalignment.198,200,205
Wafers that consist of dissimilar materials expand to a
different degree when heated. At a temperature increase of
100 ° C, the difference in thermal expansion between two
wafers consisting of dissimilar materials can be several tens
of micrometers 共e.g., for silicon and gallium arsenide wa-
fers兲. To accurately align and bond wafers that consist of
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J. Appl. Phys. 99, 031101 共2006兲
dissimilar materials either their coefficients of thermal ex-
pansion must match or the polymer bonding must be per-
formed near room temperature.198,205
B. Adhesive wafer bonding processes
Table IV describes a typical process scheme for wafer
bonding with an intermediate polymer adhesive. The process
flow involves the use of wafer or substrate bonding tool and
applies generally to the bonding with thermoplastic polymer
adhesives and with uncured 共soft baked兲 or to partially cured
thermosetting polymer adhesives. Adhesive wafer bonding
schemes that use UV light curable
adhesives15,42,57,111,170,173,218 or special surface activation of
the adhesive prior to wafer bonding215–217 typically consist of
slightly modified process schemes.
The bond strength and the amount of void or defect for-
mation at the bond interface in adhesive wafer bonding is
influenced by the polymer adhesive, wafer materials, size
and amount of particles at the wafer surfaces, wafer surface
topography, polymer thickness, bonding pressure, degree of
precuring 共level of polymerization兲 of the polymer adhesive,
wafer thickness, polymer curing conditions, and atmospheric
condition in the bond chamber before wafer bonding. All
these bonding parameters and their qualitative influences on
the resulting bond quality are listed in Table V.
1. Adhesive wafer bonding with unpatterned adhesive
layers
In the following example, an adhesive wafer bonding
process with a self-contained dry-etch BCB coating is de-
scribed that creates very strong, durable, and defect-free
bonds. The thermosetting polymer BCB was selected in this
example for its excellent properties as adhesive material and
because it is a material widely used in the semiconductor
industry.
The adhesive bonding process starts out by applying
BCB with the required layer thickness on one or both wafer
surfaces to be bonded using spin coating. Prior to applying
the BCB coating, the wafer surface may be cleaned and an
adhesion promoter may be applied. Next, the BCB coatings
are soft baked at a temperature between 100 and 170 ° C for
a few minutes to remove the solvents. Soft baking at these
temperatures does not significantly increase the cross-linking
level of the BCB coatings.13,60,72,108,198,200,205 The wafers are
placed on the bond fixture and transferred to the bond cham-
ber. After the bonding process is started, the bond chamber is
evacuated to an atmosphere of about 10−3 mbar. Then a
bonding pressure of about 0.2– 0.5 MPa is applied with the
bond tool and the wafer stack is heated. The curing tempera-
ture of dry-etch BCB layers can be chosen between 200 and
300 ° C with the curing time dependent on the curing tem-
perature. A curing temperature of 250 ° C requires a curing
time of about 1 h. During the curing process, the BCB coat-
ing reaches a low viscous phase while cross-linking, com-
pensating extremely well for topographic features on the wa-
fer surfaces and achieving very strong and durable
031101-12 Niklaus et al.
TABLE IV. Typical process steps for adhesive wafer bonding 共Refs. 13, 14, 70, and 205兲.
No. Process step
1 Cleaning and drying of the wafers.
2 Treating the wafer surfaces with an adhesion promoter
共optional兲.
3 Applying the polymer adhesive to the surface of one or both
wafers; patterning the polymer adhesive 共optional兲.
4 Soft baking or partially curing of the polymer.
5 Placing the wafers in the bond chamber, establishing a vacuum
atmosphere, and joining the wafers inside the bond chamber.
6 Applying pressure to the wafer stack with the bond tool.
7 Remelting or curing the polymer adhesive while applying
pressure with the bond tool.
8 Chamber purge, cool down, and bond pressure release.
bonds.13,60,72,192 Soft-baked and partially cured BCB coatings
can be stored several days or weeks in particle-free environ-
ments before the actual wafer bonding is performed without
compromising the bonding results. Substrates with diameters
of up to 200 mm have been successfully bonded using BCB
in combination with the presented bonding
parameters.13,14,70,84,96,192
Figure 7 shows the bond interfaces of a 200-mm-diam
bonded wafer pair in which the top wafer has been sacrifi-
cially removed to expose the BCB adhesive layer. The color
fringes at the wafer surface result from small BCB thickness
variations that result form BCB reflow during the wafer
bonding process. If the BCB is partially cured prior to the
wafer bonding process, the thickness variations of the BCB
adhesive after bonding can be reduced dramatically since the
partially curing of the BCB does not reflow during wafer
bonding.198,200,205
2. Adhesive wafer bonding with patterned adhesive
layers
Selective or localized adhesive wafer bonding is
achieved by applying the polymer adhesive only on areas
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J. Appl. Phys. 99, 031101 共2006兲
Purpose of the process step
Remove particles, contaminations, and moisture from the wafer
surfaces.
Adhesion promoters can enhance the adhesion between the
wafer surfaces and the polymer adhesive 共see Sec. II兲.
The most commonly used application method is spin coating.
Alternative application methods are described in Sec. III C.
Polymer patterning is described below in Sec. IV B.
Solvents and volatile substances are removed from the polymer
coating. Thermosetting adhesives should not be polymerized, or
may only be partially polymerized. Thermoplastic adhesives
may be completely polymerized, since they can be remelted to
achieve bonding.
The wafers are joined in a vacuum atmosphere to prevent voids
and gases from being trapped at the bond interface. The vacuum
atmosphere can also be established after the wafers are joined,
as long as trapped gases at the bond interface can be pumped
away before the bond is initiated.
The wafer and polymer adhesive surfaces are forced into
intimate contact over the entire wafer. For thermosetting
polymer adhesives, the bonding pressure should be applied
before the curing temperature is reached. If thermoplastic
polymer adhesives are used, the bond pressure can be applied
after the bonding temperature is reached.
The hardening procedure depends on the curing mechanism of
the used polymer adhesive as described in Sec. III A. The
reflow of the polymer adhesive is typically triggered through
elevated temperature.
End bonding process. The sequence of chamber purge, bond
force release, and cool down is largely interchangeable.
However, when thermoplastic polymer adhesives are used, the
cool down should happen before the bond pressure release. This
is to solidify the polymer adhesive before the bond pressure is
released.
where bonding desired13,16,36,44,50,51,55,56,77,79,80,85,88,89
is
95,108,111,122,132,142,150–152,170,171,173,178,184,189,193,194,210,213,218
or
by locally heating the bond interface with integrated heaters
at the wafer surfaces to create local bonding at the desired
areas.79,90,128 Methods to place the polymer adhesive only on
certain wafer areas are spraying with a shadow mask, local
dispensing, screen printing, and stamping of a liquid polymer
precursor. The lamination of a polymer sheet that is patterned
by local punching, or cutting with a water jet or laser is
another suitable way to apply a polymer adhesive only on
certain wafer areas. All these methods have limitations con-
cerning the polymer thickness control and the smallest
achievable feature sizes of the bonded and
unbonded areas. To achieve very precise dimensions of the
areas to be bonded, the intermediate polymer adhesive can
be patterned with the use of
photolithography.13,16,65,77,88,108,184 Suitable techniques are
polymer etching with a lithographically defined mask or the
use of photosensitive polymers. Other alternatives for poly-
mer patterning with the help of lithographic techniques are
lift-off processes and selective polymer deposition.
031101-13 Niklaus et al. J. Appl. Phys. 99, 031101 共2006兲

TABLE V. Influence of various bonding parameters on bond defects 共Refs. 4, 13, 14, 60, 70, 72, and 205兲.

Bonding
parameter Influence on bond defects Importance

Polymer - The intermediate polymer adhesive must not release Very high
adhesive and solvents or by-products during the hardening process if
wafer materials the wafer materials are not permeable to gases. Volatile
substances get trapped as voids at the bond interface if
they evolve from the polymer adhesive after the wafers
are joined.
- The polymer adhesive must provide sufficient wetting
of the wafer surfaces and flow or achieve a
viscoelastic state during the bonding process.
- The wafer materials must be compatible with the
bonding process 共e.g., temperatures, UV light
transparency兲.

Amount and - Particle-free surfaces are key to good bonding results. Very high
size of particles Particles at the wafer surface that are larger than the
at wafer thickness of the polymer adhesive may cause bonding
surfaces, wafer defects or extended unbonded areas.
surface - If the wafer surface topography is high compared to
topography, and the thickness of the polymer layer, unbonded areas can
adhesive result. The polymer reflow and the wafer deformation
thickness may not compensate for the topographic features on the
wafer surface.
- The use of very thin 共1 ␮m兲 polymer layers more
likely results in unbonded areas than the use of thicker
polymer layers. Thin polymer layers compensate for
surface nonuniformities and particles at the bond
interface to a lesser extend.

Bonding - The bonding pressure facilitates deformation of the High

pressure/force intermediate polymer adhesive and the wafers, and
brings the surfaces in sufficiently close contact to
achieve bonding.
- High bonding pressures increase the conceivable
deformation of the polymer adhesive and the wafers.
However, excessive bonding pressures may cause high
stress. Thus, structures that are present on the wafers
can be destroyed or the wafers may crack.
- The bonding pressure that is introduced to the wafer
stack should be uniform to avoid differences in the
resulting thickness of the intermediate polymer material.
Polymer adhesives tend to flow from areas of higher
pressure towards areas of lower pressure while they are
in a liquid phase.

Polymerization - Thermosetting polymer adhesives should be High

level of the unpolymerized or partly polymerized prior to bonding.
polymer If the amount of polymerization before creating the
adhesive bond is too high, the polymer adhesive does not deform
and adapt sufficiently to the wafer surfaces.
- For thermoplastic polymer adhesives the amount of
polymerization before the bonding is not decisive. They
remelt during the bonding process to achieve bonds
between the surfaces.

Wafer - Thin wafers are more easily deformed by the bonding Medium
thickness pressure to compensate to surface nonuniformities at the
bond interface and thus, less stress is introduced at the
bond interface.

Polymer curing - The bonding temperature and the temperature ramping Medium
conditions cycles have to be adjusted to the requirements of the
used polymer adhesive.

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031101-14 Niklaus et al. J. Appl. Phys. 99, 031101 共2006兲

TABLE V. 共Continued.兲

Bonding
parameter Influence on bond defects Importance

- Very fast temperature ramping cycles may cause nonuniform

and incomplete heating of the wafer stack, leading to
incomplete adaptation of the intermediate polymer adhesive to
the wafer surfaces and resulting in excessive stress, unbonded
areas, and delamination of the bond interface.
- If two wafers consisting of materials with large coefficient of
thermal expansion differences are bonded, large stresses
between the bonded wafers can occur. These stresses can lead
to delamination of the bond and to bending and cracking of
the wafers.

Atmospheric - Gas pressure in the bond chamber of 100 mbars or lower Medium
condition in the while joining the wafers is typically sufficient to prevent
bond chamber gasses from being trapped at the bond interface.
before the - If wafers are joined and bonded at atmospheric pressure,
wafer bonding small bubbles or larger voids of gas can get trapped at the
is initiated bond interface. The trapped gases mark unbonded areas, which
can expand if the wafer stack is heated and thus, significantly
deteriorate the bond quality.

The patterned polymer adhesive has to remain sufficiently
firm during the bonding process to retain the shape of the
patterned structures and must be deformable to adapt to the
wafer surfaces. If the polymer adhesive is too firm during the
bonding process, some areas of the wafer cannot wet, which
results in incomplete bonding. If the polymer adhesive be-
comes too low viscous, the lithographically defined polymer
structures lose their shape and start flowing during the bond-
ing process. Thus, the bonded wafer areas become larger
than the initially defined areas and the resulting gap width
between the two wafer surfaces, defined by the polymer
thickness, decreases in an uncontrolled way.16,77,108 In the
adhesive wafer bonding with patterned adhesive layers, the
effective bonding pressure is typically the applied bonding
force divided by the sum of the areas to be bonded.
In the following example, detailed process parameters
for wafer bonding with a patterned BCB coating for local-
ized adhesive bonding is described.13,16,77,108 The thermoset-
FIG. 7. Bonded wafer pairs 共200 mm diameter兲 in which the top wafer has
been sacrificially removed to expose the BCB adhesive layer. The color
fringes result from BCB thickness variations. No color fringes can be ob-
served on wafers bonded using partially cured BCB, indicating uniform
BCB thickness 共⬍0.5% 兲 共Refs. 198, 200, and 205兲.
ting polymer BCB was selected. The deformability during
bonding of thermosetting polymers such as dry-etch BCB
and photosensitive BCB can be influenced by their degree of
polymerization prior to bonding. The BCB polymerization
levels of 40%–60% prior to the bonding have shown to be
suitable for achieving complete bonding between the BCB
coating and a wafer surface. Nevertheless, these BCB coat-
ings are sufficiently firm to retain the patterned structures
during the bonding process. The selective or localized BCB
bonding process starts out by cleaning the wafer surfaces,
applying an adhesion promoter and spin-coating dry-etch
BCB layers to one or both wafers. The BCB coatings are
precured at temperatures between 190 and 200 ° C for
30 min in an oxygen-free atmosphere, which increases the
polymerization level of the BCB coating from 35% 共as de-
livered from the material supplier兲 to nearly 50%. The BCB
coating is patterned using reactive ion etching 共RIE兲 and
applying photoresist as the masking material. A detailed pro-
cess description for patterning of dry-etch BCB can be found
in Refs. 77, 108, and 227. Next, the wafers with the pat-
terned BCB coatings are placed on the bond fixture and
transferred to the bond chamber. After initiating the bonding
process, the bond chamber is evacuated to an atmosphere of
about 10−3 mbar. Then a bonding pressure of approximately
0.4 MPa is applied with the bond tool and the wafer stack is
heated. The curing temperature of dry-etch BCB layers can
be chosen between 200 and 300 ° C with the curing time
dependent on the curing temperature. A curing temperature
of 250 ° C requires a curing time of about 1 h. Figure 8
shows a glass wafer that is selectively bonded to a silicon
wafer using lithographically patterned dry-etch BCB as the
polymer adhesive. The dark areas on the photo are bonded
and the light areas are unbonded cavities.
V. BOND CHARACTERIZATION
The quality of a wafer bond can be described by defect
rate, bonding strength, hermeticity, induced stresses in the

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031101-15 Niklaus et al.
FIG. 8. Glass wafer that is selectively bonded to a silicon wafer using
lithographically patterned dry-etch BCB as the polymer adhesive. The dark
areas are bonded and the light areas are unbonded 共Refs. 77 and 108兲.
wafer and adhesive materials, and stability towards harsh
environments. A number of nondestructive and destructive
techniques can be used to characterize a bond. The most
common techniques are bond interface imaging, bond
strength measurements, and bond hermeticity measurements.
A. Bond interface imaging
Useful imaging methods for wafer bond characterization
are the bonding of glass wafers, infrared transmission, x-ray
topography, acoustic microscopy, interface etching, and
cross-sectional analysis.4–6,13,17,18 The former four methods
are nondestructive while the latter two are destructive meth-
ods.
If one of the bonded wafers is transparent to visible light
共e.g., a glass wafer兲 the bond interface can be inspected di-
rectly or with optical microscopy. This inexpensive and effi-
cient method is especially useful in the adhesive wafer bond-
ing since the bond defects in adhesive wafer bonding are
usually not dependent on the wafer materials. However, wa-
fer surface and wafer edge effects important in semiconduc-
tor manufacturing are not duplicated with a transparent wafer
used for bond defect characterization.
In infrared transmission imaging the bonded wafers are
located between an infrared source and an infrared sensitive
camera, with defects at the bond interface displayed as con-
trasts in the infrared image. Infrared transmission can only be
used if all wafer materials are transparent to infrared light
共e.g., silicon兲. However, this comparably simple, fast, and
inexpensive technique has limitations in the lateral resolution
of defects, particularly if any interfaces are not smooth 共e.g.,
the nonpolished backside of silicon wafers兲.
X-ray topography is a comparably expensive and time
consuming method used to obtain an image of deviations
from ideal, undistorted lattice planes. X-ray topography can
only be applied to single-crystalline materials, but has a typi-
cal spatial resolution of 2 – 20 ␮m 共much better than that of
the infrared transmission techniques兲.
Acoustic microscopy is based upon the acoustic wave
propagation through solid-state materials. Since the scatter-
ing of acoustic waves depends on changes in elastic proper-
ties of the material, voids, and defects at a bond interface can
be readily detected. Depending on the frequency range used,
the resolution of acoustic microscopy can approach 10 ␮m.
The equipment is relatively expensive and the measurements
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J. Appl. Phys. 99, 031101 共2006兲
FIG. 9. Schematics of bond strength measurement techniques 共Refs. 4, 13,
and 14兲.
are performed in water or in another liquid. Acoustic micros-
copy measurements are easy to operate, fast, and applicable
to practically all materials.
In the interface etching, one of the bonded wafers is
sacrificially etched to a thin etch-stop layer with a suitable
etching technique. Voids and defects can be visually in-
spected through the thin etch-stop layer using optical micros-
copy. If larger defects are present at the bond interface the
etch-stop layer buckles or bursts open, indicating unbonded
areas. For silicon wafers the interface etching can be per-
formed using wet etching or deep reactive ion etching
共DRIE兲; silicon dioxide 共SiO2兲 is typically used as the etch-
stop layer. This technique is particularly attractive with SOI
starting wafers.
Cross-sectional analysis of a bond interface is done by
cleaving or dicing a bonded wafer pair perpendicular to the
bond interface. The cross section of the bond interface is
inspected using optical microscopy, scanning electron mi-
croscopy 共SEM兲, or focused ion beam milling in combina-
tion with scanning electron microscopy 共FIB/SEM兲. Cross-
sectional analysis is especially useful for the inspection of
bonds with thin intermediate bonding materials such as ad-
hesives.
B. Bond strength measurements
Figure 9 illustrates five bond strength measurement tech-
niques that are useful for wafer bond
characterization,4–6,13,14,17,18 all of which are destructive
techniques. The tensile load test measures the tensile strength
of a bond, while the crack opening test, the blister test and
the four-point bending test measures the surface energy of a
031101-16 Niklaus et al.
bond. A mathematical correlation between the tensile
strength and the surface energy is not established.
In the tensile and shear load measurements, bonded
samples are pulled apart as illustrated in Fig. 9共a兲 while mea-
suring the load necessary for destroying the bond. The tensile
strength of a bond equals the tensile forces at the time of
fracture divided by the bond area of the sample. Load mea-
surements are typically performed on strain test machines,
with Fig. 9共b兲 depicting a setup for tensile strength measure-
ments of bonds between a thick substrate and a thin film.
In the crack opening test, also referred to as razor blade
test, a blade of a defined thickness is introduced in between
the bonded wafers as illustrated in Fig. 9共c兲. The length of
the resulting crack can be measured with infrared inspection
and gives a measure of the surface energy keeping the wafers
together. The crack opening method cannot be used if the
bond is too strong to introduce the blade without cracking
one of the bonded wafers.
A schematic drawing of the blister test or pressure burst
test is shown in Fig. 9共d兲. The test sample consists of two
bonded wafers with one wafer containing a hole. Hydrostatic
oil pressure is applied through the wafer hole while the wafer
containing the hole is fixed to the surface underneath. The
pressure at which the bond cracks gives a measure of the
surface energy of the bond.
In the four-point bending test, a precrack is formed in
one of the substrate layers of a bonded sample by sawing
and/or etching as shown in Fig. 9共e兲. The bonded and pre-
cracked sample is mounted in a four-point bending machine
where the applied load and the resulting displacement are
measured. As the load is applied, the sample deforms elasti-
cally and the precrack propagates to the weak interface,
which is “below” the precrack. The load versus displacement
curve gives a measure for the surface energy of the bond.
C. Bond hermeticity measurements
A hermetic, or gas-tight, bond must work as a barrier
towards gasses and moisture. Most hermeticity test methods
to evaluate gas tightness use a cavity that is sealed with a
bond. The gas leakage into or out of the cavity through the
bond is measured to determine the hermeticity of the bond.
The range of leak rates of interest is 10−1 – 10−4 atm cm3 s−1
for gross leaks and 10−5 – 10−12 atm cm3 s−1 for fine leaks.
The most important testing methods are briefly described
below.
The bubble method is a gross leak test, in which the
bonded cavity is subjected to vacuum evacuation. The cavity
is immersed in a fluorocarbon liquid 共e.g., FC-84, 3M Elec-
tronic Products兲 without breaking the vacuum to facilitate
easy entry of the liquid into the cavity through any leak. The
cavity is then immersed in a bath with another fluorocarbon
liquid 共e.g., FC-40, 3M Electronic Products兲 having a higher
boiling temperature than the first liquid. The temperature of
the bath is held between the respective boiling temperatures
of the two fluorocarbon liquids. Any fluorocarbon that has
leaked into the bonded cavity during the fill phase will ex-
pand in volume and appear as bubbles observable in the
fluorocarbon bath.228,229
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J. Appl. Phys. 99, 031101 共2006兲
The negative ion detection method 共NID兲 is another
gross leak test in which the bonded cavity is penetrated with
a fluorocarbon liquid 共e.g., FC-84, 3M Electronic Products兲
in a manner similar to that used in the bubble method. There-
after, the cavity is placed in a metal chamber and heated
共e.g., 125 ° C兲. The metal chamber is attached to a gas ana-
lyzer that can detect the fluorocarbon molecules that emerge
from the cavity. Thus, a measure for the leak rate of the
cavity bond can be determined.228,229
The helium leak test is a fine leak test and is widely used
to test the hermeticity of electronic packages.88,228,229 A
sealed cavity is subjected to helium gas under several atmo-
spheres pressure. After pressurizing, the cavity is introduced
into a vacuum chamber that is attached to a helium sensitive
mass spectrometer. The helium that leaks out of the cavity is
detected and converted into a standard leak rate. Helium is
used due to its high diffusion rate and its inert chemical
behavior. While well established, the helium leak test for
hermeticity in method 1014.4 of the military standard MIL-
STD-883E is not directly applicable to very small cavities, as
the minimum detectable leak range is too large.88 A variation
of the helium leak test is a method, in which a hole estab-
lished in the lid of the cavity is connected through a sealed
pipe to a helium sensitive mass spectrometer. The outside of
the cavity is exposed to a helium atmosphere and the mass
spectrometer detects the helium that leaks from the outside to
inside of the cavity. This provides a measure for the leak rate
of the sealed cavity.208
The radioisotope method can be used as a fine and gross
leak test. A tracer gas 共e.g., Kr85兲 is forced into a bonded
cavity by pressurization. The cavity is then placed in a scin-
tillation counter, which detects the gamma emission that ac-
companies the beta decay of the tracer gas. The gamma
emission directly yields a measure of the tracer gas concen-
tration within the cavity. In this method the amount of gas
leaking into the cavity is measured directly; thus, the leak
rate detection is independent of the cavity volume.225,226
The internal vapor analysis 共IVA兲 test analyses the gas
composition of the atmosphere that is present inside a
bonded cavity.230 Thus, information about the hermeticity of
the sealing and the corrosiveness of the atmosphere inside
the cavity can be extracted. In the internal vapor analysis test
a bonded and sealed cavity is pierced 共opened兲 and the gases
that escape the cavity are analyzed with mass spectroscopy.
In this way, it is possible to see if the moisture or other gases
such as oxygen, nitrogen, and carbon dioxide were present
inside the cavity. Also the pressure of the atmosphere inside
the cavity prior to the piercing can be determined. The inter-
nal vapor analysis test is a destructive test method.
Another possibility to test the hermeticity of a bond is to
place or integrate a pressure, gas, or moisture sensitive de-
vice 共e.g., bolometer, resonator, moisture sensor, or pressure
sensor兲 in a cavity that is sealed. The atmosphere inside the
cavity is monitored with the sensing device over time. Thus,
changes in the pressure or the atmospheric composition in
the cavity can be measured with the device in the cavity and
the leak rate of the bond can be determined.88,225,226
031101-17 Niklaus et al. J. Appl. Phys. 99, 031101 共2006兲

FIG. 10. Three-dimensional integration for future ICs and heterogeneous

systems with interchip via contacts 共Ref. 105兲.

VI. APPLICATIONS OF ADHESIVE WAFER BONDING

Adhesive wafer bonding is a generic technology with

unique features. Adhesive wafer bonding is used for the fab-
rication of three-dimensional integrated circuits
13,14,43,52,62,71,76,82–84,96–98,106,116–120,145,174–177,189,192,198–200,202
203,205
and for the integration of integrated circuits with mi-
crosystems such as infrared focal plane arrays,13,73,75,147 spa-
tial light modulators 共micromirror arrays兲,13,69,107,129,214 mi-
crotip arrays for data storage systems,123,163 and laser
systems.37,38,63,71,76,103,136,137 Adhesive wafer bonding is also
used for the fabrication of microcavities in packaging
applications,13,16,36,56,77,87–89,91,93–95,108,113,114,133,142–144,152,168
169,170,194,208,210
for manufacturing of liquid crystal on silicon
共LCoS兲 components,50,51 for thin-film solar cells,81 for radio-
frequency components,15,39,40,42,47,130,131,135,154,207 for micro-
fuel cells,217 for hard disk drive microactuators,213 and for
the bioMEMS and micrototal analysis systems 共␮TAS兲.
13,54,58,60,66,72,74,79,80,85,111,122,132,148–151,155,157,171,173,184,185,191,211
216,218,220,221
We have grouped the various applications in five
sections, depending on the application area and the use of FIG. 11. Fabrication process for three-dimensional integrated circuits 共I兲
共Ref. 145兲 and damage-free interconnect structures after adhesive bonding
adhesive wafer bonding. Section VI A describes ways of us- to a 200 mm glass wafer and Si substrate removal 共II兲 共Ref. 116兲.
ing adhesive wafer bonding for the manufacturing of three-
dimensional integrated circuit; Sec. VI B describes the appli-
cation of adhesive wafer bonding for the integration of quire very high density of vias between the layers, such as,
MEMS components and integrated circuits; Sec. VI C shows e.g., stacked memories, processors, and smart imaging
applications in which temporary adhesive wafer bonding is components.82,83,96,120,176,188
used to transfer thin films and components using an interme- Aligned wafer-to-wafer bonding with dielectric polymer
diate handling wafer; Sec. VI D describes the use of adhesive layers such as BCB is one of the promising approaches for
wafer bonding for wafer-level packaging applications; and the fabrication of
Sec. VI E shows the applications of adhesive wafer bonding 3D-ICs.13,14,70,71,76,82,96,116,120,145,176,198,200,205 Figure 11 shows
for manufacturing of microfluidic components in bioMEMS a schematic of a typical process flow, where the fully pro-
and ␮TAS. cessed wafers 共with active devices and multilevel on-chip
interconnects兲 are aligned and bonded using BCB as the in-
termediate adhesive layer, followed by a top wafer thinning
A. Fabrication of three-dimensional integrated and interwafer interconnection.71,83,105,145 Initially, two pro-
circuits
cessed wafers are aligned to the required tolerances 共typi-
Wafer-level 3D integration is an emerging technology to cally within 1 – 2 ␮m兲 and bonded using a dielectric adhesive
increase the performance and functionality of integrated layer under back-end-of-the-line 共BEOL兲 compatible condi-
circuits.85,187,188 3D integration holds promise for reducing tions. The top wafer is thinned to ⬃1 ␮m by a three-step
interconnect delays in future integrated circuits by reducing thinning process, i.e., backside grinding, CMP, and wet etch-
length and number of long interconnect lines82,83,85,187 as ing to an etch stop 关e.g., implanted, epi, or buried oxide
well as offering heterogeneous integration of processes and 共BOX兲 layer with SOI technology兴 as shown in Fig. 11共I兲共a兲.
devices as shown in Fig. 10.105,176 In principle, several de- Subsequently, bridge-type, and/or plug-type interwafer inter-
vice layers can be stacked on top of each other, which also connects are formed using a copper dual-inlaid patterning
can include the integration of high performance passive com- process, involving high-aspect-ratio via etching, copper/
ponent substrates directly with active integrated circuit sub- barrier deposition, and CMP as in advanced BEOL process
strates. The wafer-level three-dimensional integration of flows as shown in Figs. 11共I兲共b兲, 11共I兲共c兲, and 11共I兲共d兲. If
electronic circuits is of special interest for devices that re- required, a third wafer 共or more兲 can be aligned, bonded,

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031101-18 Niklaus et al.
FIG. 12. Via-first process for three-dimensional integrated circuits 共Refs.
199, 202, and 203兲.
thinned, and interwafer interconnected with the same process
flow to achieve multilayer 3D structures. The picture in Fig.
11共II兲 shows integrated circuit structures that have been
transferred from the original 200-mm-diam substrate to a
200-mm-diam glass substrate using BCB bonding in combi-
nation with substrate thinning.
Another technology platform to fabricate 3D-ICs using
adhesive wafer bonding is the via-first, BEOL compatible,
monolithic wafer-level technology platform shown in Fig.
12.199,202,203 This technology platform employs wafer bond-
ing of damascene-patterned metal/adhesive redistribution
layers on two wafers, thus providing interwafer electrical
interconnects 共via first兲 and adhesive bonding of two wafers
in a one unit processing step. In one possible process flow
for this technology, the partially cured BCB was used as a
dielectric bonding layer. The BCB films are spin coated on
the wafer surfaces and partially cured on a 250 ° C hotplate
under a nitrogen purge for 60 s.199,202,203 The BCB films are
patterned using a photoresist mask in combination with re-
active ion etching or deep reactive ion etching. Tantalum and
copper are then sputtered over the patterned BCB. A baseline
two-stage CMP process employing commercially available
two-component 共abrasive and oxidizer兲 slurries is utilized to
polish the copper and tantalum199,202,203 as shown in Fig.
12共a兲. These damascene patterned films are aligned and
bonded under controlled vacuum, temperature 共e.g., 350 ° C兲,
and pressure parameters 共e.g., 10 000 N兲 as shown in Fig.
12共b兲. The top silicon wafer is then thinned to ⬃100 ␮m
thickness by grinding and polishing with the final thinning in
tetramethyl ammonium hydroxide 共TMAH兲 as shown in Fig.
12共c兲. Figure 13 shows a cross-sectional FIB/SEM image of
a bonded copper via and BCB dielectric interface.199,202,203
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J. Appl. Phys. 99, 031101 共2006兲
FIG. 13. Cross section of a bonded copper-copper and BCB-BCB interface
fabricated using the via-first process 共Refs. 199, 202, and 203兲.
This via-first approach to 3D integration combines the
advantages of dielectric adhesive bonding, which is a robust
bonding process and provides a high wafer bond strength,
with the prebonding interwafer copper interconnects for pro-
cess integration simplicity. A copper-BCB redistribution
layer as typically needed in wafer-level packaging 共WLP兲
techniques can easily be incorporated with a dual damascene
patterning approach 共see Sec. VI D兲.
B. Film and device transfer for integration of MEMS
and electronic circuits
Adhesive wafer bonding can be used to transfer thin
films for MEMS or micro-opto-electromechanical system
共MOEMS兲 devices from one substrate wafer 共sacrificial wa-
fer兲 to a second substrate wafer 共target wafer兲. Thus, the
transducers and electronic circuits can be optimized and fab-
ricated independently on separate wafers with cost-efficient
processes before they are combined with an integration pro-
cess. The adhesive wafer bonding is CMOS compatible and
it allows wafer-level transfer of extremely thin 共⬍0.3 ␮m兲
films and devices that have very small feature sizes
共⬍1 ␮m兲. Very small electrical via contacts between the
transferred devices and the new substrate wafer can be
realized.13,71,76,84 Wafer-level transfer of thin films and de-
vices is a specifically attractive technology for devices that
require a very high density of via interconnect with very
small dimensions, such as in imaging or other arrayed
components.13,73,75,107,112,123,147,163
Figure 14 shows one possible process flow for device
transfer including the fabrication of electrical via contacts
between the transferred devices and the target
wafer.13,71,73,75,76,106,111,146 In device transfer, a device is
placed on top of an etch-stop layer on a sacrificial device
wafer 共e.g., SiO2 as the etch-stop layer in the case of silicon
etching兲. The sacrificial device wafer is bonded to the target
wafer 共e.g., a CMOS wafer兲 with adhesive wafer bonding as
shown in Fig. 14共b兲. In the next step, the device wafer is
sacrificially thinned down to the etch-stop layer as illustrated
in Fig. 14共c兲. The thinning of the sacrificial device wafer can
FIG. 14. Process sequence for thin film and device transfer.
031101-19 Niklaus et al.
FIG. 15. Process flow for CMOS compatible fabrication of monocrystalline
silicon micromirrors using film transfer with adhesive wafer bonding.
be done using dry etching 共e.g., DRIE兲, wet etching 关e.g.,
potassium hydroxide 共KOH兲 etching兴 or a combination of
grinding, polishing, and etching. If the transferred devices
can withstand the applied etching process no etch-stop layer
is required. Throughholes can be etched in the polymer ad-
hesive 共e.g., using reactive ion etching兲 as illustrated in Fig.
14共d兲; electrical via contacts between the target wafer and
the transferred devices can be processed in a subsequent step
as shown in Fig. 14共e兲. The electrical via contacts can be
deposited with electroplating, electroless plating, sputtering,
metal evaporation, or chemical-vapor deposition 共CVD兲 of
metal. If the free-hanging membrane structures are needed,
the polymer adhesive can be sacrificially removed using dry
etching as shown in Fig. 14共f兲. To fabricate more complex
transducer devices, also a sandwich of several patterned and
unpatterned materials can be transferred from the sacrificial
device wafer to the target wafer using this
technique.13,71,73,75,76,147
Transfer bonding of films, devices, or membranes en-
ables the integration of electronic circuits and transducers
that are fabricated with incompatible techniques such as
standard CMOS technology, III–V technologies 关gallium ar-
senide 共GaAs兲, indium phosphide 共InP兲兴 and high-
temperature deposition and annealing techniques. Transfer
bonding is used for the fabrication and integration of the
optical transducer arrays on standard CMOS wafers, i.e., un-
cooled infrared focal plane arrays 共e.g., bolometer detectors,
pyroelectric detectors兲,13,71,73,147 optical transducer systems
共e.g., spatial light modulators, tunable vertical coupled sur-
face emitting lasers兲,13,106,111,214 and imaging systems and la-
ser systems.37,38,46,103,136,137 Transfer bonding of films and
devices is also used to process material films 共e.g., single-
crystalline silicon, gallium arsenide, etc.兲 on the front- and
backside13,34,46,49,68,71,76 and to transfer high-frequency com-
ponents to new, low-loss
substrates.15,39,40,42,47,130,131,135,154,209
Figure 15 shows an example for the process flow for
fabrication of monocrystalline silicon micromirrors using
membrane transfer bonding.13,107,112 In this process flow, a
1-␮m-thick gold 共Au兲 layer is evaporated onto a silicon wa-
fer 共target wafer兲, which is then covered with a 0.5-␮m-thick
plasma-enhanced chemical-vapor deposited 共PECVD兲 sili-
con nitride layer and a 0.15-␮m-thick sputtered aluminum
共Al兲 layer. The top aluminum layer is patterned to define the
addressing electrodes of the micromirrors and the connecting
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J. Appl. Phys. 99, 031101 共2006兲
probing pads. A 0.2-␮m-thick silicon nitride layer is depos-
ited on top of the addressing electrodes and patterned to de-
fine the distant holders. Then, the holes for the posts are
etched in the silicon nitride layer that covers the gold seed
layer. The locally exposed gold seed layer is used as the
plating base for electroplating 1.45 ␮m gold. Consequently,
the gold posts extend 0.8 ␮m over the surface of the alumi-
num addressing electrodes. Figure 15共a兲 shows a schematic
cross section of the target wafer with the addressing elec-
trodes and the electroplated posts. The sacrificial wafer 共do-
nor wafer兲 is a SOI wafer with a 0.34-␮m-共±5 % 兲 thick sili-
con device layer and a 1-␮m-thick SiO2 layer. This SOI
wafer is bonded to the target wafer using a 0.8-␮m-thick
polymer layer that is spin coated on the SOI wafer as illus-
trated in Fig. 15共b兲. In the bonding procedure, the electro-
plated posts are pressed in the adhesive bonding material.
Their height of 0.8 ␮m defines the distance between the ad-
dressing electrodes and mirror membranes. The sacrificial
wafer 共SOI bulk material兲 is removed by a combination of
grinding and DRIE, stopping at the previously defined SiO2
layer as shown in Fig. 15共c兲. The SiO2 layer is removed
using a buffered HF etch solution, leaving the 0.34-␮m-thick
monocrystalline silicon layer on top of the adhesive bonding
material on the target wafer as illustrated in Fig. 15共c兲. After
the monocrystalline silicon film is transferred from the sac-
rificial SOI wafer to the target wafer, it is patterned to define
the micromirror membranes as shown in Fig. 15共d兲. Next,
the electrical and mechanical via connectors between the
gold posts and the mirror membranes are formed by electro-
plating another 0.8 ␮m of gold on top of the posts as illus-
trated in Fig. 15共e兲. Thus, the silicon micromirror mem-
branes are joined and mechanically locked to the posts.
Finally, the adhesive bonding material under the membranes
is sacrificially removed to free the monocrystalline silicon
micromirrors as shown in Fig. 15共f兲. Figure 16共a兲 shows a
SEM image of a transfer-bonded monocrystalline silicon mi-
cromirror arrays with 4 ⫻ 4 pixels.13,107,112 The micromirrors
consist of very flat, uniform, and low stress monocrystalline
silicon membranes. They measure 16⫻ 16 ␮m2, the mirror
hinges are 4 ␮m long, 0.6 ␮m wide, and the mirror posts
measure 3 ⫻ 3 ␮m2.
Figure 16共b兲 shows transfer-bonded uncooled infrared
bolometer arrays that have been fabricated using a similar
process flow as one for the miromirror arrays.13,73,75,147 The
transfer-bonded uncooled infrared bolometers are made of a
multiplayer structure with boron-doped polycrystalline sili-
con as the temperature sensing material. The bolometers
have a pitch size of 40⫻ 40 ␮m2 and smallest feature size of
1 ␮m.
C. Temporary adhesive bonding for film and device
transfer using handling wafer
Temporary adhesive wafer bonding can be used for
transferring thin films or devices from one substrate to an-
other substrate with the help of an intermediate handling
wafer. Thus, the thin films or devices are in a first step trans-
ferred from the original substrate to an intermediate handling
wafer 共often a glass wafer兲 using adhesive wafer bonding
031101-20 Niklaus et al.
FIG. 16. SEM image of 共a兲 free-hanging monocrystalline silicon micromir-
rors and 共b兲 free-hanging uncooled infrared bolometers.
and then transferred from the handling wafer to the final
target wafer using any bonding technique of choice, includ-
ing metal-to-metal bonding and adhesive bonding. The thin
films or devices are released from the handling wafer by
debonding the adhesive bond between the handling wafer
and the thin film or devices. Two main reasons for the use of
an intermediate handling wafer are: 共1兲 when a transparent
intermediate handling wafer 共e.g., a glass wafer兲 is used, the
wafer-to-wafer alignment and alignment testing procedures
can be simplified because a optical microscopy can be used
to look at corresponding alignment keys at the bond interface
during alignment of the wafers:123,163 共2兲 when transferring
the thin films or devices to an intermediate handling wafer,
they can be processed on the backside and the backside of
the thin films and devices can be contacted to the frontside of
the target wafer.123,163
Figure 17 shows an example of a process flow that uses
adhesive wafer bonding and a temporary handling wafer for
fabrication of a scanning-probe array on the CMOS-based
driving electronics. The goal is to transfer the cantilever ar-
ray on a dedicated CMOS chip in order to have a very short
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J. Appl. Phys. 99, 031101 共2006兲
FIG. 17. Process flow showing a cross section of the basic cantilever-
transfer processing steps 共Refs. 123 and 163兲.
electrical connection path between the cantilever and the
driving/sensing integrated analog electronics. The cantilever
itself is fabricated in the silicon membrane of an SOI wafer.
The first step is the lamination of the wafer on a glass wafer
using adhesive wafer bonding. Next, the silicon wafer is re-
moved by grinding to the final tens of micrometer, then by
plasma etching to stop on the SiO2 layer. The SiO2 layer is
subsequently wet etched with buffered hydrofluoric acid
共BHF兲. Backside processing is performed to define a metal
pad for the electrical interconnection as well as a polyimide
via. On the CMOS wafer side, a copper/tin stud is electro-
plated. Metal/solder studs based on a copper/tin alloy are
selected because the alloy-formation temperature
共⬍300 ° C兲 is compatible with the process and the studs are
stable after the alloying process. The CMOS and the cantile-
vers wafer are laminated together, using the stud/polyimide
via as interlock feature to provide the high alignment accu-
031101-21 Niklaus et al. J. Appl. Phys. 99, 031101 共2006兲

FIG. 18. SEM closeup of a transferred cantilever array 共Refs. 123 and 163兲.

racy as shown in Fig. 17 共II兲 共I兲. The debonding of the ad-

hesive bond to the temporary glass handling wafer is per-
formed by laser ablation and finally, the polymers are etched
away by oxygen plasma to release the cantilevers. Figure 18
shows a section of the transferred cantilever array with a
density of about 100 cantilevers per mm2; the cantilevers are
typically 70 ␮m long and 500 nm thick, with a sub-20 nm
radius tip. A similar transfer technique as the one described
in Fig. 17 with an intermediate handling wafer has been used
for fabricating 3D-ICs.123,163
Figure 19 shows a process flow using adhesive wafer
bonding and a temporary handling wafer for the fabrication
of thin-film solar cells.81 The process flow starts with the
adhesive wafer bonding of the fabricated solar cell wafer to
an intermediate glass handling wafer. This is to transfer the
active thin silicon film with its backside to a near-Lambertian FIG. 19. Fabrication process of a thin-film solar cell. 共a兲 SOI wafer, 共b兲
aluminum ceramic substrate. The SOI wafers are used as the fabricated cell on the SOI wafer, 共c兲 attachment of glass and etching of
silicon solar cell base material. A boron-doped p+ layer and supporting substrate and SiO2 of SOI wafer, and 共d兲 thin-film cell by adher-
ing the Al2O3 substrate 共adapted from Ref. 81兲.
phosphorous-doped n+ layers are formed by thermal diffu-
sion, followed by thermal growth of a 110-nm-thick SiO2
film at 950 ° C. Then, an emitter electrode and a base elec- are available.228,229 WLP has advantages over the chip-level
trode are formed by aluminum evaporation as shown in Fig. packaging as the wafer-level packaging enables highly par-
19共b兲. After fabricating the cell on the SOI layer, the cell is allel wafer processes, while allowing complex three-
adhesively bonded to an intermediate glass handling wafer. dimensional system designs. Another inherent advantage of
The supporting SOI substrate and the buried oxide layer are the wafer-level packaging, sometimes referred to as zero-
etched, leaving the 10-␮m-thick silicon layer on the adhesive level packaging,142,143,160,189 is that the packages can protect
layer on top of the intermediate glass handling wafer as the transducers and circuits during the wafer dicing process.
shown in Fig. 19共c兲. Next, an aluminum ceramic substrate is Processing techniques that are typically used in wafer-level
attached to the silicon layer with adhesive wafer bonding. packaging are thin-film deposition processes229 and various
Finally, the intermediate glass handling wafer is debonded as
wafer bonding processes.4–6,13,16,25,36,56,65,77,87–89,91
shown in Fig. 19共d兲. 93–95,108,113,114,133,142–144,152,168–170,194,208,210,219
Adhesive wafer
bonding is one very attractive candidate for the wafer-level
D. Wafer-level packaging
packaging applications since it is CMOS compatible, low-
Packaging is an important manufacturing step for com- cost, and relatively insensitive to wafer surface conditions.
mercial electronic, MEMS, MOEMS, and sensor systems. Figure 20 shows a few alternatives of using polymer
Typically, at least some part of the packaging is done on chip bonding to create cavities and surface protection for wafer-
level and a huge variety of chip-level packaging techniques level packaging applications. The choice of wafer material

FIG. 20. Fabrication methods for mi-

crocavities and component protection
in wafer-level packaging applications
共Ref. 13兲.

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031101-22 Niklaus et al.
FIG. 21. Fabrication scheme for hermetically sealed packages using adhe-
sive wafer bonding in combination with an additional diffusion barrier ma-
terial 共Refs. 13 and 152兲.
for these packages is practically unrestricted. The packages
in Figs. 20共a兲 and 20共e兲 use adhesive wafer bonding with a
self-contained polymer film, and the packages in Figs.
20共b兲–20共d兲 use a localized adhesive wafer bonding with a
patterned polymer adhesive. Cavities that extend into the wa-
fer material, as shown in Figs. 20共a兲 and 20共b兲, can be cre-
ated with standard etching techniques such as DRIE or wet
etching. The package shown in Fig. 20共c兲 consists of dis-
tance holders that may be a patterned metal, polymer, or
another patterned material. The distance holder is then cov-
ered with the adhesive material. In the package shown in Fig.
20共d兲, the polymer layer acts at the same time as both the
polymer adhesive and as spacer material between the two
wafer surfaces. The package schemes shown in Fig. 20 can
be combined with each other in various ways and for all
packages the adhesive bonding layer can be present on both
wafer surfaces.
To establish electrical contacts between the components
inside a package and the outside world, feed-through con-
tacts can be used that are placed underneath the bond line or
that are embedded in one of the substrates. To access the
bond pads of the feed-through lines on the wafer surface, the
top capping wafer is diced and/or etched after the wafer
bonding.13,16,77,87,95,108,114,159,165,166 Another method to pro-
vide an electrical contact between the inside and the outside
of a package is to use through-wafer contacts. Through-
wafer contacts are fabricated by drilling or etching via
through-holes in the wafer. The holes are then filled with
electrically conducting materials.56,61
For many applications, hermetically sealed packages are
necessary. These include components for military and other
high-end applications as well as transducers that are moisture
sensitive or that have to be operated in a controlled atmo-
sphere or vacuum. Polymer adhesives are generally perme-
able to gases and moisture as depicted in Fig. 4.22 Thus, they
are typically not suitable as the diffusion barriers in hermetic
sealing applications. To benefit from the advantages of poly-
mer adhesive wafer bonding while obtaining hermetically
sealed packages, an additional diffusion barrier is required.
Figure 21 shows a concept of one possible process flow for
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J. Appl. Phys. 99, 031101 共2006兲
FIG. 22. 共a兲 Wafer-level fabrication of cavities 共Ref. 189兲 and 共b兲 wafer-
level package for CMOS imaging sensors with through wafer contacts
共Refs. 56 and 61兲.
wafer-level fabrication of hermetically sealed packages using
adhesive wafer bonding.13,16,94,152 The top wafer of one of
the packages from Fig. 20 is diced and/or etched in a way
that the polymer adhesive at the bond interface is exposed at
the chip edges as shown in Fig. 21共b兲. A diffusion barrier
material is deposited on top of the polymer adhesive to her-
metically seal the chip packages as shown in Fig. 21共c兲.
Chemical-vapor deposited metals, a preferred diffusion bar-
rier layer, provide complete and full conformal coating of the
polymer adhesive. For cavities that are fabricated using pat-
terned BCB as the polymer adhesive, the atmosphere inside a
cavity adapts to the outside atmosphere within seconds.88,93
Thus, if a package is placed in vacuum, the surrounding
vacuum will also be present inside the package after a short
time. This effect can be used to obtain defined atmospheres
inside cavities by depositing the diffusion barrier material at
the desired atmospheric condition. The cavity is sealed and
the predefined gas pressure or vacuum is preserved inside the
cavity.
Adhesive wafer bonding is used for wafer-level packag-
ing and capping of electronics,15,47,133,194 CMOS imaging
chips,56,61 radio-frequency 共RF兲
devices,13,16,77,87,88,91,94,95,108,113,114,142–144,152,210 and MEMS
devices and MOEMS
device.13,16,77,88,89,93,94,108,113,114,152,168–170,194 Figure 22共a兲
shows an example of wafer-level packages for radio-
frequency devices189 and Fig. 22共b兲 shows an example of
wafer-level package for the CMOS imaging sensors.56,61 Fig-
ure 23 shows an example of a LCoS chip that is manufac-
tured using localized adhesive wafer bonding as shown in
Fig. 20共d兲 and described in Sec. IV B 2. Liquid crystal on
silicon chips make up high-resolution displays. The most at-
031101-23 Niklaus et al. J. Appl. Phys. 99, 031101 共2006兲

FIG. 23. Wafer-level fabrication of cavities for liquid crystal on silicon

共LCoS兲 components 共Ref. 50兲.

tractive application area of liquid crystal on silicon chips is

as fast, high-resolution reflective light modulators for projec-
tion displays.50,51

E. Fabrication of microfluidic and bioMEMS

components
Microfluidic systems have been used in the past for ap-
plications such as inkjet print heads172 and device cooling.
The recent, rapid development of microfluidic systems for
use in micrototal analysis systems 共␮Tas兲, microchemical FIG. 24. Fabrication methods for fluidic channels and devices with adhesive
synthesis applications, and bioMEMS, has triggered the need wafer bonding 共Refs. 72 and 186兲.
for fabrication techniques of microfluidic channels, devices,
and systems. the combination of excessive temperatures and strong elec-
Adhesive wafer bonding is an attractive candidate that is tric fields. The hydrophobic valves are fabricated as follows:
increasingly used for sealing of microfluidic channels and The 50– 100 ␮m-wide and 50-␮m-deep channels are formed
components since it can provide low-temperature bonding by deep reactive ion etching of a silicon wafer as shown in
and even to room-temperature bonding, which is compatible
with many temperature sensitive biochemical agents. The
methods for the fabricating cavities described in Sec. VI D
and shown in Figs. 20共a兲–20共d兲 can be used to manufacture
microfluidic channels and components. The manufacturing
of microfluidic channels and devices has been demonstrated
using various adhesive materials and bonding
schemes.13,16,54,58,60,66,72,74,79,80,85,111,122,132,148–151,155,157,171,173
184,185,191,211,216,218,220,221
The most commonly used substrate
materials for the fabrication of microfluidic systems are sili-
con, glass, and plastics. Microfluidic systems may also be
integrated with electronic circuits and optical components for
the applications such as on-chip signal analysis of large
amounts of signal data in micrototal analysis systems.186 Fig-
ure 24 shows examples of a filter chamber72 and a lab-on-a-
chip device with integrated optical sensors.186 Adhesive wa-
fer bonding can be used to seal microchannels in compact
disk 共CD兲 based analytical chemistry systems.
Figure 25 shows an example of manufacturing of micro-
fluidic channels that include hydrophobic patches sealed us-
ing adhesive wafer bonding. Thus, hydrophobic valves are
created in the sealed channels that can stop capillary filling
of the channels.13,60,72,74 The progressing mensicus of a liq-
uid inside the channel is stopped at the hydrophobic patch.
The hydrophobic patch can be overrun with the liquid when
an external pressure drop is applied between the channel in-
let and the channel outlet. Alternative bonding methods such
as anodic bonding cannot be used for sealing the channels
since they cause damage to the hydrophobic patches due to FIG. 25. Process flow for the fabrication of hydrophobic valves 共Ref. 74兲.

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031101-24 Niklaus et al.
Fig. 25共a兲. A thick photoresist is applied and openings are
patterned as illustrated in Fig. 25共b兲. The polymer for the
hydrophobic patches is deposited using a plasma process
with octafluorcyclobutane 共C4F8兲 gas. 74 A lift-off process by
stripping the thick photoresist leaves a patterned polymer
film inside the channels. The fluidic channels with the hydro-
phobic valves and the connected fluidic devices are then
sealed by bonding a glass lid on top of the silicon wafer
using a self-contained intermediate adhesive layer 共e.g.,
BCB兲 as shown in Fig. 25共c兲.
VII. FUTURE DEVELOPMENTS AND CONCLUSIONS
Three-dimensional integrated circuit 共3D-IC兲 technology
was proposed in the International Technology Roadmap for
Semiconductors 共ITRS兲 in 2003 共Ref. 231兲 as one of the
possible techniques to reduce global interconnect delays.
Wafer-level three-dimensional integration of electronic cir-
cuits also benefits devices that require a high via density as
connectors in between the layers, such as stacked memories,
processors, and imaging components. Aligned wafer-to-
wafer bonding with dielectric adhesive layers 共e.g., BCB兲 is
one of the most promising approaches for three-dimensional
integrated circuit manufacturing. If the 3D technology plat-
forms using adhesive wafer bonding techniques become
technologies of choice in integrated circuit manufacturing,
other application areas of adhesive wafer bonding will
greatly benefit from the technology advances that can be ex-
pected.
In recent research, a clear trend is to integrate MEMS
and MOEMS components with standard integrated electronic
circuits. If high temperature deposited and high-quality ma-
terials for the MEMS or MOEMS components shall be inte-
grated on the integrated circuit wafers, some form of the
material transfer on to the integrated circuit wafer has to be
done. Various thin film and device transfer techniques that
are based on adhesive wafer bonding show great promise to
provide the layer transfer in an easy to implement, robust,
and cost-efficient way. The first commercial MEMS devices
that use adhesive wafer bonding for material transfer may be
the arrayed devices with a very high via density, such as
uncooled infrared focal plane arrays, arrays of torsional mi-
cromirrors, and cantilever scanning-probe arrays.
Packaging is an important 共in some cases, critical兲
manufacturing step for commercial electronic, MEMS,
MOEMS, and sensor systems and a large part of the compo-
nent costs can be attributed to their packaging. Wafer-level
packaging is used increasingly as a very promising technol-
ogy to reduce the total packaging costs. This is specifically
true when a wafer is populated with a very large amount of
small, but similar devices. Thus, all devices on one wafer can
be packaged simultaneously in a single step. Adhesive wafer
bonding is one very promising technology that provides ro-
bust, low cost, and high yield bonding processes for many
packaging applications. In many application areas, hermetic
sealing of the components are an important feature. Adhesive
wafer bonding typically cannot provide hermetically sealed
packages; however, packaging schemes are available with
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J. Appl. Phys. 99, 031101 共2006兲
adhesive wafer bonding in combination with thin-film depo-
sition, which can provide hermetically sealed packages.
The recent, rapid development of microfluidic systems
for use in micrototal analysis systems 共␮Tas兲, microchemical
synthesis applications, and bioMEMS has accelerated the use
of adhesive wafer bonding for manufacturing of channels
and microfluidic components. For these applications, adhe-
sive wafer bonding is one of the most attractive and most
easy to use manufacturing technologies, while compatible
with many materials used in such systems.
Adhesive wafer bonding is a generic CMOS compatible
technology that provides unique possibilities for fabrication
and improvement of microsystems. Process schemes and pa-
rameters for adhesive wafer bonding with the self-contained
intermediate polymer films and with the photolithographi-
cally patterned polymer adhesives 共localized adhesive wafer
bonding兲 are readily available in literature. Polymer adhe-
sives that work specifically well for wafer bonding applica-
tions are epoxylike B-stage polymers 共e.g., BCB, SU8, and
some negative photoresists兲 and most thermoplastic poly-
mers 共e.g., PMMA, copolymers兲. The main advantages of
adhesive wafer bonding are the insensitivity to surface to-
pography, the low bonding temperatures, the compatibility
with standard integrated circuit wafer processing and the
ability to join practically any kind of wafers. Adhesive wafer
bonding requires no special wafer surface treatments such as
planarization. Structures and particles at the wafer surfaces
can be tolerated and compensated for some extent by the
polymer adhesive.
In conclusion, the underline physics of adhesive wafer
bonding has been extensively investigated. Various adhesive
wafer bonding technologies and characterization methodolo-
gies are developed. As a simple, robust, and low-cost bond-
ing process, adhesive wafer bonding can be used for many
applications, such as wafer-level 3D-ICs, wafer-level pack-
aging, and a variety of microsystems that can be integrated
with CMOS ICs.
ACKNOWLEDGMENTS
The authors would like to thank their colleagues in the
3D group at Rensselaer Polytechnic Institute 共RPI兲 in Troy,
USA and in the Microsystem Technology Group at Royal
Institute of Technology 共KTH兲 in Stockholm, Sweden for the
fruitful discussions on the various aspects of the adhesive
wafer bonding.
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