812 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 23, NO.

2, APRIL 2008

Achieving Maximum Efficiency in Three-Phase

Systems With a Shunt Active Power Compensator
Based on IEEE Std. 1459
Salvador Orts, Member, IEEE, Francisco J. Gimeno-Sales, Antonio Abelln, Member, IEEE,
Salvador Segu-Chilet, Member, IEEE, Miguel Alcaiz, and Rafael Masot

AbstractIEEE Standard 14592000 establishes that in an effi-

cient electrical system, only the fundamental positive-sequence ac-
tive power must be present. This paper proposes a new set of refer-
ence currents based on the IEEE Standard 14592000 for the con-
trol of a three-branch four-wire shunt active power compensator.
Reactive, unbalance, and harmonic distortion phenomena can be
cancelled out upstream from the point of connection, achieving
maximum efficiency of the three-phase four-wire electrical system.
In addition, a new current control and a three-dimensional space
vector pulsewidth-modulation technique are proposed to develop
a shunt active power compensator. Simulation and experimental
results demonstrate that the proposed shunt active power compen-
sator improves the upstream electrical quality of the power net-
work, achieving maximum efficiency according to IEEE Standard
14592000 specifications.
Index TermsActive filters, active power compensators (APCs),
current control, harmonic distortion, IEEE standards, power
quality (PQ), pulsewidth modulation, reactive power.
I. INTRODUCTION
D YNAMIC compensators, active filters, or active power
compensators (APCs) are converters developed to im-
prove the quality of electrical distribution systems. APCs
have been thoroughly studied in recent years [1][5]. Series
and hybrid APC configurations [6] are usually applied in
medium-voltage electrical systems and the shunt APC (SAPC)
configuration is preferred in low-voltage distribution systems
[6], [7].
An SAPC is equivalent to a controlled three-phase ac current
source, as represented in the block diagram of Fig. 1. An SAPC
operates by improving the quality of the electrical distribution
systems upstream from the point of common connection (pcc).
The SAPC output currents have to achieve supply currents in-
cluding the only efficient current component. The SAPC output
currents (compensating currents) are calculated from the mea-
surement of the load currents.
APC design includes the selection of an electric power theory
in order to identify and quantify the nonefficient phenomena
Manuscript received May 17, 2006; revised April 4, 2007. Paper no. TPWRD-
00277-2006.
The authors are with the Electronics Engineering Department, Valencia
Polytechnic University, Valencia 46022, Spain (e-mail: sorts@eln.upv.es;
fjgimeno@eln.upv.es; aabellan@eln.upv.es; ssegui@eln.upv.es; mialcan@up-
vnet.upv.es; ramape@eln.upv.es).
Digital Object Identifier 10.1109/TPWRD.2007.915910
0885-8977/$25.00 2008 IEEE
Fig. 1. SAPC connection diagram and flowing currents.
present in the electrical system. This is necessary for the calcu-
lation of the compensating currents and the reference signals for
the APC current control [8], [9]. Most of the electric power the-
ories, in a first estimation, separate electric power into two main
terms: active and nonactive power. However, the identification
of the power terms was a problem in three-phase electrical sys-
tems when unbalanced linear or nonlinear loads were connected
to the power network or when voltage asymmetries existed.
As a result of the work done by the IEEE Working Group
in Non-Sinusoidal Situations [10], IEEE Standard 1459 [11]
was published in 2000. The standard includes definitions for
the measurement of electric power quantities under sinusoidal,
nonsinusoidal, balanced, or unbalanced conditions. These new
definitions use the symmetrical components of the load currents
and voltages.
IEEE Standard 1459 establishes that fundamental positive-se-
quence active power ( ) is the only useful power [11][14].
Maximum efficiency in the electric network is reached when
only fundamental positive-sequence active current ( ) is de-
manded and the voltages at the PCC only contain the funda-
mental positive-sequence voltage ( ). All of the power terms
other than are described in this paper as nonefficient power
because they are not converted to useful work and, among other
effects, they increase line losses and reduce the carrying ca-
pacity of power lines.
Three proposals are developed in this paper. The first pro-
poses the use of the power terms identified in [11] to determine
the compensating currents of SAPC. The second proposes
a novel current control. The third proposes a space vector
pulsewidth modulation applied to a three-branch four-wire
voltage-source inverter (VSI). In order to verify the behavior
of the three proposals, an SAPC was simulated using Simulink
before its implementation in a small-scale prototype. The block
ORTS et al.: ACHIEVING MAXIMUM EFFICIENCY IN THREE-PHASE SYSTEMS 813

Fig. 3. Power flows in a compensated system with positive-sequence voltages

at the PCC.

Fig. 2. SAPC connection to the power network. phase shift angle between and . The load fundamental
positive-sequence active current is defined as follows:

diagram of the proposed SAPC and its connection with the load
and the power network are represented in Fig. 2. (3)
The VSI block is implemented using a three-phase three-leg
VSI that uses IGBT transistors. The midpoint of the split dc Active power can be obtained as the sum of several active
bus is connected to the neutral wire, to allow the flow of the power components
load zero-sequence current components. The three-phase load
includes unbalanced linear and nonlinear loads.
The load currents are measured after the PCC and the line-to-
neutral voltages are measured at the PCC. With these magni- (4)
tudes, the digital controller determines the input reference sig-
nals to the current regulator. The digital controller also imple-
where , , and are the negative-sequence, the
ments three-dimensional space vector pulsewidth modulation.
zero-sequence and the harmonic active powers respectively.
This paper is structured as follows. In Section II, the com-
Appendix B includes all of the IEEE Standard 1459 definitions
pensating currents are determined based on the IEEE Standard
used in this paper.
1459 definitions. In section Section III, a novel current regulator
and appear due to the existence of voltage asymme-
is described. Section IV describes a space vector PWM mod-
tries and load unbalances while appears due to the exis-
ulation technique applied to a three-branch four-wire SAPC.
tence of voltages and currents of the same nonfundamental fre-
Section V describes the results obtained with the simulations,
quency. , , and active powers are considered noneffi-
while in Section VI, the experimental results are included. Sec-
cient powers because they do not contribute to the useful power
tion seven presents the conclusions.
transfer and are dissipated in the distribution lines [12][14].
Maximum efficiency is reached only when flows through
II. COMPENSATING CURRENTS BASED ON IEEE STD. 1459 the power network lines and the voltages at the PCC only con-
tain . Under these conditions, the effective apparent power
The useful power transferred to the load has been commonly ( ) is equal to and equal to . The power factor ( or
quantified by the active power effective power factor) and the fundamental positive-sequence
power factor ( ) are equal to 1 ( ).
(1) The power terms in a compensated system are represented in
Fig. 3, where only is considered at the PCC. Without the
SAPC, the power network has to deliver all of the powers con-
defined as the average value of the instantaneous power in three- sumed by the load, the fundamental effective apparent power
phase systems. In (1) subscript represents the three phases of ( ), and the nonfundamental effective apparent power ( ).
the electrical system ( ), is the period ( ), is an After an SAPC connection, only flows from the power net-
integer number and is the measurement starting time. work. The remaining power flows , the unbalanced power
IEEE Std.1459 defines the fundamental positive-sequence ac- ( ), and the fundamental positive-sequence reactive power
tive power ( ) are delivered by the SAPC (Fig. 3). With the SAPC oper-
ating under nonideal voltage conditions at the PCC, some parts
(2) of and are delivered by the power network. In both
cases, the power network only needs to deliver and the max-
as the only power that ideally should exist in electric systems, imum possible efficiency in the electrical system is reached.
since it represents the useful active power transferred to the load Following IEEE Standard 1459, the SAPC output currents
[11][14]. is the load fundamental positive-sequence current must be those that flow through the load and do not contribute to
(all voltages and currents are expressed in rms values), is the . For the full compensation of the nonefficient currents, the
814 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 23, NO. 2, APRIL 2008

The load currents and the line-to-neutral voltages at the PCC

are measured and stored in an array after their conversion to
digital format. A discrete Fourier transform (DFT) is applied
to the acquired values in order to obtain the fundamental fre-
quency components (module and argument format). The posi-
tive-sequence current and voltage are calculated using the sym-
metrical components transformation as follows:

(7)
Fig. 4. Positive-sequence current components.
(8)

where .
With the modulus of the load positive-sequence current
obtained from (7) and the argument of the positive-sequence
voltage at the PCC obtained from (8), the compensating currents
of each phase are calculated in the time domain as indicated
in (5) and (6). These compensating currents are the reference
currents for the current control algorithm.

III. CURRENT REGULATOR DESIGN

Once the reference currents are obtained, it is necessary to use
a current regulator in order to guarantee that the SAPC output
currents conform to the values calculated in (5). A review of
the most recent works in current control methods applied to
PWM converters is presented in [9] and [16][21]. First sim-
ulation results of this current regulator were presented in [22].
This paper presents the first experimental results obtained with
Fig. 5. Reference current calculation.
a small-scale prototype.
From the electrical circuit of Fig. 2, the per-phase circuit
equation is obtained as follows:
SAPC compensating currents of each phase, in the time domain,
are calculated as follows: (9)

The output current error is expressed in (10) as the differ-

(5) ence between the reference output current ( ) and the SAPC
output current ( )
where subscript ( ) represents the ac outputs
of the SAPC (midpoint of the half bridges in Fig. 2). is (10)
calculated using the following expression:
Arranging (9) and combining it with (10), (11) is obtained. In
(11), the voltage drop in is neglected due to its low value,
(6)
which is not significant when compared with the other voltages
present in the equation
where represents the phase-shift angle between the funda-
mental voltage of phase ( ) and . represents the (11)
positive-sequence phase-shift angle in each phase (
for phase , for phase , and for
Using a high acquisition frequency ( ), the vari-
phase ). Fig. 4 shows the phasor representation of and
ation of the error derivative is practically linear, so the current
in the - - system coordinates. The angles are measured with
error derivative is approximately equal to the current error in-
respect to the axes where is situated.
crease and can be written
Phasor is resolved into its active ( ) and reactive parts
( ). Fig. 4 also shows the phase-shift angles between the dif-
ferent magnitudes. The compensating currents are synchronized (12)
with at the PCC as appears in [2] and [15].
A flowchart explaining the method followed for the calcula- For small filter current ripples (high switching frequency), the
tion of (5) and (6) is represented in Fig. 5. current error increase is practically equal to the current error
ORTS et al.: ACHIEVING MAXIMUM EFFICIENCY IN THREE-PHASE SYSTEMS 815

( ). With all of these previous approxima- TABLE I

tions, (13) is obtained DIRECTOR VECTORS IN - -0 COORDINATES (NORMALIZED WITH Vdc=2)

(13)

The SAPC control strategy consists of applying the voltage

vector which, corrected by the supply voltages
and the reference current derivatives, is able to apply a cur-
rent vector opposed to the current error vector
. By means of (13), the reference
voltages ( ) are obtained in (14)

(14)
The voltages to be generated at the ac outputs are proportional
to the reference voltages calculated by (14).

IV. THREE-DIMENSIONAL SPACE VECTOR MODULATOR

A space vector pulsewidth modulator (SVPWM) is used for
the generation of the switching functions of the three-phase
four-wire SAPC ( , , in Fig. 2). Two-dimensional
SVPWM is commonly applied in three-phase induction motor
drives [23]. Constant switching frequency, extension of the
linear operating area, and optimum use of the dc bus are the
main features of an SVPWM.
In four-wire systems with unbalanced loads or voltage asym-
metries, SAPCs deliver unbalanced currents. When this occurs,
the reference voltages obtained in (14) are also unbalanced and
a three-dimensional SVPWM is needed. A 3-DSVPWM mod-
ulator was initially conceived to work in four-branch four-wire
topologies [24]; nevertheless, its application is not so common
in three-branch four-wire VSI inverters, such as the one used
in this paper (Fig. 2). This modulation technique is known as
3-D3B SVPWM and will be described.
The reference voltages calculated with (14) can be repre-
sented in the Clark coordinates system by means of a space
vector ( ) with coordinates .
The - - to - - transformation is implemented by means of
the Clark transformation matrix
Fig. 6. Space vectors (left) and planes (right) in - -0 coordinates.
( ) is obtained by combination of the director vectors.
could be generated if it is inside the volume covered by the di-
rector vectors. The director vectors determine three planes that
are shown in Fig. 6 (right). Equations (16)(18) are the equa-
tions of the planes, including information about the vectors in-
volved in their construction
formed by (16)
formed by (17)

formed by (18)

To form , it is necessary to determine the three best di-

(15) rector vectors. In the first step, the projections of the director
For a three-branch four-wire VSI inverter such as the one vectors in the - plane are used. These projections divide the
shown in Fig. 2, only eight possible switching states exist. These - plane into six sectors, represented in Fig. 7. The projection
are the so-called inverter commutation vectors or director vec- of in the - plane determines two of the adjacent director
tors. Table I lists the switch configuration and its components vectors that are used to build .
in the - - orthogonal axes for each director vector. For ex- In the second step, the third director vector is determined.
ample, the combination 001 indicates that top switches are OFF This vector will be either the or the . The selection de-
(open-circuit) in branches and and ON in branch . The pends on whether is over or under the plane defined by
bottom switches are in the opposite state to their respective top the director vectors determined in the first step. The relative sit-
switches. The values are normalized with respect to . uation of with respect to the plane is determined by the
Represented in - - coordinates, these director vectors are result of the scalar product of the coordinates of and the
distributed in the space as shown in Fig. 6 (left), forming a coordinates of the vector that represent the planes. A positive re-
hexagonal prism in which each director vector determines one sult determines that is situated over the plane and then
of the prism edges, except vectors and , which touch at is selected. A negative result determines that is situated
the center of the top and bottom bases. Reference space vector under the plane and then is selected. Equations (19)(21)
816 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 23, NO. 2, APRIL 2008

or , depending on the result of the comparisons done in the

second step described before

(27)
The distribution of the commutation vectors during a
switching period uses a symmetric pattern, which shows
Fig. 7. Director vectors projections in the - plane. low-current distortion and a good output voltage harmonic
spectrum [24].

show the scalar products of and the vectors that represent

the three planes, expressing the vectors in matrix form V. SIMULATION RESULTS

An averaged model of the circuit in Fig. 2 was simulated

(19) using Simulink. This averaged model, without nonlinear de-
(20) vices, allows the simulation time of the SAPC to be reduced.
Instead of the VSI inverter block and the split dc bus of Fig. 2,
(21) the simulated SAPC is implemented using three ideal controlled
voltage sources driven by the voltage references obtained in
The last step is the calculation of the duty cycles for the three (14). In this way, after the SAPC connection, the ac supply
director vectors determined previously. The duty cycles ( , only delivers the load while the SAPC delivers the whole
, and ) are obtained using (22). is a 3 by 3 matrix nonuseful powers including the active powers , , and .
formed with the - - coefficients (Table I) of the two adjacent In the prototype, the dc bus is implemented using capacitors and
vectors , , determined in the first step, and the third the SAPC obtains these active powers from the ac supply as an
vector (each vector in a column, respectively). Subscript increment of the , being delivered to the load as , , and
indicates the sector where is projected and determines the .
director vector that is used first The block models used in the simulation are described in
[25]. The proposed system control uses a moving window DFT
[26], with a equal to 6.4 kHz (128 samples in 20 ms). The
DFT calculates the fundamental component magnitude with
each new sample. The moving window DFT provides a soft
(22) response to load variations in 20 ms. As indicated in [27], 20
There are 12 transformation matrixes, two for each of ms is the minimum time needed to determine the new compen-
the defined sectors. Some of them use and the others use sating currents when unbalanced linear loads are connected to
. Equation (23) shows the matrix used when is in a 50-Hz power network.
sector I ( ) and , and are used ( ) The values used in the averaged model of the circuit of Fig. 2
are ; .
In [28], the selection of the ac output inductances is presented.
(23) During the simulation the PCC voltages ( , , and ) in-
clude fundamental voltage asymmetries, with the following rms
voltages and . No voltage
distortion at the PCC is included in the simulations. The fun-
The duty cycles calculated with (22) determine the time for damental frequency is 50 Hz. The load used in the simulation
which each director vector is applied during a switching period is implemented using linear and nonlinear loads. The nonlinear
, as is indicated as follows: load uses three single-phase diode rectifiers with an LC filter
and a resistance ( , , ). The
unbalanced linear load has the following values ,
(24)
, and . Fig. 8 shows the load currents.
(25) The load currents include phase shifts, load unbalances, and
(26) harmonic components. Table II summarizes the supply power
quantities measured at the PCC applying [11].
The remaining time of the switching period that is not filled The compensating currents for the cancellation of the nonef-
with , , and is designated . The time interval ficient powers are obtained be means of (5). The set of currents
is calculated in (27) and is distributed in equal parts be- delivered by the SAPC is represented in Fig. 9. SAPC ac output
tween vector and vector . These vectors are opposite and, is activated at ms. During the previous 20 ms, the digital
therefore, the average voltage applied with this distribution is controller was acquiring the first 128 samples. Once the SAPC
equal to zero. The time calculated in (26) is added to is connected, the DFTs are calculated with every new sample.
ORTS et al.: ACHIEVING MAXIMUM EFFICIENCY IN THREE-PHASE SYSTEMS
Fig. 8. Simulated phase and neutral load currents.
TABLE II
SUPPLY-POWER QUANTITIES BEFORE COMPENSATION
Fig. 9. Phase and neutral SAPC output currents.
Fig. 10. Phase and neutral supply currents after compensation.
The currents delivered by the power network are represented
in Fig. 10 after the SAPC is connected at s.
These supply currents include mainly components, in
phase with the respective at the PCC. With these currents,
817
TABLE III
SUPPLY-POWER QUANTITIES AFTER COMPENSATION.
the electric system reaches the maximum efficiency under the
working conditions.
After the SAPC connection, the power quantities upstream
from the PCC change to the values given in Table III. The har-
monic distortion factors are calculated by MathCAD using the
first 100 harmonic components.
and are reduced to an insignificant value. The re-
maining small value of is due to the fast reference current
variations. Since the SAPC operates by delivering currents to the
electric system, no variations are detectable in the PCC voltages
and the value of is the minimum achievable. The power
factor is near to the ideal, with an very close to and
power quantities. Despite the fact that the voltages at the PCC
are not ideal, , , and supply quantities are zero be-
cause only flows from the ac power network.
After SAPC operation is reduced by 103 W and only in-
cludes the load . This decrease of is equal to the sum of
the load active powers , , and . These active powers are
delivered by the SAPC that operates in the simulation as three
ideal-controlled voltage sources.
As a result of the simulations, we can conclude that the pro-
posed current references allow the SAPC to cancel all of the cur-
rent terms related to power magnitudes different than , also
under PCC voltage asymmetries. The power network is working
close to its maximum efficiency and, after the SAPC connection,
the line currents only contain . The power losses in the elec-
trical system are reduced to the minimum value because the line
currents are the minimum necessary to deliver the electrical en-
ergy needed by the load.
VI. EXPERIMENTAL RESULTS
In order to verify the proposed SAPC and the simulation re-
sults, a small-scale prototype is implemented. The power stage
uses an intelligent power module (IPM) that includes: three half-
bridge, isolated drivers for all of the IGBTs as well as overtem-
perature and overcurrent protections. The digital control system
is implemented using a TMS320F2812 digital signal processor
(DSP). All features described in this paper are implemented in
the DSP, including the 3-D SVPWM with a switching frequency
. The DSP also implements a dc bus voltage
control with a dynamic equalization algorithm. The DSP also
conducts the analog-to-digital conversion of all the signals used
in the SAPC control: the three voltages at the PCC, the dc volt-
ages, the SAPC output currents, and the load currents.
The experimental test reproduces the same supply conditions
and load values used in the simulations. The SAPC prototype
implements the complete circuit of Fig. 2. The capacitances
used for the dc bus are mF (Fig. 2) with a
818
Fig. 11. Experimental phase and neutral load currents.
Fig. 12. Phasor representation and main values before compensation.
dc working voltage that is equal to 500 V. A split dc bus has the
disadvantage of voltage unbalances between the top and bottom
section, as described in [29] and [30]. A dynamic equalization
algorithm, such as that described in [29], is used in the dc voltage
control circuit. References [28], [29], and [31] analyze the con-
ditions for the design of the dc voltage control and the selection
of the capacitance needed by the converter.
The measurements are carried out using a Yokogawa
WT1600 power meter connected to the PCC and the waveforms
are captured with a Yokogawa DL7100 oscilloscope. The scale
used in all oscilloscope current waveforms is A.
Fig. 11 shows the load currents before compensation. RMS
values of the currents are detailed on the right of the scope.
The load conditions used to obtain the waveforms in Fig. 11
are the same as those used in the simulations, obtaining sim-
ilar results (Fig. 8). Fig. 12 shows the phasor representation in
- - axes (1-2-3, respectively) of the fundamental current and
voltage magnitudes. This figure also includes the main funda-
mental magnitudes measured at the power network grouped by
blocks. A list of the symbols that appears in Fig. 12 is included
in Appendix A.
IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 23, NO. 2, APRIL 2008
TABLE IV
SUPPLY-POWER QUANTITIES BEFORE COMPENSATION (EXPERIMENTAL)
Fig. 13. Phase and neutral SAPC output currents.
TABLE V
SUPPLY-POWER QUANTITIES AFTER THE COMPENSATION (EXPERIMENTAL)
Table IV summarizes the supply-power quantities for the
PCC voltages and load currents applying [11] before the com-
pensation. Since the WT1600 power meter does not implement
IEEE Standard 1459 definitions, the values in Table IV are
calculated by MathCAD using the data registered with the
DL7100.
The experimental data given in Table IV are quite similar to
the data in Table II, obtained via simulation. The load includes
reactive and unbalance power due to fundamental components.
Furthermore, current and voltage distortion are also present in
the system under test. However, the voltage distortion exists in
the supply voltages and cannot be improved with SAPC opera-
tion, since the voltages are imposed by other loads connected to
the same lines.
Fig. 13 shows the SAPC ac output current after being
connected. These currents verify (5) and allow the maximum
possible efficiency of the electrical system to be reached, as is
demonstrated by the values included in Table V.
Fig. 14 shows the power network currents after SAPC is op-
erating. The current in the neutral wire is reduced to a value
close to zero and the line currents in phases , , and mainly
include . The three line currents are balanced and inphase
with their respective component. The current waveforms
ORTS et al.: ACHIEVING MAXIMUM EFFICIENCY IN THREE-PHASE SYSTEMS
Fig. 14. Phase and neutral supply currents after SAPC connection.
Fig. 15. Phasor representation and main values after compensation.
include a small switching ripple and distortion that matches the
rapid variations in the reference currents.
The shapes of the waveforms included in Figs. 13 and 14
match the waveforms obtained via simulation, represented in
Figs. 9 and 10, respectively.
Fig. 15 shows the phasor representation in the - - axes
of the fundamental current and voltage magnitudes. The line
currents are balanced and in phase with their respective voltage
as is demonstrated by a fundamental single-phase power factor
( ) equal to 0.999 in the three phases.
Table V summarizes the supply-power quantities for the PCC
voltages and supply currents applying [11] after compensation.
After the compensation, is very close to zero. However,
upstream from the PCC is not zero, because the product
of components by the fundamental negative and zero-se-
quence voltages at the PCC. is reduced but not completely
cancelled out due to the product of by the nonfundamental
voltages at the PCC. varies from 0.57 to 0.12 when
the SAPC is connected, demonstrating the good behavior of the
current control. With SAPC operation, matches and .
The increase of after SAPC connection (168 W) is due to the
energy needed to compensate the power losses in the SAPC in
819
order to maintain the dc bus charged with an average voltage
equal to the reference dc voltage.
The increase of demanded from the power network after
SAPC connection (283 W) appears due to the following effects.
The increase of is due to the converter losses (168 W)
that are compensated with an equal increase in the supply
consumption.
The consumption of that the SAPC needs to deliver the
powers , , and demanded by the load. From the
simulation results detailed in Section V, the sum of these
active powers is approximately equal to 103 W.
The addition of these two values results in a increase of
271 W that is very close to the value obtained via experimental
results (283 W) due to the difference of the values of before
and after SAPC operation (Tables IV and V).
The experimental results demonstrate that the SAPC corrects
all of the nonefficient current components that can appear in
power networks: unbalances due to voltage asymmetries at the
PCC and due to unbalanced linear loads, phase shifts due to
reactive parts of the load, and the harmonic components due to
nonlinear loads. The compensated system achieves maximum
possible efficiency and improves electrical quality upstream
from the PCC.
VII. CONCLUSION
This paper proposes an SAPC to improve electrical quality in
three-phase four-wire distribution systems allowing maximum
efficiency to be reached in electrical systems. It suggests the use
of IEEE Standard 1459 to obtain the reference currents that con-
trol the SAPC, since in the near future, IEEE Standard 1459 will
be used to measure power systems equipped with active power
compensators. With SAPC operation, the supply line currents
only contain the fundamental positive-sequence active current,
the only current component that represents the useful transfer
of energy from generators to loads, according to IEEE Standard
1459.
A novel current control algorithm is proposed to ensure that
the SAPC output currents conform to the reference currents. The
proposed current regulator is validated via simulations and ex-
perimental work. The proposed SAPC uses a split dc bus and
three half-bridges in the power stage. The neutral wire is con-
nected to the midpoint of the split dc bus. A three-dimensional
space vector PWM modulator is proposed for the control of
the three-branch four-wire SAPC. This proposed modulation is
an evolution of the four-branch four-wire SVPWM modulation
technique. A description of the equations and methods for the
implementation in a DSP of the 3-D-3B-SVPWM technique is
included in this paper.
Simulations and experimental results show that the com-
pensation of the fundamental and nonfundamental frequency
inefficient current components is achieved with the proposed
SAPC. The results demonstrate the correct operation of the
proposed reference currents and the good behavior of the cur-
rent control and the SVPWM modulation technique. The SAPC
performance is measured using the definitions included in IEEE
Standard 1459. A comparison of the supply-power quantities
with and without SAPC is performed. The proposed SAPC
eliminates the positive-sequence reactive power in the electrical
820 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 23, NO. 2, APRIL 2008

system upstream of the PCC. SAPC operation also reduces Fundamental effective apparent power
unbalance power and nonfundamental effective apparent power
to values near of their minimum value. The proposed shunt
active power compensator improves the electrical quality of
distribution systems where any types of loads are connected Nonfundamental effective apparent power
and achieves maximum efficiency according to IEEE Std. 1459.

APPENDIX A Fundamental effective apparent power components

LIST OF SYMBOLS
The magnitudes included in Figs. 12 and 15 were measured
using a Yokogawa WT1600 power meter. The symbols that ap-
Fundamental positive-sequence effective apparent power
pear in these figures correspond to the magnitudes that will be
listed. The numbers 1-2-3 ( ,2,3) after the letters of elec-
tric magnitudes represent the three phases of the power network
that are named in our paper as - - .
Fundamental positive-sequence reactive power
Fundamental rms line to neutral voltage.
Fundamental rms line current.
Fundamental active power. Unbalance power
Fundamental apparent power.
Fundamental reactive power.
Fundamental single-phase power factor.
Phase shift. Equivalent total harmonic distortion of the current and voltage

APPENDIX B
IEEE STANDARD 1459 DEFINITIONS Harmonic active power
The following definitions are a summary of the terms defined
in [11] and not previously included in this paper but are used by
the authors to obtain the results shown in the tables.
Effective current and voltage Fundamental negative-sequence active power

Fundamental zero-sequence active power

Effective apparent power

Power factor (also called effective power factor) and funda-
mental positive-sequence power factor

Fundamental effective current and voltage

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Salvador Orts (M06) was born in Valencia, Spain,
in 1972. He received the M.E. degree in automation
and industrial electronics engineering from the Poly-
technic University of Valencia (UPVLC), Valencia,
where he is currently pursing the Ph.D. degree, which
is focused on the improvement of utility quality by
means of power compensation systems and their con-
trol.
Currently, he is an Assistant Professor in the
Electronics Engineering Department at the UPVLC
(EED-UPVLC).
Francisco Gimeno-Sales was born in Valencia,
Spain, in 1958. He received the Ph.D. degree in
electronics engineering from the University of
Valencia (UPVLC), Valencia, in 2004.
From 1986 to 1993 he worked in several R&D de-
partments, developing industrial products (hardware
and software). Since 1993, he has been teaching
power electronics and C applied to power converter
control at the EED-UPVLC. His research interest is
the control of power-electronics converters and grid
quality.
Antonio Abelln (M96) was born in Villena, Spain,
in 1966. He received the Ph.D. degree in indus-
trial engineering from the University of Valencia
(UPVLC), Valencia, Spain, in 2001.
Currently, he is a Lecturer at the EED-UPVLC in
the Alcoy campus.
His research activities are carried out in the Indus-
trial Electronics System Group in the UPVLC. His
research field of interest is modelling and control of
power converters, active filters and power quality.
Salvador Segu-Chilet (M01) was born in Valencia,
Spain, in 1962. He received the B.E. degree in in-
dustrial electronics, the M.E. degree in electronic en-
gineering, and the Ph.D. degree in electronics engi-
neering from the University of Valencia (UPVLC),
Valencia, in 1986, 1999, and 2004, respectively.
Since 1990 he has been Lecturing at the
EED-UPVLC. His major interests are power
electronics, renewable energy systems, and active
power compensators.
822
Miguel Alcaiz was born in Valencia, Spain, in 1968.
He received the M.S. degree in physics from the Uni-
versity of Valencia (UPVLC), Valencia, in 1991.
From 1993 to 1997, he was with the R&D de-
partment of Viala, working in electronic systems
for telecommunication and measurement. From
1997 to 1999, he was a Test Engineer at the MSL
Card production line, Valencia. Since 1998, he has
been teaching at the EED-UPVLC. His research
interest includes digital signal processor (DSP)
systems applied to power measurement and control
of fuel-cell systems connected to the utility.
IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 23, NO. 2, APRIL 2008
Rafael Masot was born in Valencia, Spain, in 1968.
He received the M.S. degree in physics from the Uni-
versity of Valencia (UPVLC), Valencia, in 1991 and
the M.E. degree in electronic engineering from the
UV in 1996.
From 1995 to 2001, he was with electronic
systems in public and private companies. Since
2001, he has been teaching Electronic Technology,
Digital Electronics, and Microcontrollers at the
EED-UPVLC.