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IMPORTANT: Before working with this design, read document 3HH-09931-3004-DFZZA


A A

AFE
Dual Channel Linedriver
VINAX A-8
SERDES

...
16
DSP 3GLP
C O N N E C T O R

B B
VINAX-D AFE Dual Channel Linedriver
VINAX A-8
HPI HPI
CPLD

32
Option for 17a/30a

Port
AFE
C Dual Channel Linedriver C
VINAX A-8
DSP
VINAX-D

...

Line
3GLP 16
P L A N E

SERDES

AFE
VINAX A-8 Dual Channel Linedriver
communication of its contents not per-
mitted without written authorization.
All rights reserved. Passing on and
copying of this document, use and

D D

Temp. Snr.
B A C K

I2C Bus
I2C Sw. LED Driver LPF

R I
E E

A1V

32
Port
Filter&Hotswap
A3V3
F DC/DC Module F

POTS
DANGLE DANGLE DANGLE
FB1 1 FB2 1 FB3 1

FB4
DANGLE

1
FB5
DANGLE

1
FB6
DANGLE

1
Vauxp
dangle dangle dangle

FC1 FC2 FC3


G 1 1 1 G
dangle

FC4 FC5 FC6


1 1 1
APN & S.N. label
DANGLE DANGLE
FC7 FC8 FC9 FC10
1 1 1 1

DANGLE DANGLE DANGLE DANGLE

dangle 1
3FE22934AAAA
2
dangle TOPLEVEL/MAin 1/7
3FE20890AAAA ED DATE 02 2011/11/22
1 2
dangle dangle
CHANGE NOTE ALU01569015
1AA 00014 0003 (9007) A2

APPRA.AUTHO. G. De Vetter JA52


Front Panel Mounting Pads
FG_FRONT ORIGINATOR B. Vingerhoedt JA52
H H
P1 P2 P3
123 12 3 12 3 PBA-MVLT-D/E
TNV1 TNV1

3FE-66250-AAAC-ECZZA 1 /112
1 2 3 4 5 6 7 8 9 10 11 12
1 2 3 4 5 6 7 10 11 12 13 14 15 16

A
A

DSL chipset and Line circuit

B Lx_T(1:32)
7-D5,#28
B
Lx_R(1:32)
7-D5,#28

Lx_T(17:32)

Lx_R(17:32)
Lx_T(1:16)

Lx_R(1:16)
5-A11,#5
HPI_DATA(0:15)

HPI_ADDR(0:11) 5-B11,#5
C C

HPI_RDn 5-B11,#5

HPI_WRn 5-B11,#5

SLICE_B_HPI_CSn
5-C11,#3

SLICE_A_HPI_CSn 5-C11,#3

5-C8,#5
HPI_RDYn

D SLICE_A_HPI_INTn
5-B8,#3 D

5-B8,#3
SLICE_B_HPI_INTn

E
E

SLICE A SLICE B

PB_ADDR(0:11) PB_DATA(0:15) PB_ADDR(0:11) PB_DATA(0:15)

F DSL_RDn DSL_RDYn DSL_RDn DSL_RDYn F

DSL_WRn DSL_WRn
DSL_CSn DSL_INTn DSL_CSn DSL_INTn

Lx_T(0:15) Lx_T(0:15)
SGMII_DS_N(2)
Lx_R(0:15) Lx_R(0:15)
SGMII_US_N(1)
SGMII_DS_P(2) SGMII_DS_N(2) SGMII_US_N(1)
SGMII_US_P(1)
SGMII_DS_P(2) SGMII_US_P(1) F1D100
SGMII_DS_P(1:2) SGMII_DS_P(1) F1D100 F1D100 6-C5,#5
SGMII_US_P(1:2)
6-C7,#5 F1D100 F1D100 SGMII_US_P(2)
G SGMII_DS_N(1:2) 6-D7,#5 SGMII_DS_N(1) F1D100
SGMII_DS_P SGMII_US_P SGMII_US_P(1) SGMII_DS_P(2) SGMII_DS_P SGMII_US_P 6-D5,#5
SGMII_US_N(1:2)
F1D100 F1D100 SGMII_US_N(2)
SGMII_DS_N SGMII_US_N SGMII_US_N(1) SGMII_DS_N(2) SGMII_DS_N SGMII_US_N G

POWER

A3V3
SLICE_A_CHIP_ID(0)
SLICE_A_CHIP_ID(0:3) SLICE_B_CHIP_ID(0)
SLICE_B_CHIP_ID(0:3)
SLICE_A_CHIP_ID(1) CHIP_ID(0:3) SLICE_B_CHIP_ID(1) CHIP_ID(0:3)
GND

GND
SLICE_A_CHIP_ID(2) SLICE_B_CHIP_ID(2)

SLICE_A_CHIP_ID(3) SLICE_B_CHIP_ID(3)
communication of its contents not per-
mitted without written authorization.
All rights reserved. Passing on and

F1S60_3W F1S60_3W
copying of this document, use and

BITS_8K_SLICE_A 6-D2,#2
BITS_8K 5-C11,#3 BITS_8K_SLICE_B 6-D2,#2
BITS_8K 5-D11,#3
ToD_DFE 5-C11,#3 ToD_A ToD_DFE 5-D11,#3 ToD_B
F1S60_3W
H SGMII_25M_CLK_A SGMII_25M_CLK PPS_DFE PPS_A SGMII_25M_CLK_B SGMII_25M_CLK PPS_DFE PPS_B
4-C8,#3 5-C11,#3 4-C8,#3 5-D11,#3 H
ToD_DATA_VAL_DFE ToD_DATA_VAL_A SLICE_B_35M_CLK(0)
ToD_DATA_VAL_DFE ToD_DATA_VAL_B
SLICE_A_35M_CLK(0) F1S60_3W F1S60_3W

AFE0_35M_CLK AFE0_35M_CLK
SLICE_A_35M_CLK(1) F1S60_3W SLICE_B_35M_CLK(1) F1S60_3W

AFE1_35M_CLK AFE1_35M_CLK
SLICE_A_35M_CLK(2) F1S60_3W SLICE_B_35M_CLK(2) F1S60_3W

DFE_35M_SYS_CLK3 5-D8,#3 DFE_35M_SYS_CLK3 5-D8,#3


SLICE_A_35M_CLK(3) F1S60_3W SLICE_B_35M_CLK(3) F1S60_3W

SLICE_A_35M_CLK(0:3) 4-B8,#5
DFE_35M_SYS_CLK1 DMT_SYNC_DFE DMT_SYNC_A SLICE_B_35M_CLK(0:3) 4-B8,#5
DFE_35M_SYS_CLK1 DMT_SYNC_DFE DMT_SYNC_B

SLICE_A_RSTn 5-D11,#3
DSL_RSTn SLICE_B_RSTn 5-D11,#3
DSL_RSTn

SLICE_A_TDO
TDI TDO TDI TDO

I TMS TMS I

TCK TCK

TRSTn TRSTn
16PORT_SLICE_A 16PORT_SLICE_B
false false

SLICE_A_TDI
5-G4,#3
J J
GICI_TMS 5-D6,#7

SLICE_A_TCK 5-F8,#4

SLICE_B_TCK
5-F8,#4

GICI_TRSTn 5-C6,#6
5-G3,#2
SLICE_B_TDO

K K
1AA 00014 0013 (9007) A1

TOPLEVEL/MAin 2/7
L L
ED 02

3FE-66250-AAAC-ECZZA 2 112
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
1 2 3 4 5 8 9 10 11 12

A A

POWER BLOCK

B A3V3 A1V0 VAUXP


B

3.3

A3V3
LT_PWRON HOTSWAP_ON
6-D5,#2
A1V

POWER_12V

GND
B12V_IN B12V_IN GND
6-E5,#2

LT_PWROFF BLT_POFF
C 6-E5,#2
VAUXP
C

VOLT_MON_RST VOLT_MON_RST
5-D8,#2
communication of its contents not per-
mitted without written authorization.
All rights reserved. Passing on and

POWER
copying of this document, use and

False
D D

GND test points


X01MA3

X02MA3

X03MA3

X04MA3

X05MA3

X06MA3
E E
1

1
POWER

GND

F F

G G
1AA 00014 0010 (9007) A2

TOPLEVEL/MAin 3/7
H H
ED 02

3FE-66250-AAAC-ECZZA 3 /112
1 2 3 4 5 6 7 8 9 10 11 12
1 2 3 4 5 8 9 10 11 12

A A

CLOCK GENERATION

B B

SLICE_A_35M_CLK(0:3) SLICE_A_35M_CLK(0:3)
2-H4,#5
SLICE_B_35M_CLK(0:3) SLICE_B_35M_CLK(0:3)
2-H9,#5
35MHz_CPLD 35MHz_CPLD
5-D8,#2

F1S60_3W

SGMII_25M_CLK_A SGMII_25M_CLK_A
2-H4,#3
SGMII_25M_CLK_B SGMII_25M_CLK_B
F1S60_3W 2-H9,#3
F1S60_3W

CPLD_25M_CLK CPLD_25M_CLK
5-D8,68-D9

CLOCK
C False
C
communication of its contents not per-
mitted without written authorization.
All rights reserved. Passing on and
copying of this document, use and

D D

I2C
TEMP MONITORS
RI PROM

E E

POWER

IIC_BACK_3V3 IIC_BACK_A3V3
6-B5,#2

IIC_CLK BIIC_CLK
6-B5,#2
6-B5,#2
IIC_DATA BIIC_DATA

LT_SLOT(0) BIIC_A0
6-D5,#2
F F
LT_SLOT(1) BIIC_A1
6-D5,#2

LT_SLOT(2) BIIC_A2
6-D5,#2
SDA_CPLD SDA_CPLD
5-C8,#2

SCL_CPLD SCL_CPLD
5-C8,#2
CPLD_LED_REDn CPLD_LED_REDn
5-C11,#2

CPLD_LED_GREENn CPLD_LED_GREENn
5-C11,#2

G IIC_GICI_3V3
POWER

IIC_GICI_3V3
G
5-E1,77-D4

IIC_GICI_SDA IIC_GICI_SDA
5-E1,77-D7

IIC_GICI_SCL IIC_GICI_SCL
5-E3,77-D7

IIC
False
1AA 00014 0010 (9007) A2

H
TOPLEVEL/MAin 4/7 H
ED 02

3FE-66250-AAAC-ECZZA 4 /112
1 2 3 4 5 6 7 8 9 10 11 12
1 2 3 4 5 8 9 10 11 12

REMOVE X01IC1
A A
COUPLE JTAG to GICI CONN + CPLD JTAG
JTAG CPLD AT END OF CHAIN for layout issues
2 BUFFERS AS MUX 6-B5,#2 HPI_DATA(0:15)
2-C2,#5
HPI_DATA(0:15)
BHPI_DBUF(0:15) BHPI_DBUF(0:15)
CPLD_TDO to connector HPI_ADDR(0:11)
2-C2,#5
HPI_ADDR(0:11)
BHPI_ABUFI(0:12) BHPI_ABUFI(0:12) 6-C7,#2
6-B7,#2
BHPI_ADDR(15) BHPI_ADDR(15)
2-C2,#5
BHPI_RDn_to_CPLD BHPI_RDn_to_CPLD HPI_RDn HPI_RDn
6-C7,#3
B 2-C2,#5 B
BHPI_WRn_to_CPLD BHPI_WRn_to_CPLD HPI_WRn HPI_WRn
6-C7,#3

SLICE_A_HPI_INTn 2-D15,#3 SLICE_B_HPI_INTn


A3V3 2-D15,#3
SLICE_B_HPI_INTn SLICE_A_HPI_INTn BPA_INTn_from_CPLD BPA_INTn_from_CPLD
6-C5,#2

A3V3
HPI_RDYn HPI_RDYn HPI_RDYn_from_CPLD HPI_RDYn_from_CPLD
2-D15,#5 6-C5,#2

BHPI_CSn_to_CPLD BHPI_CSn_to_CPLD SLICE_B_HPI_CSn 2-D2,#3 SLICE_B_HPI_CSn


6-C7,#3 2-C2,#3
SLICE_A_HPI_CSn SLICE_A_HPI_CSn
R507

R513

R501
10k

10k

10k
SDA_CPLD SDA_CPLD CPLD_LED_GREENn CPLD_LED_GREENn

R527
C 4-F8,#2 4-G5,#2 C

1k
SCL_CPLD SCL_CPLD CPLD_LED_REDn CPLD_LED_REDn
4-F8,#2 4-G5,#2
R508 D5IC14
150R GICI_TDI 74LVC1G126 ToD ToD ToD_A ToD_A
76-C1 1 6-D7,#2 2-H7,#3
4
PPS PPS PPS_A PPS_A
2-H7,#3
R509
2
GICI_TRSTn ToD_DATA_VAL_A ToD_DATA_VAL_A
2-K2,#6 6-D7,#2 2-H7,#3
150R
XVCC1=A3V3,XGND1=GND
R526
F1S60_3W

CPLD_25M_CLK 0R CLK_25MHZ ToD_B ToD_B


R514 D5IC15
4-C8,68-D9 2-H12,#3
150R 74LVC1G126 PPS_B PPS_B
1 2-H12,#3
4
35MHz_CPLD 2-H7,#3 35MHz_CPLD ToD_DATA_VAL_B ToD_DATA_VAL_B
4-B8,#2 2-H12,#3
GICI_TMS DMT_SYNC_A DMT_SYNC_A
communication of its contents not per-

2-H12,#3
mitted without written authorization.

2 2-J2,#7
150R GICI_TCK DMT_SYNC_B DMT_SYNC_B
All rights reserved. Passing on and

R512

R505
copying of this document, use and

R506
1k

1k

XVCC1=A3V3,XGND1=GND
D D
6-E5,#2
150R GICI_TDO LT_RESET LT_RESET SLICE_B_RSTn SLICE_B_RSTn
3-C7,#2 2-I9,#3
R502
VOLT_MON_RST VOLT_MON_RST SLICE_A_RSTn SLICE_A_RSTn
A3V3 2-I4,#3
GND
GICI_TDI TDI
19 20
CPLD_TCK TCK
17 18
GICI_TMS TMS TDO CPLD_TDO
GND

15 16

13 14
GND

11 12

9 10

7 8

E 5 6
IIC_GICI_SCL
E
3 4-G5,77-D7
4
IIC_GICI_SDA
4-G5,77-D7
1 2
POWER IIC_GICI_3V3
4-G5,77-D4
X01MA5 D5IC01
74LVC125A
1 R603
A3V3 A3V3
33R
3
2
CPLD_TCK
GICI_TCK
XVCC1=A3V3,XGND1=GND

A3V3
D5IC01
74LVC125A
C5IC13

C5IC01
100n

100n

6
F 5
SLICE_A_TCK F
2-J2,#4

XVCC1=A3V3,XGND1=GND
R521
1k

D5IC01
GND GND 74LVC125A
D5IC13
10
74LVC1G126
X29
1 1 8
POWER 4 9
SLICE_B_TCK
2-J2,#4
CPLD program jumper GICI_TDO
X29 2 2
XVCC1=A3V3,XGND1=GND
SLICE_B_TDO
2-K2,#2 XVCC1=A3V3,XGND1=GND
D5IC01
74LVC125A
13
GND 11

G 12 G
XVCC1=A3V3,XGND1=GND
R541
1k

CPLD_TDO SLICE_A_TDI
2-J2,#3

GND
1AA 00014 0010 (9007) A2

TOPLEVEL/Main 5/7
H H
ED 02

3FE-66250-AAAC-ECZZA 5 /112
1 2 3 4 5 6 7 8 9 10 11 12
1 2 3 4 5 8 9 10 11 12

BACKPLANE ITF
A A

I2C
4-F5,#2
IIC_DATA 4-F5,#2 IIC_DATA
IIC_CLK 4-E5,#2 IIC_CLK
POWER

IIC_BACK_3V3 IIC_BACK_3V3

HPI
B B

bidir CPLD buffer BHPI_DBUF(0:7) BHPI_DBUF(0:7)


5-A8,#2
BHPI_DBUF(8:15) BHPI_DBUF(8:15)
5-A8,#2

BHPI_ABUFI(0:12) BHPI_ABUFI(0:12) to CPLD buffer


5-B8,#2

BHPI_ADDR(15) BHPI_ADDR(15) Used as control signal


5-B11,#2
from CPLD buffer HPI_RDYn_from_CPLD BHPI_CPLD_RDYn BHPI_WRn BHPI_WRn_to_CPLD to CPLD buffer
5-C11,#2 5-B8,#3
BHPI_RDn BHPI_RDn_to_CPLD to CPLD buffer
C from CPLD buffer BPA_INTn_from_CPLD BHPI_CPLD_INTn BHPI_CSn
5-B8,#3
BHPI_CSn_to_CPLD to CPLD buffer C
5-B11,#2 5-C8,#3

D602
74AHC1G14GW
F1D100 F1D100

SGMII_US_P(1:2) SGMII_US_P(1:2) SGMII_DS_P(1:2) SGMII_DS_P(1:2)


2-G15,#5 F1D100 F1D100 2-G2,#5
RD602
4 2
SGMII_US_N(1:2) SGMII_US_N(1:2) SGMII_DS_N(1:2) SGMII_DS_N(1:2)
2-G15,#5 2-G2,#5
BITS_8K_SLICE_A 33R
F1S60_3W F1S60_3W
2-H4,#2
XVCC1=A3V3,XGND1=GND
communication of its contents not per-

D601 R601
mitted without written authorization.

F1S60_3W
74AHC1G14GW 150R BITS
All rights reserved. Passing on and
copying of this document, use and

D 4-F5,#2 ToD ToD D


5-C8,#2
RD601
4 2
LT_SLOT(0) 4-F5,#2 SLOT_ID(0)
BITS_8K_SLICE_B F1S60_3W
33R F1S60_3W LT_SLOT(1) SLOT_ID(1) PPS PPS
2-H9,#2
F1S60_3W
4-F5,#2 5-C8,#2
XVCC1=A3V3,XGND1=GND
LT_SLOT(2) SLOT_ID(2)
A3V3

3-B5,#2
3.3 LT_PWRON 3-C5,#2 LT_PWRON
LT_PWROFF 5-D8,#2 LT_PWROFF
LT_RESET LT_RST
100n

100n
CD601

CD602

3-C5,#2 POWER_12V

POWER B12V_IN B12V_IN

False
E BPconnector
E

GND

F F

GUIDING BLOCK
1AB047880001
X1
1
Dangle

2
Dangle
PLASTIC

G G
1AA 00014 0010 (9007) A2

TOPLEVEL/MAin 6/7
H H
ED 02

3FE-66250-AAAC-ECZZA 6 /112
1 2 3 4 5 6 7 8 9 10 11 12
2 3 4 5 8 9 10 11 12

A A

B B

C C
FRONT POTS CONNECTORS
SPLITTER + PROTECTOR
communication of its contents not per-
mitted without written authorization.
All rights reserved. Passing on and

2-B15,#28
copying of this document, use and

D Lx_T(1:32) Lx_T(1:32) D
2-B15
LX_R(1:32) Lx_R(1:32)

False
FLASH

E E

F F

G G
1AA 00014 0010 (9007) A2

TOPLEVEL/MAin 7/7
H H
ED 02

3FE-66250-AAAC-ECZZA 7 /112
1 2 3 4 5 6 7 8 9 10 11 12
1 2 3 4 5 6 7 10 11 12 13 14 15 16

A
A

A2D_IN_30A_P(2:3) A2D_IN_30A_P(2:3)
A2D_IN_30A_N(2:3) A2D_IN_30A_N(2:3)
GLP_A2D_P(2:3) A2D_OUT_P(2:3)
A2D_IN_17A_P(0:1) A2D_IN_17A_P(0:1)
GLP_A2D_N(2:3) A2D_OUT_N(2:3) A2D_IN_17A_N(0:1) A2D_IN_17A_N(0:1)

B
B

Lx_T(0:7)
Lx_A8_T(0:7) 2-B15,#17 Lx_T(0:15)
Lx_R(0:7)
Lx_A8_R(0:7) 2-B15,#16 Lx_R(0:15)

F1D100 F1D100 GLP_D2A_P(0:1) F1D100


GLP_A2D_P(0:1) GLP_A2D_P(0:1) GLP_D2A_P(0:1) GLP_D2A_P(0:1) GLP_A2D_P(0:1) GLP_A2D_P(0:1)
F1D100 F1D100 GLP_D2A_N(0:1) F1D100
C GLP_A2D_N(0:1) GLP_A2D_N(0:1) GLP_D2A_N(0:1) false GLP_D2A_N(0:1) GLP_A2D_N(0:1) GLP_A2D_N(0:1) C
F1D100 F1D100 D2A_OUT_30A_P(2:3) F1D100
GLP_D2A_P(2:3)
GLP_A2D_P(2:3) GLP_A2D_P(2:3) GLP_D2A_P(2:3) D2A_OUT_30A_P(2:3) D2A_OUT_30A_N(2:3) F1D100
GLP_D2A_P(2:3) GLP_A2D_P(2:3) A2D_IN_30A_P(2:3)
F1D100 F1D100 D2A_OUT_30A_N(2:3) F1D100
GLP_D2A_N(2:3) F1D100
GLP_A2D_N(2:3) GLP_A2D_N(2:3) GLP_D2A_N(2:3) D2A_IN_P(2:3) GLP_D2A_N(2:3) GLP_A2D_N(2:3) A2D_IN_30A_N(2:3)
D2A_OUT_17A_P(0:1)
D2A_IN_N(2:3) D2A_OUT_17A_N(0:1)
GLP_CLK0_P F1D100 GLP_CLK0_P GLP_CLK0_P
3GLP_30A
F1D100 GLP_CLK0_N
GLP_CLK0_N GLP_CLK0_N

GLP_CLK1_P F1D100 GLP_CLK1_P GLP_CLK1_P


D
F1D100 GLP_CLK1_N D
GLP_CLK1_N GLP_CLK1_N

AFE0_35M_CLK 2-H4,#3
35M_CLK

VINAXA_RST0n AFE_RSTn
R105A

GND
SGMII_DS_P SGMII_DS_P SGMII_US_P SGMII_US_P 1k
2-G2,#3 2-G15,#3

E
E SGMII_DS_N SGMII_DS_N SGMII_US_N SGMII_US_N
2-G2,#3 2-G15,#3
DFE_TDO_AFE0_TDI TDI TDO AFE0_TDO_AFE1_TDI

TMS TMS
DSL_WRn 2-C2,#5
DSL_WRn PB_DATA(0:15) 2-C2,#5 PB_DATA(0:15) D2A_OUT_17A_P(0:1)

D2A_OUT_17A_N(0:1)
TCK TCK
DSL_RDn 2-C2,#5
DSL_RDn DSL_INTn 2-D15,#3 DSL_INTn
TRSTn TRSTn
PB_ADDR(0:11) 2-C2,#5
PB_ADDR(0:11) DSL_RDYn 2-D15,#5
DSL_RDYn VINAX_A8_0-7
false

DSL_CSn 2-D2,#3
DSL_CSn
F F

C101A
100p
dangle NC_GPIO(2:8)
CHIP_ID(0:3) 10-F4
CHIP_ID(0:3) NC_GPIO(2:8)
dangle NC_GPIO_12 TCK_ET
NC_GPIO_12
dangle NC_GPIO(16)
NC_GPIO(16)

R101A
51R
VINAXA_RST0n VINAXA_RST0n
BITS_8K 2-H4,#2
BITS_8K VINAXA_RST1n
GND
2-H7,#3
G DFE_35M_SYS_CLK3 2-H4,#3
DSP_35M_SYS_CLK3 ToD_DFE 2-H7,#3 ToD_DFE
PPS_DFE PPS_DFE G
2-H7,#3
DFE_35M_SYS_CLK1 2-H4,#3
DSP_35M_SYS_CLK1 ToD_DATA_VAL_DFE ToD_DATA_VAL_DFE

SGMII_25M_CLK 2-H4,#3
SGMII_25M_CLK 2-H7,#3
DMT_SYNC_DFE DMT_SYNC_DFE
DSL_RSTn 2-I4,#3
RESETn
Lx_T(8:15)
Lx_A8_T(0:7)
communication of its contents not per-
mitted without written authorization.

Lx_R(8:15)
Lx_A8_R(0:7)
All rights reserved. Passing on and
copying of this document, use and

TDI 2-J2,#3
DSP_TDI

H BS_DSP_TMS DSP_TDO DFE_TDO_AFE0_TDI F1D100


H
F1D100
GLP_D2A_P(0:1) GLP_A2D_P(0:1) A2D_IN_17A_P(0:1)
BS_DSP_TCK F1D100
F1D100

GLP_D2A_N(0:1) GLP_A2D_N(0:1) A2D_IN_17A_N(0:1)


BS_DSL_TRSTn
NC_GPL_D2A_8-15_P(2:3) NC_GPL_A2D_8-15_P(2:3)
VINAX-D
Dangle GLP_D2A_P(2:3) GLP_A2D_P(2:3) Dangle

false
NC_GPL_D2A_8-15_N(2:3) NC_GPL_A2D_8-15_N(2:3)
Dangle GLP_D2A_N(2:3) GLP_A2D_N(2:3) Dangle

GLP_CLK0_P

I GLP_CLK0_N I

NC_GPL_CLK1_8-15_P
Dangle GLP_CLK1_P

NC_GPL_CLK1_8-15_N
Dangle GLP_CLK1_N
TMS 2-J2,#7
TMS

TCK 2-J2,#4
TCK

TRSTn 2-K2,#6
TRSTn AFE1_35M_CLK 2-H4,#3
35M_CLK
R103A
0R AFE_RSTn
J NE(ABAC,BBAC) J
Series resistor equipped for MVLT-D R104A
GND

1k
NE(ABAC,BBAC)

AFE0_TDO_AFE1_TDI TDI TDO 2-I10,#3


TDO

TMS TMS

TCK TCK

TRSTn TRSTn
K K
VINAX_A8_8-15
false

R102A

51R
NE(AAAC,BAAC)
Only equipped for MVLT-E
1AA 00014 0013 (9007) A1

L
16PORT_SLICE 1 / 1 L
ED 02

3FE-66250-AAAC-ECZZA 8 112
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
1 2 3 4 5 8 9 10 11 12

A A

B B

30a variant resistors


Equip R*17* for MVLT-D
Equip R*30* for MVLT-E

8-C12,#1
A2D_IN_30A_P(2:3)
R130A01 A2D_IN_30A_P(3)
0R
NE(AAAC,BAAC)
F1D100
8-H11,#1
C A2D_OUT_P(2:3) A2D_IN_17A_P(0:1)
C
8-A7,10-B3 A2D_OUT_P(3) R117A01 A2D_IN_17A_P(1)
F1D100
0R
NE(ABAC,BBAC)
F1D100

R130A02 A2D_IN_30A_P(2)
0R
NE(AAAC,BAAC)
F1D100

A2D_OUT_P(2) R117A02 A2D_IN_17A_P(0)


F1D100 0R
NE(ABAC,BBAC)
F1D100

8-C12,#1
A2D_IN_30A_N(2:3)
R130A03 A2D_IN_30A_N(3)
0R
NE(AAAC,BAAC)
F1D100
8-H11,#1
A2D_OUT_N(2:3) 8-B7,10-C3
A2D_IN_17A_N(0:1)
A2D_OUT_N(3) R117A03 A2D_IN_17A_N(1)
0R
communication of its contents not per-

F1D100
NE(ABAC,BBAC)
mitted without written authorization.

F1D100
All rights reserved. Passing on and

R130A04 A2D_IN_30A_N(2)
copying of this document, use and

0R
D NE(AAAC,BAAC)
F1D100 D
A2D_OUT_N(2) R117A04 A2D_IN_17A_N(0)
F1D100
0R
NE(ABAC,BBAC)
F1D100

D2A_OUT_30A_P(3) 8-C10,#1
D2A_OUT_30A_P(2:3)
R130A05
0R
NE(AAAC,BAAC)
F1D100

8-C8,25-D3
D2A_OUT_17A_P(0:1)
D2A_IN_P(3) R117A05 D2A_OUT_17A_P(1)
F1D100
0R
NE(ABAC,BBAC)
F1D100

R130A06 D2A_OUT_30A_P(2)
0R
NE(AAAC,BAAC)
F1D100

D2A_IN_P(2) R117A06 D2A_OUT_17A_P(0)


D2A_IN_P(2:3) F1D100
0R
8-C5,10-C3 NE(ABAC,BBAC)
F1D100

E E

8-C8,13-E3
D2A_OUT_30A_N(2:3)
R130A07 D2A_OUT_30A_N(3)
0R
NE(AAAC,BAAC)
F1D100

8-H9,25-D3
D2A_OUT_17A_N(0:1)
D2A_IN_N(3) R117A07 D2A_OUT_17A_N(1)
F1D100
0R
NE(ABAC,BBAC)
F1D100

R130A08 D2A_OUT_30A_N(2)
0R
NE(AAAC,BAAC)
F1D100

D2A_IN_N(2) R117A08 D2A_OUT_17A_N(0)


D2A_IN_N(2:3) F1D100
0R
8-C5,10-C3 NE(ABAC,BBAC)
F1D100

F F

G G
1AA 00014 0010 (9007) A2

H H
ED 02
PCB_group =
3FE-66250-AAAC-ECZZA 9 /112
1 2 3 4 5 6 7 8 9 10 11 12
X30 1

1 2 3 4 5 8 9 10 11 12

A A

U11DA
PEF88300

A11 Y7
NC_DSM_CK0_P
GLP_CLK0_P 8-D10,#1 B11 W7
Dangle

NC_DSM_CK0_N
B GLP_CLK0_N 8-D5,13-E3 B5 Y6
Dangle
B
NC_DSM_CK1_P
GLP_CLK1_P 8-D5,25-E3 A5 W6
Dangle

NC_DSM_CK1_N
GLP_CLK1_N 8-I9,25-E3
Dangle

GLP_A2D_P(0:1) GLP_A2D_P(0:3) NC_DSM_RXP(0:3)


GLP_A2D_P(0:1) 8-C12,#1
Dangle

GLP_A2D_P(2:3)
GLP_A2D_P(2:3) 8-A7,9-C4 GLP_A2D_N(0:1) GLP_A2D_N(0:3) NC_DSM_RXN(0:3)
GLP_A2D_N(0:1) 8-C12,#1
Dangle

GLP_A2D_N(2:3)
GLP_A2D_N(2:3) 8-B7,9-D4 GLP_D2A_P(0:1) GLP_D2A_P(0:3) NC_DSM_TXP(0:3)
GLP_D2A_P(0:1) 8-C10,#1
Dangle

GLP_D2A_P(2:3)
GLP_D2A_P(2:3) 8-C5,9-E4 GLP_D2A_N(0:1) GLP_D2A_N(0:3) NC_DSM_TXN(0:3)
GLP_D2A_N(0:1) 8-C5,13-D3
Dangle

GLP_D2A_N(2:3)
GLP_D2A_N(2:3) 8-C5,9-F4
V14
C NC_SGMII_RXCLK_P
Dangle
C
C101DA U14
NC_SGMII_RXCLK_N
Dangle
10n W14 Y15
SGMII_DS_AC_P

SGMII_DS_P Slice_A
2-G2,#3 Y14 W15 2-G15,#3
SGMII_US_P
SGMII_DS_AC_N 2-G15,#3
SGMII_US_N
SGMII_DS_N Slice_A
10n R101DA

GND
2-G2,#3 E20 K18
C102DA Slice_A
1k DSL_CSn
G16 2-D2,#3

H18 2-C2,#5
DSL_WRn
PB_ADDR(0:11) 2-C2,#5 F20 R104DA 2-C2,#5
DSL_RDn
HP_RDYn
Slice_A
51R DSL_RDYn
E19 HP_INTn
R105DA 2-D15,#5
PB_DATA(0:15) Slice_A
51R DSL_INTn
2-C2,#5 R106DA 2-D15,#3
3.3
10k A3V3
communication of its contents not per-

Slice_A
mitted without written authorization.

R102DA U20 V16 R107DA


51R 51R
All rights reserved. Passing on and

Slice_A Slice_A
R103DA P5 Y3 R108DA
copying of this document, use and

51R 51R
D Slice_A
G19 K17
Slice_A
D
NC_TENB0 NC_RENB0
Dangle Dangle
J2 L3
NC_TENB1 NC_RENB1
GND Dangle
G20 V20
Dangle GND
NC_TSOP0 NC_RSOP0
Dangle Dangle
C1 R5
NC_TSOP1 NC_RSOP1
Dangle Dangle

NC_TPRTY0
J19 H17
NC_RPRTY0
Dangle Dangle

NC_TRPRTY1
H2 M1
NC_RPRTY1
Dangle Dangle

NC_TERR0
N16 W19 NC_RERR0
Dangle Dangle
U2 W4
NC_TERR1 NC_RERR1
Dangle Dangle
F19 R19
NC_TEOP0 NC_REOP0
Dangle Dangle
D1 H4
NC_TEOP1 NC_REOP1
Dangle Dangle
G17 J16 R116DA
NC_TMOD0 NC_RMOD0
Dangle Dangle 51R VINAXA_RST0n
G4 M5 R117DA 8-G5,13-F3
NC_TMOD1 NC_RMOD1
Dangle Dangle
51R VINAXA_RST1n
N19 T18 8-G5
E NC_PTPA0
Dangle
NC_RVAL0
Dangle
GPIO_B(0) E
L1 T3 GPIO_B(1)
NC_PTPA1 NC_RVAL1
Dangle
R17 T15
Dangle NC_GPIO(2:8)
NC_STPA0 NC_PRPA0 GPIO_B(2) NC_GPIO(2) 8-F5
Dangle Dangle
R2 U5 GPIO_B(3) NC_GPIO(3)
NC_STPA1 NC_PRPA1
Dangle Dangle

GPIO_B(4) NC_GPIO(4)

NC_T0ADR(0:6) NC_R0ADR(0:6) GPIO_B(5) NC_GPIO(5)


Dangle Dangle

GPIO_B(6) NC_GPIO(6)

ToD_DATA_VAL_DFE
NC_T1ADR(0:6) NC_R1ADR(0:6) GPIO_B(7) NC_GPIO(7)
Dangle Dangle

GPIO_B(8) NC_GPIO(8)

NC_T0DAT(0:15) NC_R0DAT(0:15)
Dangle Dangle

NC_T1DAT(0:15) NC_R1DAT(0:15) GPIO_B(9) 2-H7,#3


Dangle Dangle PPS_DFE
GPIO_B(10)
F 2-H7,#3
F
GPIO_B(11)
D7
ToD_DFE
NC_BTCFG0 00 for Boot up via MEI
CHIP_ID(0:3) 8-F2 E8
Dangle
Pull-Down on inputs
NC_BTCFG1 GPIO_B(12)
XU11DA1 L4 G3
Dangle
R118DA 8-F5
NC_GPIO_12
JTSEL MEMODE0
51R R121DA
A3V3

Slice_A

2-H7,#3
E5 F2 MEMODE1 R119DA GPIO_B(13)
10k Slice_A
51R 150R
00 for Intel Simplex
R120DA GPIO_B(14)
BITS_8K

100p
2-H4,#2
GND

C103DA
E11 GPIO_B(0:16)

Tau = 15ns
RESETn 2-I4,#3 GPIO_B(15) 2-H7,#3
D12
DMT_SYNC_DFE
R110DA GPIO_B(16)
F5 P11
DSP_35M_SYS_CLK1 8-F5
NC_GPIO(16)
BS_DSP_TCK Slice_A
150R SGMII_25M_CLK
2-J2,#4 B1 R11 2-H4,#3
BS_DSP_TMS 2-J2,#9 K3 2-H4,#3
DSP_35M_SYS_CLK3
G G
DSP_TDI 2-J2,#3 K4
GND
J3
IC NC_NC(0:3)
Dangle

XGND1=GND
Slice_A
3.3

A3V3

Slice_A
10k
R111DA
DSP_TDO_R
Slice_A
51R DSP_TDO
8-E10,#1
R112DA

BS_DSL_TRSTn 2-K2,#8
1AA 00014 0010 (9007) A2

H
VINAX-DFE 1/3 H
ED 02

3FE-66250-AAAC-ECZZA 10 /112
1 2 3 4 5 6 7 8 9 10 11 12
All rights reserved. Passing on and
copying of this document, use and
communication of its contents not per-
1AA 00014 0010 (9007) A2 mitted without written authorization.

H
G
F
E
D
C
B
A

1
1

3.3
A3V3
A1V0
A1V0
A1V0

POWER

Slice_A
Slice_A
Slice_A
Slice_A

0R
0R
0R
0R

RU11DA04
RU11DA02

RU11DA05
RU11DA01

2
2

CU11DA05 CU11DA01

Slice_A Slice_A
1u 1u
CU11DA23 CU11DA09
CU11DA06 CU11DA02

Slice_A Slice_A

POWER
1u 1u
Slice_A 1u Slice_A 1u

3
3

CU11DA12 CU11DA10

Slice_A 100n Slice_A

GND
GND
100n CU11DA07 CU11DA03

Slice_A Slice_A
100n 100n

CU11DA04

POWER POWER
CU11DA08

Slice_A Slice_A 100n

GND
GND
100n

4
4

POWER

A3V3_PLLA
A1V0_PLLA
POWER
A1V0_SG

A1V0_GLP

5
5

6
3.3

7
A3V3

A1V0
A3V3_PLLA
A1V0_PLLA
A1V0_GLP
A1V0_SG

GND
L6
K6
L7
K7
R6
F9
F6
P9

IC
L14
K14
L15
K15
R15
F15
E13
E12
E10
D10
P10
G10
G11
R12
R13

8
8

A1V0

Place one between DFE and each AFE


Slice_A
XGND1=GND

CU11DA35

100u
CU11DA36

100u
U11DA

CU11DA14
PEF88300

Slice_A
4u7
X5R

ED
0603
6.3V

9
9

CU11DA15

Slice_A
4u7
02
3.3

CU11DA16
A3V3

100n
X7R
16V

Slice_A
0402
P14
P8
P7
N14
N7
M14
M12
M11
M10
M9
M7
L12
L9
K12
K9
J14
J12
J11
J10
J9
J7
H14
H7
G14
G13
G12
G9
G8
G7

CU11DA17

Slice_A
100n
CU11DA24
CU11DA18
Slice_A
X5R

4u7
0603
6.3V

10
10

Slice_A
100n
CU11DA25
CU11DA19
Slice_A
4u7
Slice_A
100n

CU11DA29 CU11DA20
A1V0

Slice_A 100n 100n


X7R
16V

Slice_A
0402

CU11DA30 CU11DA21

Slice_A 100n 100n


Slice_A

CU11DA31 CU11DA22
11
11

Slice_A
Slice_A
100n 100n

CU11DA34 CU11DA26

Slice_A
GND
GND

Slice_A
100n 100n
3FE-66250-AAAC-ECZZA
12
12

VINAX-DFE 2/3

11 /112
H
G
F
E
D
C
B
A
All rights reserved. Passing on and
copying of this document, use and
communication of its contents not per-
1AA 00014 0010 (9007) A2 mitted without written authorization.

H
G
F
E
D
C
B
A

1
1

2
2

3
3

4
4

5
5

6
7
This page is intentionally left blank.

8
8

ED

9
9

02

10
10

11
11

3FE-66250-AAAC-ECZZA
12
12

VINAX-DFE 3/3

12 /112
H
G
F
E
D
C
B
A
1 2 3 4 5 8 9 10 11 12

A A

U10AA1
PEF88208

LD_RXA_P(0:7)
15-B15,#4

LD_RXA_N(0:7) LD_TX_P(0:7)
15-B15,#4 15-C2,#4
B B
LD_RXB_P(0:7) LD_TX_N(0:7)
15-B15,#4 15-C2,#4

LD_RXB_N(0:7)
15-B15,#4

NC_GPIO(0:7) NC_RES(0:7)
Dangle Dangle

15-C4,#2 R101AA1 E12 L4 R109AA1 15-G4,#2


LD_CTRL_CLK_0-1 Slice_A1
51R Slice_A1
51R LD_CTRL_CLK_4-5
15-F4,#2 EQ
R102AA1 E13 L2 EQ 15-J4,#2
R110AA1
LD_CTRL_VHEN_0 Slice_A1
51R Slice_A1
51R LD_CTRL_VHEN_4
EQ
R103AA1 E11 L5 EQ
R111AA1
LD_CTRL_DAT_0-1 Slice_A1
4k75 Slice_A1
4k75 LD_CTRL_DAT_4-5
15-F4,#2 EQ
R104AA1 E10 L3 EQ 15-J4,#2
R112AA1
LD_CTRL_VHEN_1 Slice_A1
51R Slice_A1
51R LD_CTRL_VHEN_5
15-E4,#2
15-C11,#2 EQ
R105AA1 E9 L8 EQ 15-G11,#2
15-I4,#2
R113AA1
LD_CTRL_CLK_2-3 Slice_A1
51R Slice_A1
51R LD_CTRL_CLK_6-7
EQ
R106AA1 E8 L6 EQ
C LD_CTRL_VHEN_2
15-F11,#2
Slice_A1
51R Slice_A1
51R
R114AA1 15-J11,#2
LD_CTRL_VHEN_6
C
EQ
R107AA1 E2 L10 EQ
R115AA1
LD_CTRL_DAT_2-3 Slice_A1
4k75 Slice_A1
4k75 LD_CTRL_DAT_6-7
15-F11,#2 EQ
R108AA1 E1 L9 EQ 15-J11,#2
R116AA1
LD_CTRL_VHEN_3 Slice_A1
51R Slice_A1
51R LD_CTRL_VHEN_7
15-E11,#2 EQ EQ 15-I11,#2
R117AA1 (3GLP in band control)

GND
H3 F2 SSC_DO
Slice_A1
1k
SSC_SELECT
Dangle 4k75 on data signals due to timing issue between AFE and LD
EQ G3 G2
Dangle
SSC_CLK SSC_DI Dangle

SSC_CSn F13
Dangle

K12
35M_CLK 2-H4,#3 L12 EQ B15
NC_AFE_35M_CLK_OUT NC_SYNC_IN
Dangle Dangle

GND
C14 B14
NC_SYNC_OUT
communication of its contents not per-

Dangle
mitted without written authorization.

A14
NC_DCDC_SYNC_CLK
All rights reserved. Passing on and

Dangle
copying of this document, use and

D D
NC_DNC(0:17)
Dangle

GLP_D2A_P(0) D15 E15 GLP_A2D_P(0)


GLP_D2A_P(0:1) 8-C10,#1 E14 F14 8-C12,#1
GLP_A2D_P(0:1)
GLP_D2A_N(0) GLP_A2D_N(0)
GLP_D2A_N(0:1) 8-C5,10-C3 F15 G15 8-C12,#1
GLP_A2D_N(0:1)
GLP_D2A_P(1) GLP_A2D_P(1)
GLP_D2A_N(1) G14 H14 GLP_A2D_N(1)

GLP_D2A_P(2) K14 L14 GLP_A2D_P(2)


GLP_D2A_P(2:3) 8-C10,9-D9 K15 L15 8-C12,9-C9
GLP_A2D_P(2:3)
GLP_D2A_N(2) GLP_A2D_N(2)
GLP_D2A_N(2:3) 8-C8,9-E9 M14 N14 8-C12,9-D9
GLP_A2D_N(2:3)
GLP_D2A_P(3) GLP_A2D_P(3)

GLP_D2A_N(3) M15 N15 GLP_A2D_N(3)


J14 P14
E GLP_CLK0_P GLP_CLK1_P
E
8-D10,#1 H15 P15 8-D10
GLP_CLK0_N 8-D5,10-B4 8-D10
GLP_CLK1_N
D13 MISC(0:2)
100n
F3 C101AA1
CREF
R118AA1 Slice_A1
H12 F4 EQ
150R
TCK_R CREFGND A3V3
Slice_A1
EQ K13 E3 R119AA1
IREF
Slice_A1
3k
H13 E4 EQ
IREFGND

G13 G4
C15 H4

XGND1=GND
Slice_A1

A1V0

10k

10k

10k
R126AA1

R125AA1

R124AA1
F AFE_RSTn 8-G5,#1
F

NE

EQ

EQ
GND
MISC(0)
MISC(1)

MISC(2)

EQ

NE

NE
R122AA1

R121AA1

R120AA1
10k

10k

10k
Slice_A1

Slice_A1

Slice_A1
TCK 2-J2,#4
TMS 10-G4,#2
G TDI R123AA1 GND
G
8-E10,#1
Slice_A1
51R TDO
EQ 8-E12,#1
TRSTn 10-H4,#2
1AA 00014 0010 (9007) A2

H
VINAX-A8 1/4 H
ED 02

3FE-66250-AAAC-ECZZA 13 /112
1 2 3 4 5 6 7 8 9 10 11 12
All rights reserved. Passing on and
copying of this document, use and
communication of its contents not per-
1AA 00014 0010 (9007) A2 mitted without written authorization.

H
G
F
E
D
C
B
A
R201AA1
C201AA1
0R
Slice_A1
4u7
Slice_A1
EQ EQ

A1V0

1
1

C202AA1
4u7
Slice_A1
EQ

C203AA1
100n
Slice_A1
EQ

C227AA1 R203AA1
0R
100n Slice_A1

Slice_A1

GND
EQ EQ

A1V0
C205AA1
100n

2
2

Slice_A1
EQ

C206AA1
100n
Slice_A1
C228AA1 R204AA1 EQ
0R

3.3
100n Slice_A1

Slice_A1

GND
EQ EQ

A3V3
C208AA1
100n
Slice_A1
EQ

C229AA1 R205AA1
0R

3
3

1u Slice_A1

Slice_A1
EQ EQ

A1V0
C230AA1

1u
Slice_A1
EQ

C231AA1 C211AA1

100n 100n
Slice_A1
Slice_A1
EQ EQ

C212AA1
C232AA1 100n
Slice_A1
100p EQ
Slice_A1

GND
EQ
C213AA1

4
4

100n
Slice_A1
EQ

C233AA1 R206AA1
0R
100n Slice_A1

Slice_A1
EQ EQ

A1V0
C215AA1
C234AA1 100n
Slice_A1
100n EQ
Slice_A1
EQ C216AA1
100n
Slice_A1
C235AA1 EQ

100p C217AA1

5
5

Slice_A1

GND
EQ 100n
Slice_A1
EQ

C236AA1 R207AA1
0R
GND

3.3
100n Slice_A1

Slice_A1
EQ EQ
A3V3

C237AA1

100n
Slice_A1
EQ

C238AA1

6
100p
VDD1V0

Slice_A1

GND
EQ
VDDPLL3V3
VDDPLL1V0
VDD_GLP
VDDBS3V3
VDDBS1V0
E5
E6
P7
N7
P4
N4
B4
C4
B7
C7

L11
M13
J13
P13
N13
P10
N10
B10
C10
B13
C13

XGND1=GND

7
U10AA1

PEF88208

EQ

K11
F5
J4
J3
F12
M10
M7
L7
M4
D4
E7
D7
D10
R13
R10
R7
R4
A4
A7
A10
A13

8
8

CU10AA15
100p
Slice_A1
EQ
VDD3V3

C219AA1
CU10AA16 100p
Slice_A1
100n CU10AA11 EQ
Slice_A1
EQ 100p
Slice_A1
CU10AA17 EQ
C220AA1
3.3

100n 100n
Slice_A1 Slice_A1
GND

EQ CU10AA12 EQ
A3V3

100n C221AA1
Slice_A1
EQ 100n
ED

9
9

Slice_A1
CU10AA13 EQ

100n C222AA1
Slice_A1
EQ 100n
02

Slice_A1
CU10AA14 EQ

100n C223AA1
Slice_A1
GND

EQ 100n
A1V0

Slice_A1
EQ

C224AA1
100n
Slice_A1
EQ

C225AA1
100n
10
10

Slice_A1
EQ

R202AA1
C297AA1 C226AA1
R297AA1 0R
3.3

4n7 1u Slice_A1
1R
Slice_A1 Slice_A1 Slice_A1
GND

EQ EQ EQ EQ
A3V3

C296AA1
R296AA1
4n7
1R
Slice_A1 Slice_A1
EQ EQ

C295AA1
R295AA1
4n7
1R
Slice_A1 Slice_A1
EQ EQ

C294AA1
R294AA1
11
11

4n7
1R
Slice_A1 Slice_A1
EQ EQ

C293AA1
R293AA1
4n7
1R
Slice_A1 Slice_A1
EQ EQ

C292AA1
R292AA1
4n7
Slice_A1 Slice_A1
1R
EQ EQ

C291AA1
R291AA1
VINAX-A8

4n7
1R
3FE-66250-AAAC-ECZZA

Slice_A1 Slice_A1
EQ EQ

C290AA1
R290AA1
12
12

4n7
1R
Slice_A1 Slice_A1
GND

EQ EQ
2/4

14 /112
H
G
F
E
D
C
B
A
1 2 3 4 5 6 7 10 11 12 13 14 15 16

A
A

2-B15,#12 Lx_A8_T(0:7)

2-B15,#11 Lx_A8_R(0:7)

13-B5,#4
LD_RXA_P(0:7)

13-B5,#4
LD_RXA_N(0:7)
B
B
LD_RXB_P(0:7)
13-B5,#4

13-B5,#4
LD_RXB_N(0:7)

LD_TX_P(0:7)
13-B9,#4

LD_TX_N(0:7) 13-B9,#4
C C

Dual_VDSL_PORT_0-1 Dual_VDSL_PORT_2-3
Lx_A8_T(0) Lx_A8_T(2)
Lx_A_T Lx_A_T
LD_CTRL_VHEN_0 13-C3,#2
LD_VH_EN_A LD_CTRL_VHEN_2 13-C3,#2
LD_VH_EN_A
Lx_A8_R(0) Lx_A8_R(2)
Lx_A_R Lx_A_R

F1D100 F1D100 F1D100 F1D100


LD_TX_P(0) LD_RXA_P(0) LD_TX_P(2) LD_RXA_P(2)
TX_A_P LD_RXA_A_P TX_A_P LD_RXA_A_P
F1D100 F1D100 F1D100 F1D100
LD_TX_N(0) LD_RXA_N(0) LD_TX_N(2) LD_RXA_N(2)
TX_A_N LD_RXA_A_N TX_A_N LD_RXA_A_N
D
D
F1D100 LD_RXB_P(0) F1D100 LD_RXB_P(2)
LD_RXB_A_P LD_RXB_A_P
F1D100 LD_RXB_N(0) F1D100 LD_RXB_N(2)
LD_RXB_A_N LD_RXB_A_N

Lx_A8_T(1) Lx_A8_T(3)
Lx_B_T Lx_B_T
LD_CTRL_VHEN_1 13-C3,#2
LD_VH_EN_B LD_CTRL_VHEN_3 13-C3,#2
LD_VH_EN_B
Lx_A8_R(1) Lx_A8_R(3)
Lx_B_R Lx_B_R
E
E F1D100 F1D100 F1D100
LD_TX_P(1) F1D100 LD_RXA_P(1) LD_TX_P(3) LD_RXA_P(3)
TX_B_P LD_RXA_B_P TX_B_P LD_RXA_B_P
F1D100 F1D100 F1D100
LD_TX_N(1) F1D100 LD_RXA_N(1) LD_TX_N(3) LD_RXA_N(3)
TX_B_N LD_RXA_B_N TX_B_N LD_RXA_B_N

F1D100 LD_RXB_P(1) F1D100 LD_RXB_P(3)


LD_RXB_B_P LD_RXB_B_P
F1D100 LD_RXB_N(1) F1D100 LD_RXB_N(3)
LD_RXB_B_N LD_RXB_B_N

LD_CTRL_DAT_0-1 13-C3,#2
LD_CTRL_DATA LD_CTRL_DAT_2-3 13-C3,#2
LD_CTRL_DATA
F F

LD_CTRL_CLK_0-1 13-C3,#2
LD_CTRL_CLK LD_CTRL_CLK_2-3 13-C3,#2
LD_CTRL_CLK
false false

G
G

Dual_VDSL_PORT_4-5 Dual_VDSL_PORT_6-7
Lx_A8_T(4) Lx_A8_T(6)
Lx_A_T Lx_A_T
LD_CTRL_VHEN_4 LD_VH_EN_A LD_CTRL_VHEN_6 LD_VH_EN_A
13-C10,#2 Lx_A8_R(4) 13-C10,#2 Lx_A8_R(6)
Lx_A_R Lx_A_R

F1D100 F1D100 F1D100 F1D100


communication of its contents not per-
mitted without written authorization.

LD_TX_P(4) LD_RXA_P(4) LD_TX_P(6) LD_RXA_P(6)


TX_A_P LD_RXA_A_P TX_A_P LD_RXA_A_P
All rights reserved. Passing on and
copying of this document, use and

F1D100 F1D100 F1D100 F1D100


LD_TX_N(4) LD_RXA_N(4) LD_TX_N(6) LD_RXA_N(6)
TX_A_N LD_RXA_A_N TX_A_N LD_RXA_A_N
H
H
F1D100 LD_RXB_P(4)
F1D100 LD_RXB_P(6)
LD_RXB_A_P LD_RXB_A_P
F1D100 LD_RXB_N(4)
F1D100 LD_RXB_N(6)
LD_RXB_A_N LD_RXB_A_N

Lx_A8_T(5) Lx_A8_T(7)
Lx_B_T Lx_B_T
LD_CTRL_VHEN_5 LD_VH_EN_B LD_CTRL_VHEN_7 LD_VH_EN_B
13-C10,#2 Lx_A8_R(5) 13-C10,#2 Lx_A8_R(7)
Lx_B_R Lx_B_R

I F1D100 F1D100 F1D100 F1D100 I


LD_TX_P(5) LD_RXA_P(5) LD_TX_P(7) LD_RXA_P(7)
TX_B_P LD_RXA_B_P TX_B_P LD_RXA_B_P
F1D100 F1D100 F1D100 F1D100
LD_TX_N(5) LD_RXA_N(5) LD_TX_N(7) LD_RXA_N(7)
TX_B_N LD_RXA_B_N TX_B_N LD_RXA_B_N

F1D100 LD_RXB_P(5)
F1D100 LD_RXB_P(7)
LD_RXB_B_P LD_RXB_B_P
F1D100 LD_RXB_N(5)
F1D100 LD_RXB_N(7)
LD_RXB_B_N LD_RXB_B_N

LD_CTRL_DAT_4-5 LD_CTRL_DATA LD_CTRL_DAT_6-7 LD_CTRL_DATA


13-C10,#2 13-C10,#2
J J
LD_CTRL_CLK_4-5 13-C10,#2
LD_CTRL_CLK LD_CTRL_CLK_6-7 13-C10,#2
LD_CTRL_CLK
false false

K K
1AA 00014 0013 (9007) A1

L
VINAX-A8 3/4 L
ED 02

3FE-66250-AAAC-ECZZA 15 112
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
All rights reserved. Passing on and
copying of this document, use and
communication of its contents not per-
1AA 00014 0010 (9007) A2 mitted without written authorization.

H
G
F
E
D
C
B
A

1
1

2
2

3
3

4
4

5
5

6
7
This sheet is intentionally left blank

8
8

ED

9
9

02

10
10

11
11

VINAX-A8

3FE-66250-AAAC-ECZZA
12
12

4/4

16 /112
H
G
F
E
D
C
B
A
1 2 3 4 5 8 9 10 11 12

A A

T101L02 TNV3 2-B15,#9


Lx_A_T

CDSOD323-T15SC
2

2
NE

EQ
R112L02

V106L02
R105L02

15V
C103L02 330p LD_RXBARP
LD_RXB_A_P 1k8
13-B5,#1 EQ EQ 5 7
R107L02

1
C105L02 3n3 LD_RXAARP
LD_RXA_A_P 180R

NE
13-B5,#1 EQ EQ
R109L02 F1S60_3W TNV3

PP
C108L02
C107L02

C111L02
5R11

~6x5mm mod2
EQ PRIM_CAPTA

390p
3 EQ 1

TERM_A
10p

27n
except_assy

R110L02 F1S60_3W TNV3

630V
5R11

NE

EQ
R108L02 1206-1%
EQ 6 8
PRIM_CAPRA
C106L02 3n3 LD_RXAARN
180R

CDSOD323-T15SC
B LD_RXA_A_N B

2
NE

EQ
13-B5,#1 EQ EQ

R111L02

V105L02
R106L02

15V
C104L02 330p LD_RXBARN
LD_RXB_A_N 1k8
13-B5,#1 EQ EQ 4 2

1
T = 1:1,4
TNV3 2-B15,#8
SM12
Lx_A_R
up to 17a for 30a
R104L02
INS_A_P INS_A_R_P 1
INS_2_P 47R5
EQ 3
F1S60_3W NC_V102L_A
Dangle
R102L02

2
2 NE
INS_A_N INS_A_R_N
INS_2_N 47R5
EQ mutually exclusive, use combined footprint
equip only one

EQ
V102L02

V101L02
AZ23C22
R101L02

22V
C101L02 1n2 IN_A_P OUT_A_P OUT_A_R_P
TX_A_P IN_2_P OUT_2_P 1R

3
13-B9,#1 EQ EQ 0603 SM05
C C
R103L02
C102L02 1n2 IN_A_N OUT_A_N OUT_A_R_N 1
TX_A_N IN_2_N OUT_2_N 1R
13-B9,#1 EQ EQ 3 NC_V103L_A
Dangle
2 NE

1
F1S60_3W

V103L02

T101L01 TNV3 2-B15,#9


Lx_B_T

CDSOD323-T15SC
2

2
NE

EQ
R112L01

V106L01
communication of its contents not per-

R105L01
mitted without written authorization.

15V
C103L01 330p LD_RXBBRP
LD_RXB_B_P 1k8
All rights reserved. Passing on and

13-B5,#1 EQ EQ 5 7
copying of this document, use and

D R107L01 D

1
180R
LD_RXABRP C105L01 3n3 F1S60_3W
LD_RXA_B_P
NE

13-B5,#1 EQ EQ
R109L01 TNV3

PP
C108L01

5R11
C107L01

C111L01

~6x5mm mod2
PRIM_CAPTB
EQ
390p

3 EQ 1

TERM_B
10p

27n
except_assy
R110L01 TNV3

630V
5R11
NE

EQ
R108L01 1206-1%
EQ 6 8
PRIM_CAPRB
LD_RXABRN C106L01 3n3 F1S60_3W

CDSOD323-T15SC
LD_RXA_B_N 180R

2
NE

EQ
13-B5,#1 EQ EQ

R111L01

V105L01
R106L01

15V
C104L01 330p LD_RXBBRN
LD_RXB_B_N 1k8
13-B5,#1 EQ EQ 4 2

1
T = 1:1,4
TNV3 2-B15,#8

SM12
Lx_B_R
R104L01 1
INS_B_P
47R5
INS_B_R_P F1S60_3W
INS_1_P EQ 3
E NC_V102L_B
Dangle
E
R102L01

2
2 NE
INS_B_N INS_B_R_N
INS_1_N 47R5
EQ

EQ
V102L01

V101L01
AZ23C22
R101L01

22V
C101L01 1n2 IN_B_P OUT_B_P OUT_B_R_P
TX_B_P IN_1_P OUT_1_P 1R

3
13-B9,#1 EQ EQ 0603 SM05
R103L01
C102L01 1n2 IN_B_N OUT_B_N OUT_B_R_N 1
TX_B_N IN_1_N OUT_1_N 1R
13-B9,#1 EQ EQ 3 NC_V103L_B
Dangle
C0G-0603 NE
2

1
F1S60_3W

V103L01
Component names have been swapped!
for 30a up to 17a

F Component names in the hybrid area are swapped


F
mutually exclusive, use combined footprint
C196L02 10n
EQ
equip only one in following way:

CPH_A_P C198L02
EQ 1u
LD_VH_EN_A VH_EN_2 CPH_2_P xxxxL01 is connected to line L02
13-C3,#2

CPH_A_N xxxxL02 is connected to line L01


CPH_2_N
C197L02 10n VAUXP VAUXP and so on for all following pairs of 2
EQ

C199L02 1u
Slice_A1
Slice_A1
CPL_A_P EQ
CPL_2_P
pins 13 & 14 pins 27 & 28
CPL_A_N
CPL_2_N
G G
C190L01

C191L01

C192L01

C190L02

C191L02

C192L02
EQ

EQ

EQ

EQ

EQ

EQ
X7R

X7R

X7R

C196L01 10n
EQ
100n

100n

50V-0402 X7R
4u7

10n

4u7

10n

CPH_B_P C198L01
EQ 1u
50V
1206

50V

0603

50V
0402

LD_VH_EN_B VH_EN_1 CPH_1_P 25V-0805 X7R

CPH_B_N

13-C3,#2
CPH_1_N
C197L01 10n pin 12 pin 29
EQ

C199L01
EQ 1u
1AA 00014 0010 (9007) A2

CPL_B_P
LD_CTRL_CLK 13-C3,#2
CLK CPL_1_P GND GND

H LD_CTRL_DATA 13-C3,#2
DATA CPL_1_N
CPL_B_N Dual VDSL LD 1 / 1 H
THS6226
ED 02
false

3FE-66250-AAAC-ECZZA 17 /112
1 2 3 4 5 6 7 8 9 10 11 12
1 2 3 4 5 8 9 10 11 12

A A

B B

U01L02
THS6226

7 17
C IN_1_P OUT_1_P
C
17-E3 6 20 17-E4
IN_1_N 17-E3 9 15 17-E4
OUT_1_N
VH_EN_1 13-C3,#2 18 16 17-G4
CPH_1_P
INS_1_P 17-E4 19 11 17-G4
CPH_1_N
INS_1_N 17-E4 13 10 17-H4
CPL_1_P

VAUXP
14 17-H5
CPL_1_N

3 EQ 21
IN_2_P 17-C3 2 24 17-C4
OUT_2_P
IN_2_N 17-C3 32 26 17-C4
OUT_2_N
VH_EN_2 CPH_2_P
communication of its contents not per-
mitted without written authorization.

13-C3,#2 22 25 17-F4
INS_2_P CPH_2_N
All rights reserved. Passing on and

17-C4 23 30 17-F4
copying of this document, use and

D INS_2_N 17-C4 27 31 17-G4


CPL_2_P D

VAUXP
28 17-G5
CPL_2_N
1

8
5 12
CLK 13-C3,#2 4 29
DATA 13-C3,#2
XGND1=GND Slice_A1

GND

E E

F F

G G
1AA 00014 0010 (9007) A2

H H
ED 02

3FE-66250-AAAC-ECZZA 18 /112
1 2 3 4 5 6 7 8 9 10 11 12
1 2 3 4 5 8 9 10 11 12

A A

T101L04 TNV3 2-B15,#9


Lx_A_T

CDSOD323-T15SC
2

2
NE

EQ
R112L04

V106L04
R105L04

15V
C103L04 330p LD_RXBARP
LD_RXB_A_P 1k8
13-B5,#1 EQ EQ 5 7
R107L04

1
C105L04 3n3 LD_RXAARP
LD_RXA_A_P 180R

NE
13-B5,#1 EQ EQ
R109L04 F1S60_3W TNV3

PP
C108L04
C107L04

C111L04
5R11

~6x5mm mod2
EQ PRIM_CAPTA

390p
3 EQ 1

TERM_A
10p

27n
except_assy

R110L04 F1S60_3W TNV3

630V
5R11

NE

EQ
R108L04 1206-1%
EQ 6 8
PRIM_CAPRA
C106L04 3n3 LD_RXAARN
180R

CDSOD323-T15SC
B LD_RXA_A_N B

2
NE

EQ
13-B5,#1 EQ EQ

R111L04

V105L04
R106L04

15V
C104L04 330p LD_RXBARN
LD_RXB_A_N 1k8
13-B5,#1 EQ EQ 4 2

1
T = 1:1,4
TNV3 2-B15,#8
SM12
Lx_A_R
up to 17a for 30a
R104L04
INS_A_P INS_A_R_P 1
INS_2_P 47R5
EQ 3
F1S60_3W NC_V102L_A
Dangle
R102L04

2
2 NE
INS_A_N INS_A_R_N
INS_2_N 47R5
EQ mutually exclusive, use combined footprint
equip only one

EQ
V102L04

V101L04
AZ23C22
R101L04

22V
C101L04 1n2 IN_A_P OUT_A_P OUT_A_R_P
TX_A_P IN_2_P OUT_2_P 1R

3
13-B9,#1 EQ EQ 0603 SM05
C C
R103L04
C102L04 1n2 IN_A_N OUT_A_N OUT_A_R_N 1
TX_A_N IN_2_N OUT_2_N 1R
13-B9,#1 EQ EQ 3 NC_V103L_A
Dangle
2 NE

1
F1S60_3W

V103L04

T101L03 TNV3 2-B15,#9


Lx_B_T

CDSOD323-T15SC
2

2
NE

EQ
R112L03

V106L03
communication of its contents not per-

R105L03
mitted without written authorization.

15V
C103L03 330p LD_RXBBRP
LD_RXB_B_P 1k8
All rights reserved. Passing on and

13-B5,#1 EQ EQ 5 7
copying of this document, use and

D R107L03 D

1
180R
LD_RXABRP C105L03 3n3 F1S60_3W
LD_RXA_B_P
NE

13-B5,#1 EQ EQ
R109L03 TNV3

PP
C108L03

5R11
C107L03

C111L03

~6x5mm mod2
PRIM_CAPTB
EQ
390p

3 EQ 1

TERM_B
10p

27n
except_assy
R110L03 TNV3

630V
5R11
NE

EQ
R108L03 1206-1%
EQ 6 8
PRIM_CAPRB
LD_RXABRN C106L03 3n3 F1S60_3W

CDSOD323-T15SC
LD_RXA_B_N 180R

2
NE

EQ
13-B5,#1 EQ EQ

R111L03

V105L03
R106L03

15V
C104L03 330p LD_RXBBRN
LD_RXB_B_N 1k8
13-B5,#1 EQ EQ 4 2

1
T = 1:1,4
TNV3 2-B15,#8

SM12
Lx_B_R
R104L03 1
INS_B_P
47R5
INS_B_R_P F1S60_3W
INS_1_P EQ 3
E NC_V102L_B
Dangle
E
R102L03

2
2 NE
INS_B_N INS_B_R_N
INS_1_N 47R5
EQ

EQ
V102L03

V101L03
AZ23C22
R101L03

22V
C101L03 1n2 IN_B_P OUT_B_P OUT_B_R_P
TX_B_P IN_1_P OUT_1_P 1R

3
13-B9,#1 EQ EQ 0603 SM05
R103L03
C102L03 1n2 IN_B_N OUT_B_N OUT_B_R_N 1
TX_B_N IN_1_N OUT_1_N 1R
13-B9,#1 EQ EQ 3 NC_V103L_B
Dangle
C0G-0603 NE
2

1
F1S60_3W

V103L03
Component names have been swapped!
for 30a up to 17a

F Component names in the hybrid area are swapped


F
mutually exclusive, use combined footprint
C196L04 10n
EQ
equip only one in following way:

CPH_A_P C198L04
EQ 1u
LD_VH_EN_A VH_EN_2 CPH_2_P xxxxL01 is connected to line L02
13-C3,#2

CPH_A_N xxxxL02 is connected to line L01


CPH_2_N
C197L04 10n VAUXP VAUXP and so on for all following pairs of 2
EQ

C199L04 1u
Slice_A1
Slice_A1
CPL_A_P EQ
CPL_2_P
pins 13 & 14 pins 27 & 28
CPL_A_N
CPL_2_N
G G
C190L03

C191L03

C192L03

C190L04

C191L04

C192L04
EQ

EQ

EQ

EQ

EQ

EQ
X7R

X7R

X7R

C196L03 10n
EQ
100n

100n

50V-0402 X7R
4u7

10n

4u7

10n

CPH_B_P C198L03
EQ 1u
50V
1206

50V

0603

50V
0402

LD_VH_EN_B VH_EN_1 CPH_1_P 25V-0805 X7R

CPH_B_N

13-C3,#2
CPH_1_N
C197L03 10n pin 12 pin 29
EQ

C199L03
EQ 1u
1AA 00014 0010 (9007) A2

CPL_B_P
LD_CTRL_CLK 13-C3,#2
CLK CPL_1_P GND GND

H LD_CTRL_DATA 13-C3,#2
DATA CPL_1_N
CPL_B_N Dual VDSL LD 1 / 1 H
THS6226
ED 02
false

3FE-66250-AAAC-ECZZA 19 /112
1 2 3 4 5 6 7 8 9 10 11 12
1 2 3 4 5 8 9 10 11 12

A A

B B

U03L04
THS6226

7 17
C IN_1_P OUT_1_P
C
19-E3 6 20 19-E4
IN_1_N 19-E3 9 15 19-E4
OUT_1_N
VH_EN_1 13-C3,#2 18 16 19-G4
CPH_1_P
INS_1_P 19-E4 19 11 19-G4
CPH_1_N
INS_1_N 19-E4 13 10 19-H4
CPL_1_P

VAUXP
14 19-H5
CPL_1_N

3 EQ 21
IN_2_P 19-C3 2 24 19-C4
OUT_2_P
IN_2_N 19-C3 32 26 19-C4
OUT_2_N
VH_EN_2 CPH_2_P
communication of its contents not per-
mitted without written authorization.

13-C3,#2 22 25 19-F4
INS_2_P CPH_2_N
All rights reserved. Passing on and

19-C4 23 30 19-F4
copying of this document, use and

D INS_2_N 19-C4 27 31 19-G4


CPL_2_P D

VAUXP
28 19-G5
CPL_2_N
1

8
5 12
CLK 13-C3,#2 4 29
DATA 13-C3,#2
XGND1=GND Slice_A1

GND

E E

F F

G G
1AA 00014 0010 (9007) A2

H H
ED 02

3FE-66250-AAAC-ECZZA 20 /112
1 2 3 4 5 6 7 8 9 10 11 12
1 2 3 4 5 8 9 10 11 12

A A

T101L06 TNV3 2-B15,#9


Lx_A_T

CDSOD323-T15SC
2

2
NE

EQ
R112L06

V106L06
R105L06

15V
C103L06 330p LD_RXBARP
LD_RXB_A_P 1k8
13-B5,#1 EQ EQ 5 7
R107L06

1
C105L06 3n3 LD_RXAARP
LD_RXA_A_P 180R

NE
13-B5,#1 EQ EQ
R109L06 F1S60_3W TNV3

PP
C108L06
C107L06

C111L06
5R11

~6x5mm mod2
EQ PRIM_CAPTA

390p
3 EQ 1

TERM_A
10p

27n
except_assy

R110L06 F1S60_3W TNV3

630V
5R11

NE

EQ
R108L06 1206-1%
EQ 6 8
PRIM_CAPRA
C106L06 3n3 LD_RXAARN
180R

CDSOD323-T15SC
B LD_RXA_A_N B

2
NE

EQ
13-B5,#1 EQ EQ

R111L06

V105L06
R106L06

15V
C104L06 330p LD_RXBARN
LD_RXB_A_N 1k8
13-B5,#1 EQ EQ 4 2

1
T = 1:1,4
TNV3 2-B15,#8
SM12
Lx_A_R
up to 17a for 30a
R104L06
INS_A_P INS_A_R_P 1
INS_2_P 47R5
EQ 3
F1S60_3W NC_V102L_A
Dangle
R102L06

2
2 NE
INS_A_N INS_A_R_N
INS_2_N 47R5
EQ mutually exclusive, use combined footprint
equip only one

EQ
V102L06

V101L06
AZ23C22
R101L06

22V
C101L06 1n2 IN_A_P OUT_A_P OUT_A_R_P
TX_A_P IN_2_P OUT_2_P 1R

3
13-B9,#1 EQ EQ 0603 SM05
C C
R103L06
C102L06 1n2 IN_A_N OUT_A_N OUT_A_R_N 1
TX_A_N IN_2_N OUT_2_N 1R
13-B9,#1 EQ EQ 3 NC_V103L_A
Dangle
2 NE

1
F1S60_3W

V103L06

T101L05 TNV3 2-B15,#9


Lx_B_T

CDSOD323-T15SC
2

2
NE

EQ
R112L05

V106L05
communication of its contents not per-

R105L05
mitted without written authorization.

15V
C103L05 330p LD_RXBBRP
LD_RXB_B_P 1k8
All rights reserved. Passing on and

13-B5,#1 EQ EQ 5 7
copying of this document, use and

D R107L05 D

1
180R
LD_RXABRP C105L05 3n3 F1S60_3W
LD_RXA_B_P
NE

13-B5,#1 EQ EQ
R109L05 TNV3

PP
C108L05

5R11
C107L05

C111L05

~6x5mm mod2
PRIM_CAPTB
EQ
390p

3 EQ 1

TERM_B
10p

27n
except_assy
R110L05 TNV3

630V
5R11
NE

EQ
R108L05 1206-1%
EQ 6 8
PRIM_CAPRB
LD_RXABRN C106L05 3n3 F1S60_3W

CDSOD323-T15SC
LD_RXA_B_N 180R

2
NE

EQ
13-B5,#1 EQ EQ

R111L05

V105L05
R106L05

15V
C104L05 330p LD_RXBBRN
LD_RXB_B_N 1k8
13-B5,#1 EQ EQ 4 2

1
T = 1:1,4
TNV3 2-B15,#8

SM12
Lx_B_R
R104L05 1
INS_B_P
47R5
INS_B_R_P F1S60_3W
INS_1_P EQ 3
E NC_V102L_B
Dangle
E
R102L05

2
2 NE
INS_B_N INS_B_R_N
INS_1_N 47R5
EQ

EQ
V102L05

V101L05
AZ23C22
R101L05

22V
C101L05 1n2 IN_B_P OUT_B_P OUT_B_R_P
TX_B_P IN_1_P OUT_1_P 1R

3
13-B9,#1 EQ EQ 0603 SM05
R103L05
C102L05 1n2 IN_B_N OUT_B_N OUT_B_R_N 1
TX_B_N IN_1_N OUT_1_N 1R
13-B9,#1 EQ EQ 3 NC_V103L_B
Dangle
C0G-0603 NE
2

1
F1S60_3W

V103L05
Component names have been swapped!
for 30a up to 17a

F Component names in the hybrid area are swapped


F
mutually exclusive, use combined footprint
C196L06 10n
EQ
equip only one in following way:

CPH_A_P C198L06
EQ 1u
LD_VH_EN_A VH_EN_2 CPH_2_P xxxxL01 is connected to line L02
13-C10,#2

CPH_A_N xxxxL02 is connected to line L01


CPH_2_N
C197L06 10n VAUXP VAUXP and so on for all following pairs of 2
EQ

C199L06 1u
Slice_A1
Slice_A1
CPL_A_P EQ
CPL_2_P
pins 13 & 14 pins 27 & 28
CPL_A_N
CPL_2_N
G G
C190L05

C191L05

C192L05

C190L06

C191L06

C192L06
EQ

EQ

EQ

EQ

EQ

EQ
X7R

X7R

X7R

C196L05 10n
EQ
100n

100n

50V-0402 X7R
4u7

10n

4u7

10n

CPH_B_P C198L05
EQ 1u
50V
1206

50V

0603

50V
0402

LD_VH_EN_B VH_EN_1 CPH_1_P 25V-0805 X7R

CPH_B_N

13-C10,#2
CPH_1_N
C197L05 10n pin 12 pin 29
EQ

C199L05
EQ 1u
1AA 00014 0010 (9007) A2

CPL_B_P
LD_CTRL_CLK 13-C10,#2
CLK CPL_1_P GND GND

H LD_CTRL_DATA 13-C10,#2
DATA CPL_1_N
CPL_B_N Dual VDSL LD 1 / 1 H
THS6226
ED 02
false

3FE-66250-AAAC-ECZZA 21 /112
1 2 3 4 5 6 7 8 9 10 11 12
1 2 3 4 5 8 9 10 11 12

A A

B B

U05L06
THS6226

7 17
C IN_1_P OUT_1_P
C
21-E3 6 20 21-E4
IN_1_N 21-E3 9 15 21-E4
OUT_1_N
VH_EN_1 13-C10,#2 18 16 21-G4
CPH_1_P
INS_1_P 21-E4 19 11 21-G4
CPH_1_N
INS_1_N 21-E4 13 10 21-H4
CPL_1_P

VAUXP
14 21-H5
CPL_1_N

3 EQ 21
IN_2_P 21-C3 2 24 21-C4
OUT_2_P
IN_2_N 21-C3 32 26 21-C4
OUT_2_N
VH_EN_2 CPH_2_P
communication of its contents not per-
mitted without written authorization.

13-C10,#2 22 25 21-F4
INS_2_P CPH_2_N
All rights reserved. Passing on and

21-C4 23 30 21-F4
copying of this document, use and

D INS_2_N 21-C4 27 31 21-G4


CPL_2_P D

VAUXP
28 21-G5
CPL_2_N
1

8
5 12
CLK 13-C10,#2 4 29
DATA 13-C10,#2
XGND1=GND Slice_A1

GND

E E

F F

G G
1AA 00014 0010 (9007) A2

H H
ED 02

3FE-66250-AAAC-ECZZA 22 /112
1 2 3 4 5 6 7 8 9 10 11 12
1 2 3 4 5 8 9 10 11 12

A A

T101L08 TNV3 2-B15,#9


Lx_A_T

CDSOD323-T15SC
2

2
NE

EQ
R112L08

V106L08
R105L08

15V
C103L08 330p LD_RXBARP
LD_RXB_A_P 1k8
13-B5,#1 EQ EQ 5 7
R107L08

1
C105L08 3n3 LD_RXAARP
LD_RXA_A_P 180R

NE
13-B5,#1 EQ EQ
R109L08 F1S60_3W TNV3

PP
C108L08
C107L08

C111L08
5R11

~6x5mm mod2
EQ PRIM_CAPTA

390p
3 EQ 1

TERM_A
10p

27n
except_assy

R110L08 F1S60_3W TNV3

630V
5R11