DEBOUNCE CIRCUIT

library IEEE;

use IEEE.STD_LOGIC_1164.ALL;

entity debounce is

Port ( clk : in STD_LOGIC;

reset : in STD_LOGIC;

entrada : in STD_LOGIC;

salida : out STD_LOGIC);

end debounce;

architecture Behavioral of debounce is

signal Q1, Q2, Q3 : std_logic;

begin

--**Insert the following after the 'begin' keyword**

process(clk)

begin

if (clk'event and clk = '1') then

if (reset = '1') then

Q1 <= '0';

Q2 <= '0';

Q3 <= '0';

else

Q1 <= entrada;

Q2 <= Q1;

Q3 <= Q2;

end if;

end if;

end process;

salida <= Q1 and Q2 and (not Q3);

end Behavioral;
Simulacin