COA Interrupts

Introduction: -

1) After performing certain task, a process waits for device I/O to give input for further
computation and this takes a lot of CPU time in waiting.
2) This can be solved by
a) Having an interrupt signal send by the I/O devices whenever it's ready.
b) Dedicating a bus line called interrupt request line.
3) Interrupts are external events to computer which perform TOC from one program to other.
4) Before servicing an interrupt, the current ith instruction must be executed and a return address
of as ith+1 instruction must be saved.
5) Return address generally saved in processor stack or special register.
6) To acknowledge the I/o devices that its interrupt has been received an interrupt ACK signal will
be send to I/o device.

Interrupt-Latency

1) Time between when the interrupt request received and corresponding interrupt routine start its
execution.
2) This delay happens because we need to save information of currently executing program where
this interrupt has occurred and transfer the program to memory, which indeed takes a lot of
time.
3) We can minimize the interrupt latency by saving minimal content, generally only PC and PS
status register
4) If any other additional information need to be saved it should be saved by called interrupt
service routine or called interrupt program.
5) If the interrupt causing device can bar the high interrupt latency, then only minimal content
should be saved.

Interrupt Hardware: -

1) Introduction
a) A single INTR line is connected to all devices which is connected to ground via special gate which
are open-drain in nature i.e. if switch is closed voltage drops to 0.
b) By using a single INTR for all devices there is no method ACK the devices that their Interrupt has
been received.
2) Enabling and disabling Interrupts
a) A major problem is until devices receives a ACK that their interrupt has been received INTR line
or interrupt request line remain high which can lead to loops of interrupts.
b) To fix this three possible solutions,
i) Set the first instruction of interrupt service routine to disable the interrupts.
ii) Set the PS (processor Status) register "Interrupt Enable Bit" as 0.
iii) Use EDGE triggered mechanism i.e. processor read INTR only an edge comes and ignore line
afterwards.

3) The sequence of event to Handle an INTR from a single device: -

a) Device raise the interrupt.
b) Processor interrupt the currently executing program after completing its current instruction.
c) Interrupt are disable by setting "Interrupt Enable Bit" to 0.
d) To interrupt causing device a ACK is send, so that it can disable its interrupt signal.
e) Action by Interrupt service routine will be performed and gets completed
f) Interrupt Enabled again and Interrupted program get resumed.

Handling Multiple Devices

1) Introduction
a) If a single interrupt line is used, we additional information to know device has generated the
interrupt signal.
b) This can be accomplished by serval techniques:
i) Polling Technique
(1) Every device has an IRQ bit which if enabled means that device is waiting to service it
generated interrupt.
(2) Processor need to check(POLL) IRQ bit of every device one by one
(3) Disadvantage: Wastage of processor time in checking devices which don't even have an
interrupt.
ii) Vectored Interrupts:
(1) Device identify itself by sending a code [4-8 bit] to processor which is the starting
address of interrupt service routine, rest of the address is supplied/generated by
processor.
(2) This supplied code point to a location which stores the address of interrupt service
routine. Address of Interrupt routine service is referred to as INTERRUPT VECTOR.
(3) I/O devices send this code over Data Bus it might happen Processor is not ready to take
vector interrupt code as it has to first complete its current instruction execution and
also need the bus.
(4) So, whenever processor get ready it activates INTA line now to this I/O devices respond
by sending their vectors and turning off interrupt signal INTR line.
Exceptions: -

1) Recovery from error

a) Exception is referred to as an event caused by interruption.
b) These generally generate when user try to Divide by zero, Use of illegal opcode in
instruction.
c) Processor take this as same can interrupt generation.
d) In case of I/O interrupts processor complete the current instruction then service the
interrupt, but that is not case with error/exceptions. Processor cannot proceed further
as error occurred to current instruction so, immediate expectation processing need to
be done.
2) Solutions
a) Debugging
i) Trace Mode One line at a time and then debug that line.
ii) Breakpoints Programmer gives a specify Instruction position up till where to
execute then debug and return to program and continue after that.
3) Privileged Exceptions
a) Two modes in which OS works
i) User Mode
ii) Supervisor Mode
b) You cant execute privileged instructions in User Mode, if done so privileged exception
raise and OS immediately shift to supervisor mode and executes appropriate routine.