Further CL

Further Combinational Logic

Dr DC Hendry

January 2006

1 POS Expressions from K-Maps

A product of sums (POS) expression for a Boolean function takes the form of
a number of sum terms connected by the AND operator. For the value of the
function to be logic 1, each sum term must evaluate to 1, or in other words,
each sum term must not be 0.

f = (A + C)(A + B)(A + C)

We can derive such a POS expression from a K-Map as follows:

1. Circle all rectangles of 0s.

2. For each such rectangle write down an expression which represents the
inverse of that term. By De-Morgans Laws this gives a sum term.
3. AND together all such terms.

As an example consider expressing the Boolean function described by the fol-

lowing truth table as a POS expression.

A B C f
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 1
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 0

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which has kmap:

f AB
00 01 11 10
 

0
0 0 0 1
C  
1 1 1
0 0

Note that some choice does exist here in grouping of the 0s of the function.
The three product terms circled are:

AC
AB (an alternative was B C)
AC

Applying DeMorgan to each of these terms then gives:

A+C
A + B
A + C

and so the POS expression for the original function becomes:

f = (A + C)(A + B)(A + C)

2 Dont Cares

Very often when a Boolean function is specified, some cases are dont cares,
that is, for a given set of input values, we dont care what output the function
gives. This may arise because the given set of inputs can never arise. Consider
the following example. Suppose f is a function of four input signals, A, B, C
and D. The four input signals represent as a binary number a decimal digit
in the range 0 to 9. The output f of the required circuit is true when the
input digit is a prime number. In this case the six input cases representing the

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hexadecimal values 0xA through 0xF cannot occur - so then the output is a dont
care, represented on the output column as -.

As a truth table and K-Map:

f AB
A B C D f
0 0 0 0 0 00 01 11 10
0 0 0 1 1 -
00
0 0 0
0 0 1 0 1 
0 0 1 1 1 01 1 1 - 0
0 1 0 0 0 CD  
0 1 0 1 1 11  -
1 1  -
0 1 1 0 0 - -
10 1 
0 
0 1 1 1 1
1 0 0 0 0
1 0 0 1 0
1 0 1 0 -
1 0 1 1 -
1 1 0 0 -
1 1 0 1 -
1 1 1 0 -
1 1 1 1 -

So when constructing prime implicants from the K-Map we may choose to in-
clude dont care cases in a prime implicant or not to obtain the simplest expres-
sion. This gives f as:

f = AD + BC

When specifying a Boolean function using the mintern notation, dont cares are
given as follows:

X X
f= m(1, 2, 3, 5, 7) + d(10, 11, 12, 13, 14, 15)

Take the function represented by the K-Map:

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f ab
00 01 11 10

  
00 0 0 - 0
01 
0 0 - 0 
cd
11 0 1 - -

10

0 1 - 1

and the two sum terms are:

1. c which inverts to c.
2. a b which inverts to a + b.

and so the function as POS becomes:

f = c.(a + b)

3 Technology Mapping

Once we have a logic expression in minimal form, or as best as we can do, it is

then necessary to devise a circuit using basic logic gates which will implement
the expression. This is sometimes referred to as technology mapping. Finding
a solution is not difficult, finding the optimal solution is very difficult and best
left to CAD tools.

As an example suppose that we take the Boolean function from section 2. The
most obvious approach is simply to build the circuit as first a layer of AND
gates to form AD and BC, and then OR the outputs of the two AND gates to
form f , using the circuit of figure 1.

The problem with this circuit is that it turns out that for most implementation
technologies (for example CMOS integrated circuits, TTL integrated circuits
and so on), that an AND gate is always constructed as a NAND gate followed
by an inverter, similarly an OR gate is constructed as an OR gate followed by
an inverter. It is better therefore to use a circuit comprising entirely of NAND
or NOR gates. Figure 2 is a better implementation of the above circuit. It

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A
D  
f
 
B
C

Figure 1: Implementation with AND and OR gates

A

t
D 
 t
B t f
C

Figure 2: Implementation using only NAND gates

turns out that figure 1 requires 18 transistors, whereas figure 2 requires only 12
transistors.

You should be able to show fairly easily that starting from a Boolean expression
in POS form, that an implementation using NOR gates may be constructed in
a similar manner.

4 Other Notations

Additional notation you should be aware of is the use of a0 to represent a. This

notation is widely used with text based CAD tools for Boolean optimisation as
a means of denoting inversion. The first tutorial sheet also uses this notation,
and I use it in schematics. You should be familiar with both notations and
happily interchange between the two.

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