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6 5 4 3 2 1

REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

[3] CTR_BS2
R1 47K
[3] VRF28

R19
4

1nF [1,3] CTR_BS0

4
4
[1,3] CTR_BS1
C56

47K

L15
11
12
2
1

5
U101
NC NC

VGS1
VGS2

VCC

VEN2
VEN1
VON
4

4
C37 C38

10nH
56pF C39 22pF C47 13 10 L11 15nH
[3] RF_IN_L 4 4 RFOUT8 RFIN8 4
14 RFOUT5 RFIN5 9
22pF C5 22pF C49 16 7

RFGND2
RFGND1
[3] RF_IN_H 4 4 RFOUT2 RFIN1 3.6nH
15 6 L4
RFOUT1 RFIN2 4

GND

L14
NC NC RDALN40

8
4
17
4

4
C35 C36
close BB close LNA VBAT

3.3nH
C C

22pF
22pF
4

4
C31

C32
22uF 1nF NC
C46 C45 C44

4
U100

13
14

8
7
6
5
J10 J11 J4

VCC
VCC

RX4/GND
RX3
RX2
RX1/NC
J7
C20 47pF L5 0 PAD-RFTEST
[3] RF_OH 4 4 23 DCS_IN
CAP 22
C21 100pF L6 75ohm 24 20 1nF C22 1 2
[3] RF_OL 4 4 GSMIN CAP 4

21 NC
26 NC
28 RDA6625 R28
NC L9 2.2nH L16 3.9nH C34 22pF
ANT 9 4 4 4 4
1 GND
2 0
GND
3 GND
4 GND
10 GND GND 33

R30

R31
11 32

27nH

NC

NC
GND GND

L17

L10
NC
1.2pF

4
12 31

4
GND GND C54
25 GND GND 30

GND/CTR2
27 GND GND 29

RAMP

CTR1
CTR0
TXEN
19

15
16
17
18
R26 10K
[3] VRAMP_OUT 4

[1,3] CTR_BS1

[1,3] CTR_BS0

[3] PA_EN
B B

R27
NC
1nF 1nF 1nF 220pF

4
4
C52 C51 C50 C53

A A
COMPANY:
MOTIAN
TITLE:

DRAWN: DATED:
H002
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> D <Drawing Number> V1.0

RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 1OF 8
6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

BOOTMODE pinpad

BaseBand RDA8810NL
RDA8810P
GPIO_A_5 GPIO_C_1
0
1
1
1
GPIO_C_2
0
0
GPIO_C_3
0
0
GPIO_C_4
0
0
VSPIM_VSEL
1
0
[5] CAM_D0
[5] CAM_D1
[5] CAM_D2
[5] CAM_D3
[5] CAM_D4
D [5]
[5]
CAM_D5
CAM_D6
D
[5] CAM_D7
[5]
[5]
[5]
[5]
[5]
CAM_PCLK
CAM_HREF
CAM_VSYNC
CAM_MCLK
CAM_RST
SPI FLASH
[5] CAM_PDN1

V_PAD V_PAD

AA19

AA20
AC19

AC21

AC20
AB17

AB20

AB19
W18
H20

G20

D20

U18
C20

Y20

Y17

V18
Y18

T18
U200-B

K10

E20
E12

B21
B20
B15
L15

F20
F13
F12
M9

H6
H4

B3
L9

F7
F5
J7
R93

R81
R83
NC

NC22
NC21
NC20
NC19
NC18
NC17
NC16
NC15
NC14
NC13
NC12
NC11
NC10
NC9
NC8
NC7
NC6
NC5
NC4
NC3
NC2
NC1

M_SPI_CS0
CAM_D0
CAM_D1
CAM_D2
CAM_D3
CAM_D4
CAM_D5
CAM_D6
CAM_D7

CAM_PCLK
CAM_HREF
CAM_VSYNC
CAM_CLK

CAM_RST
CAM_PDN
[6] KEYIN_5

J_TMS

4
TP27

R90

100K
47K
NC
[6] KEYOUT_5

TP28 J_TDO
TP29 J_TCK
GPO
W13 GPO_0 CAMERA INTERFACE
M14 GPO_1
CTP_SHUTDOWN [7] N14 GPO_2

[7] HANDSET_DET Y8 GPIO_A_0


V_PAD
LAMP AA9 GPIO_A_1
V_PAD
GSENSOR_INT1 [6] AC9 GPIO_A_2 IP N17
GSENSOR_INT2 [6] W9 GPIO_A_3 QP_RXTXEN N16
[5] CAM_PDN2 AC8 GPIO_A_4 QN_RXTXDATA M17
V8 GPIO_A_5 IN_STROBE M16
DIGTAL RF
AB8
R59

R58

R32

R14

R97

R60

R99

R98

[6] KEYIN_3 GPIO_A_6 INTERFACE


[6] KEYIN_4 W8 GPIO_A_7
[6] KEYIN_0 100K R82 AC14
4 GPIO_B_0 GPIO
4

[6] HOST_WAKE Y13 GPIO_B_1 AC_DIV_IN P4 [3] AC_DIV_IN


C INTERFACE
C
NC/100K

NC/100K

NC/100K

[6] WF_INTN AA14 GPIO_B_2 GP_ADC_IN_0 J2 [4] MIC_DET


4.7K

4.7K

47K

47K

47K

[7] CTP_INT W14 GPIO_B_3 GP_ADC_IN_1 J3 [3] TS


GENERAL
[6] KEYOUT_1 Y15 GPIO_B_4 GP_ADC_IN_2 H3
ADC
[6] KEYOUT_2 AB15 GPIO_B_5 GP_ADC_IN_3 J4
[6,7] I2C3_SCL AC15 GPIO_B_6
[6,7] I2C3_SDA
Gsensor,Psensor,CTP AB13 GPIO_B_7
47K R96 J16
[2,3,6,7] V_PAD 4 GPIO_C_1
K16 GPIO_C_2
J17 GPIO_C_3
L17 GPIO_C_4
47K R13 K17 AB3
[2,3,6,7] V_PAD 4 GPIO_C_5 LINE_IN_L LINE_IN_L [6]
LINE_IN_R AC3 LINE_IN_R [6]
V10 SPI1_CS_0
W15 SPI1_CS_1 AU_HPL AC1 [7] AU_HPL
U13 SPI1_DIO AU_HPR AB1 [7] AU_HPR
SPI INTERFACE
AB10 SPI1_DI
Y14 AC4 R86 100
SPI1_CLK AU_AUXMIC_P 4 100 AUXMIC_P [4,7]
R89
[6]
[6]
UART1_RXD
UART1_TXD
AB9
AA11
Y10
UART1_RXD
UART1_TXD
RDA8810 AU_AUXMIC_N
AU_MICP_L
AU_MICN_L
AB4
AC6
AB6
AC5
R87
R88
4
4
4
100
100
AUXMIC_N [4]
MIC_P
MIC_N
[4]
[4]
[6] UART1_RTS UART1_RTS AU_MICP_R
[6] UART1_CTS W11 UART1_CTS AU_MICN_R AB5
[6] KEYOUT_6 470 UART
[6] HST_RXD R11 W10 HST_RXD AU_RCV_P AA1 [4]
4 470 INTERFACE REC_P
R10 V11 AA2 [4]
TP25
J_RST [6] HST_TXD 4
AC11
HST_TXD AU_RCV_N REC_N
UART2_RTS
U10 Y2
TP26
J_TDI UART2_CTS AUDIO AU_LSL_P
W2
SPK_P [4]
INTERFACE AU_LSL_N SPK_N [4] V_PAD
UART3_RXD [6] T15 UART3_RXD AU_LSR_P Y1
UART3_TXD [6] AC18 UART3_TXD AU_LSR_N W1
[6] KEYIN_6 UART3_RTS [6] R15 UART3_RTS
UART3_CTS [6] AB18 UART3_CTS
V14

10K
I2S_BCK PCM_CLK [6]

10K
I2S_LRCK AC17 PCM_SYNC [6]
[3] TF_CLK P18 SSD1_CLK I2S_DI_0 AC16 PCM_OUT [6]
[3] TF_CMD P17 SSD1_CMD I2S_DI_1 V13

4
I2S_DO U14 PCM_IN [6]
[3] TF_D0 AA16 SDAT1_0

R4

R3
[3] TF_D1 R16 SDAT1_1
[3] TF_D2 AB16 SDAT1_2 I2C1_SCL P14 I2C1_SCL [5,6]
[3] TF_D3 W16 SDAT1_3 I2C1_SDA AB14 CAMERA and WIFI I2C1_SDA [5,6]
R18 TFLASH CARD T11
SSD2_CLK [6] SSD2_CLK VOLUME_UP [7] SK_UP
SSD2_CMD [6] R17 SSD2_CMD VOLUME_DN AB11 [7] SK_DOWN

SSD2_D0 [6] V16 SDAT2_0


SSD2_D1 [6] U16 SDAT2_1
SSD2_D2 [6] P16 SDAT2_2
SSD2_D3 [6] U17 SDAT2_3
B [6,7] USB_DM AC12
AB12
USB_DM
T13
B
[6,7] USB_DP USB_DP USB TST_H
USB_ID AA13 USB_ID BBPLL_TEST R11
[3,6,7] CHG_PWR AA12 USB_VBUS
CLK_OUT AC13 CLK_OUT_32K [6]

RESETB_EXT R14 [2,3,6,7] V_PAD


LCM MODULE NAND FLASH CORE_GND
CLK26M_REQUEST AC10 [6] BT_RF_CLK_EN
U11 R9 NC
VSPIM_VSEL 4 V_PAD [2,3,6,7]

CORE_GND10
CORE_GND11
CORE_GND12
CORE_GND13
CORE_GND14
CORE_GND15
CORE_GND16
CORE_GND17
CORE_GND18
CORE_GND19
CORE_GND20
CORE_GND21
CORE_GND22
CORE_GND23
CORE_GND24
CORE_GND25
CORE_GND26
CORE_GND27
CORE_GND28
CORE_GND29
CORE_GND30
CORE_GND31
LCD_DATA10
LCD_DATA11
LCD_DATA12
LCD_DATA13
LCD_DATA14
LCD_DATA15

CORE_GND1 PLUGIN Y11 [7]


CORE_GND2
CORE_GND3
CORE_GND4
CORE_GND5
CORE_GND6
CORE_GND7
CORE_GND8
CORE_GND9
PLUGIN
LCD_DATA0
LCD_DATA1
LCD_DATA2
LCD_DATA3
LCD_DATA4
LCD_DATA5
LCD_DATA6
LCD_DATA7
LCD_DATA8
LCD_DATA9
LCD_FMARK
LCD_CS_0
LCD_CS_1

LCD_WR

A17
LCD_RD
LCD_RS

ZQ1
NFWEN
NFWPN

NFDQS
NFCEN

NFREN
NFD_0
NFD_1
NFD_2
NFD_3
NFD_4
NFD_5
NFD_6
NFD_7

NFALE
NFCLE

B16
NFRB

ZQ2 VSPIM_SEL: 0 2.8V

240

240
VSPIM_SEL: 1 1.8V

0
B12
D8

B10
C10
B13
C9

B11
B14
F8
F9
E9
E10
D11
D12
E7
B8
A8
A9
A10
A11
B9
E8

A7
D6
A6
J6
A5
E6
F6
E5

G6
D5
A4
B6
C4
B5
B4
B7

C12
C13
C14
D13
D16
D17
E13
E17
F16
F17
G16
G17
H17
J11
J12
J13
K11
K12
K13
L11
L12
L13
M11
M12
M13
N10
N11
N12
N13
P12
R12
RDA8810

4
R29

R50

R7
LCD_DATA00
LCD_DATA01
LCD_DATA02
LCD_DATA03
LCD_DATA04
LCD_DATA05
LCD_DATA06
LCD_DATA07
LCD_DATA08
LCD_DATA09
LCD_DATA10
LCD_DATA11
LCD_DATA12
LCD_DATA13
LCD_DATA14
LCD_DATA15

[5] LCD_CS_0
[5] LCD_RST
[5] LCD_WR NFDQS
LCD_DATA[00:15]
[5] LCD_RS NFRB
[5] LCD_RD NFREN
[5]LCD_FMARK NFWPN
NFWEN
NFCLE
R53
4
10K

[3] V_SPIMEM

A A
COMPANY:
MOTIAN
TITLE:

DRAWN: DATED:
H002
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> D <Drawing Number> V1.0
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 2OF 8
6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

PMIC R5
4
2.2K
POWER_KEY [6,7]

R6
SIM+T-FLASH
GDRV [3]

TS [2] C1

4
NC/4.7uF 100nF
AC_R [3]

10K
4.7uF
6 6
C19 C26 [1,3,6,7]
VBAT

D IS_CHG [3] D
U200-A

U1
U2
U3

N4
4

R1
R2
T1
T2
T3

V5
V6
V7

V2

R4

R5
P5
P3
R76 NC/10K

VBOOST1
VBOOST2
BOOST_CPP1
BOOST_CPP2
BOOST_CPP3
BOOST_CPN1
BOOST_CPN2
BOOST_CPN3
CP_GND1
CP_GND2
CP_GND3

POWERKEY

GDRV
TS
AC_R
VBAT_SENSE
IS_CHG
Y6 PROG_EFUSE
R13 ANA_TEST_EN

V_CORE1 K6
V_CORE2 K7 VCORE
[1] VRAMP_OUT M20 RAMPOUT V_CORE3 L6
[1] RF_OL T21 RFOL V_CORE4 L7
[1] RF_OH R21 RFOH V_CORE5 L8
V_CORE6 M6
[1] PA_EN H21 PAON V_CORE7 M7
V_CORE8 M8
N8 C8 C9 C74
V_CORE9

4
V_CORE10 P8 L1
J21 M1 1uH 10uF 3.3nF 100nF
[1] CTR_BS0 XVR_BS0 SW_BUCK1_1
[1] CTR_BS1 J20 XVR_BS1 SW_BUCK1_2 M2
K20 K21 C2 1uF
[1] CTR_BS2 XVR_BS2 AVDD_2V4_1 4
AVDD_2V4_2 K1
L1 L3 4.7uH
SW_BUCK2 8

[1] RF_IN_L U21 RF_SINGLE_L AVDD_DDR1V2_1 A20


[1] RF_IN_H V21 RF_SINGLE_H AVDD_DDR1V2_2 A21
AVDD_DDR1V2_3 B17 V_MMC

T4
4
C16 C12 C13 C86 C83 10uF 3.3nF C14 C15
AVDD_DDR1V2_4
RF MODULE

4
6

4
AVDD_DDR1V2_5 C17
D1 10uF 3.3nF NC 100nF C79 C82 10uF 3.3nF
AVDD_DDR1V2_6
AVDD_DDR1V2_7 E1
F1 L2 1uH
SW_BUCK3
VBUCK4_3V3 J1 [5,6] LEDA
AB21 G1 L18 4.7uH C84
[6] ACLK_OUT AUXCLK_OUT SW_BUCK4 8

4
V_ANA AC2 1uF
VSIM2 VSIM1

100K R18

100K R24

100K R17

100K R16

100K R21
RDA8810 V_IO A3 [2,6,7] V_PAD

4
X201 AA21 G5
XVR_XTAL1 V_SPIMEM [2] V_SPIMEM
Y21 XVR_XTAL2 V_MEM G21

R44
V_CAM B1 [5]

R42 10K
3 2 V_CAM
HOT GND V_MMC A2 [3] V_MMC
PMIC V_LCD A12 [5] V_LCD

4
L2

4
V_RTC S19_0B20F36A
Y3 J502
V_MIC
VSS

10K
4 1 N3 [3]
GND HOT V_VIB V_VIB
V_ASW A13 [5] V_ASW
V1 [3] SIM2_DIO 1 20
V_USB 22nF P7C P3B [3] SIM2_CLK
AB2 C6
V_NEG 4
K4 100nF
BAT_BACKUP 4 C16
L20 2 19
VRF28_1 P6B T1 [2] TF_D2
VRF28_2 L21 [1] VRF28
C M21
N21
AVSS_XCV1
AVSS_XCV2
VTT_DDR
VREF_DDR1
A16
A14
VTT_DDR [3]
VREF_DDR [3] C96
3
P5B T2
18 C

C7
[2] TF_D3
P20 AVSS_XCV3 VREF_DDR2 A15

4
P21

T3
4
AVSS_XCV4
33pF/NC 4 17

1uF
R20 AVSS_XCV5 BL_LED_OUT K2 SIM1_DIO [3] P7A T3 [2] TF_CMD
T20 AVSS_XCV6 KP_LEDR W4
U20 AVSS_XCV7 KP_LEDG U4 FL_EN [5]
V20 V4 5 16
AVSS_XCV8 KP_LEDB KP_LEDB [6] VSIM1 [3] P6A T4
W20 AVSS_XCV9
W21 N1 C17 C18 C27 C28 C29 C30 C55 C63 C64 C67 C68 C33
AVSS_XCV10 VBAT_PMU1 [1,3,6,7] VBAT 6 15

6
4

4
VBAT_PMU2 N2 P5A T5 [2] TF_CLK
P1 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 2.2uF
VBAT_PMU3
VBAT_PMU4 P2
H1 C3 C4 C61 7 14
SW_GND1 P1A T6
6

6
4
SW_GND2 H2
2.2uF 56pF 4.7uF R12
[3] 8 13
SIM1_RST 4 P2A T7 [2] TF_D0
1K
SIM1_DIO
SIM1_RST

SIM2_DIO
SIM2_RST

SIM3_DIO
SIM3_RST
SIM1_CLK

SIM2_CLK

SIM3_CLK

9 12
TSC_YN

TSC_XN
TSC_YP

TSC_XP

SIM1_CLK [3] P3A T8 [2] TF_D1


VSIM1

VSIM2

VSIM3
LED8
LED7
LED6
LED5
LED4
LED3
LED2
LED1

R15
10 11
[3] VSIM2 P1B P2B 4 [3] SIM2_RST

GND4

GND1

GND2

GND3
T7
N6
N7
P7

G2
B2
C1
C2
D2
E2
F2
A1

W5
U7
Y7
AA5
AC7
AB7
AA6
Y5
T10
AA8
U8
W7

RDA8810 1K

21

22

23

24
YN C85 C11 C10 C87
YP [6,7] V_2V8 0

4
[3] R25 [3] [3] V_VIB
XN VTT_DDR 4 VREF_DDR 33pF 1uF 1uF 33pF
XP [3] VSIM2
[3] SIM2_RST C66

P1
1nF C43 C69 C80 C81

T10
[3] SIM2_DIO

4
4

4
4

4
[3] SIM2_CLK M555
C72 100nF 4.7uF 1uF 1uF
[3] VSIM1 1uF/NC

2N
[3] SIM1_RST
[3] SIM1_DIO
[5] LEDK1 [3] SIM1_CLK

B B

BAT_CHARGE
VBAT
100K
4
R43

U301
VBAT
WKBAV029-A31 2 1
[2,3,6,7] CHG_PWR E C [3] IS_CHG
C60 1uF R72 5.1 3 9
4 4 B C
510K

0 6 8 R68 0.22
6

[3] GDRV R69 S C [1,3,6,7]


4 8 VBAT
4.7uF
C59

22uF NC
1nF 4 7
D C
4
8

C95 C132 C131 10 5


D G [3] AC_R
R71

J302

IC-MI5809 R73 4.7K


[2] AC_DIV_IN 4 CHG_PWR[2,3,6,7]
100K
4
R70

A A
COMPANY:
MOTIAN
TITLE:

DRAWN: DATED:
H002
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> D <Drawing Number> V1.0
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 3OF 8
6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

Main MIC
REC

D D

L26 1000
[2] REC_P 4
1
J2 J6
1 2
C92
0

4
100pF [2] R34
2 MIC_P 4

C104 1
L25 1000

4
[2] REC_N 4 100pF J16
2

R35 0
[2] MIC_N 4

C90 C91

T12
T11

T13

T14
4
4

4
4

4
33pF 33pF C105 C106

4
47pF 47pF

C C

SPEAKER AUX_MIC

B B

R22 1K
[2] MIC_DET 4

R45 0
[2] SPK_N 4 2
N
1
P
C23 [2,4,7] AUXMIC_P AUXMIC_P [2,4,7]
4

100pF

J17
R46 0 C40
[2] SPK_P 4

R23
4
100pF

10K
4
C48
[2] AUXMIC_N 6
C24 C25
T2
T1
4
4
4

10uF
56pF 56pF

C41 C42

4
47pF 47pF

A A
COMPANY:
MOTIAN
TITLE:

DRAWN: DATED:
H002
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> D <Drawing Number> V1.0
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 4OF 8
6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

LCM_INTERFACE CAMERA INTERFACE


D D

J3
PAD-32PIN

1
LEDA LEDA [3,5,6]
2
LEDK LEDK1 [3]
3
GND
4 [2]
RESET LCD_RST
5 LCD_DATA15 [2]
D15
J18
6
D14 LCD_DATA14 [2]
1
PWDN CAM_PDN1 [2]
7
D13 LCD_DATA13 [2]
2
NC
C D12
8
LCD_DATA12 [2]
GND
3 C
9
D11 LCD_DATA11 [2]
4 [2,6]
SDA I2C1_SDA
10
D10 LCD_DATA10 [2]
5 [3]
AVDD V_CAM
11 LCD_DATA09 [2]
D9
6 [2,6]
SCL I2C1_SCL
12 LCD_DATA08 [2]
D8
7
RESET CAM_RST [2]
13 LCD_DATA07 [2]
D7
8
VSYNC CAM_VSYNC [2]
14 LCD_DATA06 [2]
D6
9
PWDN1 CAM_PDN2 [2]
15 LCD_DATA05 [2]
D5
10
HREF CAM_HREF [2]
16 LCD_DATA04 [2]
D4
11
NC
17 LCD_DATA03 [2]
D3
12
DOVDD V_ASW [3]
18 LCD_DATA02 [2]
D2
13 CAM_D7 [2]
Y7
19 LCD_DATA01 [2]
D1
14 CAM_MCLK [2]
XCLK
20 LCD_DATA00 [2]
D0
15 CAM_D6 [2]
Y6
21
RD LCD_RD [2]
16
GND
22 [2]
WR LCD_WR
17 CAM_D5 [2]
Y5
23
RS LCD_RS [2] 18 CAM_PCLK [2]
PCLK
24 [2]
CS LCD_CS_0 19 CAM_D4 [2]
Y4
25
FMARK [2] LCD_FMARK 20 CAM_D0 [2]
Y0
26 [3] V_LCD
IOVCC
21 CAM_D3 [2]
Y3
27
VCC
22 CAM_D1 [2]
Y1
28
NC
23 CAM_D2 [2]
Y2
29 1uF
NC
24 1uF 1uF
4

GND
30 C58

4
NC
25 C89 C88
LED+ 100K [3,5,6] LEDA
31 R84
NC 4
26
LED- [3] FL_EN
32
NC
CON_26P_H019
B B

A A
COMPANY:
MOTIAN
TITLE:

DRAWN: DATED:
H002
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> D <Drawing Number> V1.0

RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 5 OF 8
6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

WIFI_BT_FM KEYPAD_LED

D VBAT D
[6] V_LNA

4.7uH
[2,3,6,7] V_PAD

C113 C114 100nF


4 J8
C110 C109 C111 C112 J14 J1

6
8
10uF 100pF C108 J5

4
4.7uF 100nF NC/1nF 4 PAD-SIDEKEY-7PIN
33pF

L12
CLK_OUT_32K [2]
1

NC
[2] KEYIN_6
4
NC C97

1
2

4
49

28

48
[2] KEYIN_5

GND

GND
U601

L19
GND

VBAT

SW

AVDD_DCDC

DCDC_IN

VIO

DECAP_V18

32K
30 C126 10pF 4 2 C127 10pF C128 100pF 3
ANT 4 IN OUT 4 4 [2] KEYOUT_5
BPF

2.4nH
UART1_RXD [2] 18 UART_TX VDD_SW 31 [1,3,6,7] VBAT 4

NC
F601
100pF C118 [2] KEYOUT_6
UART1_CTS [2] 19 UART_RTS WF_TX_IN 32 4
C116 C115 C117
5

4
20 33

4
UART1_RTS [2] UART_CTS WF_TX_OUT 4.7uF/NC 100nF 1nF
C124 L13 4.7nH

L20

L22
UART1_TXD [2] 21 UART_RX WF_RX_OUT 34 4 4
100pF/NC 6
[3] KP_LEDB
PCM_OUT [2] 22 PCM_OUT VDD_PA 35 [1,3,6,7] VBAT U602
23 36 6 1 7
PCM_IN [2] PCM_IN BT WF_RX_IN RFOUT GND [3,5] LEDA
[2] 24 44 5 2 J15
PCM_CLK PCM_CLK SDIO_CLK [2] SSD2_CLK [2,6] BT_RF_CLK_EN EN GND
25 6 4 3 PAD-SIDEKEY-7PIN
PCM_SYNC [2] PCM_SYNC SDIO_CMD [2,6] SSD2_CMD [6] V_LNA VDD RFIN
1
[2] KEYIN_4
HOST_WAKE [2] 26 HOST_WAKE
WIFI SDIO_DATA0 43 [2,6] SSD2_D0 1nF RDALN16

4
C107 10pF 27 42 2
4 BT_RF_IN SDIO_DATA1 [2,6] SSD2_D1 C125 [2] KEYIN_0
29 BT_RF_OUT SDIO_DATA2 41 [2,6] SSD2_D2 3
0 [2] KEYIN_3
[7] R49 11 FM_IO SDIO_DATA3 40 [2,6]
FM_ANT 4 SSD2_D3
12 7 4
RIN FM WLAN_INTN [2] WF_INTN [2] KEYOUT_1
13 8 V_PAD
LIN GPIO_WF2

DVDD_WF_DECAP
5

DVDD_BT_DECAP
C103 [2] KEYOUT_2
1uF 14 9
LINE_IN_L [2] 4 LOUT GPIO_WF1
R48 10K
C70 4 [2,6] SSD2_CMD
[2] 1uF 15 10 [3,6,7] POWER_KEY 6

XEN_OUT
LINE_IN_R 4 ROUT GPIO_WF0
C I2C_SDA
10K
C
I2C_SCL
R54 [2,6]
4 SSD2_D0
39

XTAL
DAT7

XIN
R55 10K 7
4 [2,6] SSD2_D1 [1,3,6,7] VBAT
R56 10K
46

47

16

17

45

37

38
RDA5990P 4 [2,6] SSD2_D2
R57 10K
4 [2,6] SSD2_D3
1uF

1uF

4 1
4

1K GND HOT 4
R51
C119

NC C122
C120

[2,5] I2C1_SCL 4

R52 1K 3 2
[2,5] I2C1_SDA 4 HOT GND

X601
4
NC C121

[2,6] BT_RF_CLK_EN 4 ACLK_OUT [3]


1nF C123

B
TEST PAD G_Sensor B

V_PAD V_PAD
V_2V8 V_PAD
100K
R36

100K
R33
4

U600
4

1 VDD SDA 10 [2,7] I2C3_SDA


[2,7] I2C3_SCL 2 SCL GND 9
470
TP23
TP7

1 [2] R80 1 3 8
[2] HST_RXD UART3_RXD 4 [2] GSENSOR_INT1 INT1 VDDIO
4 BYP GND 7
TP9 TP10 TP11 TP12 [2] GSENSOR_INT2 5 INT2 GND 6
470
TP21

100nF

100nF
TP6

1 1

1uF
[2] [2] R78 MARK MARK MARK MARK
HST_TXD UART3_CTS 4
MMA8653/52

4
TP22

470
TP5

1 R77 UART3_RTS 1

C65
[3,6,7] POWER_KEY UART3_RTS [2] 4

C73

C71
1

1
470
TP24
TP4

1 [2] R79 UART3_RTS 1


UART3_TXD 4
TP3

1 1
TP2

[1,3,6,7] VBAT USB_DM [2,7]


TP1

1 1
TP8

[7] PLUGIN_X USB_DP [2,7]


PLUG_IN =1 : Force download
TP19

1
[2,3,7] CHG_PWR

A A
COMPANY:
MOTIAN
TITLE:

DRAWN: DATED:
H002
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> D <Drawing Number> V1.0
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 6OF 8
6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

EARPHONE
D D

V_PAD

100K
SIDE KEY

4
R41
[2] HANDSET_DET

1K
PH3-2B05F35A 6

4
1
[6] FM_ANT 6 5
[3,6] POWER_KEY

R40
L7 1000 2
100 4.7uF C75 1000 [2,4] AUXMIC_P 4
R38 L23 [7]
[2] AU_HPL 4 6 4
H_MP3L 0
R8 3 4
4 0 [2] SK_UP
R20 4
[7] H_MP3R 4 5
[7] H_MP3L
C130 3
[2,3,6,7] V_PAD
CON1

4
NC

1510100091

1510100091

1510100091
2

L31
[2] SK_DOWN
R39 100 4.7uF C76 L21 1000
[2] AU_HPR 4 6 4 [7] H_MP3R

VR2

VR3

VR1
1
[1,3,6] VBAT

4
1000
PAD-SIDEKEY-6PIN
C77 C78 J12

4
22nF 22nF

T6

T7
4

4
C C

B IO CTP B
TP13 TP14 TP15 TP16 TP17 TP18

POWER KEY
1

J9

J13 1 6
[2,3,6] CHG_PWR
[2,6] USB_DM 2 7
1 3 8
[2] CTP_SHUTDOWN [2,6] USB_DP R62
[2] 4 150K 4 9 PIN4 =1.8V
2 PLUGIN 5 10 PIN4=0USB
[2] CTP_INT
[6]PLUGIN_X 11 PIN4VCHG
3
[3,6] V_2V8

100K
4 CON_5PIO

T17

T18
[2,6] I2C3_SCL

4
5

4
[2,6] I2C3_SDA
6

R2
C93
4

1uF

A A
COMPANY:
MOTIAN
TITLE:

DRAWN: DATED:
H002
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> D <Drawing Number> V1.0
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 7OF 8
6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

C C

B B

A A
COMPANY:
MOTIAN
TITLE:

DRAWN: DATED:
H002
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> D <Drawing Number> V1.0
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 8OF 8

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