A half adder is implement with XOR and AND gates.

A full adder is implemented with

two half adders and one OR gate. The propagation delay of an XOR gate is twice that of
an AND/OR gate. The propagation delay of an AND/OR gate is 1.2 μsec. A 4-bit ripple
carry binary adder is implemented by using full adders. The total propagation delay of
this 4-bit binary adder is
An n -bit carry look ahead adder is designed using only Ex-OR, AND, OR gates. The
propagation delay of each Ex-OR gate is 20 ns and that of each AND, OR gates is t0 ns. If
the total propagation delay of the adder circuit is 60 ns, then the value of t0 will be
____________ns. (given that t0 ≤ 20 ns)