1MRK505132-UEN - TRM RED670 IEC 1pB PDF

Technical reference manual
Line differential protection IED

RED 670
Innovation from ABB

Document ID: 1MRK505132-UEN
Issued: December 2007
Revision: D
IED product version: 1.B
© Copyright 2007 ABB. All rights reserved

COPYRIGHT
WE RESERVE ALL RIGHTS TO THIS DOCUMENT, EVEN IN THE EVENT
THAT A PATENT IS ISSUED AND A DIFFERENT COMMERCIAL
PROPRIETARY RIGHT IS REGISTERED. IMPROPER USE, IN
PARTICULAR REPRODUCTION AND DISSEMINATION TO THIRD
PARTIES, IS NOT PERMITTED.
THIS DOCUMENT HAS BEEN CAREFULLY CHECKED. HOWEVER, IN

CASE ANY ERRORS ARE DETECTED, THE READER IS KINDLY
REQUESTED TO NOTIFY THE MANUFACTURER AT THE ADDRESS
BELOW.
THE DATA CONTAINED IN THIS MANUAL IS INTENDED SOLELY FOR

THE CONCEPT OR PRODUCT DESCRIPTION AND IS NOT TO BE
DEEMED TO BE A STATEMENT OF GUARANTEED PROPERTIES. IN
THE INTEREST OF OUR CUSTOMERS, WE CONSTANTLY SEEK TO
ENSURE THAT OUR PRODUCTS ARE DEVELOPED TO THE LATEST
TECHNOLOGICAL STANDARDS. AS A RESULT, IT IS POSSIBLE THAT
THERE MAY BE SOME DIFFERENCES BETWEEN THE HW/SW
PRODUCT AND THIS INFORMATION PRODUCT.
Manufacturer:
ABB AB
Substation Automation Products
SE-721 59 Västerås
Sweden
Telephone: +46 (0) 21 34 20 00
Facsimile: +46 (0) 21 14 69 18
www.abb.com/substationautomation
Table of contents
Table of contents
Section 1 Introduction.....................................................................21
Introduction to the technical reference manual.................................21
About the complete set of manuals for an IED............................21
About the technical reference manual.........................................22
Design of the Technical reference manual (TRM).......................23
Introduction.............................................................................23
Principle of operation..............................................................23
Input and output signals.........................................................26
Function block........................................................................26
Setting parameters.................................................................26
Technical data........................................................................26
Intended audience.......................................................................27
Related documents......................................................................27
Revision notes.............................................................................28
Section 2 Local human-machine interface.....................................29

Human machine interface.................................................................29
Small size graphic HMI.....................................................................31
Introduction..................................................................................31
Design.........................................................................................31
Medium size graphic HMI.................................................................32
Introduction..................................................................................32
Design.........................................................................................32
Keypad.............................................................................................33
LED...................................................................................................35
Introduction..................................................................................35
Status indication LEDs................................................................35
Indication LEDs...........................................................................35
LHMI related functions......................................................................36
Introduction..................................................................................36
General setting parameters.........................................................36
Status indication LEDs................................................................37
Design....................................................................................37
Function block........................................................................37
Indication LEDs...........................................................................38
Introduction.............................................................................38
Design....................................................................................38
Function block........................................................................45
RED 670 Technical reference manual 1

1MRK505132-UEN rev. D
Table of contents

Setting parameters.................................................................45
Section 3 Basic IED functions........................................................49

Analog inputs....................................................................................49
Introduction..................................................................................49
Principle of operation...................................................................49
Function block.............................................................................50
Setting parameters......................................................................50
Self supervision with internal event list.............................................57
Introduction..................................................................................57
Internal signals.......................................................................59
Run-time model......................................................................60
Function block.............................................................................61
Output signals..............................................................................62
Technical data.............................................................................62
Time synchronization........................................................................62
Introduction..................................................................................62
General concepts...................................................................62
Real Time Clock (RTC) operation..........................................63
Synchronization alternatives..................................................65
Function block.............................................................................67
Output signals..............................................................................67
Technical data.............................................................................70
Parameter setting groups.................................................................71
Introduction..................................................................................71
Function block.............................................................................72
Input and output signals..............................................................72
Test mode functionality.....................................................................74
Introduction..................................................................................74
Function block.............................................................................75
IED identifiers...................................................................................76
Introduction..................................................................................76
Signal matrix for binary inputs (SMBI)..............................................77
2 Technical reference manual RED 670

Table of contents
Introduction..................................................................................77
Function block.............................................................................77
Signal matrix for binary outputs (SMBO)..........................................78
Introduction..................................................................................78
Function block.............................................................................79
Signal matrix for mA inputs (SMMI)..................................................80
Introduction..................................................................................80
Function block.............................................................................80
Signal matrix for analog inputs (SMAI).............................................81
Introduction..................................................................................81
Function block.............................................................................81
Summation block 3 phase (SUM3Ph)..............................................85
Introduction..................................................................................85
Function block.............................................................................86
Section 4 Differential protection.....................................................89

Line differential protection................................................................89
Introduction..................................................................................90
Line differential protection, 3 or 6 CT sets (PDIF, 87L)..........90
Line differential protection 3 or 6 CT sets, with in-zone
transformers (PDIF, 87LT).....................................................91
Analog signal transfer for line differential protection
(MDIF)....................................................................................91
Algorithm and logic.................................................................92
Time synchronization.............................................................98
Analog signal communication for line differential
protection..............................................................................100
Binary signal transfer............................................................103
Function block...........................................................................103
Input and output signals............................................................106
Setting parameters....................................................................111

Table of contents
Technical data...........................................................................124
High impedance differential protection (PDIF, 87)..........................125
Introduction................................................................................125
Principle of operation.................................................................125
Logic diagram.......................................................................125
Function block...........................................................................126
Technical data...........................................................................127
Section 5 Distance protection ......................................................129

Distance protection zones (PDIS, 21)............................................129
Introduction................................................................................129
Full scheme measurement...................................................130
Impedance characteristic.....................................................131
Minimum operating current...................................................135
Measuring principles............................................................136
Directional lines....................................................................138
Simplified logic diagrams......................................................140
Function block...........................................................................143
Technical data...........................................................................145
Phase selection with load encroachment (PDIS, 21).....................146
Introduction................................................................................146
Phase-to-earth fault..............................................................148
Phase-to-phase fault............................................................150
Three phase faults................................................................151
Load encroachment..............................................................152
Minimum operate currents....................................................155
Simplified logic diagrams......................................................156
Function block...........................................................................160
Technical data...........................................................................162
Power swing detection (RPSB, 78)................................................162
Introduction................................................................................163
Resistive reach in forward direction.....................................164
Resistive reach in reverse direction.....................................164
Reactive reach in forward and reverse direction..................165
Basic detection logic.............................................................165

Table of contents
Operating and inhibit conditions...........................................167

Function block...........................................................................168
Technical data...........................................................................170
Automatic switch onto fault logic (PSOF).......................................170
Introduction................................................................................171
Function block...........................................................................172
Technical data...........................................................................173
Section 6 Current protection.........................................................175

Instantaneous phase overcurrent protection (PIOC, 50)................175
Introduction................................................................................175
Function block...........................................................................176
Technical data...........................................................................177
Four step phase overcurrent protection (POCM, 51_67)................177
Introduction................................................................................178
Function block...........................................................................182
Technical data...........................................................................190
Instantaneous residual overcurrent protection (PIOC, 50N)...........191
Introduction................................................................................191
Function block...........................................................................192
Technical data...........................................................................193
Four step residual overcurrent protection (PEFM, 51N/67N).........193
Introduction................................................................................193
Switch onto fault logic...........................................................197
Function block...........................................................................198
Technical data...........................................................................206
Thermal overload protection, one time constant (PTTR, 26)..........206

Table of contents
Introduction................................................................................207
Function block...........................................................................210
Technical data...........................................................................211
Breaker failure protection (RBRF, 50BF)........................................211
Introduction................................................................................212
Function block...........................................................................215
Technical data...........................................................................217
Stub protection (PTOC, 50STB).....................................................217
Introduction................................................................................218
Function block...........................................................................219
Technical data...........................................................................219
Pole discordance protection (RPLD, 52PD)...................................220
Introduction................................................................................220
Pole discordance signalling from circuit breaker..................223
Unsymmetrical current detection..........................................223
Function block...........................................................................224
Technical data...........................................................................225
Section 7 Voltage protection........................................................227

Two step undervoltage protection (PUVM, 27)...............................227
Introduction................................................................................227
Measurement principle.........................................................228
Time delay............................................................................228
Blocking................................................................................231
Design..................................................................................233
Function block...........................................................................234
Technical data...........................................................................237
Two step overvoltage protection (POVM, 59).................................238
Introduction................................................................................238

Table of contents
Time delay............................................................................239
Blocking................................................................................243
Design..................................................................................244
Function block...........................................................................246
Technical data...........................................................................249
Two step residual overvoltage protection (POVM, 59N)................250
Introduction................................................................................250
Time delay............................................................................251
Blocking................................................................................253
Design..................................................................................254
Function block...........................................................................255
Technical data...........................................................................257
Overexcitation protection (PVPH, 24).............................................258
Introduction................................................................................258
Measured voltage.................................................................261
Operate time of the overexcitation protection.......................262
Cooling.................................................................................265
OEX protection function measurands...................................265
Overexcitation alarm............................................................266
Logic diagram.......................................................................266
Function block...........................................................................267
Technical data...........................................................................268
Section 8 Frequency protection....................................................271

Underfrequency protection (PTUF, 81)..........................................271
Introduction................................................................................271
Time delay............................................................................272
Voltage dependent time delay..............................................274
Blocking................................................................................275
Design..................................................................................276
Function block...........................................................................276

Table of contents

Overfrequency protection (PTOF, 81)............................................278
Introduction................................................................................278
Time delay............................................................................279
Blocking................................................................................281
Design..................................................................................281
Function block...........................................................................282
Rate-of-change frequency protection (PFRC, 81)..........................283
Introduction................................................................................283
Time delay............................................................................284
Blocking................................................................................289
Design..................................................................................290
Function block...........................................................................291
Technical data...........................................................................292
Section 9 Multipurpose protection................................................293

General current and voltage protection (GAPC).............................293
Introduction................................................................................293
Measured quantities within the function...............................294
Base quantities for GF function............................................296
Built-in overcurrent protection steps.....................................296
Built-in undercurrent protection steps...................................301
Built-in overvoltage protection steps....................................302
Built-in undervoltage protection steps..................................302
Logic diagram.......................................................................302
Function block...........................................................................307
Technical data...........................................................................319
Section 10 Secondary system supervision.....................................321

Current circuit supervision (RDIF)..................................................321
Introduction................................................................................321

Table of contents
Function block...........................................................................323
Technical data...........................................................................324
Fuse failure supervision (RFUF).....................................................324
Introduction................................................................................324
Zero sequence ....................................................................325
Negative sequence...............................................................328
du/dt and di/dt.......................................................................328
Operation modes..................................................................329
Dead line detection...............................................................330
Function block...........................................................................330
Technical data...........................................................................332
Section 11 Control..........................................................................333
Synchrocheck and energizing check (RSYN, 25)...........................333
Introduction................................................................................333
Basic functionality.................................................................333
Logic diagrams.....................................................................334
Function block...........................................................................340
Technical data...........................................................................344
Autorecloser (RREC, 79)................................................................345
Introduction................................................................................345
Logic Diagrams....................................................................346
Auto-reclosing operation Off and On....................................346
Start auto-reclosing and conditions for start of a reclosing
cycle ....................................................................................346
Control of the auto-reclosing open time for shot 1...............347
Long trip signal.....................................................................348
Time sequence diagrams.....................................................353
Function block...........................................................................356
Technical data...........................................................................359
Apparatus control (APC).................................................................360
Introduction................................................................................360

Table of contents
Bay control (QCBAY).................................................................361

Introduction...........................................................................361
Principle of operation............................................................361
Function block......................................................................363
Input and output signals.......................................................363
Setting parameters...............................................................364
Local/Remote switch (LocalRemote, LocRemControl)..............364
Introduction...........................................................................364
Function block......................................................................365
Switch controller (SCSWI).........................................................367
Introduction...........................................................................367
Function block......................................................................373
Circuit breaker (SXCBR)...........................................................375
Introduction...........................................................................375
Function block......................................................................379
Circuit switch (SXSWI)..............................................................381
Introduction...........................................................................381
Function block......................................................................385
Bay reserve (QCRSV)...............................................................386
Introduction...........................................................................386
Function block......................................................................389
Reservation input (RESIN)........................................................391
Introduction...........................................................................391
Function block......................................................................392
Interlocking.....................................................................................393

Table of contents
Introduction................................................................................393
Logical node for interlocking (SCILO)........................................396
Introduction...........................................................................396
Function block......................................................................397
Interlocking for line bay (ABC_LINE).........................................398
Introduction...........................................................................398
Function block......................................................................399
Logic diagram.......................................................................400
Interlocking for bus-coupler bay (ABC_BC)...............................407
Introduction...........................................................................407
Function block......................................................................408
Logic diagram.......................................................................409
Interlocking for transformer bay (AB_TRAFO)...........................416
Introduction...........................................................................416
Function block......................................................................417
Logic diagram.......................................................................418
Interlocking for bus-section breaker (A1A2_BS)........................423
Introduction...........................................................................423
Function block......................................................................423
Logic diagram.......................................................................424
Interlocking for bus-section disconnector (A1A2_DC)...............427
Introduction...........................................................................427
Function block......................................................................427
Logic diagram.......................................................................428
Interlocking for busbar earthing switch (BB_ES).......................430
Introduction...........................................................................430
Function block......................................................................430
Logic diagram.......................................................................431
Interlocking for double CB bay (DB)..........................................431
Introduction...........................................................................431
Function block......................................................................432
Logic diagrams.....................................................................433
Input and output signals ......................................................440
Interlocking for 1 1/2 CB diameter (BH).....................................443

Table of contents
Introduction...........................................................................443
Function blocks....................................................................444
Logic diagrams.....................................................................446
Logic rotating switch for function selection and LHMI
presentation (GGIO).......................................................................458
Introduction................................................................................458
Function block...........................................................................460
Generic double point function block (DPGGIO)..............................463
Introduction................................................................................463
Function block...........................................................................463
Section 12 Scheme communication...............................................465

Scheme communication logic for distance protection (PSCH,
85) .................................................................................................465
Introduction................................................................................465
Blocking scheme..................................................................466
Permissive underreach scheme...........................................466
Permissive overreach scheme.............................................467
Unblocking scheme..............................................................467
Intertrip scheme....................................................................468
Simplified logic diagram.......................................................468
Function block...........................................................................470
Technical data...........................................................................471
Current reversal and weak-end infeed logic for distance
protection (PSCH, 85)....................................................................471
Introduction................................................................................472
Current reversal logic...........................................................472
Weak end infeed logic..........................................................473
Function block...........................................................................474
Technical data...........................................................................475
Local acceleration logic (PLAL)......................................................476

Table of contents
Introduction................................................................................476
Zone extension.....................................................................476
Loss-of-load acceleration.....................................................477
Function block...........................................................................478
Scheme communication logic for residual overcurrent protection
(PSCH, 85).....................................................................................479
Introduction................................................................................480
Blocking scheme..................................................................480
Permissive under/overreach scheme...................................481
Unblocking scheme..............................................................482
Function block...........................................................................483
Technical data...........................................................................485
Current reversal and weak-end infeed logic for residual
overcurrent protection (PSCH, 85).................................................485
Introduction................................................................................485
Directional comparison logic function...................................486
Fault current reversal logic...................................................486
Weak and infeed logic..........................................................486
Function block...........................................................................488
Technical data...........................................................................489
Section 13 Logic.............................................................................491
Tripping logic (PTRC, 94)...............................................................491
Introduction................................................................................491
Logic diagram.......................................................................493
Function block...........................................................................496
Technical data...........................................................................497
Trip matrix logic (GGIO, 94X).........................................................497
Introduction................................................................................497
Function block...........................................................................500

Table of contents
Configurable logic blocks (LLD)......................................................502
Introduction................................................................................502
Inverter function block (INV)......................................................502
OR function block (OR).............................................................502
AND function block (AND).........................................................503
Timer function block (Timer)......................................................504
Pulse timer function block (PULSE)..........................................505
Exclusive OR function block (XOR)...........................................505
Set-reset with memory function block (SRM)............................506
Controllable gate function block (GT)........................................506
Settable timer function block (TS).............................................507
Technical data...........................................................................508
Fixed signal function block (FIXD)..................................................508
Introduction................................................................................508
Function block...........................................................................509
Section 14 Monitoring.....................................................................511
Measurements (MMXU).................................................................511
Introduction................................................................................512
Measurement supervision....................................................513
Service values (MMXU, SVR)..............................................517
Current Phasors (MMXU, CP)..............................................521
Voltage phasors (MMXU, VP)..............................................522
Sequence quantities (MSQI, CSQ and VSQ).......................522
Function block...........................................................................522
Technical data...........................................................................540
Event counter (GGIO).....................................................................540
Introduction................................................................................541
Reporting..............................................................................541
Design..................................................................................541
Function block...........................................................................542
Input signals..............................................................................542
Technical data...........................................................................542
Event function (EV).........................................................................543
Introduction................................................................................543

Table of contents
Function block...........................................................................545
Fault locator (RFLO).......................................................................548
Introduction................................................................................549
Measuring Principle..............................................................550
Accurate algorithm for measurement of distance to fault.....551
The non-compensated impedance model............................554
IEC 60870-5-103..................................................................554
Function block...........................................................................555
Technical data...........................................................................556
Measured value expander block.....................................................557
Introduction................................................................................557
Function block...........................................................................558
Disturbance report (RDRE)............................................................558
Introduction................................................................................559
Function block...........................................................................566
Technical data...........................................................................585
Event list (RDRE)...........................................................................586
Introduction................................................................................586
Function block...........................................................................587
Input signals..............................................................................587
Technical data...........................................................................587
Indications (RDRE).........................................................................587
Introduction................................................................................587
Function block...........................................................................589
Input signals..............................................................................589
Technical data...........................................................................589
Event recorder (RDRE)..................................................................589
Introduction................................................................................589
Function block...........................................................................590

Table of contents
Input signals..............................................................................590
Technical data...........................................................................590
Trip value recorder (RDRE)............................................................591
Introduction................................................................................591
Function block...........................................................................592
Input signals..............................................................................592
Technical data...........................................................................592
Disturbance recorder (RDRE)........................................................592
Introduction................................................................................592
Memory and storage............................................................593
IEC 60870-5-103..................................................................594
Function block...........................................................................595
Technical data...........................................................................595
Section 15 Metering.......................................................................597
Pulse counter logic (GGIO)............................................................597
Introduction................................................................................597
Function block...........................................................................599
Technical data...........................................................................601
Section 16 Station communication.................................................603

Overview.........................................................................................603
IEC 61850-8-1 communication protocol.........................................603
Introduction................................................................................603
Generic single point function block (SPGGIO)..........................604
Introduction...........................................................................604
Function block......................................................................604
Generic measured values function block (MVGGIO)................605
Introduction...........................................................................605
Function block......................................................................606
Technical data...........................................................................607

Table of contents
LON communication protocol.........................................................607

Introduction................................................................................607
Technical data...........................................................................626
SPA communication protocol.........................................................626
Introduction................................................................................626
Communication ports...........................................................636
Design.......................................................................................636
Technical data...........................................................................637
IEC 60870-5-103 communication protocol.....................................637
Introduction................................................................................637
General.................................................................................637
Communication ports...........................................................647
Function block...........................................................................647
Technical data...........................................................................658
Single command, 16 signals (CD)..................................................659
Introduction................................................................................659
Function block...........................................................................660
Multiple command (CM) and Multiple transmit (MT).......................662
Introduction................................................................................662
Design.......................................................................................662
General.................................................................................662
Function block...........................................................................663
Section 17 Remote communication................................................667

Binary signal transfer to remote end...............................................667
Introduction................................................................................667
Function block...........................................................................668

Table of contents
Section 18 Hardware......................................................................675
Overview.........................................................................................675
Variants of case- and HMI display size.....................................675
Case from the rear side.............................................................677
Hardware modules.........................................................................680
Overview....................................................................................680
Combined backplane module (CBM).........................................681
Introduction...........................................................................681
Functionality.........................................................................681
Design..................................................................................681
Universal backplane module (UBM)..........................................683
Introduction...........................................................................683
Functionality.........................................................................683
Design..................................................................................683
Power supply module (PSM).....................................................685
Introduction...........................................................................685
Design..................................................................................686
Technical data......................................................................686
Numeric processing module (NUM)..........................................686
Introduction...........................................................................686
Functionality.........................................................................687
Block diagram.......................................................................688
Local human-machine interface (LHMI)....................................688
Transformer input module (TRM)..............................................688
Introduction...........................................................................688
Design..................................................................................689
Technical data......................................................................689
Analog digital conversion module, with time synchronization
(ADM) .......................................................................................689
Introduction...........................................................................689
Design..................................................................................690
Binary input module (BIM).........................................................692
Introduction...........................................................................692
Design..................................................................................692
Technical data......................................................................695
Binary output modules (BOM)...................................................696
Introduction...........................................................................696
Design..................................................................................696
Technical data......................................................................698
Binary input/output module (IOM)..............................................699
Introduction...........................................................................699
Design..................................................................................699
Technical data......................................................................700

Table of contents
Line data communication module (LDCM)................................701

Introduction...........................................................................701
Design..................................................................................702
Technical data......................................................................703
Serial SPA/IEC 60870-5-103 and LON communication
module (SLM) ...........................................................................703
Introduction...........................................................................703
Design..................................................................................703
Technical data......................................................................705
Optical ethernet module (OEM).................................................705
Introduction...........................................................................705
Functionality.........................................................................705
Design..................................................................................705
Technical data......................................................................706
mA input module (MIM).............................................................707
Introduction...........................................................................707
Design..................................................................................707
Technical data......................................................................708
GPS time synchronization module (GSM).................................709
Introduction...........................................................................709
Design..................................................................................709
Technical data......................................................................710
GPS antenna.............................................................................711
Introduction...........................................................................711
Design..................................................................................711
Technical data......................................................................712
Case dimensions............................................................................713
Case without rear cover.............................................................713
Case with rear cover..................................................................713
Flush mounting dimensions.......................................................715
Side-by-side flush mounting dimensions...................................716
Wall mounting dimensions.........................................................717
External resistor unit..................................................................718
Mounting alternatives.....................................................................719
Flush mounting..........................................................................719
Overview..............................................................................719
Mounting procedure for flush mounting................................720
19” panel rack mounting............................................................720
Overview..............................................................................720
Mounting procedure for 19” panel rack mounting.................721
Wall mounting............................................................................722
Overview..............................................................................722
Mounting procedure for wall mounting.................................722

Table of contents
How to reach the rear side of the IED..................................723

Side-by-side 19” rack mounting.................................................724
Overview..............................................................................724
Mounting procedure for side-by-side rack mounting............724
IED 670 mounted with a RHGS6 case.................................724
Side-by-side flush mounting......................................................725
Overview..............................................................................725
Mounting procedure for side-by-side flush mounting...........726
Technical data................................................................................726
Enclosure...................................................................................726
Connection system....................................................................727
Influencing factors.....................................................................727
Type tests according to standard..............................................728
Section 19 Labels...........................................................................731
Different labels................................................................................731
Section 20 Connection diagrams...................................................735
Section 21 Time inverse characteristics.........................................749

Application......................................................................................749
Principle of operation......................................................................751
Mode of operation......................................................................751
Inverse characteristics....................................................................757
Section 22 Glossary.......................................................................771
Glossary.........................................................................................771

Section 1
Introduction
Section 1 Introduction
About this chapter

This chapter explains concepts and conventions used in this manual and provides
information necessary to understand the contents of the manual.
1.1 Introduction to the technical reference manual
1.1.1 About the complete set of manuals for an IED

The user’s manual (UM) is a complete set of five different manuals:
Application Technical Installation and Operator´s Engineering

manual reference commissioning manual guide
manual manual
en06000097.vsd
The Application Manual (AM) contains application descriptions, setting guidelines

and setting parameters sorted per function. The application manual should be used to
find out when and for what purpose a typical protection function could be used. The
manual should also be used when calculating settings.
The Technical Reference Manual (TRM) contains application and functionality

descriptions and it lists function blocks, logic diagrams, input and output signals,
setting parameters and technical data sorted per function. The technical reference
manual should be used as a technical reference during the engineering phase,
installation and commissioning phase, and during normal service.
The Installation and Commissioning Manual (ICM) contains instructions on how

to install and commission the protection IED. The manual can also be used as a
reference during periodic testing. The manual covers procedures for mechanical and
electrical installation, energizing and checking of external circuitry, setting and
configuration as well as verifying settings and performing directional tests. The
chapters are organized in the chronological order (indicated by chapter/section
numbers) in which the protection IED should be installed and commissioned.
The Operator’s Manual (OM) contains instructions on how to operate the protection
IED during normal service once it has been commissioned. The operator’s manual

Section 1
Introduction
can be used to find out how to handle disturbances or how to view calculated and
measured network data in order to determine the cause of a fault.
The IED 670 engineering guide (EG) contains instructions on how to engineer the
IED 670 products. The manual guides to use the different tool components for IED
670 engineering. It also guides how to handle the tool component available to read
disturbance files from the IEDs on the basis of the IEC 61850 definitions. The third
part is an introduction about the diagnostic tool components available for IED 670
products and the PCM 600 tool.
1.1.2 About the technical reference manual

The technical reference manual contains the following chapters:
• The chapter “Local human-machine interface” describes the control panel on

the IED. Display characteristics, control keys and various local human-machine
interface features are explained.
• The chapter “Basic IED functions” presents functions that are included in all
IEDs regardless of the type of protection they are designed for. These are
functions like Time synchronization, Self supervision with event list, Test mode
and other functions of a general nature.
• The chapter “Differential protection” describes the various differential functions
as well as restricted earth fault protection.
• The chapter “Distance protection” describes the functions for distance zones
with their quadrilateral characteristics, phase selection with load encroachment,
power swing detection and similar.
• The chapter “Current protection” describes functions such as overcurrent
protection, breaker failure protection and pole discordance.
• The chapter “Voltage protection” describes functions like undervoltage and
overvoltage protection as well as residual overvoltage protection.
• The chapter “Frequency protection” describes functions for overfrequency,
underfrequency and rate of change of frequency.
• The chapter “Multipurpose protection” describes the general protection function
for current and voltage.
• The chapter “Secondary system supervision” includes descriptions of functions
like current based Current circuit supervision and Fuse failure supervision.
• The chapter “Control” describes the control functions. These are functions like
the Synchronization and energizing check as well as several others which are
product specific.
• The chapter “Scheme communication” describes among others functions related
to current reversal and weak end infeed logic.
• The chapter “Logic” describes trip logic and related functions.
• The chapter “Monitoring” describes measurement related functions used to
provide data regarding relevant quantities, events, faults and the like.
• The chapter “Metering” describes primarily Pulse counter logic.
• The chapter “Station communication” describes Ethernet based communication
in general including the use of IEC61850, and horizontal communication via
GOOSE.

Section 1
Introduction
• The chapter “Remote communication” describes binary and analog signal

transfer, and the associated hardware.
• The chapter “Hardware” provides descriptions of the IED and its components.
• The chapter “Connection diagrams” provides terminal wiring diagrams and
information regarding connections to and from the IED.
• The chapter “Time inverse characteristics” describes and explains inverse time
delay, inverse time curves and their effects.
• The chapter “Glossary” is a list of terms, acronyms and abbreviations used in
ABB technical documentation.
1.1.3 Design of the Technical reference manual (TRM)

The description of each IED related function follows the same structure (where
applicable). The different sections are outlined below.
1.1.3.1 Introduction
Outlines the implementation of a particular protection function.
1.1.3.2 Principle of operation
Describes how the function works, presents a general background to algorithms and
measurement techniques. Logic diagrams are used to illustrate functionality.
Logic diagrams
Logic diagrams describe the signal logic inside the function block and are bordered
by dashed lines.
Signal names
Input and output logic signals consist of two groups of letters separated by two dashes.
The first group consists of up to four letters and presents the abbreviated name for
the corresponding function. The second group presents the functionality of the
particular signal. According to this explanation, the meaning of the signal BLKTR in
figure 4 is as follows:
• BLKTR informs the user that the signal will BLOCK the TRIP command from
the under-voltage function, when its value is a logical one (1).
Input signals are always on the left hand side, and output signals on the right hand
side. Settings are not displayed.
Input and output signals

In a logic diagram, input and output signal paths are shown as a lines that touch the
outer border of the diagram.
Input and output signals can be configured using the CAP531 tool. They can be
connected to the inputs and outputs of other functions and to binary inputs and outputs.

Section 1
Introduction
Examples of input signals are BLKTR, BLOCK and VTSU. Examples output signals
are TRIP, START, STL1, STL2, STL3.
Setting parameters
Signals in frames with a shaded area on their right hand side represent setting
parameter signals. These parameters can only be set via the PST or LHMI. Their
values are high (1) only when the corresponding setting parameter is set to the
symbolic value specified within the frame. Example is the signal Block TUV=Yes.
Their logical values correspond automatically to the selected setting value.
Internal signals
Internal signals are illustrated graphically and end approximately. 2 mm from the
frame edge. If an internal signal path cannot be drawn with a continuous line, the
suffix -int is added to the signal name to indicate where the signal starts and continues,
see figure 3.
BLKTR
TEST
TEST
&
Block TUV=Yes BLOCK-int.
>1
BLOCK
VTSU
BLOCK-int.
&
STUL1N
BLOCK-int.
& >1 & TRIP
t
STUL2N
BLOCK-int.
START
&
STUL3N
STL1
STL2
STL3
xx04000375.vsd
Figure 1: Logic diagram example with -int signals
External signals
Signal paths that extend beyond the logic diagram and continue in another diagram
have the suffix “-cont.”, see figure 2 and figure 3.

Section 1
Introduction
STZMPP-cont.
>1
STCND
& STNDL1L2-cont.
1L1L2
STNDL2L3-cont.
&
1L2L3
& STNDL3L1-cont.
1L3L1
& STNDL1N-cont.
1L1N
& STNDL2N-cont.
1L2N
STNDL3N-cont.
&
1L3N
>1 STNDPE-cont.
>1
1--VTSZ 1--STND
>1 &
1--BLOCK
BLK-cont.
xx04000376.vsd
Figure 2: Logic diagram example with an outgoing -cont signal
STNDL1N-cont.
>1
STNDL2N-cont. 15 ms
& t STL1
STNDL3N-cont.
STNDL1L2-cont. >1 15 ms
& t STL2
STNDL2L3-cont.
15 ms
STNDL3L1-cont. & t STL3
>1
15 ms
& t START
>1
BLK-cont.
xx04000377.vsd
Figure 3: Logic diagram example with an incoming -cont signal

Section 1
Introduction
1.1.3.3 Input and output signals
Input and output signals are presented in two separate tables. Each table consists of
two columns. The first column contains the name of the signal and the second column
contains the description of the signal.
1.1.3.4 Function block
Each function block is illustrated graphically.
Input signals are always on the left hand side, and output signals on the right hand
side. Settings are not displayed. Special kinds of settings are sometimes available.
These are supposed to be connected to constants in the configuration scheme, and are
therefore depicted as inputs. Such signals will be found in the signal list but described
in the settings table.
IEC 61850 - 8 -1
CAP531 Name Logical Node
Inputs TUV1-
PH2PUVM
U3P TRIP
BLOCK TR1
BLKTR1 TR1L1
BLKST1 TR1L2
BLKTR2 TR1L3
Outputs
BLKST2 TR2
TR2L1
TR2L2
TR2L3
START
ST1
ST1L1
ST1L2
ST1L3
ST2 Diagram
ST2L1 Number
ST2L2
ST2L3
en05000330.vsd
Figure 4: Example of a function block
1.1.3.5 Setting parameters
These are presented in tables and include all parameters associated with the function
in question.
1.1.3.6 Technical data
The technical data section provides specific technical information about the function
or hardware described.

Section 1
Introduction
1.1.4 Intended audience

General
This manual addresses system engineers, installation and commissioning personnel,
who use technical data during engineering, installation and commissioning, and in
normal service.
Requirements
The system engineer must have a thorough knowledge of protection systems,
protection equipment, protection functions and the configured functional logics in
the protective devices. The installation and commissioning personnel must have a
basic knowledge in the handling electronic equipment.
1.1.5 Related documents

Documents related to RED 670 Identity number
Operator’s manual 1MRK 505 133-UEN
Installation and commissioning manual 1MRK 505 134-UEN
Technical reference manual 1MRK 505 132-UEN
Application manual 1MRK 505 135-UEN
Buyer’s guide 1MRK 505 164-BEN
Connection diagram, Single breaker arr. Three phase tripping arr. 1MRK 002 801-BA
Connection diagram, Single breaker arr. Single phase tripping arr. 1MRK 002 801-CA
Connection diagram, Multi breaker arr. Three phase tripping arr. 1MRK 002 801-DA
Connection diagram, Multi breaker arr. Single phase tripping arr. 1MRK 002 801-EA
Configuration diagram A, Single breaker with single or double busbars 1MRK 004 500-82
Configuration diagram B, Single breakers with single or double busbars 1MRK 004 500-83
Configuration diagram C, Multi breakers such as 1 1/2 or ring busbar arr. 1MRK 004 500-84
Configuration diagram D, Multi breakers such as 1 1/2 or ring busbar arr. 1MRK 004 500-85
Setting example 1, 230 kV Short cable line with 1 1/2 CB arr. 1MRK 505 175-WEN
Connection and Installation components 1MRK 013 003-BEN

Test system, COMBITEST 1MRK 512 001-BEN
Accessories for IED 670 1MRK 514 012-BEN
Getting started guide IED 670 1MRK 500 065-UEN
SPA and LON signal list for IED 670 1MRK 500 075-WEN
IEC 61850 Data objects list for IED 670 1MRK 500 077-WEN
Generic IEC 61850 IED Connectivity package 1KHA001027–UEN
Protection and Control IED Manager PCM 600 Installation sheet 1MRS755552
Engineering guide IED 670 products 1MRK 511 179–UEN
Latest versions of the described documentation can be found on www.abb.com/substationautomation

Section 1
Introduction
1.1.6 Revision notes

Revision Description
D No functionality added. Minor changes made in content due to problem reports.

Section 2
Local human-machine interface
Section 2 Local human-machine interface
About this chapter

This chapter describes the structure and use of the Local human machine interface
(LHMI) or in other words, the control panel on the IED.
2.1 Human machine interface
The local human machine interface is available in a small, and a medium sized model.
The principle difference between the two is the size of the LCD. The small size LCD
has a four lines and the medium size LCD can display the single line diagram with
up to 15 objects.
The local human machine interface is equipped with an LCD that can display the
single line diagram with up to 15 objects.
The local human-machine interface is simple and easy to understand – the whole front
plate is divided into zones, each of them with a well-defined functionality:
• Status indication LEDs

• Alarm indication LEDs which consists of 15 LEDs (6 red and 9 yellow) with
user printable label. All LEDs are configurable from the PCM 600 tool
• Liquid crystal display (LCD)
• Keypad with push buttons for control and navigation purposes, switch for
selection between local and remote control and reset
• An isolated RJ45 communication port

Section 2
Figure 5: Small graphic HMI
Figure 6: Medium graphic HMI, 15 controllable objects

Section 2
2.2 Small size graphic HMI
2.2.1 Introduction
The small sized HMI is available for 1/2, 3/4 and 1/1 x 19” case. The LCD on the
small HMI measures 32 x 90 mm and displays 7 lines with up to 40 characters per
line. The first line displays the product name and the last line displays date and time.
The remaining 5 lines are dynamic. This LCD has no graphic display potential.
2.2.2 Design
The LHMI is identical for both the 1/2, 3/4 and 1/1 cases. The different parts of the
small LHMI is shown in figure 7
1 2 3
en05000055.eps
8 7
Figure 7: Small graphic HMI
1 Status indication LEDs

2 LCD

Section 2
3 Indication LEDs
4 Label
5 Local/Remote LEDs
6 RJ 45 port
7 Communication indication LED
8 Keypad
2.3 Medium size graphic HMI
2.3.1 Introduction
The 1/2, 3/4 and 1/1 x 19” cases can be equipped with the medium size LCD. This is
a fully graphical monochrome LCD which measures 120 x 90 mm. It has 28 lines
with up to 40 characters per line. To display the single line diagram, this LCD is
required.
2.3.2 Design
The different parts of the medium size LHMI is shown in figure 8

Section 2
1 2 3
en05000056.eps
8 7
Figure 8: Medium size graphic HMI
1 Status indication LEDs

2 LCD
3 Indication LEDs
4 Label
5 Local/Remote LEDs
6 RJ45 port
7 Communication indication LED
8 Keypad
2.4 Keypad

Section 2
The keypad is used to monitor and operate the IED. The keypad has the same look
and feel in all IEDs in the IED 670 series. LCD screens and other details may differ
but the way the keys function is identical. The keypad is illustrated in figure 9.
Figure 9: The HMI keypad
The keys used to operate the IED are described below in table 1.
Table 1: HMI keys on the front of the IED

Key Function
This key closes (energizes) a breaker or disconnector.
This key opens a breaker or disconnector.
The help key brings up two submenus. Key operation and IED information.
This key is used to clear entries, It cancels commands and edits.
Opens the main menu, and used to move to the default screen.
The Local/Remote key is used to set the IED in local or remote control mode.
This key opens the reset screen.
The E key starts editing mode and confirms setting changes when in editing mode.
The right arrow key navigates forward between screens and moves right in editing mode.
Table continued on next page

Section 2
Key Function
The left arrow key navigates backwards between screens and moves left in editing mode.
The up arrow key is used to move up in the single line diagram and in menu tree.
The down arrow key is used to move down in the single line diagram and in menu tree.
2.5 LED
2.5.1 Introduction
The LED module is a unidirectional means of communicating. This means that events
may occur that activate a LED in order to draw the operators attention to something
that has occurred and needs some sort of action.
2.5.2 Status indication LEDs

There are three LEDs above the LCD. The information they communicate is described
in the table below.
LED Indication Information
Green:
Steady In service
Flashing Internal failure
Dark No power supply
Yellow:
Steady Dist. rep. triggered
Flashing Terminal in test mode
Red:
Steady Trip command issued
2.5.3 Indication LEDs

The LED indication module comprising 15 LEDs is standard in IED 670s. Its main
purpose is to present an immediate visual information for protection indications or
alarm signals.
There are alarm indication LEDs and hardware associated LEDs on the right hand
side of the front panel. The alarm LEDs are found to the right of the LCD screen.
They can show steady or flashing light. Flashing would normally indicate an alarm.

Section 2
The alarm LEDs are configurable using the PCM 600 tool. This is because they are
dependent on the binary input logic and can therefore not be configured locally on
the HMI. Some typical alarm examples follow:
• Bay controller failure

• CB close blocked
• Interlocking bypassed
• Differential protection trip
• SF6 Gas refill
• Position error
• CB spring charge alarm
• Oil temperature alarm
• Thermal overload trip
The RJ45 port has a yellow LED indicating that communication has been established
between the IED and a computer.
The Local/Remote key on the front panel has two LEDs indicating whether local or
remote control of the IED is active.
2.6 LHMI related functions
2.6.1 Introduction
The adaptation of the LHMI to the application and user preferences is made with:
• function block LHMI (LocalHMISign)

• function block HLED (LEDMonitor)
• setting parameters
2.6.2 General setting parameters
Table 2: General settings for the localHMI (LHM1-) function

Parameter Range Step Default Unit Description
Language English - English - Local HMI language
OptionalLanguage
DisplayTimeout 10 - 120 10 60 Min Local HMI display
timeout
AutoRepeat Off - On - Activation of auto-
On repeat (On) or not
(Off)
ContrastLevel -10 - 20 1 0 % Contrast level for
display

Section 2

DefaultScreen 0-0 1 0 - Default screen
Password SimplePassw - SimplePassw - Password type for
DOEG205.3-1 authorization
EvListSrtOrder Latest on top - Latest on top - Sort order of event list
Oldest on top
2.6.3 Status indication LEDs
2.6.3.1 Design
The function block LHMI (LocalHMISign) controls and supplies information about
the status of the status indication LEDs. The input and output signals of LHMI are
configured with the PCM 600 tool.
See section "Status indication LEDs" for information about the LEDs.

LHMI-
LocalHMI
CLRLEDS HMI-ON
RED-S
YELLOW-S
YELLOW-F
CLRPULSE
LEDSCLRD
en05000773.vsd
Figure 10: LHMI function block
Table 3: Input signals for the LocalHMI (LHMI-) function block

Signal Description
CLRLEDS Input to clear the LCD-HMI LEDs
Table 4: Output signals for the LocalHMI (LHMI-) function block

Signal Description
HMI-ON Backlight of the LCD display is active
RED-S Red LED on the LCD-HMI is steady
YELLOW-S Yellow LED on the LCD-HMI is steady
YELLOW-F Yellow LED on the LCD-HMI is flashing
CLRPULSE A pulse is provided when the LEDs on the LCD-HMI are
cleared
LEDSCLRD Active when the LEDs on the LCD-HMI are not active

Section 2
2.6.4 Indication LEDs
The function block HLED (LEDMonitor) controls and supplies information about
the status of the indication LEDs. The input and output signals of HLED are
configured with the PCM 600 tool. The input signal for each LED is selected
individually with the PCM 600 Signal Matrix Tool (SMT). LEDs (number 1–6) for
trip indications are red and LEDs (number 7–15) for start indications are yellow.
Each indication LED on the LHMI can be set individually to operate in six different
sequences; two as follow type and four as latch type. Two of the latching types are
intended to be used as a protection indication system, either in collecting or restarting
mode, with reset functionality. The other two are intended to be used as signalling
system in collecting (coll) mode with an acknowledgment functionality. The light
from the LEDs can be steady (-S) or flickering (-F).
2.6.4.2 Design
The information on the LEDs is stored at loss of the auxiliary power to the IED. The
latest LED picture appears immediately after the IED is successfully restarted.
Operating modes
• Collecting mode
• LEDs which are used in collecting mode of operation are accumulated
continuously until the unit is acknowledged manually. This mode is
suitable when the LEDs are used as a simplified alarm system.
• Re-starting mode
• In the re-starting mode of operation each new start resets all previous active
LEDs and activates only those which appear during one disturbance. Only
LEDs defined for re-starting mode with the latched sequence type 6
(LatchedReset-S) will initiate a reset and a restart at a new disturbance. A
disturbance is defined to end a settable time after the reset of the activated
input signals or when the maximum time limit has been elapsed.
Acknowledgment/reset
• From local HMI
• The active indications can be acknowledged/reset manually. Manual
acknowledgment and manual reset have the same meaning and is a
common signal for all the operating sequences and LEDs. The function is
positive edge triggered, not level triggered. The acknowledgment/reset is

Section 2
performed via the Reset-button and menus on the LHMI. For details, refer
to the “Operators manual”.
• From function input

• The active indications can also be acknowledged/reset from an input,
RESET, to the function. This input can for example be configured to a
binary input operated from an external push button. The function is positive
edge triggered, not level triggered. This means that even if the button is
continuously pressed, the acknowledgment/reset only affects indications
active at the moment when the button is first pressed.
• Automatic reset
• The automatic reset can only be performed for indications defined for re-
starting mode with the latched sequence type 6 (LatchedReset-S). When
the automatic reset of the LEDs has been performed, still persisting
indications will be indicated with a steady light.
Operating sequences
The sequences can be of type Follow or Latched. For the Follow type the LED follow
the input signal completely. For the Latched type each LED latches to the
corresponding input signal until it is reset.
The figures below show the function of available sequences selectable for each LED
separately. For sequence 1 and 2 (Follow type), the acknowledgment/reset function
is not applicable. Sequence 3 and 4 (Latched type with acknowledgement) are only
working in collecting mode. Sequence 5 is working according to Latched type and
collecting mode while sequence 6 is working according to Latched type and re-
starting mode. The letters S and F in the sequence names have the meaning S = Steady
and F = Flash.
At the activation of the input signal, the indication operates according to the selected
sequence diagrams below.
In the sequence diagrams the LEDs have the characteristics shown in figure 11.
= No indication = Steady light = Flash
en05000506.vsd
Figure 11: Symbols used in the sequence diagrams
Sequence 1 (Follow-S)
This sequence follows all the time, with a steady light, the corresponding input
signals. It does not react on acknowledgment or reset. Every LED is independent of
the other LEDs in its operation.

Section 2
Activating
signal
LED
en01000228.vsd
Figure 12: Operating sequence 1 (Follow-S)
Sequence 2 (Follow-F)
This sequence is the same as sequence 1, Follow-S, but the LEDs are flashing instead
of showing steady light.
Sequence 3 (LatchedAck-F-S)
This sequence has a latched function and works in collecting mode. Every LED is
independent of the other LEDs in its operation. At the activation of the input signal,
the indication starts flashing. After acknowledgment the indication disappears if the
signal is not present any more. If the signal is still present after acknowledgment it
gets a steady light.
Activating
signal
LED
Acknow.
en01000231.vsd
Figure 13: Operating sequence 3 (LatchedAck-F-S)
Sequence 4 (LatchedAck-S-F)
This sequence has the same functionality as sequence 3, but steady and flashing light
have been alternated.
Sequence 5 (LatchedColl-S)
This sequence has a latched function and works in collecting mode. At the activation
of the input signal, the indication will light up with a steady light. The difference to
sequence 3 and 4 is that indications that are still activated will not be affected by the
reset i.e. immediately after the positive edge of the reset has been executed a new
reading and storing of active signals is performed. Every LED is independent of the
other LEDs in its operation.

Section 2
Activating
signal
LED
Reset
en01000235.vsd
Figure 14: Operating sequence 5 (LatchedColl-S)
Sequence 6 (LatchedReset-S)
In this mode all activated LEDs, which are set to sequence 6 (LatchedReset-S), are
automatically reset at a new disturbance when activating any input signal for other
LEDs set to sequence 6 (LatchedReset-S). Also in this case indications that are still
activated will not be affected by manual reset, i.e. immediately after the positive edge
of that the manual reset has been executed a new reading and storing of active signals
is performed. LEDs set for sequence 6 are completely independent in its operation of
LEDs set for other sequences.
Definition of a disturbance
A disturbance is defined to last from the first LED set as LatchedReset-S is activated
until a settable time, tRestart, has elapsed after that all activating signals for the LEDs
set as LatchedReset-S have reset. However if all activating signals have reset and
some signal again becomes active before tRestart has elapsed, the tRestart timer does
not restart the timing sequence. A new disturbance start will be issued first when all
signals have reset after tRestart has elapsed. A diagram of this functionality is shown
in figure 15.

Section 2
From
disturbance
length control ³1 New
per LED ³1 disturbance
set to
sequence 6
tRestart
& t
&
³1
³1
&
en01000237.vsd
Figure 15: Activation of new disturbance
In order not to have a lock-up of the indications in the case of a persisting signal each
LED is provided with a timer, tMax, after which time the influence on the definition
of a disturbance of that specific LED is inhibited. This functionality is shown i
diagram in figure 16.
Activating signal
To LED
To disturbance
AND
tMax length control
t
en05000507.vsd
Figure 16: Length control of activating signals
Timing diagram for sequence 6

Figure 17 shows the timing diagram for two indications within one disturbance.

Section 2
Disturbance
t Restart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
en01000239.vsd
Figure 17: Operating sequence 6 (LatchedReset-S), two indications within

same disturbance
Figure 18 shows the timing diagram for a new indication after tRestart time has
elapsed.
Disturbance Disturbance
t Restart t Restart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
en01000240.vsd
Figure 18: Operating sequence 6 (LatchedReset-S), two different disturbances

Section 2
Figure 19 shows the timing diagram when a new indication appears after the first one
has reset but before tRestart has elapsed.
Disturbance
t Restart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
en01000241.vsd
Figure 19: Operating sequence 6 (LatchedReset-S), two indications within

same disturbance but with reset of activating signal between
Figure 20 shows the timing diagram for manual reset.
Disturbance
t Restart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
en01000242.vsd
Figure 20: Operating sequence 6 (LatchedReset-S), manual reset

Section 2

HLED-
LEDMonitor
BLOCK NEWIND
RESET ACK
LEDTEST
en05000508.vsd
Figure 21: HLED function block
Table 5: Input signals for the LEDMonitor (HLED-) function block

Signal Description
BLOCK Input to block the operation of the LED-unit
RESET Input to acknowledge/reset the indications of the LED-unit
LEDTEST Input for external LED test
Table 6: Output signals for the LEDMonitor (HLED-) function block

Signal Description
NEWIND A new signal on any of the indication inputs occurs
ACK A pulse is provided when the LEDs are acknowledged
Table 7: General settings for the LEDMonitor (HLED-) function

Operation Off - Off - Operation mode for
On the LED function
tRestart 0.0 - 100.0 0.1 0.0 s Defines the
disturbance length
tMax 0.0 - 100.0 0.1 0.0 s Maximum time for the
definition of a
disturbance
SeqTypeLED1 Follow-S - Follow-S - Sequence type for
Follow-F LED 1
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S

Section 2

Follow-F LED 2
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F LED 3
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F LED 4
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F LED 5
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F LED 6
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F LED 7
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
SeqTypeLED8 Follow-S - Follow-S - sequence type for
Follow-F LED 8
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F LED 9
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F LED 10
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S

Section 2

Follow-F LED 11
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F LED 12
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F LED 13
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F LED 14
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F LED 15
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S

48
Section 3
Basic IED functions
Section 3 Basic IED functions
About this chapter

This chapter presents functions that are basic to all REx670 IEDs. Typical functions
in this category are time synchronization, self supervision and test mode.
3.1 Analog inputs
3.1.1 Introduction
In order to get correct measurement results as well as correct protection operations
the analog input channels must be configured and properly set. It is necessary to define
a reference PhaseAngleRef for correct calculation of phase angles. For power
measuring and all directional and differential functions the directions of the input
currents must be properly defined. The measuring and protection algorithms in IED
670 are using primary system quantities and the set values are done in primary
quantities as well. Therefore it is extremely important to properly set the data about
the connected current and voltage transformers.
VT inputs are sometimes not available depending on ordered type of

Transformer Input Module (TRM).
3.1.2 Principle of operation

The direction of a current to the IED is depending on the connection of the CT. The
main CTs are always supposed to be star connected and can be connected with the
star point to the object or from the object. This information must be set to the IED.
The convention of the directionality is defined as follows: A positive value of current,
power etc. means that the quantity has the direction into the object and a negative
value means direction out from the object. For directional functions the direction into
the object is defined as Forward and the direction out from the object is defined as
Reverse, see figure 22

Section 3
Basic IED functions
Definition of direction Definition of direction

for directional functions for directional functions
Reverse Forward Forward Reverse
Protected Object
Line, transformer, etc
e.g. P, Q, I e.g. P, Q, I
Measured quantity is Measured quantity is
positive when flowing positive when flowing
towards the object towards the object
Set parameter Set parameter

CTStarPoint CTStarPoint
Correct Setting is Correct Setting is
"ToObject" "FromObject"
en05000456.vsd
Figure 22: Internal convention of the directionality in IED 670
With correct setting of the primary CT direction, CTStarPoint set to FromObject or

ToObject, a positive quantities always flowing towards the object and a direction
defined as Forward always is looking towards the object. To be able to use primary
system quantities for settings and calculation in the IED the ration of the main CTs
and VTs must be known. This information is given to the IED by setting of the rated
secondary and primary currents and voltages of the CTs and VTs.
3.1.3 Function block
The function blocks are not represented in the configuration tool. The
signals appear only in the SMT tool when a TRM is included in the
configuration with the function selector tool. In the SMT tool they can
be mapped to the desired virtual input (SMAI) of the IED670 and used
internally in the configuration.
3.1.4 Setting parameters

Dependent on ordered IED 670 type.
Table 8: General settings for the AISERVAL (AISV-) function

PhaseAngleRef 1 - 24 1 1 Ch Reference channel
for phase angle
presentation

Section 3
Basic IED functions
Table 9: General settings for the ANALOGIN12I (TA40-) function

CTStarPoint1 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec1 1 - 10 1 1 A Rated CT secondary
current
CTprim1 1 - 99999 1 3000 A Rated CT primary
current
FromObject= the
opposite
current
current
FromObject= the
opposite
current
current
FromObject= the
opposite
current
current
FromObject= the
opposite
current
current
FromObject= the
opposite
current
current

Section 3
Basic IED functions

FromObject= the
opposite
current
current
FromObject= the
opposite
current
current
FromObject= the
opposite
current
current
FromObject= the
opposite
current
current
FromObject= the
opposite
current
current
FromObject= the
opposite
current
current

Section 3
Basic IED functions
Table 10: General settings for the ANALOGIN6I (TB40-) function

FromObject= the
opposite
current
current
FromObject= the
opposite
current
current
FromObject= the
opposite
current
current
FromObject= the
opposite
current
current
FromObject= the
opposite
current
current
FromObject= the
opposite
current
current

Section 3
Basic IED functions
Table 11: General settings for the ANALOGIN9I3U (TC40-) function

FromObject= the
opposite
current
current
FromObject= the
opposite
current
current
FromObject= the
opposite
current
current
FromObject= the
opposite
current
current
FromObject= the
opposite
current
current
FromObject= the
opposite
current
current

Section 3
Basic IED functions

FromObject= the
opposite
current
current
FromObject= the
opposite
current
current
FromObject= the
opposite
current
current
VTsec10 0.001 - 999.999 0.001 110.000 V Rated VT secondary
voltage
VTprim10 0.05 - 2000.00 0.05 400.00 kV Rated VT primary
voltage
voltage
voltage
voltage
voltage
Table 12: General settings for the ANALOGIN6I6U (TD40-) function

FromObject= the
opposite
current
current

Section 3
Basic IED functions

FromObject= the
opposite
current
current
FromObject= the
opposite
current
current
FromObject= the
opposite
current
current
FromObject= the
opposite
current
current
FromObject= the
opposite
current
current
voltage
voltage
voltage
voltage
voltage
voltage

Section 3
Basic IED functions

voltage
voltage
voltage
voltage
voltage
voltage
3.2 Self supervision with internal event list
3.2.1 Introduction
The self-supervision function listens and reacts to internal system events, generated
by the different built-in self-supervision elements. The internal events are saved in
an internal event list.

The self-supervision operates continuously and includes:
• Normal micro-processor watchdog function.

• Checking of digitized measuring signals.
• Other alarms, for example hardware and time synchronization.
The self-supervision status can be monitored from the local HMI or a SMS/SCS
system.
Under the Diagnostics menu in the local HMI the present information from the self-
supervision function can be reviewed. The information can be found under
Diagnostics\Internal Events or Diagnostics\IED Status\General. Refer to the
“Installation and Commissioning manual” for a detailed list of supervision signals
that can be generated and displayed in the local HMI.
A self-supervision summary can be obtained by means of the potential free alarm

contact (INTERNAL FAIL) located on the power supply module. The function of
this output relay is an OR-function between the INT—FAIL signal see figure 24 and
a couple of more severe faults that can occur in the IED, see figure 23

Section 3
Basic IED functions
Figure 23: Hardware self-supervision, potential-free alarm contact.
Figure 24: Software self-supervision, IES (IntErrorSign) function block.
Some signals are available from the IES (IntErrorSign) function block. The signals
from this function block are sent as events to the station level of the control system.

Section 3
Basic IED functions
The signals from the IES function block can also be connected to binary outputs for
signalization via output relays or they can be used as conditions for other functions
if required/desired.
Individual error signals from I/O modules can be obtained from respective module
in the Signal Matrix Tool. Error signals from time synchronization can be obtained
from the time synchronization block TIME.
3.2.2.1 Internal signals
Self supervision provides several status signals, that tells about the condition of the
IED. As they provide information about the internal life of the IED, they are also
called internal signals. The internal signals can be divided into two groups. One group
handles signals that are always present in the IED; standard signals. Another group
handles signals that are collected depending on the hardware configuration. The
standard signals are listed in table 13. The hardware dependent internal signals are
listed in table 14. Explanations of internal signals are listed in table 15.
Table 13: Self-supervision's standard internal signals

Name of signal Description
FAIL Internal Fail status
WARNING Internal Warning status
NUMFAIL CPU module Fail status
NUMWARNING CPU module Warning status
RTCERROR Real Time Clock status
TIMESYNCHERROR Time Synchronization status
RTEERROR Runtime Execution Error status
IEC61850ERROR IEC 61850 Error status
WATCHDOG SW Watchdog Error status
LMDERROR LON/Mip Device Error status
APPERROR Runtime Application Error status
SETCHGD Settings changed
SETGRPCHGD Setting groups changed
FTFERROR Fault Tolerant Filesystem status
Table 14: Self-supervision's HW dependent internal signals

Card Name of signal Description
ADxx ADxx Analog In Module Error status
BIM BIM-Error Binary In Module Error status
BOM BOM-Error Binary Out Module Error status
IOM IOM-Error In/Out Module Error status
MIM MIM-Error Millampere Input Module Error status
LDCM LDCM-Error Line Differential Communication Error status

Section 3
Basic IED functions
Table 15: Explanations of internal signals

Name of signal Reasons for activation
FAIL This signal will be active if one or more of the following internal
signals are active; INT--NUMFAIL, INT--LMDERROR, INT--
WATCHDOG, INT--APPERROR, INT--RTEERROR, INT--
FTFERROR, or any of the HW dependent signals
WARNING This signal will be active if one or more of the following internal
signals are active; INT--RTCERROR, INT--IEC61850ERROR,
INT--TIMESYNCHERROR
NUMFAIL This signal will be active if one or more of the following internal
signals are active; INT--WATCHDOG, INT--APPERROR, INT--
RTEERROR, INT--FTFERROR
NUMWARNING This signal will be active if one or more of the following internal
signals are active; INT--RTCERROR, INT--IEC61850ERROR
RTCERROR This signal will be active when there is a hardware error with the
real time clock.
TIMESYNCHERROR This signal will be active when the source of the time
synchronization is lost, or when the time system has to make a time
reset.
RTEERROR This signal will be active if the Runtime Engine failed to do some
actions with the application threads. The actions can be loading of
settings or parameters for components, changing of setting groups,
loading or unloading of application threads.
IEC61850ERROR This signal will be active if the IEC61850 stack did not succeed in
some actions like reading IEC61850 configuration, startup etc.
WATCHDOG This signal will be activated when the terminal has been under too
heavy load for at least 5 minutes. The operating systems
background task is used for the measurements.
LMDERROR LON network interface, MIP/DPS, is in an unrecoverable error
state.
APPERROR This signal will be active if one or more of the application threads
are not in the state that Runtime Engine expects. The states can
be CREATED, INITIALIZED, RUNNING, etc.
SETCHGD This signal will generate an Internal Event to the Internal Event list
if any settings are changed.
SETGRPCHGD This signal will generate an Internal Event to the Internal Event list
if any setting groups are changed.
FTFERROR This signal will be active if both the working file and the backup file
are corrupted and can not be recovered.
3.2.2.2 Run-time model
The analog signals to the A/D converter is internally distributed into two different
converters, one with low amplification and one with high amplification, see figure
25.

Section 3
Basic IED functions
Figure 25: Simplified drawing of A/D converter for the 600 platform.
The technique to split the analogue input signal into two converters with different
amplification makes it possible to supervise the incoming signals under normal
conditions where the signals from the two converters should be identical. An alarm
is given if the signals are out of the boundaries. Another benefit is that it improves
the dynamic performance of the A/D conversion.
The self-supervision of the A/D conversion is controlled by the ADx_Controller

function. One of the tasks for the controller is to perform a validation of the input
signals. This is done in a validation filter which has mainly two objects: First is the
validation part, i.e. checks that the A/D conversion seems to work as expected.
Secondly, the filter chooses which of the two signals that shall be sent to the CPU,
i.e. the signal that has the most suitable level, the ADx_LO or the 16 times
higherADx_HI.
When the signal is within measurable limits on both channels, a direct comparison
of the two channels can be performed. If the validation fails, the CPU will be informed
and an alarm will be given.
The ADx_Controller also supervise other parts of the A/D converter.

IS---
InternalSignal
FAIL
WARNING
CPUFAIL
CPUWARN
T SYNCERR
RT CERR
en04000392.vsd
Figure 26: IS function block

Section 3
Basic IED functions
3.2.4 Output signals
Table 16: Output signals for the InternalSignal (IS---) function block
Signal Description
FAIL Internal fail
WARNING Internal warning
CPUFAIL CPU fail
CPUWARN CPU warning
TSYNCERR Time synchronization status
RTCERR Real time clock status

The function does not have any parameters available in Local HMI or Protection and
Control IED Manager (PCM 600)
3.2.6 Technical data
Table 17: Self supervision with internal event list

Data Value
Recording manner Continuous, event controlled
List size 1000 events, first in-first out
3.3 Time synchronization
3.3.1 Introduction
Use the time synchronization source selector to select a common source of absolute
time for the IED when it is a part of a protection system. This makes comparison of
events and disturbance data between all IEDs in a SA system possible.
3.3.2.1 General concepts
Time definitions
The error of a clock is the difference between the actual time of the clock, and the
time the clock is intended to have. The rate accuracy of a clock is normally called the
clock accuracy and means how much the error increases, i.e. how much the clock

Section 3
Basic IED functions
gains or loses time. A disciplined clock is a clock that “knows” its own faults and
tries to compensate for them, i.e. a trained clock.
Synchronization principle
From a general point of view synchronization can be seen as a hierarchical structure.
A module is synchronized from a higher level and provides synchronization to lower
levels.
Syncronization from
a higher level
Module
Optional syncronization of
modules at a lower level
en05000206.vsd
Figure 27: Synchronization principle
A module is said to be synchronized when it periodically receives synchronization

messages from a higher level. As the level decreases, the accuracy of the
synchronization decreases as well. A module can have several potential sources of
synchronization, with different maximum errors, which gives the module the
possibility to choose the source with the best quality, and to adjust its internal clock
after this source. The maximum error of a clock can be defined as a function of:
• The maximum error of the last used synchronization message

• The time since the last used synchronization message
• The rate accuracy of the internal clock in the module.
3.3.2.2 Real Time Clock (RTC) operation
The IED has a built-in Real Time Clock (RTC) with a resolution of one nanosecond.
The clock has a built-in calendar that handles leap years through 2098.
RTC at power off

During power off, the time in the IED time is kept by a capacitor backed RTC that
will provide 35 ppm accuracy for 5 days. This means that if the power is off, the time
in the IED may drift with 3 seconds per day, during 5 days, and after this time the
time will be lost completely.

Section 3
Basic IED functions
RTC at startup
At IED startup, the internal time is free running. If the RTC is still alive since the last
up time, the time in the IED will be quite accurate (may drift 35 ppm), but if the RTC
power has been lost during power off (will happen after 5 days), the IED time will
start at 1970-01-01. For more information, please refer to section "Time
synchronization startup procedure" and section "Example, binary synchronization".
Time synchronization startup procedure

The first message that contains full time (as for instance LON, SNTP, GPS etc.) will
give an accurate time to the IED. The IED is brought into a safe state and the time is
thereafter set to the correct value. After the initial setting of the clock, one of three
things will happen with each of the coming synchronization messages, configured as
“fine”:
• If the synchronization message, that is similar to the other messages from its
origin has an offset compared to the internal time in the IED, the message is used
directly for synchronization, that is for adjusting the internal clock to obtain zero
offset at the next coming time message.
• If the synchronization message has an offset that is large compared to the other
messages, a “spike-filter” in the IED will remove this time-message.
• If the synchronization message has an offset that is large, and the following
message also has a large offset, the spike filter will not act and the offset in the
synchronization message will be compared to a threshold that defaults to 100
milliseconds. If the offset is more than the threshold, the IED is brought into a
safe state and the clock is thereafter set to the correct time. If the offset is lower
than the threshold, the clock will be adjusted with 1000 ppm until the offset is
removed. With an adjustment of 1000 ppm, it will take 100 seconds or 1.7
minutes to remove an offset of 100 milliseconds.
Synchronization messages configured as coarse will only be used for initial setting
of the time. After this has been done, the messages are checked against the internal
time and only an offset of more than 10 seconds will reset the time.
Rate accuracy
In the REx670 IED, the rate accuracy at cold start is about 100 ppm, but if the IED
is synchronized for a while, the rate accuracy will be approximately 1 ppm if the
surrounding temperature is constant. Normally it will take 20 minutes to reach full
accuracy.
Time-out on synchronization sources

All synchronization interfaces has a time-out, and a configured interface must receive
time-messages regularly, in order not to give a TSYNCERR. Normally, the time-out
is set so that one message can be lost without getting a TSYNCERR, but if more than
one message is lost, a TSYNCERR will be given.

Section 3
Basic IED functions
3.3.2.3 Synchronization alternatives
Three main alternatives of external time synchronization are available. Either the
synchronization message is applied via any of the communication ports of the IED
as a telegram message including date and time or as a minute pulse, connected to a
binary input, or via GPS. The minute pulse is used to fine tune already existing time
in the IEDs.
Synchronization via SNTP

SNTP provides a “Ping-Pong” method of synchronization. A message is sent from
an IED to an SNTP-server, and the SNTP-server returns the message after filling in
a reception time and a transmission time. SNTP operates via the normal Ethernet
network that connects IEDs together in an IEC61850 network. For SNTP to operate
properly, there must be a SNTP-server present, preferably in the same station. The
SNTP synchronization provides an accuracy that will give 1 ms accuracy for binary
inputs. The IED itself can be set as a SNTP-time server.
SNTP server requirements

The SNTP server to be used shall be connected to the local network, i.e. not more
than 4-5 switches/routers away from the IED. The SNTP server shall be dedicated
for its task, or at least equipped with at real-time operating system, i.e. not a PC with
SNTP server software. The SNTP server shall be stable, i.e. either synchronized from
a stable source like GPS, or local i.e. without synchronization. Using a local SNTP
server i.e. without synchronization as primary or secondary server in a redundant
configuration is not recommended.
Synchronization via Serial Communication Module (SLM)

On the serial buses (both LON and SPA) two types of synchronization messages are
sent.
• Coarse message is sent every minute and comprises complete date and time, i.e.
year, month, day, hours, minutes, seconds and milliseconds.
• Fine message is sent every second and comprises only seconds and milliseconds.
IEC60870-5-103 is not used to synchronize the relay, but instead the offset between
the local time in the relay and the time received from 103 is added to all times (in
events and so on) sent via 103. In this way the relay acts as it is synchronized from
various 103 sessions at the same time. Actually, there is a “local” time for each 103
session.
The SLM module is located on the AD conversion Module (ADM).
Synchronization via Built-in-GPS

The built in GPS clock modules receives and decodes time information from the
global positioning system. The modules are located on the GPS time synchronization
Module (GSM).

Section 3
Basic IED functions
Synchronization via binary input

The IED accepts minute pulses to a binary input. These minute pulses can be
generated from e.g. station master clock. If the station master clock is not
synchronized from a world wide source, time will be a relative time valid for the
substation. Both positive and negative edge on the signal can be accepted. This signal
is also considered as a fine signal.
The minute pulse is connected to any channel on any Binary Input Module in the IED.
The electrical characteristic is thereby the same as for any other binary input.
If the objective of synchronization is to achieve a relative time within the substation

and if no station master clock with minute pulse output is available, a simple minute
pulse generator can be designed and used for synchronization of the IEDs. The minute
pulse generator can be created using the logical elements and timers available in the
IED.
The definition of a minute pulse is that it occurs one minute after the last pulse. As
only the flanks are detected, the flank of the minute pulse shall occur one minute after
the last flank.
Binary minute pulses are checked with reference to frequency.
Pulse data:
• Period time (a) should be 60 seconds.

• Pulse length (b):
• Minimum pulse length should be >50 ms.
• Maximum pulse length is optional.
• Amplitude (c) - please refer to section "Binary input module (BIM)".
Deviations in the period time larger than 50 ms will cause TSYNCERR.
en05000251.vsd
Figure 28: Binary minute pulses
The default time-out-time for a minute pulse is two minutes, and if no valid minute
pulse is received within two minutes a SYNCERR will be given.

Section 3
Basic IED functions
If contact bounces occurs, only the first pulse will be detected as a minute pulse. The
next minute pulse will be registered first 60 s - 50 ms after the last contact bounce.
If the minute pulses are perfect, e.g. it is exactly 60 seconds between the pulses,
contact bounces might occur 49 ms after the actual minute pulse without effecting
the system. If contact bounces occurs more than 50 ms, e.g. it is less than 59950 ms
between the two most adjacent positive (or negative) flanks, the minute pulse will
not be accepted.
Example, binary synchronization

A IED is configured to use only binary input, and a valid binary input is applied to a
binary input card. The HMI is used to tell the IED the approximate time and the minute
pulse is used to synchronize the IED thereafter. The definition of a minute pulse is
that it occurs one minute after the previous minute pulse, so the first minute pulse is
not used at all. The second minute pulse will probably be rejected due to the spike
filter. The third pulse will give the IED a good time and will reset the time so that the
fourth minute pulse will occur on a minute border. After the first three minutes, the
time in the IED will be good if the coarse time is set properly via the HMI or the RTC
backup still keeps the time since last up-time. If the minute pulse is removed for
instance for an hour, the internal time will drift by maximum the error rate in the
internal clock. If the minute pulse is returned, the first pulse automatically is rejected.
The second pulse will possibly be rejected due to the spike filter. The third pulse will
either synchronize the time, if the time offset is more than 100 ms, or adjust the time,
if the time offset is small enough. If the time is set, the application will be brought to
a safe state before the time is set. If the time is adjusted, the time will reach its
destination within 1.7 minutes.

TIME-
TIME
TSYNCERR
RTCERR
en05000425.vsd
Figure 29: TIME function block
3.3.4 Output signals
Table 18: Output signals for the TIME (TIME-) function block
Signal Description
TSYNCERR Time synchronization error
RTCERR Real time clock error

Section 3
Basic IED functions
Path in local HMI: Setting/Time
Path in PCM 600: Settings/Time/Synchronization
Table 19: Basic general settings for the TimeSynch (TSYN-) function
CoarseSyncSrc Off - Off - Coarse time
SPA synchronization
LON source
SNTP
FineSyncSource Off - Off - Fine time
SPA synchronization
LON source
BIN
GPS
GPS+SPA
GPS+LON
GPS+BIN
SNTP
GPS+SNTP
SyncMaster Off - Off - Activate IEDas
SNTP-Server synchronization
master
TimeAdjustRate Slow - Fast - Adjust rate for time
Fast synchronization
Table 20: Basic general settings for the TimeSynch (TSYN-) function
CoarseSyncSrc Off - Off - Coarse time
SPA synchronization
LON source
SNTP
FineSyncSource Off - Off - Fine time
SPA synchronization
LON source
BIN
GPS
GPS+SPA
GPS+LON
GPS+BIN
SNTP
GPS+SNTP
SyncMaster Off - Off - Activate IEDas
SNTP-Server synchronization
master
TimeAdjustRate Slow - Slow - Adjust rate for time
Fast synchronization

Section 3
Basic IED functions
Table 21: General settings for the TimeSynchBIN (TBIN-) function

ModulePosition 3 - 16 1 3 - Hardware position of
IO module for time
synchronization
BinaryInput 1 - 16 1 1 - Binary input number
for time
synchronization
BinDetection PositiveEdge - PositiveEdge - Positive or negative
NegativeEdge edge detection
Table 22: General settings for the TimeSynchSNTP (TSNT-) function

ServerIP-Add 0 - 18 1 0.0.0.0 - Server IP-address
RedServIP-Add 0 - 18 1 0.0.0.0 - Redundant server IP-
address
Table 23: General settings for the DaySumDSTBegin (TSTB-) function

MonthInYear January - March - Month in year when
February daylight time starts
March
April
May
June
July
August
September
October
November
December
DayInWeek Sunday - Sunday - Day in week when
Monday daylight time starts
Tuesday
Wednesday
Thursday
Friday
Saturday
WeekInMonth Last - Last - Week in month when
First daylight time starts
Second
Third
Fourth
UTCTimeOfDay 0 - 86400 1 3600 s UTC Time of day in
seconds when
daylight time starts

Section 3
Basic IED functions
Table 24: General settings for the DaySumTimeEnd (TSTE-) function

MonthInYear January - October - Month in year when
February daylight time ends
March
April
May
June
July
August
September
October
November
December
DayInWeek Sunday - Sunday - Day in week when
Monday daylight time ends
Tuesday
Wednesday
Thursday
Friday
Saturday
WeekInMonth Last - Last - Week in month when
First daylight time ends
Second
Third
Fourth
UTCTimeOfDay 0 - 86400 1 3600 s UTC Time of day in
seconds when
daylight time ends
Table 25: General settings for the TimeZone (TZON-) function

NoHalfHourUTC -24 - 24 1 0 - Number of half-hours
from UTC
Table 26: Time synchronization, time tagging

Function Value
Time tagging resolution, Events and Sampled 1 ms
Measurement Values
Time tagging error with synchronization once/min ± 1.0 ms typically
(minute pulse synchronization), Events and
Sampled Measurement Values
Time tagging error with SNTP synchronization, ± 1.0 ms typically
Sampled Measurement Values

Section 3
Basic IED functions
3.4 Parameter setting groups
3.4.1 Introduction
Use the six sets of settings to optimize IED operation for different system conditions.
By creating and switching between fine tuned setting sets, either from the human-
machine interface or configurable binary inputs, results in a highly adaptable IED
that can cope with a variety of system scenarios.

The ACGR function block has six functional inputs, each corresponding to one of the
setting groups stored in the IED. Activation of any of these inputs changes the active
setting group. Seven functional output signals are available for configuration
purposes, so that up to date information on the active setting group is always available.
A setting group is selected by using the local HMI, from a front connected personal
computer, remotely from the station control or station monitoring system or by
activating the corresponding input to the ACGR function block.
Each input of the function block can be configured to connect to any of the binary
inputs in the IED. To do this the PCM 600 configuration tool must be used.
The external control signals are used for activating a suitable setting group when
adaptive functionality is necessary. Input signals that should activate setting groups
must be either permanent or a pulse exceeding 400 ms.
More than one input may be activated at the same time. In such cases the lower order
setting group has priority. This means that if for example both group four and group
two are set to activate, group two will be the one activated.
Every time the active group is changed, the output signal SETCHGD is sending a
pulse with the length according to parameter t, which is set from PCM 600 or in the
local HMI.
The parameter MAXSETGR defines the maximum number of setting groups in use to
switch between.

Section 3
Basic IED functions
Figure 30: Connection of the function to external circuits
The above example also includes seven output signals, for confirmation of which
group that is active.
The SGC function block has an input where the number of setting groups used is
defined. Switching can only be done within that number of groups. The number of
setting groups selected to be used will be filtered so only the setting groups used will
be shown on the PST setting tool.
ACGR-
ActiveGroup
ACTGRP1 GRP1
ACTGRP2 GRP2
ACTGRP3 GRP3
ACTGRP4 GRP4
ACTGRP5 GRP5
ACTGRP6 GRP6
SETCHGD
en05000433.vsd
Figure 31: ACGR function block
SGC--
NoOfSetGrp
MAXSETGR
en05000716.vsd
3.4.4 Input and output signals

Section 3
Basic IED functions
Table 27: Input signals for the ActiveGroup (ACGR-) function block
Signal Description
ACTGRP1 Selects setting group 1 as active
Table 28: Output signals for the ActiveGroup (ACGR-) function block
Signal Description
GRP1 Setting group 1 is active
SETCHGD Pulse when setting changed
Table 29: General settings for the ActiveGroup (ACGR-) function

t 0.0 - 10.0 0.1 1.0 s Pulse length of pulse
when setting changed
Table 30: General settings for the NoOfSetGrp (SGC--) function

ActiveSetGrp SettingGroup1 - SettingGroup1 - ActiveSettingGroup
SettingGroup2
SettingGroup3
SettingGroup4
SettingGroup5
SettingGroup6
MAXSETGR 1-6 1 1 No Max number of setting
groups 1-6

Section 3
Basic IED functions
3.5 Test mode functionality
3.5.1 Introduction
Most of the functions in the IED can individually be blocked by means of settings
from the local HMI or PST. To enable these blockings the IED must be set in test
mode. When leaving the test mode, i.e. entering normal mode, these blockings are
disabled and everything is set to normal operation. All testing will be done with
actually set and configured values within the IED. No settings will be changed, thus
mistakes are avoided.

To be able to test the functions in the IED, you must set the terminal in the TEST
mode. There are two ways of setting the terminal in the TEST mode:
• By configuration, activating the input of the function block TEST.

• By setting TestMode to On in the local HMI, under the menu: TEST/IED test
mode.
While the IED is in test mode, the ACTIVE output of the function block TEST is
activated. The other two outputs of the function block TEST are showing which is
the generator of the “Test mode: On” state — input from configuration (OUTPUT
output activated) or setting from LHMI (SETTING output activated).
While the IED is in test mode, the yellow START LED will flash and all functions
are blocked. Any function can be de-blocked individually regarding functionality and
event signalling.
Most of the functions in the IED can individually be blocked by means of settings
from the local HMI. To enable these blockings the IED must be set in test mode (the
output ACTIVE in function block TEST is set to true), see example in figure 32.
When leaving the test mode, i.e. entering normal mode, these blockings are disabled
and everything is set to normal operation. All testing will be done with actually set
and configured values within the IED. No settings will be changed, thus no mistakes
are possible.
The blocked functions will still be blocked next time entering the test mode, if the
blockings were not reset.
The blocking of a function concerns all output signals from the actual function, so no
outputs will be activated.
The TEST function block might be used to automatically block functions when a test
handle is inserted in a test switch. A contact in the test switch (RTXP24 contact 29-30)
can supply a binary input which in turn is configured to the TEST function block.

Section 3
Basic IED functions
Each of the protection functions includes the blocking from TEST function block. A
typical example from the undervoltage function is shown in figure 32.
U Disconnection
Normal voltage
U1<
U2<
tBlkUV1 <
t1,t1Min
IntBlkStVal1
tBlkUV2 <
t2,t2Min
IntBlkStVal2
Time
Block step 1
Block step 2
en05000466.vsd
Figure 32: Example of blocking the time delayed undervoltage protection

function.

TEST-
Test
INPUT ACTIVE
OUTPUT
SETTING
en05000443.vsd
Figure 33: TEST function block
Table 31: Input signals for the Test (TEST-) function block
Signal Description
INPUT Sets terminal in test mode when active

Section 3
Basic IED functions
Table 32: Output signals for the Test (TEST-) function block
Signal Description
ACTIVE Terminal in test mode when active
OUTPUT Test input is active
SETTING Test mode setting is (On) or not (Off)
Table 33: General settings for the Test (TEST-) function

TestMode Off - Off - Test mode in
On operation (On) or not
(Off)
3.6 IED identifiers
3.6.1 Introduction
There are two functions that allow you to identify each IED individually:
ProductInformation function has only three pre-set, unchangeable but nevertheless
very important settings: SerialNo., Ordering No., and ProductDate, that you can see
on the local HMI, under Diagnostics/IED Status/Identifiers. They are very helpful in
case of support process (such as repair or maintenance).
Identifiers function is actually allowing you to identify the individual IED in your
system, not only in the substation, but in a whole region or a country.
Table 34: General settings for the TerminalID (TEID-) function

StationName 0 - 18 1 Station name - Station name
StationNumber 0 - 99999 1 0 - Station number
ObjectName 0 - 18 1 Object name - Object name
ObjectNumber 0 - 99999 1 0 - Object number
UnitName 0 - 18 1 Unit name - Unit name
UnitNumber 0 - 99999 1 0 - Unit number

Section 3
Basic IED functions
3.7 Signal matrix for binary inputs (SMBI)
3.7.1 Introduction
The SMBI function block is used within the CAP tool in direct relation with the Signal
Matrix Tool SMT (please see the overview of the engineering process in the
“Application manual”, chapter “Engineering of the IED”). It represents the way
binary inputs are brought in for one IED 670 configuration.

The SMBI function block, see figure 34, receives its inputs from the real (hardware)
binary inputs via the SMT, and makes them available to the rest of the configuration
via its outputs, named BI1 to BI10. The inputs, as well as the whole block, can be
tag-named. These tags will be represented in SMT.

SI01-
SMBI
INSTNAME BI1
BI1NAME BI2
BI2NAME BI3
BI3NAME BI4
BI4NAME BI5
BI5NAME BI6
BI6NAME BI7
BI7NAME BI8
BI8NAME BI9
BI9NAME BI10
BI10NAME
en05000434.vsd
Figure 34: SI function block
Table 35: Input signals for the SMBI (SI01-) function block
Signal Description
INSTNAME Instance name in Signal Matrix Tool
BI1NAME Signal name for BI1 in Signal Matrix Tool

Section 3
Basic IED functions
Signal Description
Table 36: Output signals for the SMBI (SI01-) function block
Signal Description
BI1 Binary input 1
BI2 Binary input 2
BI3 Binary input 3
BI4 Binary input 4
BI5 Binary input 5
BI6 Binary input 6
BI7 Binary input 7
BI8 Binary input 8
BI9 Binary input 9
BI10 Binary input 10
3.8 Signal matrix for binary outputs (SMBO)
3.8.1 Introduction
The SMBO function block is used within the CAP tool in direct relation with the
Signal Matrix Tool SMT (please see the overview of the engineering process in the
binary outputs are sent from one IED 670 configuration.

The SMBO function block, see figure 35, receives logical signal from the IED
configuration, which it is transferring to the real (hardware) outputs, via the SMT.
The inputs in the SMBO are named BO1 to BO10 and they, as well as the whole
function block, can be tag-named. The name tags will appear in SMT.

Section 3
Basic IED functions

SO01-
SMBO
BO1 INSTNAME
BO2 BO1NAME
BO3 BO2NAME
BO4 BO3NAME
BO5 BO4NAME
BO6 BO5NAME
BO7 BO6NAME
BO8 BO7NAME
BO9 BO8NAME
BO10 BO9NAME
BO10NAME
en05000439.vsd
Figure 35: SO function block
Table 37: Input signals for the SMBO (SO01-) function block
Signal Description
BO1 Signal name for BO1 in Single Matrix Tool
Table 38: Output signals for the SMBO (SO01-) function block
Signal Description
INSTNAME Instance name in Single Matrix Tool
BO1NAME Signal name for BO1 in Single Matrix Tool

Section 3
Basic IED functions
Signal Description
3.9 Signal matrix for mA inputs (SMMI)
3.9.1 Introduction
The SMMI function block is used within the CAP tool in direct relation with the
Signal Matrix Tool SMT (please see the overview of the engineering process in the
milliamp (mA) inputs are brought in for one IED670 configuration.

The SMMI function block, see figure 36, receives its inputs from the real (hardware)
mA inputs via the SMT, and makes them available to the rest of the configuration via
its analog outputs, named AI1 to AI6. The inputs, as well as the whole block, can be
tag-named. These tags will be represented in SMT.
The outputs on the SMMI are normally connected to the SPGGIO MVGGIO function
block for further use of the mA signals.

SMI1-
SMMI
INSTNAME AI1
AI1NAME AI2
AI2NAME AI3
AI3NAME AI4
AI4NAME AI5
AI5NAME AI6
AI6NAME
en05000440.vsd
Figure 36: SMI function block

Section 3
Basic IED functions
Table 39: Input signals for the SMMI (SMI1-) function block
Signal Description
INSTNAME Instance name in Signal Matrix Tool
AI1NAME Signal name for AI1 in Signal Matrix Tool
AI4NAME Signal name for IN4 in Signal Matrix Tool
Table 40: Output signals for the SMMI (SMI1-) function block
Signal Description
AI1 Analog milliampere input 1
3.10 Signal matrix for analog inputs (SMAI)
3.10.1 Introduction
The SMAI function block (or the pre-processing function block, as it is also known)
is used within the PCM 600 in direct relation with the Signal Matrix Tool SMT (please
see the overview of the engineering process in the “Application manual”, chapter
“Engineering of the IED”). It represents the way analog inputs are brought in for one
IED 670 configuration.

Every SMAI function block can receive four analog signals (three phases and one
neutral value), either voltage or current, see figure 37 and figure 38. The outputs of
the SMAI are giving information about every aspect of the 3ph analog signals
acquired (phase angle, RMS value, frequency and frequency derivates etc. – 244
values in total). The BLOCK input will reset to 0 all the analog inputs of the function
block.

Section 3
Basic IED functions
PR01-
SMAI
BLOCK SYNCOUT
DFTSPFC SPFCOUT
GRPNAME AI3P
AI1NAME AI1
AI2NAME AI2
AI3NAME AI3
AI4NAME AI4
TYPE AIN
NOSMPLCY
en05000705.vsd
Figure 37: PR01 function block
PR02-
SMAI
BLOCK AI3P
GRPNAME AI1
AI1NAME AI2
AI2NAME AI3
AI3NAME AI4
AI4NAME AIN
TYPE NOSMPLCY
en05000706.vsd
Figure 38: PR02–12 function block
Table 41: Input signals for the SMAI (PR01-) function block
Signal Description
BLOCK Block group 1
DFTSYNC Synchronisation of DFT calculation
DFTSPFC Number of samples per fundamental cycle used for DFT
calculation
GRPNAME Group name for GRP1 in Signal Matrix Tool
Table 42: Output signals for the SMAI (PR01-) function block
Signal Description
SYNCOUT Synchronisation signal from internal DFT reference function
SPFCOUT Number of samples per fundamental cycle from internal DFT
reference function
AI3P Group 1 analog input 3-phase group
AI1 Group 1 analog input 1

Section 3
Basic IED functions
Signal Description
AIN Group 1 analog input residual for disturbance recorder
Table 43: Input signals for the SMAI (PR02-) function block
Signal Description
BLOCK Block group 2
GRPNAME Group name for GRP2 in Signal Matrix Tool
Table 44: Output signals for the SMAI (PR02-) function block
Signal Description
AI3P Group 2 analog input 3-phase group
AIN Group 2 analog input residual for disturbance recorder
Settings DFTRefExtOut and DFTReference shall be set to default

value InternalDFTRef if no VT inputs are available.

Section 3
Basic IED functions
Table 45: General settings for the SMAI (PR01-) function

DFTRefExtOut InternalDFTRef - InternalDFTRef - DFT reference for
AdDFTRefCh1 external output
AdDFTRefCh2
AdDFTRefCh3
AdDFTRefCh4
AdDFTRefCh5
AdDFTRefCh6
AdDFTRefCh7
AdDFTRefCh8
AdDFTRefCh9
AdDFTRefCh10
AdDFTRefCh11
AdDFTRefCh12
External DFT ref
DFTReference InternalDFTRef - InternalDFTRef - DFT reference
AdDFTRefCh1
AdDFTRefCh2
AdDFTRefCh3
AdDFTRefCh4
AdDFTRefCh5
AdDFTRefCh6
AdDFTRefCh7
AdDFTRefCh8
AdDFTRefCh9
AdDFTRefCh10
AdDFTRefCh11
AdDFTRefCh12
External DFT ref
ConnectionType Ph-N - Ph-N - Input connection type
Ph-Ph
Negation Off - Off - Negation
NegateN
Negate3Ph
Negate3Ph+N
MinValFreqMeas 5 - 200 1 10 % Limit for frequency
calculation in % of
UBase
UBase 0.05 - 2000.00 0.05 400.00 kV Base voltage
TYPE 1-2 1 1 Ch 1=Voltage,2=Current

Section 3
Basic IED functions
Table 46: General settings for the SMAI (PR02-) function

AdDFTRefCh1
AdDFTRefCh2
AdDFTRefCh3
AdDFTRefCh4
AdDFTRefCh5
AdDFTRefCh6
AdDFTRefCh7
AdDFTRefCh8
AdDFTRefCh9
AdDFTRefCh10
AdDFTRefCh11
AdDFTRefCh12
External DFT ref
ConnectionType Ph-N - Ph-N - Input connection type
Ph-Ph
Negation Off - Off - Negation
NegateN
Negate3Ph
Negate3Ph+N
MinValFreqMeas 5 - 200 1 10 % Limit for frequency
calculation in % of
UBase
TYPE 1-2 1 1 Ch 1=Voltage,2=Current
3.11 Summation block 3 phase (SUM3Ph)
3.11.1 Introduction
The SUM3Ph function block is used in order to get the sum of two sets of 3 ph analog
signals (of the same type) for those IED functions that might need it.

The summation block receives the 3ph signals from the SMAI blocks, see
figure 39. In the same way, the BLOCK input will reset to 0 all the analog inputs of
the function block.

Section 3
Basic IED functions

SU01-
Sum3Ph
BLOCK AI3P
DFTSYNC AI1
DFTSPFC AI2
G1AI3P AI3
G2AI3P AI4
en05000441.vsd
Figure 39: SU function block
Table 47: Input signals for the Sum3Ph (SU01-) function block
Signal Description
BLOCK Block
DFTSYNC Synchronisation of DFT calculation
DFTSPFC Number of samples per fundamental cycle used for DFT
calculation
G1AI3P Group 1 analog input 3-phase group
G2AI3P Group 2 analog input 3-phase group
Table 48: Output signals for the Sum3Ph (SU01-) function block
Signal Description
AI3P Group analog input 3-phase group
AI1 Group 1 analog input
Settings DFTRefExtOut and DFTReference shall be set to default

value InternalDFTRef if no VT inputs are available.

Section 3
Basic IED functions
Table 49: General settings for the Sum3Ph (SU01-) function

SummationType Group1+Group2 - Group1+Group2 - Summation type
Group1-Group2
Group2-Group1
-
(Group1+Group2)
AdDFTRefCh1
External DFT ref
FreqMeasMinVal 5 - 200 1 10 % Amplitude limit for
frequency
calculation in % of
Ubase

88
Section 4
Differential protection
Section 4 Differential protection
About this chapter

This chapter describes the measuring principles, functions and parameters used in
differential protection.
4.1 Line differential protection
Function block name: L3D-- IEC 60617 graphical symbol:

ANSI number: 87L
IEC 61850 logical node name:
L3CPDIF 3Id/I>
Function block name: L6D-- IEC 60617 graphical symbol:

ANSI number: 87L
L6CPDIF 3Id/I>
Function block name: LT3D-- IEC 60617 graphical symbol:

ANSI number: 87LT
LT3CPDIF 3Id/I>

Section 4
Function block name: LT6D-- IEC 60617 graphical symbol:

ANSI number: 87LT
LT6CPDIF 3Id/I>
4.1.1 Introduction
4.1.1.1 Line differential protection, 3 or 6 CT sets (PDIF, 87L)
The line differential function compares the currents entering and leaving the protected
overhead line or cable. It offers phase-segregated true current differential protection
with high sensitivity and provides phase selection information for single-pole
tripping.
The three terminal version is used for conventional two-terminal lines with or without
1 1/2 circuit breaker arrangement in one end, as well as three terminal lines with single
breaker arrangements at all terminals.
Protected zone
RED Comm. Channel RED

670 670
en05000039.vsd
Figure 40: Example of application on a conventional two-terminal line
The six terminal version is used for conventional two-terminal lines with 1 1/2 circuit
breaker arrangements in both ends, as well as multi terminal lines with up to five
terminals.
Protected zone
RED RED
670 Comm. Channel 670
Comm. Channel Comm. Channel

RED
670
en05000040.vsd
Figure 41: Example of application on a three-terminal line with 1 1/2 breaker

arrangements

Section 4
The current differential algorithm in RED 670 provides high sensitivity for internal
faults, at the same time as it has excellent stability for external faults. Current samples
from all CTs are exchanged between the IEDs in the line ends (master-master mode)
or sent to one IED (master-slave mode) for evaluation.
A restrained dual biased slope evaluation is made where the bias current is the highest
phase current in any line end giving a secure through fault stability even with heavily
saturated CTs. In addition to the restrained evaluation, an unrestrained high
differential current setting can be used for fast tripping of internal faults with very
high currents.
A special feature with RED 670 is that applications with small power transformers
(rated current less than 50% of differential current setting) connected as line taps
without measurement in the tap can be handled. The normal load current is here
considered to be negligible, and special measures need only to be taken in the event
of a short circuit on the LV side of the transformer. In this application, the tripping
of the differential protection can be time delayed for low differential currents in order
to achieve coordination with down stream over current relays.
A line charging current compensation provides increased sensitivity of the differential

function.
4.1.1.2 Line differential protection 3 or 6 CT sets, with in-zone transformers

(PDIF, 87LT)
One or two power transformers can be included in the line differential protection
zone. Both two- and three-winding transformers are correctly represented with vector
group compensations made in the algorithm. The function includes 2nd and 5th
harmonic restraint and zero sequence current elimination.
Protected zone
RED Comm. Channel RED

670 670
Comm. Channel Comm. Channel

RED
670
en05000042.vsd
Figure 42: Example of application on a three-terminal line with a power

transformer in the protection zone
4.1.1.3 Analog signal transfer for line differential protection (MDIF)
The line differential communication can be arranged as a master-master system or a

master-slave system alternatively. In the former, current samples are exchanged
between all terminals, and an evaluation is made in each terminal. This means that a

Section 4
64 kbit/s communication channel is needed between every IED included in the same
line differential protection zone. In the latter, current samples are sent from all slave
IEDs to one master IED where the evaluation is made, and trip signals are sent to the
remote ends when needed. In this system, a 64 kbit/s communication channel is only
needed between the master, and each one of the slave terminals.
Protected zone
RED RED
670 670
Comm.
Channels
RED RED RED

670 670 670
en05000043.vsd
Figure 43: Five terminal line with master-master system
Protected zone
RED RED
670 670
Comm.
Channels
RED RED RED

670 670 670
en05000044.vsd
Figure 44: Five terminal line with master-slave system
Current samples from IEDs located geographically apart from each other, must be
time coordinated so that the current differential algorithm can be executed correctly.
In RED 670 it is possible to make this coordination in two different ways. The echo
method of time synchronizing is normally used whereas for applications where
transmit and receive times can differ, the optional built in GPS receivers shall be used.
The communication link is continuously monitored, and an automatic switchover to

a standby link is possible after a preset time.
4.1.2.1 Algorithm and logic
In the line differential function, measured current values from local and remote line
ends are evaluated in order to distinguish between internal or external faults, or
undisturbed conditions.

Section 4
The local currents are fed to the IED via the Analogue Input Modules and thereafter
they pass the Analog to Digital Converter, see figure 45.
Figure 45: The principle for the line differential function

Section 4
The remote currents are received to the IED as samples via a communication link.
When entering the IED, they are processed in the Line Differential Communication
Module (LDCM) where they are time coordinated with the local current samples, and
interpolated in order to be comparable with the local samples.
In the Pre-Processing Block, the real and imaginary parts of the fundamental
frequency phase currents and negative sequence currents are derived. Together with
the current samples, they are then forwarded to the differential function block where
three different analyses are carried out.
The first analysis is the classical differential and bias current evaluation with the
characteristic as seen in figure 46. The line differential function is phase segregated
where the differential current is the vectorial sum of all measured currents taken
separately for each phase. The bias current, on the other hand, is considered as the
greatest phase current in any line end and it is common for all three phases. The two
slopes (SlopeSection1, SlopeSection2) and breakpoints (EndSection1, EndSection2)
can be set in the PCM 600 tool or via the HMI.
Current values plotted above the characteristic formed by IdMin and the dual slope
will give a start in that phase. The level IdMinHigh is a setting value that is used to
temporarily decrease the sensitivity in situations when:
• the line is energized

• when a fault is classified as external
• when a tap transformer is switched in
There is also an unrestrained high differential current setting that can be used for fast
tripping of internal faults with very high currents.

Section 4
Operate current
[ in pu of IBase]
Operate
5
unconditionally
UnrestrainedLimit
4
Operate IdMinHigh
3 C
conditionally
A B
2
Section 1 Section 2 Section 3
SlopeSection3
1
IdMin
SlopeSection2 Restrain
0
0 1 2 3 4 5
EndSection1 Restrain current

EndSection2 [ in pu of IBase]
en05000300.vsd
Figure 46: Description of the restrained-, and the unrestrained operate

characteristics
where:
slope = D Ioperate × 100%

D Irestrain
and where the restrained characteristic is defined by the settings:
1. IdMin
2. EndSection1
3. EndSection2
4. SlopeSection2
5. SlopeSection3
The second analysis is the 2nd and 5th harmonic analysis on the differential current.
Occurrence of these harmonics over a level that is set separately for each one will
block tripping action from the biased slope evaluation.
The third analysis is the negative sequence current analysis. Effectively this is a fault
discriminator that distinguishes between internal and external faults. It works such

Section 4
that the phase angle of the negative sequence current from the local end is compared
with the phase angle of the sum of the negative sequence currents from the remote
ends. The characteristic for this fault discriminator is shown in figure 47, where the
directional characteristic is defined by the two setting parameters IminNegSeq and
NegSeqRoa.
90 deg
120 deg
If one or the Internal/external
other of fault boundary
currents is too
low, then no
measurement NegSeqROA
is done, and
(Relay
120 degrees
Operate
is mapped Angle)
180 deg 0 deg
IMinNegSeq
External Internal
fault fault
region region
270 deg
en05000188.vsd
Figure 47: Operating characteristic of the internal/external fault discriminator
Reference direction of currents is considered to be towards the line. Thus, when both
currents to be compared have this direction, the phase difference between them will
ideally be zero. In the opposite case, when one current is entering and the other is
leaving the protected object, the phase difference will ideally be 180 degree. In case
either the local or the sum of the remote negative sequence currents or both is below
the set level, the fault discriminator will not make any fault classification and the
value 120 degree is set. This value is then an indication that negative sequence
directional comparison has not been possible to make, and it does not mean
classification as external fault.
When a fault is classified as internal by the negative sequence fault discriminator, a

trip is issued under the condition that the dual slope restrained function has started,
whilst a classification as external fault results in an increase of the restrained
characteristic trip values IdMinHigh.
With reference to figure 45, the outputs from the three analysis blocks are fed to the
output logic. Figure 48 shows a simplified block diagram of this output logic where
only trip commands and no alarm signals are shown for simplicity.

Section 4
Figure 48: Simplified block diagram
Remembering that current values plotted above the characteristic formed by IdMin
and the dual slope in figure 47 are said to give a start, the output logic can be
summarized as follows:
• A start in one phase, gives a trip under the condition that the content of 2nd and
5th harmonic is below the set level for these harmonics. Otherwise it is blocked
as long as the harmonic is above the set level. However, when a line is energized

Section 4
the current setting value IdMinHigh is used. Effectively this means that the line
A-B-C in figure 46 forms the characteristic.
• Current values above the unrestrained limit gives a trip irrespective of any
presence of harmonics.
• Classification of a fault as internal by the negative sequence fault discriminator,
will give a trip under the condition that a start has occurred in that phase. This
means that any harmonic blocking is then overridden. However, occurrence of
harmonics at the same time as the differential current is below the level
IdMinHigh, will block a trip even though the fault is classified as internal. This
latter condition is to prevent unwanted trips when energizing a line tap
transformer.
• Classification of a fault as external by the negative sequence fault discriminator
will cause IdMinHigh to be used as the lower limit for the restrained characteristic
according to figure 46. Cross blocking will also be activated in this situation.
Compensation for charging currents can be selected active or not by setting

ChargCurEnableYes or No. The compensation works such that the fundamental
frequency differential current that is measured under steady state undisturbed
conditions, is identified and then subtracted making the resulting differential current
zero (or close to zero). This action is made separately for each phase. The magnitude
of the subtracted pre-fault currents in Amperes can be read at any time as the service
value ICHARGE.
Values of the pre-fault differential currents are not updated under disturbance
conditions. The updating process is resumed 50 ms after normal conditions have been
restored. Normal conditions are only considered if there are no start signals, neither
internal nor external fault is declared, the power system is symmetrical, etc.
It is thus obvious that the change in charging current that the fault causes by decreasing
the system voltage is not considered in the algorithm, a matter that is further discussed
in the Application Manual for RED670.
It shall be noted that all small pre-fault differential currents are subtracted, no matter
what their origin. Besides the true charging currents, the following currents are
eliminated:
• Small differential currents due to small errors (inequalities) of current

transformers.
• Small differential currents because of off-nominal On-Load-Tap-Changer
positions when a power transformer is included in the protected zone.
• Load currents of tap loads included in the protected zone.
4.1.2.2 Time synchronization
In a numerical line differential protection, current samples from protections located

geographically apart from each other, must be time coordinated so that the currents
from the different line ends can be compared without introducing irrelevant errors.
Accuracy requirements on this time coordination are extremely high.

Section 4
As an example, an inaccuracy of 0.1 ms in a 50 Hz system gives a maximum amplitude

error approximately around 3% whilst an inaccuracy of 1 ms gives a maximum
amplitude error of approximately 31%. The corresponding figures for a 60 Hz system
are 4% and 38% respectively.
In RED670 the time coordination is made with the so-called echo method, which can
be complemented with GPS synchronization as an option.
Each IED has an accurate local clock with a very small time drift. This clock makes
time tagging of telegrams, and the echo method is then used to find out the time
difference between the clocks in two ends of a power line.
Referring to figure 49, it works such that the transmission time to send a message
from station B to station A (T1 → T2) and receive a message from A to B (T3 →
T4) is measured. The time instances T2 and T3 are taken with the local clock reference
of station A, and the time instances T1 and T4 are taken with the local clock reference
of station B.
T2 T3
A
B
T1 T4
en05000293.vsd
Figure 49: Measuring time differences
Calculation of the delay time one-way Td and the time difference Δt between the
clocks in A and B is then possible to do with equation 2 and equation 3, which are
only valid under the condition that the send and receive times are equal.
(T2 - T1 ) + (T4 - T3 )
Td =
2 (Equation 2)
(T1 + T4 ) - (T2 + T3 )
Dt =
2 (Equation 3)
In RED 670 Δt is calculated every time a telegram is received, and the time difference
is then used to adjust and interpolate the current measurements from the remote end
before the current differential algorithm is executed.
The echo method without GPS, can be used in telecommunications transmission

networks with varying signal propagation delay as long as there is delay symmetry
i.e. the send and receive delays are equal. The delay variation can depend on the signal
going different routes in the network from time to other.

Section 4
When the delay symmetry is lost, the expression for Δt given above is no longer valid,
and GPS synchronization of the local IED clocks must be used.
Including the optional GPS, means that there will be one GPS receiver module in
each IED, synchronizing its local IED clock. As GPS synchronization is very
accurate, in the order of 1 μs, all IEDs in the same line differential scheme will have
the same clock reference. It is then possible to detect asymmetric transmission time
delay and compensate for it.
When the IED is equipped with GPS, this hardware is integrated in the IED. Besides
the GPS receiver itself, it also consists of filters and regulators for post processing of
the GPS time synch pulse, which is necessary to achieve a reliable GPS
synchronization. Especially short interruptions and spurious out of synch GPS signals
are handled securely in this way.
When GPS synchronization is used, an interruption in the GPS signal leads to

freewheeling during 8 seconds i.e. during this time the synchronization benefits from
the stability in the local clocks. If the interruption persists more than 8 seconds, either
fall back to the echo synchronization method or blocking of the line differential
function is made, as selected through setting parameter GPSSyncErr.
For a description of the time synchronization function, refer to section "Time

synchronization".
4.1.2.3 Analog signal communication for line differential protection
Communication principle
For a two-terminal line, the current from the local CT needs to be communicated over
a 64 kbit/s channel to the remote line end, and the remote end current communicated
back on the same channel. In case of e.g. a three terminal line another 64 kbit/s channel
will be needed to exchange the same local current with the third line end current, etc.
In one-and-a-half breaker arrangements, there are two local currents meaning two 64
kbit/s channels to each remote substation. Alternatively, it is possible to add together
the two local currents before sending them and in that way reduce the number of
communication channels needed. This is achieved by selecting proper setting for
parameter TransmCurr (CT-SUM, CT-DIFF1 or CT-DIFF2). However, by doing it
this way there will be reduced information about bias currents. For further information
and discussions on this matter, refer to the “Application manual” for RED670.
The communication can be arranged as a master-master system or a master-slave

system alternatively. Figure 50 shows a master-master system for a five-terminal line.
Here current samples are exchanged between all terminals, and an evaluation is made
in each terminal. This means that a 64 kbit/s communication channel is needed
between every IED included in the same line differential protection zone.

Section 4
Protected zone
RED RED
670 670
Comm. Channels
RED RED RED

670 670 670
en05000292.vsd
Figure 50: 5–terminal line with master-master system
In the master-slave system, current samples are sent from all slave IEDs to one master
IED where the evaluation is made and trip signals are sent to the remote ends when
needed. In this system, a 64 kbit/s communication channel is only needed between
the master, and each one of the slave terminals as shown in figure 51.
Protected zone
RED RED
670 670
Comm. Channels
RED RED RED

670 670 670
en05000291.vsd
Figure 51: 5–terminal line with master-slave system
The master-slave configuration is achieved by setting parameter Operation in the

slaves to Off for the line differential function, and setting parameter ChannelMode to
On for the LDCMs in the slaves.
Test mode
The line differential function in one IED can be set in test mode. This will block the
trip outputs on that IED, and set the remote IEDs in a remote test mode, such that
injected currents will be echoed back phase shifted and with a settable amplitude. The
trip outputs in the remote terminals will also be blocked automatically. For further
information on this, refer to the “Installation and Commissioning manual” for
RED670.
Communication of current sampled values

The currents are sampled twenty times per power system cycle in the protection
terminals, but the communication exchange is made only once every 5 ms. This means
that at in each telegram sent, 5 consecutive current samples in a 50 Hz system and 6

Section 4
consecutive current samples in a 60 Hz system (three phases each sampling instant)

are included. Figure 52 shows the principle.
Current Current Current Current Current Current Current Current

sample sample sample sample sample sample sample sample
telegram telegram telegram telegram telegram telegram telegram telegram
sent sent sent sent sent sent sent sent
Time
0 5 10 15 20 25 30 35 (ms)
en05000290.vsd
Figure 52: Communication of current sampled values.
where:
x is the current sampling moment
Redundant communication channels

With redundant communication channels, as shown in figure 53, both channels are
in operation continuously but with one of them favoured as a primary channel.
Telecom. Network
LD LD
CM CM
LD LD
CM CM
Telecom. Network
Primary
channel
Secondary redundant
channel en05000289.vsd
Figure 53: Direct fibre optical connection between two terminals with LDOM
over longer distances.
In case communication is lost on the primary channel, switchover to the secondary

channel is made after a settable time delay RedChSwTime. Return of the primary
channel will cause a switchback after another settable time delay RedChRturnTime.
For a three-, four- or five terminal line in a master-master configuration, a loss of one
communication channel will not cause the line differential protection to be
unserviceable. Instead it will automatically revert to a partial master-slave mode with

Section 4
the two IEDs that have an unserviceable communication link between them, will serve
as slaves.
For more details about the remote communication see Chapter "Remote
communication". See also the “Application manual”.
4.1.2.4 Binary signal transfer
There is space for eight binary signals integrated in the telegram of the line differential
analog communication. For further information about this, refer to section "Binary
signal transfer to remote end".
L3D--
L3CPDIF
I3P1 TRIP
I3P2 TRL1
I3P3 TRL2
TRL3
TRIPRES
TRIPUNRE
TRIPENHA
START
STL1
STL2
STL3
BLK2H
BLK2HL1
BLK2HL2
BLK2HL3
BLK5H
BLK5HL1
BLK5HL2
BLK5HL3
NSANGLE
IDL1MAG
IDL2MAG
IDL3MAG
IBIAS
IDNSMAG
ID2HL1
ID2HL2
ID2HL3
ID5HL1
ID5HL2
ID5HL3
IDL1
IDL2
IDL3
ICHARGE
en05000667.vsd
Figure 54: L3D function block

Section 4
L6D--
L6CPDIF
I3P1 TRIP
I3P2 TRL1
I3P3 TRL2
I3P4 TRL3
I3P5 TRIPRES
I3P6 TRIPUNRE
TRIPENHA
START
STL1
STL2
STL3
BLK2H
BLK2HL1
BLK2HL2
BLK2HL3
BLK5H
BLK5HL1
BLK5HL2
BLK5HL3
NSANGLE
IDL1MAG
IDL2MAG
IDL3MAG
IBIAS
IDNSMAG
ID2HL1
ID2HL2
ID2HL3
ID5HL1
ID5HL2
ID5HL3
IDL1
IDL2
IDL3
ICHARGE
en05000666.vsd
Figure 55: L6D function block

Section 4
LT3D-
LT3CPDIF_87LT
I3P1 TRIP
I3P2 TRL1
I3P3 TRL2
TRL3
TRIPRES
TRIPUNRE
TRIPENHA
START
STL1
STL2
STL3
BLK2H
BLK2HL1
BLK2HL2
BLK2HL3
BLK5H
BLK5HL1
BLK5HL2
BLK5HL3
ALARM
OPENCT
OPENCTAL
IDL1
IDL2
IDL3
IDL1MAG
IDL2MAG
IDL3MAG
IBIAS
IDNSMAG
en06000254.vsd
Figure 56: LT3D function block
LT6D-
LT6CPDIF_87LT
I3P1 TRIP
I3P2 TRL1
I3P3 TRL2
I3P4 TRL3
I3P5 TRIPRES
I3P6 TRIPUNRE
TRIPENHA
START
STL1
STL2
STL3
BLK2H
BLK2HL1
BLK2HL2
BLK2HL3
BLK5H
BLK5HL1
BLK5HL2
BLK5HL3
ALARM
OPENCT
OPENCTAL
IDL1
IDL2
IDL3
IDL1MAG
IDL2MAG
IDL3MAG
IBIAS
IDNSMAG
en06000255.vsd
Figure 57: LT6D function block

Section 4
LDL--
LineDiffLogic
CTFAIL TRIP
OUTSERV TRL1
BLOCK TRL2
TRL3
TRLOCAL
TRLOCL1
TRLOCL2
TRLOCL3
TRREMOTE
DIFLBLKD
en05000394.vsd
Figure 58: LDL function block
Table 50: Input signals for the L3CPDIF_87L (L3D--) function block
Signal Description
I3P1 Group signal for three phase current channel 1
Table 51: Output signals for the L3CPDIF_87L (L3D--) function block
Signal Description
TRIP Common, main, trip output signal
TRL1 Trip signal from phase L1
TRIPRES Trip by restrained differential protection
TRIPUNRE Trip by unrestrained differential protection
TRIPENHA Trip by enhanced restrained differential protection
START Common, main, start output signal
STL1 Start signal from phase L1
BLK2H Common block signal, due to 2nd harmonic
BLK2HL1 Block signal due to 2nd harmonic, phase L1
BLK5H Common block signal, due to 5-th harmonic
BLK5HL1 Block signal due to 5th harmonic, phase L1

Section 4
Signal Description
NSANGLE Angle between local and remote neg. seq. currents
IDL1MAG Magnitude of fund. freq. differential current, phase L1
IBIAS Magnitude of the bias current, common for L1, L2, L3
IDNSMAG Magnitude of the negative sequence differential current
ID2HL1 Magnitude of the 2nd harm. diff. current, phase L1
ID5HL1 Magnitude of the 5th harm. diff. current, phase L1
IDL1 Instantaneous differential current, phase L1
ICHARGE Amount of compensated charging current
Table 52: Input signals for the L6CPDIF_87L (L6D--) function block
Signal Description
Table 53: Output signals for the L6CPDIF_87L (L6D--) function block
Signal Description

Section 4
Signal Description
Table 54: Input signals for the LT3CPDIF_87L (LT3D-) function block
Signal Description

Section 4
Table 55: Output signals for the LT3CPDIF_87L (LT3D-) function block
Signal Description

Section 4
Table 56: Input signals for the LT6CPDIF_87L (LT6D-) function block
Signal Description
Table 57: Output signals for the LT6CPDIF_87L (LT6D-) function block
Signal Description

Section 4
Signal Description
Table 58: Input signals for the LineDiffLogic (LDL--) function block
Signal Description
CTFAIL CT failure indication from local CT supervision
OUTSERV Input for indicating that the terminal is out of service
BLOCK Block of function
Table 59: Output signals for the LDLPDIF_87L (LDL--) function block
Signal Description
TRIP General trip from differential protection system
TRLOCAL Trip from local differential function
TRLOCL1 Trip from local differential function in phase L1
TRREMOTE Trip from remote differential function
DIFLBLKD Local line differential function blocked

Section 4
Table 60: General settings for the L3CPDIF_87L (L3D--) function

NoOfTerminals 2 - 2 - Number of current
3 terminals of the
protected circuit
Chan2IsLocal No - No - 2-nd local current
Yes connected to input
channel 2, Yes/ No
IBase 50.0 - 9999.9 0.1 3000.0 A Base (reference)
current of the
differential
protection
ZerSeqCurSubtr Off - Off - On/Off for
On elimination of zero
seq. from diff. and
bias curr
Table 61: Parameter group settings for the L3CPDIF_87L (L3D--) function
Operation Off - Off - Operation Off / On
On
IdMin 0.20 - 2.00 0.01 0.50 IB Oper - restr charact.,
section 1 sensitivity,
multiple IBase
EndSection1 0.20 - 1.50 0.01 1.25 IB End of section 1, as
multiple of reference
current IBase
current IBase
SlopeSection2 10.0 - 50.0 0.1 40.0 % Slope in section 2 of
operate-restrain
characteristic, in %
operate- restrain
IdMinHigh 0.20 - 10.00 0.01 1.00 IB Initial lower
sensitivity, as
multiple of IBase
IntervIdMinHig 0.250 - 60.000 0.001 1.000 s Time interval of initial
lower sensitivity, in
sec
IdUnre 1.00 - 50.00 0.01 10.00 IB Unrestrained
differential current
limit, multiple of
IBase
NegSeqDiff Off - On - On/Off selection for
On internal / external
fault discriminator
NegSeqROA 30.0 - 120.0 1.0 60.0 Deg Internal/external
fault discriminator
Operate Angle,
degrees

Section 4

IMinNegSeq 0.01 - 0.20 0.01 0.04 IB Min. value of neg.
seq. curr. as multiple
of IBase
CrossBlock No - No - On/Off selection of
Yes the cross -block logic
I2/I1Ratio 5.0 - 100.0 1.0 10.0 % Max. ratio of 2nd
harm. to
fundamental harm
dif. curr. in %
I5/I1Ratio 5.0 - 100.0 1.0 25.0 % Max. ratio of 5th
harm. to
fundamental harm
dif. curr. in %
ChargCurEnable Off - Off - On/Off selection for
On compensation of
charging currents
AddDelay Off - Off - On/Off selection for
On delayed diff. trip
command
IMaxAddDelay 0.20 - 5.00 0.01 1.00 IB Below limit, extra
delay can be
applied, multiple of
IBase
DefDelay 0.000 - 6.000 0.001 0.000 s Definite time
additional delay in
seconds
IDMTtMin 0.001 - 6.000 0.001 0.010 s Inverse Delay
Minimum Time. In
seconds
CurveType ANSI Ext. inv. - IEC Def. Time - 19 curve types.
ANSI Very inv. Example: 15 for
ANSI Norm. inv. definite time delay.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
k 0.05 - 1.10 0.01 1.00 - Time Multiplier
Setting (TMS) for
inverse delays
p 0.01 - 1000.00 0.01 0.02 - Settable curve
parameter, user-
programmable curve
type.

Section 4

a 0.01 - 1000.00 0.01 0.14 - Settable curve
parameter, user-
programmable curve
type.
b 0.01 - 1000.00 0.01 1.00 - Settable curve
parameter, user-
programmable curve
type.
c 0.01 - 1000.00 0.01 1.00 - Settable curve
parameter, user-
programmable curve
type.
Table 62: General settings for the L6CPDIF (L6D--) function

3 terminals of the
4 protected circuit.
5 Minimum is 2,
6 maximum is 6.
Protection terminals
can be less than
number of current
terminals.
Chan2IsLocal No - No - 2nd current source
channel 2, Yes / No
current of the
differential
protection
seq. from diff. and
bias curr
Table 63: Parameter group settings for the L6CPDIF (L6D--) function
Operation Off - Off - Differential
On Protection Function
Operation Off/ On
multiple IBase
current IBase
current IBase

Section 4

operate-restrain
operate- restrain
sensitivity, as
multiple of IBase
sec
limit, multiple of
IBase
fault discriminator
fault discriminator
Operate Angle,
degrees
of IBase
Yes Cross -block logic
harm. to
fundamental harm
dif. curr. in %
harm. to
fundamental harm
dif. curr. in %
On compensation of
charging currents
command
delay can be
IBase
additional delay in
seconds
Minimum Time. In
seconds

Section 4

ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
Setting (TMS) for
inverse delays
p 0.01 - 1000.00 0.01 0.02 - Settable curve
parameter, user-
programmable curve
type.
a 0.01 - 1000.00 0.01 0.14 - Settable curve
parameter, user-
programmable curve
type.
b 0.01 - 1000.00 0.01 1.00 - Settable curve
parameter, user-
programmable curve
type.
c 0.01 - 1000.00 0.01 1.00 - Settable curve
parameter, user-
programmable curve
type.
Table 64: General settings for the LT3CPDIF_87L (LT3D-) function

3 terminals of the
protected circuit
channel 2, Yes/
No
current of the
differential
protection
seq. from diff. and
bias curr

Section 4

TransfAonInpCh No Transf A - No Transf A - Power
1 transformer A
2 applied on input
3 channel X
4
5
6
TraAWind1Volt 1.0 - 9999.9 0.1 130.0 kV Transformer A
rated voltage (kV)
on winding 1 (HV
winding)
TraAWind2Volt 1.0 - 9999.9 0.1 130.0 kV Transformer A
rated voltage (kV)
on winding 2 (LV
winding)
ClockNumTransA 0 [0 deg] - 0 [0 deg] - Transf. A phase
1 [30 deg lag] shift in multiples of
2 [60 deg lag] 30 deg, 5 for 150
3 [90 deg lag] deg
4 [120 deg lag]
5 [150 deg lag]
6 [180 deg lag]
7 [210 deg lag]
8 [240 deg lag]
9 [270 deg lag]
10 [300 deg lag]
11 [330 deg lag]
ZerSeqPassTraA No - No - Yes/No for
Yes capability of transf
A to transform
zero seq curr
TransfBonInpCh No Transf B - No Transf B - Power
1 transformer B
2 applied on input
3 channel X
4
5
6
TraBWind1Volt 1.0 - 9999.9 0.1 130.0 kV Transformer B
rated voltage (kV)
on winding 1 (HV
winding)

Section 4

TraBWind2Volt 1.0 - 9999.9 0.1 130.0 kV Transformer B
rated voltage (kV)
on winding 2 (LV
winding)
ClockNumTransB 0 [0 deg] - 0 [0 deg] - Transf. B phase
2 [60 deg lag] 30 deg, 2 for 60
3 [90 deg lag] deg
4 [120 deg lag]
5 [150 deg lag]
6 [180 deg lag]
7 [210 deg lag]
8 [240 deg lag]
9 [270 deg lag]
10 [300 deg lag]
11 [330 deg lag]
ZerSeqPassTraB No - No - Yes/No for
B to transform
zero seq curr
Table 65: Parameter group settings for the LT3CPDIF_87L (LT3D-) function
On
multiple IBase
current IBase
current IBase
operate-restrain
operate- restrain
sensitivity, as
multiple of IBase
sec
limit, multiple of
IBase
fault discriminator

Section 4

fault discriminator
Operate Angle,
degrees
of IBase
Yes the cross -block logic
harm. to
fundamental harm
dif. curr. in %
harm. to
fundamental harm
dif. curr. in %
On compensation of
charging currents
command
delay can be
IBase
additional delay in
seconds
Minimum Time. In
seconds
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
Setting (TMS) for
inverse delays

Section 4

p 0.01 - 1000.00 0.01 0.02 - Settable curve
parameter, user-
programmable curve
type.
a 0.01 - 1000.00 0.01 0.14 - Settable curve
parameter, user-
programmable curve
type.
b 0.01 - 1000.00 0.01 1.00 - Settable curve
parameter, user-
programmable curve
type.
c 0.01 - 1000.00 0.01 1.00 - Settable curve
parameter, user-
programmable curve
type.
Table 66: Basic general settings for the LT6CPDIF_87LT (LT6D-) function
3 terminals of the
4 protected circuit
5
6
channel 2, Yes/ No
current of the
differential
protection
ZerSeqCurSubtr Off - Off - Off/On for
ON elimination of zero
seq. from diff. and
bias curr
TraAOnInpCh No Transf A - No Transf A - Power transformer
1 A applied on input
2 channel X
3
4
5
6
RatVoltW1TraA 1.0 - 9999.9 0.1 130.0 kV Transformer A
rated voltage (kV)
on winding 1 (HV
winding)
RatVoltW2TraA 1.0 - 9999.9 0.1 130.0 kV Transformer A
rated voltage (kV)
on winding 2 (LV
winding)

Section 4

ClockNumTransA 0 [0 deg] - 0 [0 deg] - Transf. A phase
2 [60 deg lag] 30 deg, 5 for 150
3 [90 deg lag] deg
4 [120 deg lag]
5 [150 deg lag]
6 [180 deg lag]
7 [210 deg lag]
8 [240 deg lag]
9 [270 deg lag]
10 [300 deg lag]
11 [330 deg lag]
ZerSeqPassTraA No - No - Yes/No for
A to transform zero
seq curr
TraBOnInpCh No Transf B - No Transf B - Power transformer
1 B applied on input
2 channel X
3
4
5
6
RatVoltW1TraB 1.0 - 9999.9 0.1 130.0 kV Transformer B
rated voltage (kV)
on winding 1 (HV
winding)
RatVoltW2TraB 1.0 - 9999.9 0.1 130.0 kV Transformer B
rated voltage (kV)
on winding 2 (LV
winding)
ClockNumTransB 0 [0 deg] - 0 [0 deg] - Transf. B phase
2 [60 deg lag] 30 deg, 2 for 60 deg
3 [90 deg lag]
4 [120 deg lag]
5 [150 deg lag]
6 [180 deg lag]
7 [210 deg lag]
8 [240 deg lag]
9 [270 deg lag]
10 [300 deg lag]
11 [330 deg lag]
ZerSeqPassTraB No - No - Yes/No for
B to transform zero
seq curr

Section 4
Table 67: Basic parameter group settings for the LT6CPDIF_87LT (LT6D-) function
ON
IdMin 0.20 - 2.00 0.01 0.30 IB Oper - restr
charact., section 1
sensitivity, multiple
IBase
sensitivity, as
multiple of IBase
tIdMinHigh 0.000 - 60.000 0.001 1.000 s Time interval of
initial lower
sensitivity, in sec
limit, multiple of
IBase
NegSeqDiffEn Off - ON - Off/On selection for
ON internal / external
fault discriminator
fault discriminator
Operate Angle,
degrees
seq. curr. as
multiple of IBase
CrossBlockEn No - No - Off/On selection of
Yes the cross -block
logic
harm. to
fundamental harm
dif. curr. in %
harm. to
fundamental harm
dif. curr. in %
ChargCurEnable Off - Off - Off/On selection for
ON compensation of
charging currents
ON delayed diff. trip
command
delay can be
IBase
tDefTime 0.000 - 6.000 0.001 0.000 s Definite time
additional delay in
seconds
tMinInv 0.001 - 6.000 0.001 0.010 s Inverse Delay
Minimum Time. In
seconds

Section 4

ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
Setting (TMS) for
inverse delays
IdiffAlarm 0.05 - 1.00 0.01 0.15 IB Sustained
alarm, factor of
IBase
tAlarmdelay 0.000 - 60.000 0.001 10.000 s Delay for alarm due
to sustained
differential current,
in s
Table 68: Advanced parameter group settings for the LT6CPDIF_87LT (LT6D-) function
multiple of
reference current
IBase
multiple of
reference current
IBase
SlopeSection2 10.0 - 50.0 0.1 40.0 % Slope in section 2
of operate-restrain
SlopeSection3 30.0 - 100.0 0.1 80.0 % Slope in section 3
of operate- restrain
p 0.01 - 1000.00 0.01 0.02 - Settable curve
parameter, user-
programmable
curve type.
a 0.01 - 1000.00 0.01 0.14 - Settable curve
parameter, user-
programmable
curve type.

Section 4

b 0.01 - 1000.00 0.01 1.00 - Settable curve
parameter, user-
programmable
curve type.
c 0.01 - 1000.00 0.01 1.00 - Settable curve
parameter, user-
programmable
curve type.
OpenCTEnable Off - ON - Open CTEnable
ON Off/On
tOCTAlarmDelay 0.100 - 10.000 0.001 1.000 s Open CT: time in s
to alarm after an
open CT is
detected
tOCTResetDelay 0.100 - 10.000 0.001 0.250 s Reset delay in s.
After delay, diff.
function is
activated
Table 69: General settings for the LineDiffLogic (LDL--) function

Operation Off - On - Operation Off / On
On
testModeSet Off - Off - Test mode On/Off
On
ReleaseLocal Block all - Block all - Release of local
Release local terminal for trip
under test mode
Table 70: Line differential protection (PDIF, 87L, 87LT)

Function Range or value Accuracy
Minimum operate current (20-200)% of Ibase ± 2.0% of Ir at I £Ir
± 2.0% of I at I >Ir
SlopeSection2 (10.0-50.0)% -
SlopeSection3 (30.0-100.0)% -
EndSection 1 (20–150)% of Ibase -
EndSection 2 (100–1000)% of Ibase -
Unrestrained limit function (100–5000)% of Ibase ± 2.0% of Ir at I ≤ Ir

± 2.0% of I at I > Ir
Second harmonic blocking (5.0–100.0)% of fundamental ± 2.0% of Ir
Fifth harmonic blocking (5.0–100.0)% of fundamental ± 5.0% of Ir

Section 4

Inverse characteristics, see table 19 curve types See table 436 and
436 and table 437 table 437
Operate time 25 ms typically at 0 to 10 x Id -
Reset time 15 ms typically at 10 to 0 x Id -
Critical impulse time 2 ms typically at 0 to 10 x Id -
Charging current compensation On/Off -
4.2 High impedance differential protection (PDIF,

87)
Function block name: HZDx- IEC 60617 graphical symbol:

ANSI number: 87
HZPDIF IdN
4.2.1 Introduction
The high impedance differential protection can be used when the involved CT cores
have same turn ratio and similar magnetizing characteristic. It utilizes an external
summation of the phases and neutral current and a series resistor and a voltage
dependent resistor externally to the relay.

The high impedance differential function is based on one current input with external
stabilizing resistors and voltage dependent resistors. Three functions can be used to
provide a three phase differential protection function. The stabilizing resistor value
is calculated from the relay operating value UR calculated to achieve through fault
stability. The supplied stabilizing resistor has a link to allow setting of the correct
resistance value.
4.2.2.1 Logic diagram
The logic diagram see figure 59 shows the operation principles for the high impedance
differential protection function. It is a basically a simple one step relay with an
additional lower alarm level. The function can be totally blocked totally or only
tripping by activating inputs from external signals.

Section 4
Figure 59: Logic diagram for High impedance differential protection.

HZD1-
HZPDIF_87
ISI TRIP
BLOCK ALARM
BLKTR MEASVOLT
en05000363.vsd
Figure 60: HZD function block
Table 71: Input signals for the HZPDIF_87 (HZD1-) function block
Signal Description
ISI Group signal for current input
BLKTR Block of trip
Table 72: Output signals for the HZPDIF_87 (HZD1-) function block
Signal Description
TRIP Trip signal
ALARM Alarm signal
MEASVOLT Measured RMS voltage on CT secondary side

Section 4
Table 73: Parameter group settings for the HZPDIF_87 (HZD1-) function
On
U>Alarm 2 - 500 1 10 V Alarm voltage level in
volts on CT
secondary side
tAlarm 0.000 - 60.000 0.001 5.000 s Time delay to activate
alarm
U>Trip 5 - 900 1 100 V Operate voltage level
in volts on CT
secondary side
SeriesResistor 10 - 20000 1 250 ohm Value of series
resistor in Ohms
Table 74: High impedance differential protection (PDIF, 87)

Operate voltage (20-400) V ± 1.0% of Ur for U < Ur
± 1.0% of U for U > Ur
Reset ratio >95% -

Maximum continuous voltage U>Trip2/series resistor ≤200 W -
Operate time 10 ms typically at 0 to 10 x Ud -
Reset time 90 ms typically at 10 to 0 x Ud -
Critical impulse time 2 ms typically at 0 to 10 x Ud -

128
Section 5
Distance protection
Section 5 Distance protection
About this chapter

This chapter describes distance protection and associated functions. It includes
function blocks, logic diagrams and data tables with information about distance
protection, automatic switch onto fault, weak end in-feed and other associated
functions. Quadrilateral characteristics are also covered.
5.1 Distance protection zones (PDIS, 21)
Function block name: ZMx-- IEC 60617 graphical symbol:

ANSI number: 21
ZMQPDIS
5.1.1 Introduction
The line distance protection is a three zone full scheme protection with three fault
loops for phase to phase faults and three fault loops for phase to earth fault for each
of the independent zones. Individual settings for each zone resistive and reactive reach
gives flexibility for use onoverhead lines and cables of different types and lengths.
The function has a functionality for load encroachment which increases the possibility
to detect high resistive faults on heavily loaded lines(see figure 61).

Section 5
Distance protection
Forward
operation
Reverse
operation
en05000034.vsd
Figure 61: Typical distance protection zone with load encroachment function
activated
The independent measurement of impedance for each fault loop together with a
sensitive and reliable built in phase selection makes the function suitable in
applications with single phase auto-reclosing.
Built-in adaptive load compensation algorithm prevents overreaching of zone1 at load

exporting end at phase-to-earth faults on heavily loaded power lines.
The distance protection zones can operate, independent of each other, in directional
(forward or reverse) or non-directional mode. This makes them suitable, together with
different communication schemes, for the protection of power lines and cables in
complex network configurations, such as parallel lines, multi-terminal lines etc.
5.1.2.1 Full scheme measurement
The execution of the different fault loops within the IED670 are of full scheme type,
which means that each fault loop for phase to earth faults and phase to phase faults
for forward and reverse faults are executed in parallel.
Figure 62 presents an outline of the different measuring loops for the basic five,
impedance-measuring zones l.

Section 5
Distance protection
L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 1
en05000458.vsd
Figure 62: The different measuring loops at line-earth fault and phase-phase
fault.
The use of full scheme technique gives faster operation time compared to switched
schemes which mostly uses a start element to select correct voltages and current
depending on fault type. Each distance protection zone performs like one independent
distance protection relay with six measuring elements.
5.1.2.2 Impedance characteristic
The distance measuring zone include six impedance measuring loops; three intended
for phase-to-earth faults, and three intended for phase-to-phase as well as three-phase
faults.
The distance measuring zone will essentially operate according to the non-directional
impedance characteristics presented in figure 63 and figure 64. The phase-to-earth
characteristic is illustrated with the full loop reach while the phase-to-phase
characteristic presents the per-phase reach.

Section 5
Distance protection
RFPE R1+Rn RFPE
X0 - X1
Xn =
3
X1+Xn R0 - R1
Rn =
3
f N f N
R (Ohm/loop)
RFPE RFPE
X1+Xn
RFPE R1+Rn RFPE

en05000661.vsd
Figure 63: Characteristic for the phase-to-earth measuring loops, ohm/loop

domain.

Section 5
Distance protection
X (Ohm/phase)
RFPP 2·R1 RFPP
2·X1
R (Ohm/phase)
RFPP RFPP
2·X1
RFPP 2·R1 RFPP

en05000662.vsd
Figure 64: Characteristic for the phase-to-phase measuring loops
The fault loop reach with respect to each fault type may also be presented as in
figure 65. Note in particular the difference in definition regarding the (fault) resistive
reach for phase-to-phase faults and three-phase faults.

Section 5
Distance protection
ILn R1 + j X1
Phase-to-earth
UL1
element
Phase-to-earth
fault in phase L1 RFPE
(Arc + tower
resistance)
0
IN (R0-R1)/3 +
j (X0-X1)/3 )
IL1 R1 + j X1 Phase-to-phase
UL1 element L1-L2
Phase-to-phase
fault in phase RFPP
L1-L2 IL2
UL2 (Arc resistance)
R1 + j X1
IL1 R1 + j X1 0.5´RFPP Phase-to-phase

UL1 element L1-L3
Three-phase
fault
IL3
UL3
R1 + j X1 0.5´RFPP
en05000181.vsd
Figure 65: Fault loop model
where:
n designates anyone of the three phases (1, 2 or 3) and
m represents the phase that is leading phase n with 120 degrees (i.e. 3, 1 or 2).
The R1 and jX1 in figure 65 represents the positive sequence impedance from the
measuring point to the fault location. The RFPE and RFPP is the eventual fault
resistance in the fault place.
Regarding the illustration of three-phase fault in figure 65, there is of course fault
current flowing also in the third phase during a three-phase fault. The illustration
merely reflects the loop measurement, which is made phase-to-phase.
The theoretical parameters p and q outline the area of operation in quadrant 1 when
varied from 0 to 1.0. That is, for any combination of p and q, where both are between
0 and 1.0, the corresponding impedance is within the reach of the characteristic.

Section 5
Distance protection
The zone may be set to operate in Non-directional, Forward or Reverse direction

through the setting OperationDir. The result from respective set value is illustrated
in figure 66. It may be convenient to once again mention that the impedance reach is
symmetric, in the sense that it is conform for forward and reverse direction. Therefore,
all reach settings apply to both directions.
X X X
R R R
Non-directional Forward Reverse
en05000182.vsd
Figure 66: Directional operating modes of the distance measuring zone
5.1.2.3 Minimum operating current
The operation of the distance measuring zone is blocked if the magnitude of input
currents fall below certain threshold values.
The phase-to-earth loop Ln is blocked if ILn < IMinOpPE.
For zone 1 with load compensation feature the additional criterion applies, that all
phase-to-earth loops will be blocked when IN < IMinOpIN, regardless of the phase
currents.
ILn is the RMS value of the current in phase Ln. IN is the RMS value of the vector
sum of the three phase currents, i.e. residual current 3I0.
The phase-to-phase loop LmLn is blocked if ILmLn < IMinOpPP.
ILmLn is the RMS value of the vector difference between phase currents Lm and Ln.
All three current limits IminOpPE, IminOpIN and IMinOpPP are

automatically reduced to 75% of regular set values if the zone is set
to operate in reverse direction, i.e. OperationDir=Reverse.

Section 5
Distance protection
5.1.2.4 Measuring principles
Fault loop equations use the complex values of voltage, current, and changes in the
current. Apparent impedances are calculated and compared with the set limits. The
calculation of the apparent impedances at ph-ph faults follows equation 4 (example
for a phase L1 to phase L2 fault).
UL1 – UL2
Zapp = -------------------------
I L1 – IL2
(Equation 4)
Here U and I represent the corresponding voltage and current phasors in the respective
phase Ln (n = 1, 2, 3)
The earth return compensation applies in a conventional manner to ph-E faults

(example for a phase L1 to earth fault) according to equation 6.
U L1
Z app = ------------------------------
I L1 + I N × KN
(Equation 5)
Where:
UL1, IL1 and IN are the phase voltage, phase current and residual current present to the IED
KN is defined as:
X0 - X1
KN =
3X1
where X0 and X1 is zero and positive sequence reactance from the measuring point
to the fault on the protected line.
Here IN is a phasor of the residual current in relay point. This results in the same
reach along the line for all types of faults.
The apparent impedance is considered as an impedance loop with resistance R and

reactance X.
The formula given in equation 6 is only valid for no loaded radial feeder applications.
When load is considered in the case of single line to earth fault, conventional distance
protection might overreach at exporting end and underreach at importing end. REx670
has an adaptive load compensation which increases the security in such applications.
Measuring elements receive current and voltage information from the A/D converter.
The check sums are calculated and compared, and the information is distributed into
memory locations. For each of the six supervised fault loops, sampled values of
voltage (U), current (I), and changes in current between samples (DI) are brought
from the input memory and fed to a recursive Fourier filter.
The filter provides two orthogonal values for each input. These values are related to
the loop impedance according to equation 7,

Section 5
Distance protection
X Di
U = R × i + ------ × -----
w 0 Dt
(Equation 7)
in complex notation, or:
X D Re ( I )
Re ( U ) = R × Re ( I ) + ------ × ------------------
w0 Dt
(Equation 8)
X DIm ( I )
Im ( U ) = R × Im ( I ) + ------ × -----------------
w0 Dt
(Equation 9)
with
w0 = 2 × p × f 0
(Equation 10)
where:
Re designates the real component of current and voltage,
Im designates the imaginary component of current and voltage and
f0 designates the rated system frequency
The algorithm calculates Rm measured resistance from the equation for the real value
of the voltage and substitute it in the equation for the imaginary part. The equation
for the Xm measured reactance can then be solved. The final result is equal to:
Im ( U ) × DRe ( I ) – Re ( U ) × D Im ( I )
R m = ------------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – D Im ( I ) × Re ( I )
(Equation 11)
Re ( U ) × Im ( I ) – Im ( U ) × Re ( I )
Xm = w 0 × Dt × -------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – DIm ( I ) × Re ( I )
(Equation 12)
The calculated Rm and Xm values are updated each sample and compared with the set
zone reach. The adaptive tripping counter counts the number of permissive tripping
results. This effectively removes any influence of errors introduced by the capacitive
voltage transformers or by other factors.
The directional evaluations are performed simultaneously in both forward and reverse
directions, and in all six fault loops. Positive sequence voltage and a phase locked
positive sequence memory voltage are used as a reference. This ensures unlimited
directional sensitivity for faults close to the relay point.

Section 5
Distance protection
5.1.2.5 Directional lines
The evaluation of the directionality is taken place in the function block ZD.
Equation 13 and equation 14 are used to classify that the fault is in forward direction
for line-to-earth fault and phase-phase fault.
0.8 × U1L1 + 0.2 × U1L1M

-ArgDir < arg ------------------------------------------------------------ < ArgNegRes
IL1 (Equation 13)
For the L1-L2 element, the equation in forward direction is according to.
0.8 × U1L1L2 + 0.2 × U1L1L2M

-ArgDir < arg ----------------------------------------------------------------------- < ArgNegRes
I L1L2 (Equation 14)
where:
ArgDir is the setting for the lower boundary of the forward directional characteristic, by default set
to 15 (= -15 degrees) and
ArgNegRes is the setting for the upper boundary of the forward directional characteristic, by default
set to 115 degrees, see figure 67.
U1L1 is positive sequence phase voltage in phase L1
U1L1M is positive sequence memorized phase voltage in phase L1
IL1 is phase current in phase L1
U1L1L2 is voltage difference between phase L1 and L2 (L2 lagging L1)
U1L1L2M is memorized voltage difference between phase L1 and L2 (L2 lagging L1)
IL1L2 is current difference between phase L1 and L2 (L2 lagging L1)
The setting of ArgDir and ArgNegRes is by default set to 15 (= -15) and 115 degrees
respectively.(see figure 67) and it should not be changed unless system studies has
shown the necessity.
The ZD gives a binary coded signal on the output STDIR depending on the evaluation
where STFWL1N=1 adds 1, STRVL1N=1 adds 2, STFWL2N=1 adds 4 etc.

Section 5
Distance protection
ArgNegRes
ArgDir
R
en05000722.vsd
Figure 67: Setting angles for discrimination of forward and reverse fault
The reverse directional characteristic is equal to the forward characteristic rotated by

180 degrees.
The polarizing voltage is available as long as the positive-sequence voltage exceeds

4% of the set base voltage UBase. So the directional element can use it for all
unsymmetrical faults including close-in faults.
For close-in three-phase faults, the U1L1M memory voltage, based on the same
positive sequence voltage, ensures correct directional discrimination.
The memory voltage is used for 100 ms or until the positive sequence voltage is
restored.
After 100 ms, the following occurs:
• If the current is still above the set value of the minimum operating current
(between 10 and 30% of the set terminal rated current IBase), the condition seals
in.

Section 5
Distance protection
• If the fault has caused tripping, the trip endures.

• If the fault was detected in the reverse direction, the measuring element in
the reverse direction remains in operation.
• If the current decreases below the minimum operating value, the memory resets
until the positive sequence voltage exceeds 10% of its rated value.
5.1.2.6 Simplified logic diagrams
Distance protection zones

The design of distance protection zone 1 is presented for all measuring loops: phase-
to-earth as well as phase-to-phase.
Phase-to-earth related signals are designated by LnE, where n represents the

corresponding phase number (L1E, L2E, and L3E). The phase-to-phase signals are
designated by LnLm, where n and m represent the corresponding phase numbers
(L1L2, L2L3, and L3L1).
Fulfillment of two different measuring conditions is necessary to obtain the one

logical signal for each separate measuring loop:
• Zone measuring condition, which follows the operating equations described

above.
• Group functional input signal (STCND), as presented in figure 68.
The STCND input signal represents a connection of six different integer values from
the phase selection function within the IED, which are converted within the zone
measuring function into corresponding boolean expressions for each condition
separately. It is connected to the PHS function block output STCDZ.
The internal input signal DIRCND is used to give condition for directionality for the
distance measuring zones. The signal contains binary coded information for both
forward and reverse direction. The zone measurement function filter out the relevant
signals on the STDIR input depending on the setting of the parameter
OperationDir. It shall be configured to the STDIR output on the ZD block.

Section 5
Distance protection
Figure 68: Conditioning by a group functional input signal STCND
Composition of the phase starting signals for a case, when the zone operates in a non-
directional mode, is presented in figure 69.
Figure 69: Composition of starting signals in non-directional operating mode
Results of the directional measurement enter the logic circuits, when the zone operates
in directional (forward or reverse) mode, see figure 70.

Section 5
Distance protection
STNDL1N
AND
DIRL1N
OR STZMPE.
&
STNDL2N
DIRL2N AND
STNDL3N 15 ms
OR STL1
& t
DIRL3N AND
STNDL1L2
DIRL1L2 AND 15 ms
OR STL2
& t
STNDL2L3
DIRL2L3 AND
15 ms
OR STL3
STNDL3L1 & t
DIRL3L1 AND
OR STZMPP
&
BLK
15 ms
OR START
& t
en05000778.vsd
Figure 70: Composition of starting signals in directional operating mode
Tripping conditions for the distance protection zone one are symbolically presented
in figure 71.
Figure 71: Tripping logic for the distance protection zone one

Section 5
Distance protection
ZM01-
ZMQPDIS
I3P TRIP
U3P TRL1
BLOCK TRL2
VTSZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND
en05000695.vsd
Figure 72: ZM function block
ZD01-
ZDRDIR
I3P STDIR
U3P
en05000681.vsd
Figure 73: ZD function block
Table 75: Input signals for the ZMQPDIS_21 (ZM01-) function block
Signal Description
I3P Group signal for current input
U3P Group signal for voltage input
VTSZ Blocks all output by fuse failure signal
BLKTR Blocks all trip outputs
STCND External start condition (loop enabler)
DIRCND External directional condition
Table 76: Output signals for the ZMQPDIS_21 (ZM01-) function block
Signal Description
TRIP General Trip, issued from any phase or loop

Section 5
Distance protection
Signal Description
START General Start, issued from any phase or loop
STND Non-directional start, issued from any phase or loop
Table 77: Input signals for the ZDRDIR (ZD01-) function block
Signal Description
I3P Group connection
U3P Group connection
Table 78: Output signals for the ZDRDIR (ZD01-) function block
Signal Description
STDIR All start signals binary coded
Table 79: Parameter group settings for the ZMQPDIS_21 (ZM01-) function
On
IBase 1 - 99999 1 3000 A Base current, i.e.
rated current
UBase 0.05 - 2000.00 0.05 400.00 kV Base voltage, i.e.
rated voltage
OperationDir Off - Forward - Operation mode of
Non-directional directionality NonDir /
Forward Forw / Rev
Reverse
X1 0.10 - 3000.00 0.01 30.00 ohm/p Positive sequence
reactance reach
R1 0.10 - 1000.00 0.01 5.00 ohm/p Positive seq.
resistance for zone
characteristic angle
X0 0.10 - 9000.00 0.01 100.00 ohm/p Zero sequence
reactance reach
R0 0.50 - 3000.00 0.01 15.00 ohm/p Zero seq. resistance
for zone characteristic
angle
RFPP 1.00 - 3000.00 0.01 30.00 ohm/l Fault resistance
reach in ohm/loop,
Ph-Ph

Section 5
Distance protection

RFPE 1.00 - 9000.00 0.01 100.00 ohm/l Fault resistance
reach in ohm/loop,
Ph-E
OperationPP Off - On - Operation mode Off /
On On of Phase-Phase
loops
Timer tPP Off - On - Operation mode Off /
On On of Zone timer, Ph-
Ph
tPP 0.000 - 60.000 0.001 0.000 s Time delay of trip, Ph-
Ph
OperationPE Off - On - Operation mode Off /
On On of Phase-Earth
loops
Timer tPE Off - On - Operation mode Off /
On On of Zone timer, Ph-
E
tPE 0.000 - 60.000 0.001 0.000 s Time delay of trip, Ph-
E
IMinOpPP 10 - 30 1 20 %IB Minimum operate
delta current for
Phase-Phase loops
IMinOpPE 10 - 30 1 20 %IB Minimum operate
phase current for
Phase-Earth loops
IMinOpIN 5 - 30 1 5 %IB Minimum operate
residual current for
Phase-Earth loops
Table 80: Parameter group settings for the ZDRDIR (ZD01-) function
ArgNegRes 90 - 175 1 115 Deg Angle to blinder in
second quadrant for
forward direction
ArgDir 5 - 45 1 15 Deg Angle to blinder in
fourth quadrant for
forward direction
IMinOp 1 - 99999 1 10 %IB Minimum operate
current in % of IBase
IBase 1 - 99999 1 3000 A Base Current
UBase 0.05 - 2000.00 0.05 400.00 kV Base Voltage

Section 5
Distance protection
Table 81: Distance protection zones (PDIS, 21)

Number of zones 3 with selectable direction -
Minimum operate current (10-30)% of Ibase -
Positive sequence reactance (0.50-3000.00) W/phase ± 2.0% static accuracy

± 2.0 degrees static angular
Positive sequence resistance (0.10-1000.00) Ω/phase accuracy
Zero sequence reactance (0.50-9000.00) Ω/phase Conditions:
Voltage range: (0.1-1.1) x Ur
Zero sequence resistance (0.50-3000.00) Ω/phase Current range: (0.5-30) x Ir
Fault resistance, Ph-E (1.00-9000.00) W/loop Angle: at 0 degrees and 85
degrees
Fault resistance, Ph-Ph (1.00-3000.00) W/loop
Dynamic overreach <5% at 85 degrees measured with -
CVT’s and 0.5<SIR<30
Impedance zone timers (0.000-60.000) s ± 0.5% ± 10 ms
Operate time 24 ms typically -
Reset ratio 105% typically -
Reset time 30 ms typically -
5.2 Phase selection with load encroachment

(PDIS, 21)
Function block name: PHS-- IEC 60617 graphical symbol:

ANSI number: 21
FDPSPDIS Z<phs
5.2.1 Introduction
The operation of transmission networks today is in many cases close to the stability
limit. Due to environmental considerations the rate of expansion and reinforcement
of the power system is reduced e.g. difficulties to get permission to build new power
lines. The ability to accurate and reliable classifying the different types of fault so
that single pole tripping and auto-reclosing can be used plays an important roll in this
matter. The PHS function is designed to accurate select the proper fault loop in the
distance function dependent on the fault type.
The heavy load transfer that is common in many transmission networks may in some
cases be in opposite to the wanted fault resistance coverage. Therefore the function
has an built in algorithm for load encroachment, which gives the possibility to enlarge

Section 5
Distance protection
the resistive setting of both the PHS and the measuring zones without interfering with
the load.
The extensive output signals from the PHS gives also important information about
faulty phase(s) which can be used for fault analysis.

The basic impedance algorithm for the operation of the phase-selection measuring
elements is the same as for the distance-measuring function (see section "Distance
protection zones (PDIS, 21)"). The "phase selection" includes six impedance
measuring loops; three intended for phase-to-earth faults, and three intended for
phase-to-phase as well as for three-phase faults.
The difference, compared to the zone measuring elements, is in the combination of

the measuring quantities (currents and voltages) for different types of faults.
The characteristic is basically non-directional, but the PHS function uses information
from the directional function block to discriminate whether the fault is in forward or
reverse. The directional lines are drawn as "line-dot-dot-line" in the figures below.
The start condition STCNDZ is essentially based on the following criteria:
1. Residual current criteria, i.e. separation of faults with and without earth
connection
2. Regular quadrilateral impedance characteristic
3. Load encroachment characteristics is always active but can be switched off by
selecting a high setting.
The current start condition STCNDI is based on the following criteria:
1. Residual current criteria

2. No quadrilateral impedance characteristic. The impedance reach outside the load
area is theoretically infinite. The practical reach, however, will be determined by
the minimum operating current limits.
3. Load encroachment characteristic is always active, but can be switched off by
selecting a high setting.
The STCNDI-output described above is non-directional. The directionality is

determined by the distance zones direction function block. There are still output from
the function that indicate whether a start is in forward or reverse direction, or in
between those (e.g. STFWL1 and STRVL1, and NDIR_A). These directional
indications are based on the sector boundaries of the directional function and the
impedance setting of the phase selection function. Their operate characteristics are
illustrated in figure 74.

Section 5
Distance protection
X X X
60°
60° R
R R
60° 60°
Non-directional (ND) Forward (FW) Reverse (RV)
en05000668.vsd
Figure 74: Characteristic for non-directional, forward and reverse operation of

PHS
The setting of the load encroachment function may influence the total operating
characteristic, (for more information, refer to section "Load encroachment").
The input DIRCND contains binary coded information about the directional coming
from the directionality block. It shall be connected to the STDIR output on the ZD
block. This information is also transferred to the input DIRCND on the distance
measuring zones, i.e. the ZM block. The code built up for the directionality is as
follows:
STDIR= STFWL1*1+STFWL2*2+STFWL3*4+STFWL1L2*8+
+STFWL2L3*16+STFWL3L1*32+STRVL1*64+STRVL2*128+
+STRVL3*256+STRVL1L2*512+STRVL2L3*1024+STRVL3L1*2048
If the binary information is 1 then it will be considered that we have start in forward
direction in phase L1. If the binary code is 5 then we have start in forward direction
in phase L1 and L2 etc.
The STCND (Z or I) output contains, in a similar way as DIRCND, binary coded

information, in this case information about the condition for opening correct fault
loop in the distance measuring element. It shall be connected to the STCND input on
the ZM blocks. The code built up for release of the measuring fault loops is as follows:
STCND = L1N*1 + L2N*2 + L3N*4 + L1L2*8 + L2L3*16 + L3L1*32
5.2.2.1 Phase-to-earth fault
For a phase-to-earth fault, the measured impedance by PHS function will be according
to equation 15.

Section 5
Distance protection
ULn
ZPHSn =
ILn
(Equation 15)
where:
n corresponds to the particular phase (n=1, 2 or 3)
The characteristic for the PHS function at phase to earth fault is according to
figure 75. The characteristic has a fixed angle for the resistive boundary in the first
quadrant of 60°.
The resistance RN and reactance XN is the impedance in the earth return path defined
according to equation 16 and equation 17.
R0 - R1
RN =
3
(Equation 16)
X 0 - X1
XN =
3
(Equation 17)
X (ohm/loop)
Kr·(X1+XN)
RFRvPE RFFwPE
X1+XN
60 deg
RFFwPE
RFRvPE R (Ohm/loop)
60 deg
X1
1
Kr =
tan(60 deg)
RFRvPE RFFwPE
Kr·(X1+XN)
en06000396.vsd
Figure 75: Characteristic of PHS for phase to earth fault (setting parameters in
italic), ohm/loop domain
Besides this, the 3I0 residual current must fulfil the conditions according to
equation 18 and equation 19.

Section 5
Distance protection
3 × I 0 ³ 0.5 × IM in O p
(Equation 18)
3 × I0 ³ INReleasePE
------------------------------------ × Iphmax
100 (Equation 19)
where:
IMinOp is the minimum operation current for forward zones,
INReleasePE is the setting for the minimum residual current needed to enable operation in the ph-E
fault loops (in %) and
Iphmax is the maximum phase current in any of three phases.
5.2.2.2 Phase-to-phase fault
For a phase-to-phase fault, the measured by the PHS function will be according to
equation 20.
ULm - ULn
ZPHS =
-2 × ILn
(Equation 20)
ULm is the leading phase voltage, ULn the lagging phase voltage and ILn the phase
current in the lagging phase n.
The operation characteristic is shown in figure 76.

Section 5
Distance protection
X (ohm/phase)
0.5·FRvPP 0.5·RFFwPP
Kr·X1
X1
0.5·RFFwPP
60 deg
R (ohm/phase)
60 deg
0.5·RFRvPP
X1
1
Kr =
tan(60 deg)
Kr·X1
0.5·RFRvPP 0.5·RFFwPP
en05000670.vsd
Figure 76: The operation characteristic for PHS at phase-to-phase fault (setting
parameters in Italic), ohm/phase domain
In the same way as the condition for phase-to-earth fault, there are current conditions
that have to be fulfilled in order to release the phase-to-phase loop. Those are
according to equation 21 or equation 22.
3I 0 < IN Re leasePE
(Equation 21)
3I 0 < INBlockPP × Iph max

(Equation 22)
where:
INRelease is 3I0 limit for releasing phase-to-earth measuring loops,
INBlockPP is 3I0 limit for blocking phase-to-phase measuring loop and
Iphmax is maximal magnitude of the phase currents.
5.2.2.3 Three phase faults
The operation condition for three phase faults are the same as for phase-to-phase fault
i.e. equation 20, equation 21 and equation 22 are used to release the operation of the
function.

Section 5
Distance protection
However, the reach is expanded by a factor 2/√3 (approximately 1.1547) in all

directions. At the same time the apparent impedance is rotated 30 degrees, counter-
clockwise. The characteristic is shown in figure 77.
X (ohm/phase)
4 × X1
3
90 deg
0.5·RFFwPP·K3
X1·K3 4 × RFFwPP
6
R (ohm/phase)
0.5·RFRvPP·K3
K3 = 2 / sqrt(3)
30 deg
en05000671.vsd
Figure 77: The characteristic of PHS for three phase fault (setting parameters
in italic)
5.2.2.4 Load encroachment
Each of the six measuring loops has its own load (encroachment) characteristic based
on the corresponding loop impedance. The load encroachment functionality is always
active, but can be switched off by selecting a high setting.
The outline of the characteristic is presented in figure 78. As illustrated, the resistive
blinders are set individually in forward and reverse direction while the angle of the
sector is the same in all four quadrants.

Section 5
Distance protection
RLdFw
ARGLd ARGLd
R
ARGLd ARGLd
RLdRv
en05000196.vsd
Figure 78: Characteristic of load encroachment function
The influence of load encroachment function depending on the operation

characteristic is dependent on the chosen operation mode of the PHS function. When
selection mode is STCNDZ, the characteristic for the PHS (and also zone
measurement depending on settings) will be reduced by the load encroachment
characteristic (see figure 79, left illustration).
When STCNDI is selected the operation characteristic will be as the right illustration
in figure 79. The reach will in this case be limit by the minimum operation current
and the distance measuring zones.

Section 5
Distance protection
X X
R R
STCNDZ STCNDI
en05000197.vsd
Figure 79: Difference in operating characteristic depending on operation mode

when load encroachment is activated
When the "phase selection" is set to operate together with a distance measuring zone
the resultant operate characteristic could look something like in figure 80. The figure
shows a distance measuring zone operating in forward direction. Thus, the operate
area is highlighted in black.
"Phase selection"
"quadrilateral" zone
Distance measuring zone
Load encroachment
characteristic
Directional line
en05000673.vsd
Figure 80: Operation characteristic in forward direction when load

encroachment is enabled

Section 5
Distance protection
Figure 80 is valid for phase-to-earth as well as phase-to-phase faults. During a three-

phase fault, or load, when the "quadrilateral" phase-to-phase characteristic is subject
to enlargement and rotation the operate area is transformed according to figure 81.
Notice in particular what happens with the resistive blinders of the "phase selection"
"quadrilateral" characteristic. Due to the 30-degree rotation, the angle of the blinder
in quadrant one is now 90 degrees instead of the original 60 degrees. The blinder that
is nominally located to quadrant four will at the same time tilt outwards and increase
the resistive reach around the R-axis. Consequently, it will be more or less necessary
to use the load encroachment characteristic in order to secure a margin to the load
impedance.
X (ohm/phase)
Phase selection
”Quadrilateral” zone
Distance measuring zone
R (ohm/phase)
en05000674.vsd
Figure 81: Operation characteristic for PHS in forward direction for three-phase
fault, ohm/phase domain
5.2.2.5 Minimum operate currents
The operation of the PHS function is blocked if the magnitude of input currents falls
below certain threshold values.
The phase-to-earth loop Ln is blocked if ILn<IMinOpPE, where ILn is the RMS value
of the current in phase Ln.
The phase-to-phase loop LmLn is blocked if (2·ILn<IMinOpPP).

Section 5
Distance protection
5.2.2.6 Simplified logic diagrams
Figure 82 presents schematically the creation of the phase-to-phase and phase-to-

earth operating conditions. Consider only the corresponding part of measuring and
logic circuits, when only a phase-to-earth or phase-to-phase measurement is available
within the terminal.
Figure 82: Phase-to-phase and phase-to-earth operating conditions (residual current criteria)
A special attention is paid to correct phase selection at evolving faults. A STCNDI

output signal is created as a combination of the load encroachment characteristic and
current criteria, refer to figure 82. This signal can be configured to STCND functional
input signals of the distance protection zone and this way influence the operation of
the ph-ph and ph-E zone measuring elements and their phase related starting and
tripping signals.
Figure 83 presents schematically the composition of non-directional phase selective

signals PHS--STNDLn. Signals ZMLnN and ZMLmLn (m and n change between
one and three according to the phase number) represent the fulfilled operating criteria
for each separate loop measuring element (i.e. within the "quadrilateral"
characteristic.

Section 5
Distance protection
Figure 83: Composition on non-directional phase selection signals
Composition of the directional (forward and reverse) phase selective signals is

presented schematically in figure 85 and figure 84. The directional criteria appears
as a condition for the correct phase selection in order to secure a high phase selectivity
for simultaneous and evolving faults on lines within the complex network
configurations. Signals DFWLn and DFWLnLm present the corresponding
directional signals for measuring loops with phases Ln and Lm. Designation FW
(figure 85) represents the forward direction as well as the designation RV
(figure 84) represents the reverse direction. All directional signals are derived within
the corresponding digital signal processor.
Figure 84 presents additionally a composition of a STCNDZ output signal, which is

created on the basis of impedance measuring conditions. This signal can be configured
to STCND functional input signals of the distance protection zone and this way
influence the operation of the ph-ph and ph-E zone measuring elements and their
phase related starting and tripping signals.

Section 5
Distance protection
Figure 84: Composition of phase selection signals for reverse direction

Section 5
Distance protection
Figure 85: Composition of phase selection signals for forward direction

Section 5
Distance protection

PHS1-
FDPSPDIS_21
I3P TRIP
U3P START
BLOCK STFWL1
DIRCND STFWL2
STFWL3
STFWPE
STRVL1
STRVL2
STRVL3
STRVPE
STNDL1
STNDL2
STNDL3
STNDPE
STFW1PH
STFW2PH
STFW3PH
STPE
STPP
STCNDZ
STCNDI
en06000258.vsd
Figure 86: PHS function block
Table 82: Input signals for the FDPSPDIS_21 (PHS--) function block
Signal Description
DIRCND External directional condition
Table 83: Output signals for the FDPSPDIS_21 (PHS--) function block
Signal Description
STFWL1 Fault detected in phase L1 - forward direction
STFWPE Earth fault detected in forward direction
STRVL1 Fault detected in phase L1 - reverse direction
STRVPE Earth fault detected in reverse direction
STNDL1 Non directional start in L1

Section 5
Distance protection
Signal Description
STNDPE Non directional start, phase-earth
STFW1PH Start in forward direction for single-phase fault
STFW2PH Start in forward direction for two- phase fault
STFW3PH Start in forward direction for thre-phase fault
STPE Current conditions release of phase-earth measuring
elements
STPP Current conditions release of phase-phase measuring
elements
STCNDZ Start condition (PHS,LE and I based)
STCNDI Start condition (LE and I based)
Table 84: Parameter group settings for the FDPSPDIS_21 (PHS--) function
IBase 1 - 99999 1 3000 A Base current for
current settings
INBlockPP 10 - 100 1 40 %IPh 3I0 limit for blocking
phase-to-phase
measuring loops
INReleasePE 10 - 100 1 20 %IPh 3I0 limit for releasing
phase-to-earth
measuring loops
RLdFw 1.00 - 3000.00 0.01 80.00 ohm/p Forward resistive
reach within the load
impedance area
RLdRv 1.00 - 3000.00 0.01 80.00 ohm/p Reverse resistive
reach within the load
impedance area
ArgLd 5 - 70 1 30 Deg Load angle
determining the load
impedance area
X1 0.50 - 3000.00 0.01 40.00 ohm/p Positive sequence
reactance reach
X0 0.50 - 9000.00 0.01 120.00 ohm/p Zero sequence
reactance reach
RFFwPP 0.50 - 3000.00 0.01 30.00 ohm/l Fault resistance
reach, Ph-Ph, forward
RFRvPP 0.50 - 3000.00 0.01 30.00 ohm/l Fault resistance
reach, Ph-Ph, reverse
RFFwPE 1.00 - 9000.00 0.01 100.00 ohm/l Fault resistance
reach, Ph-E, forward

Section 5
Distance protection

RFRvPE 1.00 - 9000.00 0.01 100.00 ohm/l Fault resistance
reach, Ph-E, reverse
IMinOpPP 5 - 30 1 10 %IB Minimum operate
delta current for
Phase-Phase loops
phase current for
Phase-Earth loops
Table 85: Phase selection with load encroachment (PDIS, 21)

Minimum operate current (5-30)% of Ibase ± 1.0% of Ir
Reactive reach, positive (0.50–3000.00) Ω/phase ± 2.0% static accuracy

sequence, forward and reverse ± 2.0 degrees static angular
accuracy
Resistive reach, positive (0.10–1000.00) Ω/phase Conditions:
sequence Voltage range: (0.1-1.1) x Ur
Reactive reach, zero sequence, (0.50–9000.00) Ω/phase Current range: (0.5-30) x Ir
forward and reverse Angle: at 0 degrees and 85
degrees
Resistive reach, zero sequence (0.50–3000.00) Ω/phase
Fault resistance, phase-earth (1.00–9000.00) Ω/loop
faults, forward and reverse
Fault resistance, phase-phase (0.50–3000.00) Ω/loop
faults, forward and reverse
Load encroachment criteria:
Load resistance, forward and (1.00–3000.00) Ω/phase
reverse
Safety load impedance angle (5-70) degrees
Reset ratio 105% typically -
5.3 Power swing detection (RPSB, 78)
Function block name: PSD-- IEC 60617 graphical symbol:

ANSI number: 78
ZMRPSB Zpsb

Section 5
Distance protection
5.3.1 Introduction
Power swings may occur after disconnection of heavy loads or trip of big generation
plants.
Power swing detection function is used to detect power swings and initiate block of
selected distance protection zones. Occurrence of earth fault currents during a power
swing can block the power swing detection function to allow fault clearance.

The PSD function comprises an inner and an outer quadrilateral measurement
characteristic with load encroachment, see figure 87
Its principle of operation is based on the measurement of the time it takes for a power
swing transient impedance to pass through the impedance area between the outer and
the inner characteristics. Power swings are identified by transition times longer than
a transition time set on corresponding timers. The impedance measuring principle is
the same as that used for the distance protection zones. The impedance and the
characteristic passing times are measured in all three phases separately. One-out-of-
three or two-out-of-three operating modes can be selected according to the specific
system operating conditions.
Figure 87: Operating characteristic for the PSD function

Section 5
Distance protection
The impedance measurement within the PSD function is performed by solving

equation 23 and equation 24 (n = 1, 2, 3 for each corresponding phase L1, L2 and
L3).
æ U L1 ö
Reçç ÷÷ £ Rset
è IL1 ø (Equation 23)
æ U L1 ö
Imçç ÷÷ £ Xset
è IL1 ø (Equation 24)
The Rset and Xset are R and X boundaries which are more explained in the following
sections.
5.3.2.1 Resistive reach in forward direction
To avoid load encroachment the resistive reach is limited in forward direction by

setting the parameter RLdOutFw which is the outer resistive load boundary value
while the inner resistive boundary is calculated according to equation 25.
RLdInFw = kLdRFw × RLdOutFw (Equation 25)
where:
kLdRFw is a settable multiplication factor less than 1
The slope of the load encroachment inner and outer boundary is defined by setting
the parameter ARGLd.
The load encroachment in the fourth quadrant uses the same settings as in the first
quadrant (same ARGLd and RLdOutFw and calculated RLdInFw).
The quadrilateral characteristic in the first quadrant is tilted to get a better adaptation
to the distance zones. The angle is the same as the line angle and derived from the
setting of the reactive reach inner boundary X1InFw and the line resistance for the
inner boundary R1LIn. The fault resistance coverage for the inner boundary is set by
the parameter R1FInFw.
From the setting parameter RLdOutFw and the calculated value RLdInFw a distance
between the inner and outer boundary, DFw, is calculated. This value is valid for R
direction in first and fourth quadrant and for X direction in first and second quadrant.
5.3.2.2 Resistive reach in reverse direction
To avoid load encroachment in reverse direction the resistive reach is limited by

setting the parameter RLdOutRv for the outer boundary of the load encroachment

Section 5
Distance protection
cone. The distance to the inner resistive load boundary RLdInRv is determined by
using the setting parameter kLdRRv in equation 26.
RLdInRv = kLdRRv × RLdOutRv (Equation 26)
From the setting parameter RLdOutRv and the calculated value RLdInRv a distance
between the inner and outer boundary, DRv, is calculated. This value is valid for R
direction in second and third quadrant and for X direction in third and fourth quadrant.
The inner resistive characteristic in the second quadrant outside the load
encroachment part corresponds to the setting parameter R1FInRv for the inner
boundary. The outer boundary is internally calculated as the sum of DRv+R1FInRv.
The inner resistive characteristic in the third quadrant outside the load encroachment
zone consist of the sum of the settings R1FInRv and the line resistance R1LIn. The
argument of the tilted lines outside the load encroachment is the same as the tilted
lines in the first quadrant. The distance between the inner and outer boundary is the
same as for the load encroachment in reverse direction i.e. DRv.
5.3.2.3 Reactive reach in forward and reverse direction
The inner characteristic for the reactive reach in forward direction correspond to the
setting parameter X1InFw and the outer boundary is defined as X1InFw + DFw.
The inner characteristic for the reactive reach in reverse direction correspond to the
setting parameter X1InRv for the inner boundary and the outer boundary is defined
as X1InRv + DRv.
5.3.2.4 Basic detection logic
The operation of the function is only released if the magnitude of the current is above
the setting of the min operating current, IMinOpPE.
The PSD function can operate in two operating modes:
• The "1-of-3" operating mode is based on detection of power swing in any of the
three phases. Figure 88 presents a composition of a detection signal PSD-DET-
L1 in this particular phase.
• The "2-of-3" operating mode is based on detection of power swing in at least two
out of three phases. Figure 89 presents a composition of the detection signals
DET1of3 and DET2of3.
Signals ZOUTL1 (external boundary) and ZINL1 (internal boundary) in figure 88

are related to the operation of the impedance measuring elements in each phase
separately (Ln represents the corresponding phase L1, L2, and L3). They are internal
signals, calculated by the PSD-function.

Section 5
Distance protection
The tP1 timer in figure 88 serve as detection of initial power swings, which are usually
not as fast as the later swings are. The tP2 timer become activated for the detection
of the consecutive swings, if the measured impedance exit the operate area and returns
within the time delay, set on the tW waiting timer. The upper part of figure 88 (input
signal ZOUTL1, ZINL1, AND-gates and tP-timers etc.) are duplicated for phase L2
and L3. All tP1 and tP2 timers in the figure have the same settings.
Figure 88: Detection of power-swing in phase L1
Figure 89: Detection of power-swing for 1-of-3 and 2-of-3 operating mode

Section 5
Distance protection
ZOUTL1 ZOUT
OR
ZOUTL2 ZINL1
ZIN
ZOUTL3 AND ZINL2 OR
ZINL3
tEF
TRSP
t AND
I0CHECK
10 ms
AND t
BLKI02 OR
tR1
AND t INHIBIT
OR
-loop
tR2
BLKI01 AND t
BLOCK
-loop
DET1of3 - int.
REL1PH
AND
BLK1PH
tH
DET2of3 - int. OR t
REL2PH
AND
BLK2PH OR START
AND
EXTERNAL
en05000114.vsd
Figure 90: PSD function-simplified block diagram
5.3.2.5 Operating and inhibit conditions
Figure 90 presents a simplified logic diagram for the PSD function. The internal
signals DET1of3 and DET2of3 relate to the detailed logic diagrams in figure 88 and
figure 89 respectively.
Selection of the operating mode is possible by the proper configuration of the

functional input signals REL1PH, BLK1PH, REL2PH, and BLK2PH.
The load encroachment characteristic can be switched off by setting the parameter
OperationLdCh = Off, but notice that the DFw and DRv will still be calculated. The
characteristic will in this case be only quadrilateral.
There are four different ways to form the internal INHIBIT signal:
• Logical 1 on functional input BLOCK inhibits the output START signal

instantaneously.
• The INHIBIT internal signal is activated, if the power swing has been detected
and the measured impedance remains within its operate characteristic for the
Section 5
Distance protection
time, which is longer than the time delay set on tR2 timer. It is possible to disable
this condition by connecting the logical 1 signal to the BLKI01 functional input.
• The INHIBIT internal signal is activated after the time delay, set on tR1 timer,
if an earth fault appears during the power swing (input IOCHECK is high) and
the power swing has been detected before the earth fault (activation of the signal
I0CHECK). It is possible to disable this condition by connecting the logical 1
signal to the BLKI02 functional input.
• The INHIBIT logical signals becomes logical 1, if the functional input I0CHECK
appears within the time delay, set on tEF timer and the impedance has been seen
within the outer characteristic of the PSD operate characteristic in all three
phases. This function prevents the operation of the PSD function in cases, when
the circuit breaker closes onto persistent single-phase fault after single-pole auto-
reclosing dead time, if the initial single-phase fault and single-pole opening of
the circuit breaker causes the power swing in the remaining two phases.

PSD1-
ZMRPSB
I3P ST ART
U3P ZOUT
BLOCK ZIN
BLKI01
BLKI02
BLK1PH
REL1PH
BLK2PH
REL2PH
I0CHECK
TRSP
EXT ERNAL
en05000383.vsd
Figure 91: PSD function block
Table 86: Input signals for the ZMRPSB_78 (PSD1-) function block
Signal Description
BLKI01 Block inhibit of start output for slow swing condition
BLKI02 Block inhibit of start output for subsequent residual current
detection
BLK1PH Block one-out-of-three-phase operating mode
REL1PH Release one-out-of-three-phase operating mode
BLK2PH Block two-out-of-three-phase operating mode
REL2PH Release two-out-of-three-phase operating mode

Section 5
Distance protection
Signal Description
I0CHECK Residual current (3I0) detection used to inhibit start output
TRSP Single-pole tripping command issued by tripping function
EXTERNAL Input for external detection of power swing
Table 87: Output signals for the ZMRPSB_78 (PSD1-) function block
Signal Description
START Power swing detected
ZOUT Measured impedance within outer impedance boundary
ZIN Measured impedance within inner impedance boundary
Table 88: Parameter group settings for the ZMRPSB_78 (PSD1-) function
Operation Off - Off - Operation Mode On /
On Off
X1InFw 0.10 - 3000.00 0.01 30.00 ohm Inner reactive
boundary, forward
R1LIn 0.10 - 1000.00 0.01 30.00 ohm Line resistance for
inner characteristic
angle
R1FInFw 0.10 - 1000.00 0.01 30.00 ohm Fault resistance
coverage to inner
resistive line, forward
X1InRv 0.10 - 3000.00 0.01 30.00 ohm Inner reactive
boundary, reverse
R1FInRv 0.10 - 1000.00 0.01 30.00 ohm Fault resistance line
to inner resistive
boundary, reverse
OperationLdCh Off - On - Operation of load
On discrimination
characteristic
RLdOutFw 0.10 - 3000.00 0.01 30.00 ohm Outer resistive load
boundary, forward
ArgLd 5 - 70 1 25 Deg Load angle
determining load
impedance area
RLdOutRv 0.10 - 3000.00 0.01 30.00 ohm Outer resistive load
boundary, reverse
kLdRFw 0.50 - 0.90 0.01 0.75 Mult Multiplication factor
for inner resistive load
boundary, forward
kLdRRv 0.50 - 0.90 0.01 0.75 Mult Multiplication factor
for inner resistive load
boundary, reverse

Section 5
Distance protection

tP1 0.000 - 60.000 0.001 0.045 s Timer for detection of
initial power swing
tP2 0.000 - 60.000 0.001 0.015 s Timer for detection of
subsequent power
swings
tW 0.000 - 60.000 0.001 0.250 s Waiting timer for
activation of tP2 timer
tH 0.000 - 60.000 0.001 0.500 s Timer for holding
power swing START
output
tEF 0.000 - 60.000 0.001 3.000 s Timer for overcoming
single-pole reclosing
dead time
tR1 0.000 - 60.000 0.001 0.300 s Timer giving delay to
inhibit by the residual
current
tR2 0.000 - 60.000 0.001 2.000 s Timer giving delay to
inhibit at very slow
swing
IBase 1 - 99999 1 3000 A Base setting for
current level settings
Table 89: Power swing detection (RPSB, 78)

Reactive reach (0.10-3000.00) W/phase ± 2.0% static accuracy
± 2.0 degrees static angular
accuracy
Conditions:
Resistive reach (0.10–1000.00)W /loop
Current range: (0.5-30) x Ir
Angle: at 0 degrees and 85
degrees
Timers (0.000-60.000) s ± 0.5% ± 10 ms
5.4 Automatic switch onto fault logic (PSOF)
Function block name: SOTF- IEC 60617 graphical symbol:

ANSI number:
ZPSOF

Section 5
Distance protection
5.4.1 Introduction
Automatic switch onto fault logic is a function that gives an instantaneous trip at
closing of breaker onto a fault. A dead line detection check is provided to activate the
function when the line is dead.

The switch-onto-fault (SOTF) function can be activated either externally or
internally. The internal start is activated by using the information from a dead-line-
detection (DLD) function, see figure 92, which is included in the SOTF function.
SOTF-BC 1000 ms
SOTF-DLCND 200 ms >1 t
& t 15 ms
SOTF-NDACC SOTF-TRIP
& t
SOTF-BLOCK &
en00000492.vsd
Figure 92: Simplified diagram for automatic switch onto fault logic function.
After activation, a distance protection zone (the non-directional starting signal) is

allowed to give an instantaneous trip. The functional output signal from the distance
protection zone to be used, should be connected to the NDACC functional input of
the SOTF function, see figure 92. The distance protection zone used together with
the switch-onto-fault function shall be set to cover the entire protected line.
The external activation is achieved by an input (BC), which should be set high for
activation, and low when the breaker has closed. This is carried out by an NC auxiliary
contact of the circuit breaker or by the closing order to the breaker.
The internal automatic activation is controlled by the internal dead line detection
(DLD) function. The function gives an internal output signal DLD when the current
and voltage for each phase is below the setting parameter IPh< and UPh<, see figure
93. The SOTF function will be activated if the signal is present for more than 200 ms
at the same time as the non-directional impedance starting signal NDACC is not
activated.
The SOTF function can be blocked by the activation of a SOTF-BLOCK functional

input.

Section 5
Distance protection
Iph_L1 1
1<2
AND
IPh< 2
Uph_L1 1
1<2
UPh< 2
Iph_L2 1
1<2
AND AND SOTF-DLD
IPh< 2
Uph_L2 1
1<2
UPh< 2
Iph_L3 1
1<2
AND
IPh< 2
Uph_L3 1
1<2
UPh< 2
en05000737.vsd
Figure 93: Simplified logic diagram for dead line detection function in SOTF.

SOTF-
ZPSOF
I3P TRIP
U3P
BLOCK
BC
NDACC
en05000377.vsd
Figure 94: SOTF function block

Section 5
Distance protection
Table 90: Input signals for the ZPSOF (SOTF-) function block
Signal Description
BC Enabling of SOTF
NDACC Non Directional Zone to be accelerated by SOTF
Table 91: Output signals for the ZPSOF (SOTF-) function block
Signal Description
TRIP Trip output
Table 92: Parameter group settings for the ZPSOF (SOTF-) function
On
current levels
UBase 0.05 - 2000.00 0.05 400.00 kV Base setting for
voltage levels
IPh< 1 - 100 1 20 %IB Current level for
detection of dead line
in % of IBase
UPh< 1 - 100 1 70 %UB Voltage level for
detection of dead line
in % of UBase
Table 93: Automatic switch onto fault logic (PSOF)

Parameter Range or value Accuracy
Operate voltage, detection of dead line (1–100)% of Ubase ± 1.0% of Ur
Operate current, detection of dead line (1–100)% of Ibase ± 1.0% of Ir
Delay following dead line detection input before SOTF 200 ms ± 0.5% ± 10 ms
function is automatically enabled
Time period after circuit breaker closure in which 1000 ms ± 0.5% ± 10 ms
SOTF function is active

174
Section 6
Current protection
Section 6 Current protection
About this chapter

This chapter describes current protection functions. These include functions like
Instantaneous phase overcurrent protection, Four step phase overcurrent protection,
Pole discordance protection and Residual overcurrent protection.
6.1 Instantaneous phase overcurrent protection

(PIOC, 50)
Function block name: IOCx- IEC 60617 graphical symbol:

ANSI number: 50
PHPIOC 3I>>
6.1.1 Introduction
The instantaneous three phase overcurrent function has a low transient overreach and
short tripping time to allow use as a high set short-circuit protection function, with
the reach limited to less than typical eighty percent of the power line at minimum
source impedance.

The sampled analogue phase currents are pre-processed in a discrete Fourier filter
(DFT) block. From the fundamental frequency components of each phase current the
RMS value of each phase current is derived. These phase current values are fed to
the IOC function. In a comparator the RMS values are compared to the set operation
current value of the function (IP>>). If a phase current is larger than the set operation
current a signal from the comparator for this phase is set to true. This signal will,
without delay, activate the output signal TRLn (n=1,2,3) for this phase and the TRIP
signal that is common for all three phases.

Section 6
Current protection
There is an operation mode (OpMode) setting: “1 out of 3” or “2 out of 3”. If the

parameter is set to “1 out of 3” any phase trip signal will be activated. If the parameter
is set to “2 out of 3” at least two phase signals must be activated for trip.
There is also a possibility to activate a preset change of the set operation current
(StValMult) via a binary input (ENMULT). In some applications the operation value
needs to be changed, for example due to transformer inrush currents.
The function can be blocked from the binary input BLOCK.

IOC1-
PHPIOC_50
I3P TRIP
BLOCK TRL1
ENMULT TRL2
TRL3
en04000391.vsd
Figure 95: IOC function block
Table 94: Input signals for the PHPIOC_50 (IOC1-) function block
Signal Description
ENMULT Enable current start value multiplier
Table 95: Output signals for the PHPIOC_50 (IOC1-) function block
Signal Description
TRIP Trip signal from any phase

Section 6
Current protection
Table 96: Parameter group settings for the PHPIOC_50 (IOC1-) function
On
current values
OpMode 2 out of 3 - 1 out of 3 - Select operation
1 out of 3 mode 2-out of 3 / 1-
out of 3
IP>> 1 - 2500 1 200 %IB Operate phase
current level in % of
IBase
StValMult 0.5 - 5.0 0.1 1.0 - Multiplier for operate
current level
Table 97: Instantaneous phase overcurrent protection (PIOC, 50)

Operate current (1-2500)% of lbase ± 1.0% of Ir at I £ Ir
± 1.0% of I at I > Ir
Reset ratio > 95% -

Operate time 25 ms typically at 0 to 2 x Iset -
Reset time 25 ms typically at 2 to 0 x Iset -
Critical impulse time 10 ms typically at 0 to 2 x Iset -
Dynamic overreach < 5% at t = 100 ms -
6.2 Four step phase overcurrent protection

(POCM, 51_67)
Function block name: TOCx- IEC 60617 graphical symbol:

ANSI number: 51/67
3I>
PH4POCM
4
alt
4

Section 6
Current protection
6.2.1 Introduction
The four step phase overcurrent function has an inverse or definite time delay
independent for each step separately.
All IEC and ANSI time delayed characteristics are available together with an optional
user defined time characteristic.
The function can be set to be directional or non-directional independently for each of

the steps.

The function is divided into four different sub-functions, one for each step. For each
step an operation mode is set (DirModen): Off/Non-directional/Forward/Reverse.
The protection design can be decomposed in four parts:
• The direction element, indicates the over current fault direction

• The harmonic Restraint Blocking function
• The 4 step over current function
• The Mode Selection
If VT inputs are not available or not connected, func parameter

DirModeX shall be left to default value, Non-directional.

Section 6
Current protection
4 step over current

Direction dirPh1Flt element faultState
faultState
Element One element for each
dirPh2Flt step
I3P dirPh3Flt START
U3P
TRIP
Harmonic harmRestrBlock
I3P Restraint
Element
enableDir
Mode Selection
enableStep1-4
DirectionalMode1-4
en05000740.vsd
Figure 96: Functional overview of TOC.
A common setting for all steps, StPhaseSel, is used to specify the number of phase
currents to be high to enable operation. The settings can be chosen: 1 out of 3, 2 out
of 3 or 3 out of 3.
the TOC function. In a comparator, for each phase current, the RMS values are
compared to the set operation current value of the function (I1>, I2>, I3> or I4>). If
a phase current is larger than the set operation current a signal from the comparator
for this phase and step is set to true. This signal will, without delay, activate the output
signal Start for this phase/step, the Start signal common for all three phases for this
step and a common Start signal.
A harmonic restrain of the function can be chosen. A set 2nd harmonic current in
relation to the fundamental current is used. The 2nd harmonic current is taken from
the pre-processing of the phase currents and compared to a set restrain current level.
The function can use a directional option. The direction of the fault current is given
as current angle in relation to the voltage angle. The fault current and fault voltage
for the directional function is dependent of the fault type. To enable directional
measurement at close in faults, causing low measured voltage, the polarization
voltage is a combination of the apparent voltage (80%) and a memory voltage (20%).
The following combinations are used.

Section 6
Current protection
Phase-phase short circuit:
U refL1L 2 = U L1 - U L 2 I dirL1L 2 = I L1 - I L 2
U refL 2 L 3 = U L 2 - U L 3 I dirL 2 L 3 = I L 2 - I L 3
U refL 3 L1 = U L 3 - U L1 I dirL 3 L1 = I L 3 - I L1
Phase-earth short circuit:
U refL1 = U L1 I dirL1 = I L1
U refL 2 = U L 2 I dirL 2 = I L 2
U refL 3 = U L 3 I dirL 3 = I L 3
The directional setting is given as a characteristic angle AngleRCA for the function
and an angle window AngleRCA-maxFwdAng to AngleRCA+minFwdAng.

Section 6
Current protection
Reverse
Uref
RCA
ROA
ROA Forward
Idir
en05000745.vsd
Figure 97: Directional characteristic of the phase overcurrent protection
The default value of AngleRCA is –65°. The parameters minFwdAng and

maxFwdAng gives the angle sector from AngleRCA for directional borders.
A minimum current for directional phase start current signal can be set:
IminOpPhSel.
If no blockings are given the start signals will start the timers of the step. The time
characteristic for each step can be chosen as definite time delay or some type of
inverse time characteristic. A wide range of standardized inverse time characteristics
is available. It is also possible to create a tailor made time characteristic. The
possibilities for inverse time characteristics are described in chapter "Time inverse
characteristics".
Different types of reset time can be selected as described in chapter "Time inverse
characteristics".
There is also a possibility to activate a preset change (InMult, n= 1, 2, 3 or 4) of the

set operation current via a binary input (enable multiplier). In some applications the
operation value needs to be changed, for example due to changed network switching
state. The function can be blocked from the binary input BLOCK. The start signals
from the function can be blocked from the binary input BLKST. The trip signals from
the function can be blocked from the binary input BLKTR.

Section 6
Current protection

TOC1-
PH4POCM
I3P TRIP
U3P TR1
BLOCK TR2
BLKTR TR3
BLKST1 TR4
BLKST2 TRL1
BLKST3 TRL2
BLKST4 TRL3
ENMULT1 TR1L1
ENMULT2 TR1L2
ENMULT3 TR1L3
ENMULT4 TR2L1
TR2L2
TR2L3
TR3L1
TR3L2
TR3L3
TR4L1
TR4L2
TR4L3
START
ST1
ST2
ST3
ST4
STL1
STL2
STL3
ST1L1
ST1L2
ST1L3
ST2L1
ST2L2
ST2L3
ST3L1
ST3L2
ST3L3
ST4L1
ST4L2
ST4L3
2NDHARM
DIRL1
DIRL2
DIRL3
en05000708.vsd
Figure 98: TOC function block
Table 98: Input signals for the PH4POCM_51_67 (TOC1-) function block
Signal Description
BLKTR Block of trip
BLKST1 Block of Step1

Section 6
Current protection
Signal Description
ENMULT1 When activated, the current multiplier is in use for step1
Table 99: Output signals for the PH4POCM_51_67 (TOC1-) function block
Signal Description
TRIP Trip
TR1 Common trip signal from step1
TR1L1 Trip signal from step1 phase L1
START General start signal
ST1 Common start signal from step1
ST1L1 Start signal from step1 phase L1

Section 6
Current protection
Signal Description
2NDHARM Block from second harmonic detection
DIRL1 Direction for phase1
Table 100: Parameter group settings for the PH4POCM_51_67 (TOC1-) function
On
IBase 1 - 99999 1 3000 - Base setting for
current values
voltage levels in kV
MaxFwdAng 40.0 - 70.0 0.1 50.0 Deg Maximum forward
angle
MinFwdAng 75.0 - 90.0 0.1 80.0 Deg Minimum forward
angle
AngleRCA -70.0 - -50.0 1.0 -65.0 Deg Relay characteristic
angle (RCA)
IMinOpPhSel 1 - 100 1 7 %IB Minimum current for
phase selection in %
of IBase
StartPhSel Not Used - 1 out of 3 - Number of phases
1 out of 3 required for op (1 of 3,
2 out of 3 2 of 3, 3 of 3)
3 out of 3
2ndHarmStab 5 - 100 1 20 %IB Operate level of 2nd
harm restrain op in %
of Fundamental

Section 6
Current protection

DirMode1 Off - Non-directional - Directional mode of
Non-directional step 1 (off, nodir,
Forward forward, reverse)
Reverse
Characterist1 ANSI Ext. inv. - ANSI Def. Time - Selection of time
ANSI Very inv. delay curve type for
ANSI Norm. inv. step 1
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
I1> 1 - 2500 1 1000 %IB Operate phase
current level for step1
in % of IBase
t1 0.000 - 60.000 0.001 0.000 s Independent
(defenitive) time delay
of step 1
k1 0.05 - 999.00 0.01 0.05 - Time multiplier for the
dependent time delay
for step 1
I1Mult 1.0 - 10.0 0.1 2.0 - Multiplier for operate
current level for step 1
t1Min 0.000 - 60.000 0.001 0.000 s Minimum operate
time for IEC IDMT
curves for step 1
ResetTypeCrv1 Instantaneous - Instantaneous - Selection of reset
IEC Reset curve type for step 1
ANSI reset
tReset1 0.000 - 60.000 0.001 0.020 s Reset time delay used
in IEC Definite Time
curve step 1
tPCrv1 0.005 - 3.000 0.001 1.000 - Parameter P for
customer
programmable curve
for step 1
tACrv1 0.005 - 200.000 0.001 13.500 - Parameter A for
customer
programmable curve
for step 1
tBCrv1 0.00 - 20.00 0.01 0.00 - Parameter B for
customer
programmable curve
for step 1

Section 6
Current protection

tCCrv1 0.1 - 10.0 0.1 1.0 - Parameter C for
customer
programmable curve
for step 1
tPRCrv1 0.005 - 3.000 0.001 0.500 - Parameter PR for
customer
programmable curve
for step 1
tTRCrv1 0.005 - 100.000 0.001 13.500 - Parameter TR for
customer
programmable curve
for step 1
tCRCrv1 0.1 - 10.0 0.1 1.0 - Parameter CR for
customer
programmable curve
for step 1
HarmRestrain1 Disabled - Enabled - Enable block of step 1
Enabled from harmonic
restrain
Reverse
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
in % of IBase
t2 0.000 - 60.000 0.001 0.400 s Independent
(defenitive) time delay
of step 2
for step 2
I2Mult 1.0 - 10.0 0.1 2.0 - Multiplier for scaling
the current setting
value for step 2
time for IEC IDMT
curves for step 2

Section 6
Current protection

ANSI reset
curve step 2
customer
programmable curve
for step 2
customer
programmable curve
for step 2
customer
programmable curve
for step 2
customer
programmable curve
for step 2
customer
programmable curve
for step 2
customer
programmable curve
for step 2
customer
programmable curve
for step 2
restrain
Reverse

Section 6
Current protection

ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
in % of IBase
t3 0.000 - 60.000 0.001 0.800 s Independent
(definitive) time delay
for step 3
for step 3
the current setting
value for step 3
time for IEC IDMT
curves for step 3
ANSI reset
curve step 3
customer
programmable curve
for step 3
customer
programmable curve
for step 3
customer
programmable curve
for step 3
customer
programmable curve
for step 3

Section 6
Current protection

customer
programmable curve
for step 3
customer
programmable curve
for step 3
customer
programmable curve
for step 3
HarmRestrain3 Disabled - Enabled - Enable block of step3
restrain
Reverse
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
in % of IBase
t4 0.000 - 60.000 0.001 2.000 s Independent
of step4
for step 4
the current setting
value for step 4
time for IEC IDMT
curves for step 4
ANSI reset

Section 6
Current protection

curve step 4
customer
programmable curve
for step 4
customer
programmable curve
for step 4
customer
programmable curve
for step 4
customer
programmable curve
for step 4
customer
programmable curve
for step 4
customer
programmable curve
for step 4
customer
programmable curve
for step 4
HarmRestrain4 Disabled - Enabled - Enable block of Step
Enabled 4 from harmonic
restrain
Table 101: Four step phase overcurrent protection (POCM, 51/67)

Function Setting range Accuracy
± 1.0% of I at I > Ir
Reset ratio > 95% -

Min. operating current (1-100)% of lbase ± 1.0% of Ir
Relay characteristic angle (RCA) (-70.0– -50.0) degrees ± 2.0 degrees

Maximum forward angle (40.0–70.0) degrees ± 2.0 degrees
Minimum forward angle (75.0–90.0) degrees ± 2.0 degrees
Second harmonic blocking (5–100)% of fundamental ± 2.0% of Ir
Independent time delay (0.000-60.000) s ± 0.5% ± 10 ms


Section 6
Current protection

Minimum operate time (0.000-60.000) s ± 0.5% ± 10 ms
Inverse characteristics, see 19 curve types See table 436 and table 437
table 436 and table 437
Operate time, start function 25 ms typically at 0 to 2 x Iset -
Reset time, start function 25 ms typically at 2 to 0 x Iset -
Impulse margin time 15 ms typically -
6.3 Instantaneous residual overcurrent protection

(PIOC, 50N)
Function block name: IEFx- IEC 60617 graphical symbol:

ANSI number: 50N
EFPIOC IN>>
6.3.1 Introduction
The single input overcurrent function has a low transient overreach and short tripping
times to allow use as a high set short circuit protection function, with the reach limited
to less than typical eighty percent of the power line at minimum source impedance.
The function can be configured to measure the residual current from the three phase
current inputs or the current from a separate current input.

The sampled analogue residual currents are pre-processed in a discrete Fourier filter
(DFT) block. From the fundamental frequency components of the residual current
the RMS value is derived. This current value is fed to the IEF function. In a comparator
the RMS value is compared to the set operation current value of the function
(IN>>). If the residual current is larger than the set operation current a signal from
the comparator is set to true. This signal will, without delay, activate the output signal
TRIP.
There is also a possibility to activate a preset change of the set operation current via
a binary input (enable multiplier MULTEN). In some applications the operation value
needs to be changed, for example due to transformer inrush currents.

Section 6
Current protection
The function can be blocked from the binary input BLOCK. The trip signals from the
function can be blocked from the binary input BLKAR, that can be activated during
single pole trip and autoreclosing sequences.

IEF1-
EFPIOC
I3P TRIP
BLOCK
BLKAR
MULTEN
en04000393.vsd
Figure 99: IEF function block
Table 102: Input signals for the EFPIOC_50N (IEF1-) function block
Signal Description
BLKAR Block input for auto reclose
MULTEN Enable current multiplier
Table 103: Output signals for the EFPIOC_50N (IEF1-) function block
Signal Description
TRIP Trip signal
Table 104: Parameter group settings for the EFPIOC_50N (IEF1-) function
On
current values
IN>> 1 - 2500 1 200 %IB Operate residual
IBase
StValMult 0.5 - 5.0 0.1 1.0 - Multiplier for operate
current level

Section 6
Current protection
Table 105: Instantaneous residual overcurrent protection (PIOC, 50N)

± 1.0% of I at I > Ir
Reset ratio > 95% -

Dynamic overreach < 5% at t = 100 ms -
6.4 Four step residual overcurrent protection

(PEFM, 51N/67N)
Function block name: TEFx- IEC 60617 graphical symbol:

ANSI number:51N/ 67N
IN
EF4PEFM
4
alt
4
6.4.1 Introduction
The four step single input overcurrent function has an inverse or definite time delay
independent for each step separately.
All IEC and ANSI time delayed characteristics are available together with an optional
user defined characteristic.
The function can be set to be directional, forward, reverse or non-directional

independently for each of the steps.
A second harmonic blocking can be set individually for each step.
The function can be used as main protection for phase to earth faults.

Section 6
Current protection
The function can be used to provide a system back-up e.g. in the case of the primary
protection being out of service due to communication or voltage transformer circuit
failure.
Directional operation can be combined together with corresponding communication

blocks into permissive or blocking teleprotection scheme. Current reversal and weak-
end infeed functionality are available as well.
The function can be configured to measure the residual current from the three phase
current inputs or the current from a separate current input.

The function is divided into four different sub-functions, one for each step. For each
step an operation modem DirModen is set: Off/Non-directional/Forward/Reverse.
The protection design can be decomposed in four parts:
• The direction element, indicate earth current fault direction. The directional
check uses 3I0cos(ϕ-ϕRCA) for comparison
• The harmonic Restraint Blocking function
• 4 step over current function
• Switch On To Fault function (SOTF), including Under Time
• Mode Selection
• Blocking at parallel transformers

Section 6
Current protection
signal to
communication
scheme
Directional Check
Element
4 step over current

Direction
operatingCurrent element TRIP
Element
3U0 One element for each
earthFaultDirection step
3I0 angleValid
enableDir
harmRestrBlock
3I0 Harmonic
Restraint ³1
Element
start step 2, 3 and

4
Blocking at parallel
transformers
SwitchOnToFault
TRIP
CB
pos
or cmd
enableDir
Mode
Selection enableStep1-4
DirectionalMode1-4
en05000741.vsd
Figure 100: Functional overview of TEF
The sampled analog residual current is pre-processed in a discrete Fourier filter (DFT)
block. From the fundamental frequency component the RMS value of the residual
current is derived. This residual current value is fed to the TEF function. In a
comparator the RMS value is compared to the set operation current value of the
function (IN1>, IN2>, IN3> or IN4>). If the residual current is larger than the set
operation current a signal from the comparator for this step is set to true. This signal
will, without delay, activate the output signal Start for this step and a common Start
signal.
A harmonic restrain of the function can be chosen. A set 2nd harmonic current in
relation to the fundamental current is used. The 2nd harmonic current is taken from
the pre-processing of the phase currents and compared to a set restrain current level.
The function can use a directional option. A fault is in the forward direction if the
residual current component 3I0cos(ϕ-ϕRCA) is larger than a set level. The angle ϕ
is the angle between the residual current and the polarizing voltage (–3U0). The angle
is defined positive when the residual current lags the reference voltage. The
AngleRCA is the characteristic angle of the directional function.

Section 6
Current protection
RCA Upol = -3U0
Operation
IN>Dir
en05000285.vsd
Figure 101: Characteristic of the directional option
If no blockings are given the start signals will start the timers of the step. The time
characteristic for each step can be chosen as definite time delay or some type of
inverse time characteristic. A wide range of standardized inverse time characteristics
is available. It is also possible to create a tailor made time characteristic. The
possibilities for inverse time characteristics are described in chapter 23 "Time inverse
characteristics"
Different types of reset time can be selected as described in chapter 23 "Time inverse
characteristics"
There is also a possibility to activate a preset change (INxMult, x = 1, 2, 3 or 4) of the

set operation current via a binary input (enable multiplier MULTEN). In some
applications the operation value needs to be changed, for example due to changed
network switching state.
In case of parallel transformers there is a risk of sympathetic inrush current. If one of

the transformers is in operation, and the parallel transformer is switched in, the
asymmetric inrush current of the switched in transformer will cause partial saturation
of the transformer already in service. This is called transferred saturation. The 2nd
harmonic of the inrush currents of the two transformers will be in phase opposition.
The summation of the two currents will thus give a small 2nd harmonic current. The
residual fundamental current will however be significant. The inrush current of the
transformer in service before the parallel transformer energizing, will be a little
delayed compared to the first transformer. Therefore we will have high 2nd harmonic
current initially. After a short period this current will however be small and the normal
2nd harmonic blocking will reset. If the BlkParTransf function is activated the 2nd

Section 6
Current protection
harmonic restrain signal will latched as long as the residual current measured by the
relay is larger than a selected step current level.
The function can be blocked from the binary input BLOCK. The start signals from
the function can be blocked from the binary input BLKST. The trip signals from the
function can be blocked from the binary input BLKTR.
6.4.2.1 Switch onto fault logic
Integrated in the four step residual overcurrent protection are Switch on to fault logic
(SOTF) and undertime logic. The parameter SOFT is set to activate either SOTF or
undertime function or both. When the circuit breaker is closing there is a risk to close
energize a permanent fault, for example during an autoreclosing sequence. The SOTF
function will enable fast fault clearance during such situations. The time the SOTF/
Undertime function will be active after activation is set by the parameter t4U.
The SOFT function uses the start signal from step 2 or 3, which is set by parameter
Step3ForSOTF. The function is activated from change in circuit breaker position or
from circuit breaker close command pulse. The parameter ActivationSOTF can be set
for activation of CB position open change, CB position closed change or CB close
command. In case of a residual current start from step 2 or 3 (dependent on setting)
the function will give a trip after a set delay tSOTF. This delay is normally set to a
short time (default 100 ms).
The undertime function uses the start signal from step 4. The function will normally
be set to a lower current level than the SOTF function. The undertime function can
also be blocked by the 2nd harmonic restrain function. This enables high sensitivity
even if power transformer inrush currents can occur. The detection of unsymmetrical
CB poles after switching is thus possible. The function is activated from change in
circuit breaker position or from circuit breaker close and open command pulse. This
is set by parameter ActUnderTime. The parameter ActUnderTime can be set for
activation of CB position change or CB close/open command. In case of a residual
current start from step 4 the function will give a trip after a set delay tUnderTime.
This delay is normally set to a relatively short time (default 300 ms).

Section 6
Current protection

T EF1-
EF4PEFM
BLOCK T RIP
I3P T RIN1
BLKT R T RIN2
U3P T RIN3
BLKST1 T RIN4
BLKST2 T RSOT F
BLKST3 START
BLKST4 ST IN1
ENMULT 1 ST IN2
ENMULT 2 ST IN3
ENMULT 3 ST IN4
ENMULT 4 ST SOT F
CBPOS STFW
CLOSECB STRV
OPENCB 2NDHARMD
en04000395.vsd
Figure 102: TEF function block
Table 106: Input signals for the EF4PEFM_51N67N (TEF1-) function block
Signal Description
BLKTR Block of trip
BLKST1 Block of step 1 (Start and trip)
CBPOS Breaker position
CLOSECB Breaker close command
OPENCB Breaker open command

Section 6
Current protection
Table 107: Output signals for the EF4PEFM_51N67N (TEF1-) function block
Signal Description
TRIP Trip
TRIN1 Trip signal from step 1
TRSOTF Trip signal from earth fault switch onto fault function
STIN1 Start signal step 1
STSOTF Start signal from earth fault switch onto fault function
STFW Forward directional start signal
STRV Reverse directional start signal
2NDHARMD 2nd harmonic block signal
Table 108: Parameter group settings for the EF4PEFM_51N67N (TEF1-) function
Operation Off - Off - Operation mode Off /
On On
current values
voltage level in kV
IMinOpFund 1 - 2500 1 3 %IB Minimum
fundamental
frequency current
level in % of IBase
AngleRCA -180 - 180 1 65 Deg Relay characteristic
angle (RCA)
3UO>Dir 1 - 100 1 5 %UB Minimum polarizing
quantity in % of
UBase
IN>DirCmp 1 - 100 1 3 %IB Operate residual
current level for
DirComp in % of
IBase
tDirCmp 0.000 - 60.000 0.001 10.000 s Time delay for
DirComp

Section 6
Current protection

2ndHarmStab 5 - 100 1 20 % Second harmonic
restrain operation in
% of INAMPL
UseStartValue IN1> - IN1> - Current level blk at
IN2> parallel transf (step1,
IN3> 2, 3 or 4)
IN4>
BlkParTransf Off - Off - Enable blocking at
On parallel transformers
ActivationSOTF Open - Open - Select signal that
Closed shall activate SOTF
CloseCommand
SOTF Off - Off - SOFT operation
SOTF mode (Off/SOTF/
UnderTime Undertime/SOTF
SOTF +undertime)
+UnderTime
tSOTF 0.000 - 60.000 0.001 0.100 s Time delay for SOTF
HarmResSOTF Disabled - Disabled - Enable harmonic
Enabled restrain functionin
SOTF
t4U 0.000 - 60.000 0.001 5.000 s Switch-onto-fault
active time
ActUnderTime CB position - CB position - Select signal to
CB command activate under time
(CB Pos/
CBCommand)
tUnderTime 0.000 - 60.000 0.001 0.300 s Time delay for under
time
Reverse
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
IN1> 1 - 2500 1 100 %IB Operate residual
in % of IBase

Section 6
Current protection

t1 0.000 - 60.000 0.001 0.000 s Independent
(defenite) time delay
of step 1
for step 1
IN1Mult 1.0 - 10.0 0.1 2.0 - Multiplier for scaling
the current setting
value for step 1
time for IEC IDMT
curves for step 1
ANSI reset
curve step 1
restrain
customer
programmable curve
for step 1
customer
programmable curve
for step 1
customer
programmable curve
for step 1
customer
programmable curve
for step 1
customer
programmable curve
for step 1
customer
programmable curve
for step 1
customer
programmable curve
for step 1
Reverse

Section 6
Current protection

ANSI Very inv. delay curve for step 2
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
in % of IBase
t2 0.000 - 60.000 0.001 0.400 s Independent
of step 2
for step 2
the current setting
value for step 2
time for IEC IDMT
curves step 2
ResetTypeCrv2 Instantaneous - Instantaneous - Reset mode when
IEC Reset current drops off step
ANSI reset 2
tReset2 0.000 - 60.000 0.001 0.020 s Selection of reset
curve type for step 2
restrain
customer
programmable curve
for step 2
customer
programmable curve
for step 2
customer
programmable curve
for step 2

Section 6
Current protection

customer
programmable curve
for step 2
customer
programmable curve
for step 2
customer
programmable curve
for step 2
customer
programmable curve
for step 2
Reverse
Characterist3 ANSI Ext. inv. - ANSI Def. Time - Time delay curve type
ANSI Very inv. for step 3
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
in % of IBase
t3 0.000 - 60.000 0.001 0.800 s Independent time
delay of step 3
for step 3
the current setting
value for step 3
time for IEC IDMT
curves for step 3
ANSI reset

Section 6
Current protection

curve for step 3
restrain
customer
programmable curve
for step 3
customer
programmable curve
for step 3
customer
programmable curve
for step 3
customer
programmable curve
step 3
customer
programmable curve
step 3
customer
programmable curve
step 3
customer
programmable curve
for step 3
Step3ForSOTF step 2 init - step 2 init - Select step3 to be
step 3 init connected to SOTF
Reverse

Section 6
Current protection

Characterist4 ANSI Ext. inv. - ANSI Def. Time - Time delay curve type
ANSI Very inv. for step 4
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
in % of IBase
t4 0.000 - 60.000 0.001 1.200 s Independent
of step 4
for step 4
the current setting
value for step 4
time in IEC IDMT
modes step 4
ANSI reset
curve for step 4
restrain
customer
programmable curve
for step 4
customer
programmable curve
step 4
customer
programmable curve
for step 4

Section 6
Current protection

customer
programmable curve
step 4
customer
programmable curve
step 4
customer
programmable curve
step 4
customer
programmable curve
step 4
Table 109: Four step residual overcurrent protection (PEFM, 51N/67N)

± 1.0% of I at I > Ir
Reset ratio > 95% -

Operate current for directional (1–100)% of lbase ± 1.0% of Ir
comparison
Timers (0.000-60.000) s ± 0.5% ± 10 ms
Inverse characteristics, see table 19 curve types See table 436 and table 437
436 and table 437
Second harmonic restrain (5–100)% of fundamental ± 2.0% of Ir
operation
Relay characteristic angle (-180 to 180) degrees ± 2.0 degrees
Minimum polarizing voltage (1–100)% of Ubase ± 1.0% of Ur
6.5 Thermal overload protection, one time constant

(PTTR, 26)

Section 6
Current protection
Function block name: THLx- IEC 60617 graphical symbol:

ANSI number: 49
LPTTR
6.5.1 Introduction
The increasing utilizing of the power system closer to the thermal limits have
generated a need of a thermal overload function also for power lines.
A thermal overload will often not be detected by other protection functions and the
introduction of the thermal overload function can allow the protected circuit to operate
closer to the thermal limits.
The three phase current measuring function has an I2t characteristic with settable time
constant and a thermal memory.
An alarm level gives early warning to allow operators to take action well before the
line will be tripped.

The sampled analogue phase currents are pre-processed and for each phase current
the RMS value of each phase current is derived. These phase current values are fed
to the THL function.
From the largest of the three phase currents a final temperature is calculated according
to the expression:
2
æ I ö
Q final =ç ÷÷ × Tref
ç I ref
è ø (Equation 33)
where:
I is the largest phase current,
Iref is a given reference current and
Tref is steady state temperature corresponding to Iref
If this temperature is larger than the set operate temperature level a start output signal
START is activated.
The actual temperature at the actual execution cycle is calculated as:

Section 6
Current protection
æ Dt
ö
Qn = Qn -1 + ( Q final - Q n-1 ) × ç1 - e t ÷
-
è ø (Equation 34)
where:
Qn is the calculated present temperature,
Qn-1 is the calculated temperature at the previous time step,
Qfinal is the calculated final temperature with the actual current,
Dt is the time step between calculation of the actual temperature and

t is the set thermal time constant for the protected device (line or cable)
The calculated component temperature can be monitored as it is exported from the

function as a real figure.
When the component temperature reaches the set alarm level AlarmTemp the output
signal ALARM is set. When the component temperature reaches the set trip level
TripTemp the output signal TRIP is set.
There is also a calculation of the present time to operation with the present current.
This calculation is only performed if the final temperature is calculated to be above
the operation temperature:
æQ - Qoperate ö
toperate = -t × ln ç final
ç Q final - Q n ÷÷
è ø (Equation 35)
The calculated time to trip can be monitored as it is exported from the function as a
real figure TTRIP.
After a trip, caused by the thermal overload protection function, there can be a lockout
to reconnect the tripped circuit. The output lockout signal LOCKOUT is activated
when the device temperature is above the set lockout release temperature setting
ReclTemp.
The time to lockout release is calculated, i.e. a calculation of the cooling time to a set
value. The thermal content of the function can be reset with input RESET.
æQ - Qlockout _ release ö
tlockout _ release = -t × ln ç final ÷÷
ç Q final - Q n
è ø (Equation 36)
The calculated component temperature can be monitored as it is exported from the

function as a real figure.

Section 6
Current protection
In some applications the measured current can involve a number of parallel lines.
This is often used for cable lines where one bay connects several parallel cables. By
setting the parameter IMult to the number of parallel lines (cables) the actual current
on one line is used in the protection algorithm. To activate this option the input
ENMULT must be activated.
The function has a reset input: RESET. By activating this input the calculated
temperature is reset to its default initial value. This is useful during testing when
secondary injected current has given a calculated “false” temperature level.
Final Temp start signal

> TripTemp
actual temperature
Calculation
of actual
temperature
IL1, IL2, IL3 Calculation

of final
temperature
Actual Temp >

alarm signal
AlarmTemp
trip signal
Actual Temp
> TripTemp initiate lockout
Actual Temp Reset of lockout after trip

< Recl Temp
Calculation time to trip

of time to
trip
Calculation
of time to time to reset of lockout
reset of
lockout
en05000736.vsd
Figure 103: Functional overview of THL

Section 6
Current protection

THL1-
LPTTR_26
I3P TRIP
BLOCK START
ENMULT ALARM
RESET LOCKOUT
en04000396.vsd
Figure 104: THL function block
Table 110: Input signals for the LPTTR_26 (THL1-) function block
Signal Description
ENMULT Current multiplyer used when THOL is for two or more lines
RESET Reset of internal thermal load counter
Table 111: Output signals for the LPTTR_26 (THL1-) function block
Signal Description
TRIP Trip
START Start Signal
ALARM Alarm signal
LOCKOUT Lockout signal
Table 112: Parameter group settings for the LPTTR_26 (THL1-) function
On
HystTemp 0 - 50 1 10 - Hysteresis for start
temperature
IBase 0 - 99999 1 3000 A Base current in A
IMult 1-5 1 1 - Current multiplier
when THOL is used
for two or more lines
IRef 0 - 400 1 100 %IB The load current (in
%of IBase) leading to
TRef temperature

Section 6
Current protection

TRef 0 - 400 1 90 Deg C End temperature of
the line when loaded
with IRef
Tau 0 - 1000 1 45 Min Time constant of the
line in minutes.
TripTemp 0 - 400 1 90 Deg C Temperature level for
trip
AlarmTemp 0 - 200 1 80 Deg C Temperature level for
start (alarm)
ReclTemp 0 - 400 1 75 Deg C Temperature for reset
of lockout after trip
Table 113: Thermal overload protection, one time constant (PTTR, 26)
Reference current (0-400)% of Ibase ± 1.0% of Ir
Start temperature reference (0-400)°C ± 1.0°C

Operate time: Ip = load current before overload IEC 60255-8, class 5 + 200 ms
occurs
æ I 2 - I p2 ö Time constant t = (0–1000)
t = t × ln ç 2 ÷ minutes
ç I - Ib 2 ÷
è ø
I = Imeasured
Alarm temperature (0-200)°C ± 2.0% of heat content trip

Trip temperature (0-400)°C ± 2.0% of heat content trip
Reset level temperature (0-400)°C ± 2.0% of heat content trip
6.6 Breaker failure protection (RBRF, 50BF)
Function block name: BFPx- IEC 60617 graphical symbol:

ANSI number: 50BF
CCRBRF 3I>BF

Section 6
Current protection
6.6.1 Introduction
The circuit breaker failure function ensures fast back-up tripping of surrounding
breakers. The breaker failure protection operation can be current based, contact based
or adaptive combination between these two principles.
A current check with extremely short reset time is used as a check criteria to achieve
a high security against unnecessary operation.
The breaker failure protection can be single- or three-phase started to allow use with
single phase tripping applications. For the three-phase version of the breaker failure
protection the current criteria can be set to operate only if two out of four e.g. two
phases or one phase plus the residual current starts. This gives a higher security to
the back-up trip command.
The function can be programmed to give a single- or three phase re-trip of the own
breaker to avoid unnecessary tripping of surrounding breakers at an incorrect starting
due to mistakes during testing.

The breaker failure protection function is initiated from protection trip command,
either from protection functions within the protection terminal or from external
protection devices.
The start signal can be phase selective or general (for all three phases). Phase selective
start signals enable single pole re-trip function. This means that a second attempt to
open the breaker is done. The re-trip attempt can be made after a set time delay. For
transmission lines single pole trip and autoreclosing is often used. The re-trip function
can be phase selective if it is initiated from phase selective line protection. The re-
trip function can be done with or without current check. With the current check the
re-trip is only performed if the current through the circuit breaker is larger than the
operate current level.
The start signal can be an internal or external protection trip signal. If this start signal
gets high at the same time as current is detected through the circuit breaker, the back-
up trip timer is started. If the opening of the breaker is successful this is detected by
the function, both by detection of low RMS current and by a special adapted
algorithm. The special algorithm enables a very fast detection of successful breaker
opening, i.e. fast resetting of the current measurement. If the current detection has
not detected breaker opening before the back-up timer has run its time a back-up trip
is initiated. There is also a possibility to have a second back-up trip output activated
after an added settable time after the first back-up trip.
Further the following possibilities are available:
• The minimum length of the re-trip pulse, the back-up trip pulse and the back-up
trip pulse 2 are settable. The re-trip pulse, the back-up trip pulse and the back-

Section 6
Current protection
up trip pulse 2 will however sustain as long as there is an indication of closed

breaker.
• In the current detection it is possible to use three different options: 1 out of 3
where it is sufficient to detect failure to open (high current) in one pole, 1 out of
4 where it is sufficient to detect failure to open (high current) in one pole or high
residual current and 2 out of 4 where at least two current (phase current and/or
residual current) shall be high for breaker failure detection.
• The current detection for the residual current can be set different from the setting
of phase current detection.
• It is possible to have different re-trip time delays for single phase faults and for
multi-phase faults.
• The back-up trip can be made without current check. It is possible to have this
option activated for small load currents only.
• It is possible to have instantaneous back-up trip function if a signal is high if the
circuit breaker is insufficient to clear faults, for example at low gas pressure.
Current
AND
BLOCK
Current & t1 tp
STIL1
Contact t TRRETL1
AND AND
START
OR
STL1
OR
TRRET
OR
AND AND
CBCLDL1
Contact
L2 L3
en05000832.vsd
Figure 105: Simplified logic scheme of the retrip function

Section 6
Current protection
Figure 106: Simplified logic scheme of the back-up trip function
Internal logical signals STIL1, STIL2, STIL3 have logical value 1 when current in
respective phase has magnitude larger than setting parameter IP>.
Internal logical signal STN has logical value 1 when neutral current has magnitude
larger than setting parameter IN>.

Section 6
Current protection
More than 1 current high t2MPh

AND t
1 of 3
tp
TRBU
OR
t2
1 of 4 t
OR
t3 tp
t TRBU2
2 of 3
AND
CBALARM
CBFLT CBALARM
t
en06000223.vsd
Figure 107: Simplified logic scheme of the back-up trip function

BFP1-
CCRBRF
I3P T RBU
BLOCK T RBU2
START T RRET
STL1 T RRET L1
STL2 T RRET L2
STL3 T RRET L3
CBCLDL1 CBALARM
CBCLDL2
CBCLDL3
CBFLT
en04000397.vsd
Figure 108: BFP function block
Table 114: Input signals for the CCRBRF_50BF (BFP1-) function block
Signal Description
START Three phase start of breaker failure protection function
STL1 Start signal of phase L1

Section 6
Current protection
Signal Description
CBCLDL1 Circuit breaker closed in phase L1
CBFLT CB faulty, unable to trip. Back-up trip instantanously.
Table 115: Output signals for the CCRBRF_50BF (BFP1-) function block
Signal Description
TRBU Back-up trip by breaker failure protection function
TRBU2 Second back-up trip by breaker failure protection function
TRRET Retrip by breaker failure protection function
TRRETL1 Retrip by breaker failure protection function phase L1
CBALARM Alarm for faulty circuit breaker
Table 116: Parameter group settings for the CCRBRF_50BF (BFP1-) function
On
current level settings
FunctionMode Current - Current - Detection for back-up
Contact trip Current/Cont/
Current&Contact Current and Cont
BuTripMode 2 out of 4 - 1 out of 3 - Back-up trip mode, 2
1 out of 3 out of 4, 1 out of 3 or
1 out of 4 1 out of 4
RetripMode Retrip Off - Retrip Off - Operation mode of re-
I> Check trip logic: OFF/I>
No I> Check check/No I> check
IP> 5 - 200 1 10 %IB Operate level in % of
IBase
I>BlkCont 5 - 200 1 20 %IB Current for blocking of
CB contact operation
in % of IBase
IN> 2 - 200 1 10 %IB Operate residual level
in % of IBase
t1 0.000 - 60.000 0.001 0.000 s Time delay of re-trip

Section 6
Current protection

t2 0.000 - 60.000 0.001 0.150 s Time delay of back-up
trip
t2MPh 0.000 - 60.000 0.001 0.150 s Time delay of back-up
trip at multi-phase
start
t3 0.000 - 60.000 0.001 0.030 s Additional time delay
to t2 for a second
back-up trip
tCBAlarm 0.000 - 60.000 0.001 5.000 s Time delay for CB
faulty signal
tPulse 0.000 - 60.000 0.001 0.200 s Trip pulse duration
Table 117: Breaker failure protection (RBRF, 50BF)

Operate phase current (5-200)% of lbase ± 1.0% of Ir at I £ Ir
± 1.0% of I at I > Ir
Reset ratio, phase current > 95% -

Operate residual current (2-200)% of lbase ± 1.0% of Ir at I £ Ir
± 1.0% of I at I > Ir
Reset ratio, residual current > 95% -

Phase current level for blocking of (5-200)% of lbase ± 1.0% of Ir at I £ Ir
contact function ± 1.0% of I at I > Ir
Reset ratio > 95% -

Timers (0.000-60.000) s ± 0.5% ± 10 ms
Operate time for current detection 10 ms typically -
Reset time for current detection 15 ms maximum -
6.7 Stub protection (PTOC, 50STB)
Function block name: STB-- IEC 60617 graphical symbol:

ANSI number: 50STB
STBPTOC 3I>STUB

Section 6
Current protection
6.7.1 Introduction
When a power line is taken out of service for maintenance and the line disconnector
is opened in multi-breaker arrangements the voltage transformers will mostly be
outside on the disconnected part. The primary line distance protection will thus not
be able to operate and must be blocked.
The stub protection covers the zone between the current transformers and the open
disconnector. The three phase instantaneous overcurrent function is released from a
NO (b) auxiliary contact on the line disconnector.

the STB function. In a comparator the RMS values are compared to the set operation
current value of the function I>. If a phase current is larger than the set operation
current a signal from the comparator for this phase is set to true. This signal will, in
combination with a release signal, activate the timer of this function. If the fault
current remains during the set timer delay t the function gives a trip signal.
STUB PROTECTION FUNCTION
BLOCK
TRIP
STIL1 AND
STIL2 OR
STIL3
RELEASE
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Figure 109: Simplified logic diagram for the stub protection

Section 6
Current protection

STB1-
STBPTOC_50STB
I3P TRIP
BLOCK START
BLKTR
RELEASE
en05000678.vsd
Figure 110: STB function block
Table 118: Input signals for the STBPTOC_50STB (STB1-) function block
Signal Description
BLKTR Block of trip
RELEASE Release of stub protection
Table 119: Output signals for the STBPTOC_50STB (STB1-) function block
Signal Description
TRIP Trip
START General start
Table 120: Parameter group settings for the STBPTOC_50STB (STB1-) function
On
current values
ReleaseMode Release - Release - Release of stub
Continuous protection
I> 1 - 2500 1 200 %IB Operate current level
in % of IBase
t 0.000 - 60.000 0.001 0.000 s Time delay

Section 6
Current protection
Table 121: Stub protection (PTOC, 50STB)

Operate current (1-2500)% of Ibase ± 1.0% of Ir at I £ Ir
± 1.0% of I at I > Ir
Reset ratio > 95% -

Definite time (0.000-60.000) s ± 0.5% ± 10 ms
6.8 Pole discordance protection (RPLD, 52PD)
Function block name: PDx-- IEC 60617 graphical symbol:

ANSI number: 50PD
CCRPLD PD
6.8.1 Introduction
Single pole operated circuit breakers can due to electrical or mechanical failures end
up with the different poles in different positions (close-open). This can cause negative
and zero sequence currents which gives thermal stress on rotating machines and can
cause unwanted operation of zero sequence current functions.
Normally the own breaker is tripped to correct the positions. If the situation consists
the remote end can be intertripped to clear the unsymmetrical load situation.
The pole discordance function operates based on information from auxiliary contacts
of the circuit breaker for the three phases with additional criteria from unsymmetrical
phase current when required.

The detection of pole discordance can be made in two different ways. If the contact
based function is used an external logic can be made by connecting the auxiliary
contacts of the circuit breaker so that a pole discordance is indicated. This is shown
in figure 111

Section 6
Current protection
C.B.
poleDiscordance Signal from C.B.
en05000287.vsd
Figure 111: Pole discordance external detection logic
This single binary signal is connected to a binary input of the IED. The appearance
of this signal will start a timer that will give a trip signal after the set delay.
There is also a possibility to connect all phase selective auxiliary contacts (phase
contact open and phase contact closed) to binary inputs of the IED. This is shown in
figure 112
C.B.
poleOneClosed from C.B.
poleTwoClosed from C.B.
poleThreeClosed from C.B.
+
poleOneOpened from C.B.
poleTwoOpened from C.B.
poleThreeOpened from C.B.
en05000288.vsd
Figure 112: Pole discordance signals for internal logic
In this case the logic is realized within the function. If the inputs are indicating pole
discordance the trip timer is started. This timer will give a trip signal after the set
delay.
Pole discordance can also be detected by means of phase selective current

measurement. The sampled analogue phase currents are pre-processed in a discrete
Fourier filter (DFT) block. From the fundamental frequency components of each
phase current the RMS value of each phase current is derived. These phase current

Section 6
Current protection
values are fed to the PD function. The difference between the smallest and the largest
phase current is derived. If this difference is larger than a set ratio the trip timer is
started. This timer will give a trip signal after the set delay. The current based pole
discordance function can be set to be active either continuously or only directly in
connection to breaker open or close command.
The function also has a binary input that can be configured from the autoreclosing
function, so that the pole discordance function can be blocked during sequences with
a single pole open if single pole autoreclosing is used.
The simplified block diagram of the current and contact based pole discordance
function is shown in figure 113.
BLOCK
OR
BLKDBYAR
PolPosAuxCont
AND
POLE1OPN
POLE1CL
POLE2OPN
Discordance
POLE2CL
detection
POLE3OPN
POLE3CL t 150 ms
t TRIP
AND
OR
PD Signal from CB
AND
EXTPDIND
CLOSECMD t+200 ms
OR
OPENCMD
AND
Unsymmetry current
detection
en05000747.vsd
Figure 113: Simplified block diagram of pole discordance function - contact and
current based
The pole discordance function is disabled if:
• The terminal is in TEST mode (TEST-ACTIVE is high) and the function has
been blocked from the HMI (BlockPD=Yes)
• The input signal BLOCK is high
• The input signal BLKDBYAR is high
The BLOCK signal is a general purpose blocking signal of the pole discordance
function. It can be connected to a binary input of the terminal in order to receive a
block command from external devices or can be software connected to other internal
functions of the terminal itself in order to receive a block command from internal
functions. Through OR gate it can be connected to both binary inputs and internal
function outputs.

Section 6
Current protection
The BLKDBYAR signal blocks the pole discordance operation when a single phase
autoreclosing cycle is in progress. It can be connected to the output signal AR01-1PT1
if the autoreclosing function is integrated in the terminal; if the autoreclosing function
is an external device, then BLKDBYAR has to be connected to a binary input of the
terminal and this binary input is connected to a signalization “1phase autoreclosing
in progress” from the external autoreclosing device.
If the pole discordance function is enabled, then two different criteria will generate
a trip signal TRIP:
• Pole discordance signalling from the circuit breaker.

• Unsymmetrical current detection.
6.8.2.1 Pole discordance signalling from circuit breaker
If one or two poles of the circuit breaker have failed to open or to close (pole
discordance status), then the function input EXTPDIND is activated from the pole
discordance signal derived from the circuit breaker auxiliary contacts (one NO contact
for each phase connected in parallel, and in series with one NC contact for each phase
connected in parallel) and, after a settable time interval t (0-60 s), a 150 ms trip pulse
command TRIP is generated by the pole discordance function.
6.8.2.2 Unsymmetrical current detection
Unsymmetrical current detection is based on checking that:
• any phase current is lower than 80% of the highest current in the remaining two
phases
• the highest phase current is greater than 10% of the rated current
If these conditions are true, an unsymmetrical condition is detected and the internal
signal INPS is turned high. This detection is enabled to generate a trip after a set time
delay t (0-60 s) if the detection occurs in the next 200 ms after the circuit breaker has
received a command to open trip or close and if the unbalance persists. The 200 ms
limitation is for avoiding unwanted operation during unsymmetrical load conditions.
The pole discordance function is informed that a trip or close command has been
given to the circuit breaker through the inputs CLOSECMD (for closing command
information) and OPENCMD (for opening command information). These inputs can
be connected to terminal binary inputs if the information are generated from the field
(i.e. from auxiliary contacts of the close and open push buttons) or may be software
connected to the outputs of other integrated functions (i.e. close command from a
control function or a general trip from integrated protections).

Section 6
Current protection

PD01-
CCRPLD
I3P T RIP
BLOCK ST ART
BLKDBYAR
CLOSECMD
OPENCMD
EXT PDIND
POLE1OPN
POLE1CL
POLE2OPN
POLE2CL
POLE3OPN
POLE3CL
en05000321.vsd
Figure 114: PD function block
Table 122: Input signals for the CCRPLD_52PD (PD01-) function block
Signal Description
BLKDBYAR Block of function at CB single phase auto re-closing cycle
CLOSECMD Close order to CB
OPENCMD Open order to CB
EXTPDIND Pole discordance signal from CB logic
POLE1OPN Pole one opened indication from CB
POLE1CL Pole one closed indication from CB
POLE2OPN Pole two opened indication from CB
POLE2CL Pole two closed indication from CB
POLE3OPN Pole three opened indication from CB
POLE3CL Pole three closed indication from CB
Table 123: Output signals for the CCRPLD_52PD (PD01-) function block
Signal Description
TRIP Trip signal to CB
START Trip condition TRUE, waiting for time delay

Section 6
Current protection
Table 124: Parameter group settings for the CCRPLD_52PD (PD01-) function
On
current levels
TimeDelayTrip 0.000 - 60.000 0.001 0.300 s Time delay between
trip condition and trip
signal
ContSel Off - Off - Contact function
PD signal from CB selection
Pole pos aux cont.
CurrSel Off - Off - Current function
CB oper monitor selection
Continuous
monitor
CurrUnsymLevel 0 - 100 1 80 % Unsym magn of
lowest phase current
compared to the
highest.
CurrRelLevel 0 - 100 1 10 %IB Current magnitude for
release of the function
in % of IBase
Table 125: Pole discordance protection (RPLD, 52PD)

Operate current (0–100% of Ibase ± 1.0% of Ir
Time delay (0.000-60.000) s ± 0.5% ± 10 ms

226
Section 7
Voltage protection
Section 7 Voltage protection
About this chapter

This chapter describes voltage related protection functions. The way the functions
work, their setting parameters, function blocks, input and output signals and technical
data are included for each function.
7.1 Two step undervoltage protection (PUVM, 27)
Function block name: TUVx- IEC 60617 graphical symbol:

ANSI number: 27
PH2PUVM 3U<
7.1.1 Introduction
Undervoltages can occur in the power system during faults or abnormal conditions.
The function can be used to open circuit breakers to prepare for system restoration at
power outages or as long-time delayed back-up to primary protection.
The function has two voltage steps, each with inverse or definite time delay.

The two-step undervoltage protection function (TUV) is used to detect low power
system voltage. The function has two voltage measuring steps with separate time
delays. If one, two or three phase voltages decrease below the set value, a
corresponding start signal is issued. TUV can be set to start/trip based on "one out of
three", "two out of three", or "three out of three" of the measured phase voltages,
being below the set point. If the phase voltage remains below the set value for a time
period corresponding to the chosen time delay, the corresponding trip signal is issued.
To avoid an unwanted trip due to disconnection of the related high voltage equipment,
a voltage controlled blocking of the function is available, i.e. if the voltage is lower
than the set blocking level the function is blocked and no start or trip signal is issued.
The time delay characteristic is individually chosen for each step and can be either
definite time delay or inverse time delay.

Section 7
Voltage protection
The voltage related settings are made in percent of the base voltage, which is set in
kV, phase-phase.
The undervoltage protection function measures the phase to earth voltages, if the
voltage transformer is connected phase to earth to the analogue voltage inputs. The
setting of the analogue inputs are given as primary phase to phase voltage and
secondary phase to phase voltage. The function will operate if the phase to earth
voltage gets lover than the set percentage of the phase to earth voltage corresponding
to the set base voltage UBase. This means operation for phase to earth voltage under:
U < (%) × UBase( kV )

3 (Equation 38)
If the voltage transformer is connected phase to phase to the analogue input, the setting
of the analogue inputs are given as primary phase to phase voltage and secondary
phase to phase voltage divided by √ 3. The function will operate if the phase to phase
voltage gets lover than the set percentage of the phase to phase voltage corresponding
to the set base voltage UBase.
7.1.2.1 Measurement principle
All the three phase to earth voltages are measured continuously, and compared with
the set values, U1< and U2<. The parameters OpMode1 and OpMode2 influence the
requirements to activate the start outputs. Either "1 out of 3", "2 out of 3" or "3 out
of 3" phases have to be lower than the corresponding set point to issue the
corresponding start signal.
To avoid oscillations of the output start signal, a hysteresis has been included.
7.1.2.2 Time delay
The time delay for the two steps can be either definite time delay (DT) or inverse time
delay (IDMT). For the inverse time delay three different modes are available; inverse
curve A, inverse curve B, and a programmable inverse curve.
The type A curve is described as:
k
t=
æ U < -U ö
ç ÷
è U< ø (Equation 39)
The type B curve is described as:
k × 480
t= 2.0
+ 0.055
æ U < -U ö
ç 32 × - 0.5 ÷

Section 7
Voltage protection
The programmable curve can be created as:
é ù
ê ú
k×A
t=ê ú+D
êæ U < -U ö ú
p
êç B × -C÷ ú
ëè U< ø û (Equation 41)
When the denominator in the expression is equal to zero the time delay will be infinity.
There will be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set
to compensate for this phenomenon. In the voltage interval U< down to U< *(1.0 –
CrvSatn/100) the used voltage will be: U< *(1.0 – CrvSatn/100). If the programmable
curve is used this parameter must be calculated so that:
CrvSatn
B× -C > 0
100 (Equation 42)
The lowest phase voltage is always used for the inverse time delay integration, see
figure 115. The details of the different inverse time characteristics are shown in
section "Inverse characteristics".
Voltage
UL1
UL2
UL3
IDMT Voltage
Time
en05000009.vsd
Figure 115: Voltage used for the inverse time characteristic integration
Trip signal issuing requires that the undervoltage condition continues for at least the
user set time delay. This time delay is set by the parameter t1 and t2 for definite time
mode (DT) and by some special voltage level dependent time curves for the inverse
time mode (IDMT). If the start condition, with respect to the measured voltage ceases

Section 7
Voltage protection
during the delay time, and is not fulfilled again within a user defined reset time
(tReset1 and tReset2 for the definite time and tIReset1 and tIReset2 for the inverse
time) the corresponding start output is reset. Here it should be noted that after leaving
the hysteresis area, the start condition must be fulfilled again and it is not sufficient
for the signal to only return back to the hysteresis area. Note that for the undervoltage
function the IDMT reset time is constant and does not depend on the voltage
fluctuations during the drop-off period. However, there are three ways to reset the
timer, either the timer is reset instantaneously, or the timer value is frozen during the
reset time, or the timer value is linearly decreased during the reset time. See
figure 116 and figure 117.
tReset
tReset 1
Voltage 1 Measured
START Voltage
Hysteresis
TRIP
U1<
Time
START t1
TRIP
Time
Integrator Froozen Timer
t1
Time
Instantaneous
Linear Decrease
Reset en05000010.vsd
Figure 116: Voltage profile not causing a reset of the start signal for step 1, and definite time delay

Section 7
Voltage protection
tReset1
Voltage
tReset1
START
START
Hysteresis Measured Voltage
TRIP
U1<
Time
START t1
TRIP
Time Integrator
Froozen Timer
t1
Time
Instantaneous
Linear Decrease
Figure 117: Voltage profile causing a reset of the start signal for step 1, and definite time delay
7.1.2.3 Blocking
The undervoltage function can be partially or totally blocked, by binary input signals
or by parameter settings, where:

Section 7
Voltage protection
BLOCK: blocks all outputs

BLKTR1: blocks all trip outputs of step 1
BLKST1: blocks all start and trip outputs related to step 1
If the measured voltage level decreases below the setting of IntBlkStVal1, either the
trip output of step 1, or both the trip and the start outputs of step 1, are blocked. The
characteristic of the blocking is set by the IntBlkSel1 parameter. This internal blocking
can also be set to "off" resulting in no voltage based blocking. Corresponding settings
and functionality are valid also for step 2.
In case of disconnection of the high voltage component the measured voltage will get
very low. The event will start both the under voltage function and the blocking
function, as seen in figure 118. The delay of the blocking function must be set less
than the time delay of under voltage function.
U Disconnection
Normal voltage
U1<
U2<
tBlkUV1 <
t1,t1Min
IntBlkStVal1
tBlkUV2 <
t2,t2Min
IntBlkStVal2
Time
Block step 1
Block step 2
en05000466.vsd
Figure 118: Blocking function.

Section 7
Voltage protection
7.1.2.4 Design
The voltage measuring elements continuously measure the phase-to-neutral voltages

in all three phases. Recursive Fourier filters filter the input voltage signals. The phase
voltages are individually compared to the set value, and the lowest phase voltage is
used for the inverse time characteristic integration. A special logic is included to
achieve the "1 out of 3", "2 out of 3" and "3 out of 3" criteria to fulfill the start
condition. The design of the TimeUnderVoltage function is schematically described
in figure 119.
UL1 Comparator ST1L1

UL1 < U1< Phase 1
Voltage Phase
Selector ST1L2
UL2 Comparator OpMode1 Phase 2
UL2 < U1< 1 out of 3
2 out of 3 ST1L3
Phase 3 Start
UL3 Comparator 3 out of 3
&
UL3 < U1< Trip ST1
OR
Output
START Logic TR1L1
Step 1
Time integrator TR1L2
MinVoltSelect t1 TRIP
or tReset1
ResetTypeCrv1 TR1L3
TR1
OR
Comparator ST2L1
UL1 < U2< Phase 1
Voltage Phase
Selector ST2L2
Comparator OpMode2 Phase 2
UL2 < U2< 1 out of 3
2 outof 3 ST2L3
Phase 3 Start
Comparator 3 out of 3
&
UL3 < U2< Trip ST2
Output OR
START Logic TR2L1
Step 2
MinVoltSelect t2 TRIP
or tReset2
ResetTypeCrv2 TR2L3
TR2
OR
OR START
TRIP
OR
en05000012.vsd
Figure 119: Schematic design of the TUV function

Section 7
Voltage protection

T UV1-
PH2PUVM
U3P T RIP
BLOCK TR1
BLKT R1 T R1L1
BLKST1 T R1L2
BLKT R2 T R1L3
BLKST2 TR2
T R2L1
T R2L2
T R2L3
START
ST1
ST1L1
ST1L2
ST1L3
ST2
ST2L1
ST2L2
ST2L3
en05000330.vsd
Figure 120: TUV function block
Table 126: Input signals for the PH2PUVM_27 (TUV1-) function block
Signal Description
BLKTR1 Block of operate signal, step 1
BLKST1 Block of step 1
Table 127: Output signals for the PH2PUVM_27 (TUV1-) function block
Signal Description
TRIP Operate signal
TR1 Operate signal for step 1
TR1L1 Operate signal for phase 1, step 1

Section 7
Voltage protection
Signal Description
START Start signal
ST1 Start signal for step1
ST1L1 Start signal for phase 1, step 1
ST2 Start signal for step 2
Table 128: Basic parameter group settings for the PH2PUVM_27 (TUV1-) function
On
UBase 0.05 - 2000.00 0.05 400.00 kV Base voltage, phase-
phase in kV
Characterist1 Definite time - Definite time - Operation
Inverse curve A characteristic
Inverse curve B selection, step 1
Prog. inv. curve
OpMode1 1 out of 3 - 1 out of 3 - Operation Mode, 1
2 out of 3 out of 3 / 2 out of 3 / 3
3 out of 3 out of 3, step 1
U1< 1 - 100 1 70 %UB Voltage setting/start
val (DT & IDMT) in %
of UBase, step 1
t1 0.000 - 60.000 0.001 5.000 s Operate time delay in
DT mode, step 1.
time in IDMT mode
(s), step 1
k1 0.05 0.01 0.05 - 1.10 - Time multiplier in
IDMT mode, step 1
IntBlkSel1 Off - Off - Internal (low level)
Block of trip blocking mode, step 1
Block all
IntBlkStVal1 1 - 100 1 20 %UB Voltage setting for
internal blocking in %
of UBase, step 1
tBlkUV1 0.000 - 60.000 0.001 0.000 s Time delay of internal
(low level) blocking for
step 1
HystAbs1 0.0 - 100.0 0.1 0.5 %UB Absolute hysteresis in
% of UBase, step 1

Section 7
Voltage protection

HystAbsIntBlk1 0.0 - 100.0 0.1 0.5 %UB Abs hysteresis for
of UBase, step 1
Prog. inv. curve
OpMode2 1 out of 3 - 1 out of 3 - Operation Mode, 1
U2< 1 - 100 1 50 %UB Voltage setting/start
of UBase, step 2
DT mode, step 2
time in IDMT mode
(s), step 2
k2 0.05 0.01 0.05 - 1.10 - Time multiplier in
IDMT mode, step 2
IntBlkSel2 Off - Off - Internal (low level)
Block of trip blocking mode, step 2
Block all
IntBlkStVal2 1 - 100 1 20 %UB Voltage setting for
of UBase, step 2
tBlkUV2 0.000 - 60.000 0.001 0.000 s Time delay of internal
(low level) blocking for
step 2
% of UBase, step 2
HystAbsIntBlk2 0.0 - 100.0 0.1 0.5 %UB Abs hysteresis for
of UBase, step 2
Table 129: Advanced parameter group settings for the PH2PUVM_27 (TUV1-) function
tReset1 0.000 - 60.000 0.001 0.025 s Time delay in DT
reset (s), step 1
ResetTypeCrv1 Instantaneous - Instantaneous - IDMT mode reset type
Frozen timer selector, step 1
Linearly
decreased
tIReset1 0.000 - 60.000 0.001 0.025 s Time delay in IDMT
reset (s), step 1
ACrv1 1.000 0.001 0.005 - 200.000 - Setting A for
programmable under
voltage IDMT curve,
step 1

Section 7
Voltage protection

BCrv1 1.00 0.01 0.50 - 100.00 - Setting B for
programmable under
voltage IDMT curve,
step 1
CCrv1 0.0 0.1 0.0 - 1.0 - Setting C for
programmable under
voltage IDMT curve,
step 1
DCrv1 0.000 0.001 0.000 - 60.000 - Setting D for
programmable under
voltage IDMT curve,
step 1
PCrv1 1.000 0.001 0.000 - 3.000 - Setting P for
programmable under
voltage IDMT curve,
step 1
CrvSat1 0 - 100 1 0 % Tuning param for
prog. under voltage
IDMT curve, step 1
reset (s), step 2
Linearly
decreased
reset (s), step 2
ACrv2 1.000 0.001 0.005 - 200.000 - Setting A for
programmable under
voltage IDMT curve,
step 2
BCrv2 1.00 0.01 0.50 - 100.00 - Setting B for
programmable under
voltage IDMT curve,
step 2
CCrv2 0.0 0.1 0.0 - 1.0 - Setting C for
programmable under
voltage IDMT curve,
step 2
DCrv2 0.000 0.001 0.000 - 60.000 - Setting D for
programmable under
voltage IDMT curve,
step 2
PCrv2 1.000 0.001 0.000 - 3.000 - Setting P for
programmable under
voltage IDMT curve,
step 2
prog. under voltage
IDMT curve, step 2

Section 7
Voltage protection
Table 130: Two step undervoltage protection (PUVM, 27)

Operate voltage, low and high (1–100)% of Ubase ± 1.0% of Ur
step
Absolute hysteresis (0–100)% of Ubase ± 1.0% of Ur
Internal blocking level, low and (1–100)% of Ubase ± 1.0% of Ur

high step
Inverse time characteristics for - See table 438
low and high step, see table 438
Definite time delays (0.000-60.000) s ± 0.5% ±10 ms
Minimum operate time, inverse (0.000–60.000) s ± 0.5% ± 10 ms
characteristics
Operate time, start function 25 ms typically at 2 to 0 x Uset -
Reset time, start function 25 ms typically at 0 to 2 x Uset -
Critical impulse time 10 ms typically at 2 to 0 x Uset -
7.2 Two step overvoltage protection (POVM, 59)
Function block name: TOVx- IEC 60617 graphical symbol:

ANSI number: 59
PH2POVM 3U>
7.2.1 Introduction
Overvoltages will occur in the power system during abnormal conditions such as
sudden power loss, tap changer regulating failures, open line ends on long lines.
The function can be used as open line end detector, normally then combined with
directional reactive over-power function or as system voltage supervision, normally
then giving alarm only or switching in reactors or switch out capacitor banks to control
the voltage.
The function has two voltage steps, each of them with inverse or definite time delayed.
The overvoltage function has an extremely high reset ratio to allow setting close to
system service voltage.

Section 7
Voltage protection
The two-step overvoltage protection function (TOV) is used to detect high power
system voltage. The function has two steps with separate time delays. If one, two or
three phase voltages increase above the set value, a corresponding start signal is
issued. TOV can be set to start/trip based on "one out of three", "two out of three",
or "three out of three" of the measured phase voltages, being above the set point. If
the phase voltage remains above the set value for a time period corresponding to the
chosen time delay, the corresponding trip signal is issued. The time delay
characteristic is individually chosen for the two steps and can be either definite time
delay or inverse time delay.
kV, phase-phase.
The overvoltage protection function measures the phase to earth voltages, if the
voltage transformer is connected phase to earth to the analogue voltage inputs. The
setting of the analogue inputs are given as primary phase to phase voltage and
secondary phase to phase voltage. The function will operate if the phase to earth
voltage gets higher than the set percentage of the phase to earth voltage corresponding
to the set base voltage UBase. This means operation for phase to earth voltage over
U > (%) × UBase( kV )

3 (Equation 43)
If the voltage transformer is connected phase to phase to the analogue input, the setting
of the analogue inputs are given as primary phase to phase voltage and secondary
phase to phase voltage divided by √3. The function will operate if the phase to phase
voltage gets higher than the set percentage of the phase to phase voltage corresponding
to the set base voltage UBase.
All the three phase voltages are measured continuously, and compared with the set
values, U1> and U2>. The parameters OpMode1 and OpMode2 influence the
requirements to activate the start outputs. Either "1 out of 3", "2 out of 3" or "3 out
of 3" phases have to be higher than the corresponding set point to issue the
corresponding start signal.
7.2.2.2 Time delay
delay (IDMT). For the inverse time delay four different modes are available; inverse
curve A, inverse curve B, inverse curve C, and a programmable inverse curve.

Section 7
Voltage protection
k
t=
æ U < -U ö
ç ÷
k × 480
t= 2.0
æ U -U > ö
ç 32 × - 0.5 ÷ - 0.035
è U> ø (Equation 45)
The type C curve is described as:
k × 480
t= 3.0
æ U -U > ö
ç 32 × - 0.5 ÷ - 0.035
k×A
t= p
+D
æ U -U > ö
çB× -C÷
to compensate for this phenomenon. In the voltage interval U< down to U< *(1.0 –
CrvSatn/100) the used voltage will be: U< *(1.0 – CrvSatn/100). If the programmable
CrvSatn
B× -C > 0
100 (Equation 48)
The highest phase voltage is always used for the inverse time delay integration, see
figure 121. The details of the different inverse time characteristics are shown in
section "Inverse characteristics"

Section 7
Voltage protection
Voltage
IDMT Voltage
UL1
UL2
UL3
Time
en05000016.vsd
Figure 121: Voltage used for the inverse time characteristic integration
Trip signal issuing requires that the overvoltage condition continues for at least the
user set time delay. This time delay is set by the parameter t1 and t2 for definite time
mode (DT) and by selected voltage level dependent time curves for the inverse time
mode (IDMT). If the start condition, with respect to the measured voltage ceases
during the delay time, and is not fulfilled again within a user defined reset time
(tReset1 and tReset2 for the definite time and tIReset1 and tIReset2 for the inverse
time) the corresponding start output is reset, after that the defined reset time has
elapsed. Here it should be noted that after leaving the hysteresis area, the start
condition must be fulfilled again and it is not sufficient for the signal to only return
back to the hysteresis area. It is also remarkable that for the overvoltage function the
IDMT reset time is constant and does not depend on the voltage fluctuations during
the drop-off period. However, there are three ways to reset the timer, either the timer
is reset instantaneously, or the timer value is frozen during the reset time, or the timer
value is linearly decreased during the reset time. See figure 122 and figure 123.

Section 7
Voltage protection
tReset1
tReset1
Voltage
START
TRIP
U1>
Hysteresis
Measured Voltage
Time
START t1
TRIP
Time Integrator
Linear Decrease
Froozen Timer
t1
Instantaneous Time
Reset
en05000017.vsd
Figure 122: Voltage profile note causing a reset of the start signal for step 1, and definite time delay

Section 7
Voltage protection
tReset1
Voltage tReset1
START
START TRIP
Hysteresis
U1>
Measured Voltage
Time
START t1
TRIP
Time Integrator
Froozen Timer
t1
Time
Instantaneous
Linear Decrease
7.2.2.3 Blocking
The overvoltage function can be partially or totally blocked, by binary input signals
where:

Section 7
Voltage protection

7.2.2.4 Design
The voltage measuring elements continuously measure the phase-to-neutral voltages

in all three phases. Recursive Fourier filters filter the input voltage signals. The phase
voltages are individually compared to the set value, and the highest phase voltage is
used for the inverse time characteristic integration. A special logic is included to
achieve the "1 out of 3", "2 out of 3" and "3 out of 3" criteria to fulfill the start
condition. The design of the TimeOverVoltage function is schematically described
in figure 124.

Section 7
Voltage protection
UL1 Comparator ST1L1

UL1 > U1> Phase 1
Voltage Phase
Selector ST1L2
UL2 Comparator OpMode1 Phase 2
UL2 > U1> 1 out of 3
2 outof 3 ST1L3
3 out of 3 Phase 3 Start
UL3 Comparator &
UL3 > U1> Trip ST1
OR
Output
START Logic TR1L1
Step 1
MaxVoltSelect t1 TRIP
or tReset1
ResetTypeCrv1 TR1L3
OR TR1
Comparator ST2L1
UL1 > U2> Phase 1
Voltage Phase
Selector ST2L2
Comparator OpMode2 Phase 2
UL2 > U2> 1 out of 3
2 outof 3 ST2L3
3 out of 3 Phase 3 Start
Comparator &
UL3 > U2> Trip ST2
OR
Output
START Logic TR2L1
Step 2
MaxVoltSelect t2 TRIP
or tReset2
ResetTypeCrv2 TR2L3
TR2
OR
START
OR
TRIP
OR
en05000013.vsd
Figure 124: Schematic design of the TimeOverVoltage function

Section 7
Voltage protection

T OV1-
PH2POVM
U3P T RIP
BLOCK TR1
BLKT R1 T R1L1
BLKST1 T R1L2
BLKT R2 T R1L3
BLKST2 TR2
T R2L1
T R2L2
T R2L3
ST ART
ST1
ST1L1
ST1L2
ST1L3
ST2
ST2L1
ST2L2
ST2L3
en05000328.vsd
Figure 125: TOV function block
Table 131: Input signals for the PH2POVM_59 (TOV1-) function block
Signal Description
U3P Group signal for three phase voltage input
Table 132: Output signals for the PH2POVM_59 (TOV1-) function block
Signal Description
TRIP Operate signal
TR1L1 Operate signal from phase 1, step 1

Section 7
Voltage protection
Signal Description
START Start signal
ST1 Start signal for step1
ST1L1 Start signal from phase 1, step 1
Table 133: Parameter group settings for the PH2POVM_59 (TOV1-) function
On
phase in kV
Inverse curve A charcteristic
Inverse curve C
Prog. inv. curve
OpMode1 1 out of 3 - 1 out of 3 - Operation mode, 1
U1> 1 - 200 1 120 %UB Voltage setting/start
of UBase, step 1
DT mode, step 1.
reset (s), step 1
time in IDMT mode
(s), step 1
Linearly
decreased
reset (s), step 1
k1 0.05 - 1.10 0.01 0.05 - Time multiplier in
IDMT mode, step 1

Section 7
Voltage protection

ACrv1 0.005 - 200.000 0.001 1.000 - Setting A for
programmable over
voltage IDMT curve,
step 1
BCrv1 0.50 - 100.00 0.01 1.00 - Setting B for
programmable over
voltage IDMT curve,
step 1
CCrv1 0.0 - 1.0 0.1 0.0 - Setting C for
programmable over
voltage IDMT curve,
step 1
DCrv1 0.000 - 60.000 0.001 0.000 - Setting D for
programmable over
voltage IDMT curve,
step 1
PCrv1 0.000 - 3.000 0.001 1.000 - Setting P for
programmable over
voltage IDMT curve,
step 1
prog. over voltage
IDMT curve, step 1
% of UBase, step 1
Inverse curve C
Prog. inv. curve
OpMode2 1 out of 3 - 1 out of 3 - Operation mode, 1
of UBase, step 2
DT mode, step 2
reset (s), step 2
time in IDMT mode
(s), step 2
Linearly
decreased
reset (s), step 2
IDMT mode, step 2

Section 7
Voltage protection

programmable over
voltage IDMT curve,
step 2
programmable over
voltage IDMT curve,
step 2
programmable over
voltage IDMT curve,
step 2
programmable over
voltage IDMT curve,
step 2
programmable over
voltage IDMT curve,
step 2
prog. over voltage
IDMT curve, step 2
% of UBase, step 2
Table 134: Two step overvoltage protection (POVM, 59)

Operate voltage, low and high (1-200)% of Ubase ± 1.0% of Ur at U < Ur
step ± 1.0% of U at U > Ur
Absolute hysteresis (0–100)% of Ubase ± 1.0% of Ur at U < Ur
± 1.0% of U at U > Ur

Definite time delays (0.000-60.000) s ± 0.5% ± 10 ms
Minimum operate time, Inverse (0.000-60.000) s ± 0.5% ± 10 ms
characteristics

Section 7
Voltage protection
7.3 Two step residual overvoltage protection

(POVM, 59N)
Function block name: TRVx- IEC 60617 graphical symbol:

ANSI number: 59N
IEC 61850 logical node name: 3U0
R2POVM
7.3.1 Introduction
Residual voltages will occur in the power system during earth faults.
The function can be configured to calculate the residual voltage from the three phase
voltage input transformers or from a single phase voltage input transformer fed from
an open delta or neutral point voltage transformer.
The function has two voltage steps, each with inverse or definite time delayed.

The two-step residual overvoltage protection function (TRV) is used to detect high
single-phase voltage, such as high residual voltage, also called 3U0. The residual
voltage can be measured directly from a voltage transformer in the neutral of a power
transformer or from a three-phase voltage transformer, where the secondary windings
are connected in an open delta. Another possibility is to measure the three phase
voltages and internally in the protection terminal calculate the corresponding residual
voltage and connect this calculated residual voltage to the TRV function block. The
function has two steps with separate time delays. If the single-phase (residual) voltage
remains above the set value for a time period corresponding to the chosen time delay,
the corresponding trip signal is issued. The time delay characteristic is individually
chosen for the two steps and can be either definite time delay or inverse time delay
kV, phase-phase.
The residual voltage is measured continuously, and compared with the set values,
U1> and U2>.

Section 7
Voltage protection
7.3.2.2 Time delay
delay (IDMT). For the inverse time delay four different modes are available; inverse
curve A, inverse curve B, inverse curve C, and a programmable inverse curve.
k
t=
æ U < -U ö
ç ÷
k × 480
t= 2.0
æ U -U > ö
ç 32 × - 0.5 ÷ - 0.035
The type C curve is described as:
k × 480
t= 3.0
æ U -U > ö
ç 32 × - 0.5 ÷ - 0.035
k×A
t= p
+D
æ U -U > ö
çB× -C÷
to compensate for this phenomenon. In the voltage interval U> up to U> *(1.0 +
CrvSatn/100) the used voltage will be: U> *(1.0 + CrvSatn/100). If the programmable
CrvSatn
B× -C > 0
100 (Equation 53)
The details of the different inverse time characteristics are shown in chapter "Inverse
characteristics".

Section 7
Voltage protection
Trip signal issuing requires that the residual overvoltage condition continues for at
least the user set time delay. This time delay is set by the parameter t1 and t2 for
definite time mode (DT) and by some special voltage level dependent time curves for
the inverse time mode (IDMT). If the start condition, with respect to the measured
voltage ceases during the delay time, and is not fulfilled again within a user defined
reset time (tReset1 and tReset2 for the definite time and tIReset1 and tIReset2 for the
inverse time) the corresponding start output is reset, after that the defined reset time
has elapsed. Here it should be noted that after leaving the hysteresis area, the start
condition must be fulfilled again and it is not sufficient for the signal to only return
back to the hysteresis area. It is also remarkable that for the overvoltage function the
IDMT reset time is constant and does not depend on the voltage fluctuations during
the drop-off period. However, there are three ways to reset the timer, either the timer
is reset instantaneously, or the timer value is frozen during the reset time, or the timer
value is linearly decreased during the reset time. See figure 126 and figure 127.
tReset
1
tReset1
Voltage
START
TRIP
U1>
Hysteresis
Measured
Voltage
Time
START t1
TRIP
Time
Integrator Linear Decrease
Froozen Timer
t1
Instantaneous Time
Figure 126: Voltage profile not causing a reset of the start signal for step 1, and definite time delay

Section 7
Voltage protection
tReset1
Voltage tReset1
START TRIP
START
Hysteresis
U1>
Measured Voltage
Time
START t1
TRIP
Time Integrator
Froozen Timer
t1
Time
Instantaneous
Linear Decrease en05000020.vsd
Reset
7.3.2.3 Blocking
The residual overvoltage function can be partially or totally blocked, by binary input
signals where:

Section 7
Voltage protection

7.3.2.4 Design
The voltage measuring elements continuously measure the residual voltage.

Recursive Fourier filters filter the input voltage signal. The single input voltage is
compared to the set value, and is also used for the inverse time characteristic
integration. The design of the TRV function is schematically described in
figure 128.
UN Comparator Phase 1 ST1

UN > U1>
TR1
START Start
&
Trip
Time integrator Output
t1 Logic
TRIP
tReset1
ResetTypeCrv1 Step 1
ST2
Comparator Phase 1
UN > U2> TR2
Start
START &
Trip START
Output OR
Time integrator
Logic
t2 TRIP
tReset2
Step 2
ResetTypeCrv2 TRIP
OR
en05000748.vsd
Figure 128: Schematic design of the TRV function

Section 7
Voltage protection

TRV1-
R2POVM
U3P TRIP
BLOCK TR1
BLKTR1 TR2
BLKST1 START
BLKTR2 ST1
BLKST2 ST2
en05000327.vsd
Figure 129: TRV function block
Table 135: Input signals for the R2POVM_59N (TRV1-) function block
Signal Description
Table 136: Output signals for the R2POVM_59N (TRV1-) function block
Signal Description
TRIP Operate signal
START Start signal

Section 7
Voltage protection
Table 137: Parameter group settings for the R2POVM_59N (TRV1-) function
On
phase in kV
Inverse curve C
Prog. inv. curve
val (DT & IDMT), step
1 in % of UBase
DT mode, step 1.
reset (s), step 1
time in IDMT mode
(s), step 1
Linearly
decreased
reset (s), step 1
IDMT mode, step 1
programmable over
voltage IDMT curve,
step 1
programmable over
voltage IDMT curve,
step 1
programmable over
voltage IDMT curve,
step 1
programmable over
voltage IDMT curve,
step 1
programmable over
voltage IDMT curve,
step 1
prog. over voltage
IDMT curve, step 1
% of UBase, step 1

Section 7
Voltage protection

Inverse curve C
Prog. inv. curve
val (DT & IDMT), step
2 in % of UBase
DT mode, step 2
reset (s), step 2
time in IDMT mode
(s), step 2
Linearly
decreased
reset (s), step 2
IDMT mode, step 2
programmable over
voltage IDMT curve,
step 2
programmable over
voltage IDMT curve,
step 2
programmable over
voltage IDMT curve,
step 2
programmable over
voltage IDMT curve,
step 2
programmable over
voltage IDMT curve,
step 2
prog. over voltage
IDMT curve, step 2
% of UBase, step 2

Section 7
Voltage protection
Table 138: Two step residual overvoltage protection (POVM, 59N)

Operate voltage, low and high (1-200)% of Ubase ± 1.0% of Ur at U < Ur ± 1.0%
step of U at U > Ur
Absolute hysteresis (0–100)% of Ubase ± 1.0% of Ur at U < Ur

± 1.0% of U at U > Ur

Definite time setting (0.000–60.000) s ± 0.5% ± 10 ms
Minimum operate time (0.000-60.000) s ± 0.5% ± 10 ms
7.4 Overexcitation protection (PVPH, 24)
Function block name: OEXx- IEC 60617 graphical symbol:

ANSI number: 24
OEXPVPH U/f >
7.4.1 Introduction
When the laminated core of a power transformer is subjected to a magnetic flux
density beyond its design limits, stray flux will flow into non-laminated components
not designed to carry flux and cause eddy currents to flow. The eddy currents can
cause excessive heating and severe damage to insulation and adjacent parts in a
relatively short time.

The importance of overexcitation protection is growing as the power transformers as
well as other power system elements today operate most of the time near their
designated limits.
Modern design transformers are more sensitive to overexcitation than earlier types.
This is a result of the more efficient designs and designs which rely on the
improvement in the uniformity of the excitation level of modern systems. Thus, if

Section 7
Voltage protection
emergency that includes overexcitation does occur, transformers may be damaged

unless corrective action is promptly taken. Transformer manufacturers recommend
an overexcitation protection as a part of the transformer protection system.
Overexcitation results from excessive applied voltage, possibly in combination with

below-normal frequency. Such condition may occur when a unit is on load, but are
more likely to arise when it is on open circuit, or at a loss of load occurrence.
Transformers directly connected to generators are in particular danger to experience
overexcitation condition. It follows from the fundamental transformer equation, see
equation 54, that peak flux density Bmax is directly proportional to induced voltage
E, and inversely proportional to frequency f, and turns n.
E = 4.44 × f × n × B max × A
(Equation 54)
The relative excitation M (relative V/Hz) is therefore according to equation 55.
V E¤f
M = relative æè -------öø = ------------------------
Hz ( Ur ) ¤ ( fr )
(Equation 55)
Disproportional variations in quantities E and f may give rise to core overfluxing. If

the core flux density Bmax increases to a point above saturation level (typically 1.9
Tesla), the flux will no longer be contained within the core only but will extend into
other (non-laminated) parts of the power transformer and give rise to eddy current
circulations. Overexcitation will result in:
• overheating of the non-laminated metal parts,

• a large increase in magnetizing currents,
• an increase in core and winding temperature,
• an increase in transformer vibration and noise.
Protection against overexcitation is based on calculation of the relative Volts per

Hertz (V / Hz) ratio. The action of the protection is usually to initiate a reduction of
excitation and, if this should fail, or is not possible, to trip the transformer after a
delay which can be from seconds to minutes, typically 5 - 10 seconds.
Overexcitation protection may be of particular concern on directly connected

generator unit transformers. Directly connected generator-transformers are subjected
to a wide range of frequencies during the acceleration and deceleration of the turbine.
In such cases, the overexcitation protection may trip the field breaker during a start-
up of a machine, by means of the overexcitation ALARM signal from the transformer
terminal. If this is not possible, the power transformer can be disconnected from the
source, after a delay, by the TRIP signal.
The IEC 60076 - 1 standard requires that transformers shall be capable of operating
continuously at 10% above rated voltage at no load, and rated frequency. At no load,
the ratio of the actual generator terminal voltage to the actual frequency should not

Section 7
Voltage protection
exceed 1.1 times the ratio of transformer rated voltage to the rated frequency on a
sustained basis, see equation 56.
---- £ 1.1 × Ur
E ------
f fr
(Equation 56)
or equivalently, with 1.1 · Ur = V/Hz> according to equation 57.
E V/Hz>
---- £ ---------------------
f fr (Equation 57)
where:
V/Hz> is the maximum continuously allowed voltage at no load, and rated frequency.
V/Hz> is an OEX setting parameter. The setting range is 1.0 pu to 1.5 pu. If the user
does not know exactly what to set, then the standard IEC 60076 - 1, section 4.4, the
default value V/Hz> = 1.10 pu shall be used.
In OEX protection function the relative excitation M (relative V/Hz) is expressed

according to equation 58.
V E¤f
M = relative æè -------öø = --------------
Hz Ur ¤ fr
(Equation 58)
It is clear from the above formula that, for an unloaded power transformer, M = 1 for
any E and f, where the ratio E / f is equal to Ur / fr. A power transformer is not
overexcited as long as the relative excitation is M ≤ V/Hz>, V/Hz> expressed in pu.
The relative overexcitation is thus defined as shown in equation 59.
overexcitation = M – V/Hz> (Equation 59)
The overexcitation protection algorithm is fed with an input voltage U which is in

general not the induced voltage E from the fundamental transformer equation. For no
load condition, these two voltages are the same, but for a loaded power transformer
the internally induced voltage E may be lower or higher than the voltage U which is
measured and fed to OEX, depending on the direction of the power flow through the
power transformer, the power transformer side where OEX is applied, and the power
transformer leakage reactance of the winding. It is important to specify on the OEX
function block in CAP 531 configuration tool worksheet on which side of the power
transformer OEX is placed
As an example, at a transformer with a 15% short circuit impedance Xsc, the full load,
0.8 power factor, 105% voltage on the load side, the actual flux level in the transformer
core, will not be significantly different from that at the 110% voltage, no load, rated
frequency, provided that the short circuit impedance X can be equally divided

Section 7
Voltage protection
between the primary and the secondary winding: Xleak = Xleak1 = Xleak2 = Xsc /
2 = 0.075 pu..
OEX calculates the internal induced voltage E if Xleak (meaning the leakage
reactance of the winding where OEX is connected) is known to the user. The
assumption taken for 2-winding power transformers that Xleak = Xsc / 2 is
unfortunately most often not true. For a 2-winding power transformer the leakage
reactances of the two windings depend on how the windings are located on the core
with respect to each other. In the case of three-winding power transformers the
situation is still more complex. If a user has the knowledge on the leakage reactance,
then it should applied. If a user has no idea about it, Xleak can be set to Xc/2. The
OEX protection will then take the given measured terminal voltage U, as the induced
voltage E.
It is assumed that overexcitation is a symmetrical phenomenon, caused by events such

as loss of load, etc. It will be observed that a high phase-to-earth voltage does not
mean overexcitation. For example, in an unearthed power system, a single-phase-to-
earth fault means high voltages of the “healthy” two phases to earth, but no
overexcitation on any winding. The phase-to-phase voltages will remain essentially
unchanged. The important voltage is the voltage between the two ends of each
winding.
7.4.2.1 Measured voltage
If one phase-to-phase voltage is available from the side where OEX protection is
applied, then OEX protection function block shall be set to measure this voltage,
MeasuredU. The particular voltage which is used determines the two currents that
must be used. If, for example, voltage Uab is fed to OEX, then currents Ia, and Ib
must be applied, etc. From these two input currents, current Iab = Ia - Ib is calculated
internally by the OEX protection algorithm. The phase-to-phase voltage must be
higher than 70% of the rated value, otherwise the OEX protection algorithm is exited
without calculating the excitation. ERROR output is set to 1, and the displayed value
of relative excitation V / Hz shows 0.000.
If three phase-to-earth voltages are available from the side where OEX is connected,
then OEX protection function block shall be set to measure positive sequence voltage.
In this case the positive sequence voltage and the positive sequence current are used
by OEX protection. A check is made within OEX protection if the positive sequence
voltage is higher than 70% rated phase-to-earth voltage; below this value, OEX is
exited immediately, and no excitation is calculated. ERROR output is set to 1, and
the displayed value of relative excitation V / Hz shows 0.000.
The frequency value is received from the pre-processing block. The function is in
operation for frequencies within the range of 33-60 Hz and of 42-75 Hz for 50 and
60 Hz respectively.

Section 7
Voltage protection
• OEX protection function can be connected to any power transformer side,

independent from the power flow.
• The side with a possible On-Load-Tap-Changer (OLTC) must not be used.
7.4.2.2 Operate time of the overexcitation protection.
The operate time of the overexcitation protection is a function of the relative

overexcitation. Basically there are two different delay laws available to choose
between:
• the so called IEEE law, and

• a tailor-made law.
The so called IEEE law approximates a square law and has been chosen based on
analysis of the various transformers’ overexcitation capability characteristics. They
can match well a transformer core capability.
The square law is according to equation 60.
0.18 × k 0.18 × k
t o p = --------------------------------------------- = ----------------------------------------
2 2
( M – V/Hz> ) overexcitation (Equation 60)
where:
M is excitation, mean value in the interval from t = 0 to t = top
V/Hz> is maximum continuously allowed voltage at no load, and rated frequency, in pu and
k is time multiplier setting for inverse time functions, see figure 131.
Parameter k (“time multiplier setting”) selects one delay curve from the family of curves.
An analog overexcitation relay would have to evaluate the following integral

expression, which means to look for the instant of time t = top according to
equation 61.
t op
2
ò ( M(t) – V/Hz> ) dt ³ 0.18 × k
0 (Equation 61)
A digital, numerical relay will instead look for the lowest j (i.e. j = n) where it becomes
true that:
n
2
Dt × å ( M(j) – V/Hz> ) ³ 0.18 × k
j=k (Equation 62)
where:
Dt is the time interval between two successive executions of overexcitation function and

Section 7
Voltage protection
M(j) - V/Hz> is the relative excitation at (time j) in excess of the normal (rated) excitation which is given
as Ur/fr.
As long as M > V/Hz> (i.e. overexcitation condition), the above sum can only be
larger with time, and if the overexcitation persists, the protected transformer will be
tripped at j = n.
Inverse delays as per figure 131, can be modified (limited) by two special definite
delay settings, namely tMax and tMin, see figure 130.
delay in s
tMax
under - inverse delay law

excitation
overexcitation
tMin
0 Mmax - V/Hz> Overexcitation M-V/Hz>
M=V/Hz> Mmax Excitation M
V/Hz> Emax E (only if f = fr = const)
99001067.vsd
Figure 130: Restrictions imposed on inverse delays by tMax, and tMin
A definite maximum time, tMax, can be used to limit the operate time at low degrees
of overexcitation. Inverse delays longer than tMax will not be allowed. In case the
inverse delay is longer than tMax, OEX trips after tMax seconds.
A definite minimum time, tMin, can be used to limit the operate time at high degrees
of overexcitation. In case the inverse delay is shorter than tMin, OEX function trips
after tMin seconds. Also, the inverse delay law is no more valid beyond excitation
Mmax. Beyond Mmax (beyond overexcitation Mmax - V/Hz>), the delay will always
be tMin, no matter what overexcitation.

Section 7
Voltage protection
Time (s) IEEE OVEREXCITATION CURVES
1000
100
k = 60
k = 20
k = 10
10 k=9
k=8
k=7
k=6
k=5
k=4
k=3
k=2
k=1
1
1 2 3 4 5 10 20 30 40
OVEREXCITATION IN % (M-Emaxcont)*100)
en01000373.vsd
Figure 131: Delays inversely proportional to the square of the overexcitation.
The critical value of excitation Mmax is determined indirectly via OEX protection
function setting V/Hz>>. V/Hz>> can be thought of as a no-load-rated-frequency
voltage, where the inverse law should be replaced by a short definite delay, tMin. If,
for example, V/Hz>> = 1.40 pu, then Mmax is according to equation 63.
(V/Hz>>) ¤ f
Mmax = -------------------------
- = 1.40
Ur ¤ fr
(Equation 63)
The Tailor-Made law allows a user to design an arbitrary delay characteristic. In this
case the interval between M = V/Hz>, and M = Mmax is automatically divided into
five equal subintervals, with six delays. (settings t1, t2, t3, t4, t5, and t6) as shown in
the figure 132. These times should be set so that t1 => t2 => t3 => t4 => t5 => t6.

Section 7
Voltage protection
delay in s
tMax
under- tMin
excitation Overexcitation M-Emaxcont
0 Mmax - Emaxcont Excitation M
Emaxcont Mmax
99001068.vsd
Figure 132: An example of a Tailor-Made delay characteristic
Delays between two consecutive points, for example t3 and t4, are obtained by linear
interpolation.
Should it happen that tMax be lower than, for example, delays t1, and t2, the actual
delay would be tMax. Above Mmax, the delay can only be tMin.
7.4.2.3 Cooling
The overexcitation protection OEX is basically a thermal protection; therefore a

cooling process has been introduced. Exponential cooling process is applied.
Parameter Tcool is an OEX setting, with a default time constant tCooling of 20
minutes. This means that if the voltage and frequency return to their previous normal
values (no more overexcitation), the normal temperature is assumed to be reached
not before approximately 5 times tCooling minutes. If an overexcitation condition
would return before that, the time to trip will be shorter than it would be otherwise.
7.4.2.4 OEX protection function measurands
A service value data item called Time to trip, and designated on the display by tTRIP
is available in seconds on the local HMI, or monitoring tool. This value is an
estimation of the remaining time to trip if the overexcitation remained on the level it
had when the estimation was done. This information can be useful with small or
moderate overexcitations. If the overexcitation is so low that the valid delay is
tMax, then the estimation of the remaining time to trip is done against tMax.
The displayed relative excitation M, designated on the display by V/Hz is calculated

from the expression:
V E¤f
M = relative æ -------ö = --------------
è Hzø Uf ¤ fr
(Equation 64)
If less than V / Hz = V/Hz> (in pu) is shown on the HMI display (or read via SM/
RET521), the power transformer is underexcited. If the value of V/Hz is shown which

Section 7
Voltage protection
is equal to V/Hz> (in pu), it means that the excitation is exactly equal to the power
transformer continuous capability. If a value higher than the value of V/Hz> is shown,
the protected power transformer is overexcited. For example, if V/Hz = 1.100 is
shown, while V/Hz> = 1.1 pu, then the power transformer is exactly on its maximum
continuous excitation limit.
The third item of the OEX protection service report is the thermal status of the
protected power transformer iron core, designated on the display by ThermalStatus.
This gives the thermal status in % of the trip value which corresponds to 100%.
Thermal Status should reach 100% at the same time, when tTRIP reaches 0 seconds.
If the protected power transformer is then for some reason not switched off, the
ThermalStaus shall go over 100%.
If the delay as per IEEE law, or Tailor-made Law, is limited by tMax, and/or TMin,
then the Thermal Status will generally not reach 100% at the same time, when tTRIP
reaches 0 seconds. For example, if, at low degrees of overexcitation, the very long
delay is limited by tMax, then the OEX TRIP output signal will be set to 1 before the
Thermal status reaches 100%.
7.4.2.5 Overexcitation alarm
A separate step, AlarmLevel, is provided for alarming purpose. The voltages are
normally set 2% lower and has a definite time delay, tAlarm. This will give the
operator an early abnormal voltages warning.
Figure 133: A simplified diagram of the OEX protection function
Simplification of the diagram is in the way the IEEE and Tailor-made delays are
calculated. The cooling process is not shown. It is not shown that voltage and
frequency are separately checked against their respective limit values.

Section 7
Voltage protection

OEX1-
OEXPVPH
I3P ERROR
U3P T RIP
BLOCK START
RESET ALARM
en05000329.vsd
Figure 134: OEX function block
Table 139: Input signals for the OEXPVPH (OEX1-) function block
Signal Description
BLOCK External block
RESET Reset operation
Table 140: Output signals for the OEXPVPH (OEX1-) function block
Signal Description
ERROR General function error
TRIP Trip from overexcitation function
START Overexcitation above set operate level (instantaneous)
ALARM Overexcitation above set alarm level (delayed)
Table 141: Parameter group settings for the OEXPVPH (OEX1-) function
On
IBase 1 - 99999 1 3000 A Base current (rated
phase current)
UBase 0.05 - 2000.00 0.05 400.00 kV Base voltage (main
voltage) in kV
MeasuredU Ph-Ph - Ph-Ph - Input voltage
Pos Seq selection (pos. seq/
one phase-to-phase)

Section 7
Voltage protection

V/Hz> 100.0 - 180.0 0.1 110.0 %UB/f Operate level of V/Hz
at no load & rated freq
in % of Ubase
V/Hz>> 100.0 - 200.0 0.1 140.0 %UB/f High level of V/Hz
above which tMin is
used, in % of Ubase
XLeak 0.000 - 200.000 0.001 0.000 ohm Winding reactance in
primary ohms
TrPulse 0.000 - 60.000 0.001 0.100 s Length of the pulse for
trip signal (in sec)
tMin 0.000 - 60.000 0.001 7.000 s Minimum trip delay for
V/Hz inverse curve, in
sec
tMax 0.00 - 9000.00 0.01 1800.00 s Maximum trip delay
for V/Hz inverse
curve, in sec
tCooling 0.10 - 9000.00 0.01 1200.00 s Transformer
magnetic core cooling
time constant, in sec
CurveType IEEE - IEEE - Inverse time curve
Tailor made selection, IEEE/Tailor
made
kForIEEE 1 - 60 1 1 - Time multiplier for
IEEE inverse type
curve
t1Tailor 0.00 - 9000.00 0.01 7200.00 s Time delay t1
(longest) for tailor
made curve, in sec
t2Tailor 0.00 - 9000.00 0.01 3600.00 s Time delay t2 for tailor
made curve, in sec
made curve, in sec
made curve, in sec
made curve, in sec
t6Tailor 0.00 - 9000.00 0.01 225.00 s Time delay t6
(shortest) for tailor
made curve, in sec
AlarmLevel 50.0 - 120.0 0.1 100.0 % Alarm operate level
as % of the trip level
tAlarm 0.00 - 9000.00 0.01 5.00 s Alarm time delay, in
sec

Section 7
Voltage protection
Table 142: Overexcitation protection (PVPH, 24)

Operate value, start (100–180)% of (Ubase/frated) ± 1.0% of U
Operate value, alarm (50–120)% of start level ± 1.0% of Ur at U ≤ Ur

± 1.0% of U at U > Ur
Operate value, high level (100–200)% of (Ubase/frated) ± 1.0% of U
Curve type IEEE or customer defined Class 5 + 40 ms
(0.18 × k )
IEEE : t =
( M - 1) 2
where M = relative (V/Hz) = (E/f)/

(Ur/fr)
Minimum time delay for inverse (0.000–60.000) s ± 0.5% ± 10 ms
function
Maximum time delay for inverse (0.00–9000.00) s ± 0.5% ± 10 ms
function
Alarm time delay (0.000–60.000) s ± 0.5% ± 10 ms

270
Section 8
Frequency protection
Section 8 Frequency protection
About this chapter

This chapter describes the frequency protection functions. The way the functions
work, their setting parameters, function blocks, input and output signals and technical
data are included for each function.
8.1 Underfrequency protection (PTUF, 81)
Function block name: TUFx-- IEC 60617 graphical symbol:

ANSI number: 81
SAPTUF f<
8.1.1 Introduction
Underfrequency occurs as a result of lack of generation in the network.
The function can be used for load shedding systems, remedial action schemes, gas
turbine start-up etc.
The function is provided with an undervoltage blocking. The operation may be based
on single phase, phase-to-phase or positive sequence voltage measurement.
Up to two independent under frequency steps are available.

The underfrequency (TUF) function is used to detect low power system frequency.
The function can either have a definite time delay or a voltage magnitude dependent
time delay. If the voltage magnitude dependent time delay is applied the time delay
will be longer if the voltage is higher and shorter if the voltage is lower. If the
frequency remains below the set value for a time period corresponding to the chosen
time delay, the corresponding trip signal is issued. To avoid an unwanted trip due to
uncertain frequency measurement at low voltage magnitude, a voltage controlled
blocking of the function is available, i.e. if the voltage is lower than the set blocking
voltage the function is blocked and no start or trip signal is issued.

Section 8
The fundamental frequency of the measured input voltage is measured continuously,

and compared with the set value, StartFrequency. The frequency function is also
dependent on the voltage magnitude. If the voltage magnitude decreases the setting
IntBlkStVal, the underfrequency function is blocked, and the output BLKDMAGN is
issued. All voltage settings are made in percent of the setting UBase, which should
be set as a phase-phase voltage in kV.
To avoid oscillations of the output start signal, a hysteresis has been included, see
8.1.2.2 Time delay
The time delay for the underfrequency function can be either a settable definite time
delay or a voltage magnitude dependent time delay, where the time delay depends on
the voltage level; a high voltage level gives a longer time delay and a low voltage
level causes a short time delay. For the definite time delay, the setting tTrip sets the
time delay, see figure 135and figure 136. For the voltage dependent time delay the
measured voltage level and the settings UNom, UMin, Exponent, tMax and tMin set
the time delay according to figure 137 and equation 66. The setting
TimerOperation is used to decide what type of time delay to apply. The output
STARTDUR, gives the time elapsed from the issue of the start output, in percent of
the total operation time available in PST.
Trip signal issuing requires that the underfrequency condition continues for at least
the user set time delay. If the start condition, with respect to the measured frequency
ceases during the delay time, and is not fulfilled again within a user defined reset
time, tReset, the start output is reset, after that the defined reset time has elapsed. Here
it should be noted that after leaving the hysteresis area, the start condition must be
fulfilled again and it is not sufficient for the signal to only return back to the hysteresis
area.
On the output of the underfrequency function a 100 ms pulse is issued, after a time
delay corresponding to the setting of TimeDlyRestore, when the measured frequency
returns to the level corresponding to the setting RestoreFreq.

Section 8
tReset
tReset
Frequency
START
Hysteresis Measured
TRIP Frequency
StartFrequency
Time
START tTRip
TRIP
Time Integrator
tTrip
Time
en05000721.vsd
Figure 135: Frequency profile not causing a reset of the start signal

Section 8
tReset
Frequency tReset
START START Hysteresis Measured
TRIP Frequency
StartFrequency
Time
START tTrip
TRIP
Time Integrator
tTrip
Time
en05000723.vsd
Figure 136: Frequency profile causing a reset of the start signal
8.1.2.3 Voltage dependent time delay
Since the fundamental frequency in a power system is the same all over the system,
except some deviations during power oscillations, another criterion is needed to
decide, where to take actions, based on low frequency. In many applications the
voltage level is very suitable, and in most cases is load shedding preferable in areas
with low voltage. Therefore, a voltage dependent time delay has been introduced, to
make sure that load shedding, or other actions, take place at the right location. At
constant voltage, U, the voltage dependent time delay is calculated according to
equation 66. At non-constant voltage, the actual time delay is integrated in a similar
way as for the inverse time characteristic for the undervoltage and overvoltage
functions.
Exponent
é U - UMin ù
t=ê × ( tMax - tMin ) + tMin
ë UNom - UMin úû (Equation 66)
where:
t is the voltage dependent time delay (at constant voltage),

Section 8
U is the measured voltage

Exponent is a setting,
UMin, UNom are voltage settings corresponding to
tMax, tMin are time settings.
The inverse time characteristics are shown in figure 137, for:
UMin = 90%
UNom = 100%
tMax = 1.0 s
tMin = 0.0 s
Exponent = 0, 1, 2, 3 and 4
1
0
1
Exponenent
TimeDlyOperate [s]
2
3
0.5 4
0
90 95 100
U [% of UBase]
en05000075.vsd
Figure 137: Voltage dependent inverse time characteristics for the

underfrequency function. The time delay to operate is plotted as a
function of the measured voltage, for the Exponent = 0, 1, 2, 3, 4
respectively.
8.1.2.4 Blocking
The underfrequency function can be partially or totally blocked, by binary input

signals or by parameter settings, where:

BLKTRIP: blocks the TRIP output
BLKREST: blocks the RESTORE output
If the measured voltage level decreases below the setting of IntBlkStVal, both the start
and the trip outputs, are blocked.

Section 8
8.1.2.5 Design
The frequency measuring element continuously measures the frequency of the

positive sequence voltage and compares it to the setting StartFrequency. The
frequency signal is filtered to avoid transients due to switchings and faults. The time
integrator can operate either due to a definite delay time or to the special voltage
dependent delay time. When the frequency has returned back to the setting of
RestoreFreq, the RESTORE output is issued after the time delay TimeDlyRestore.
The design of the underfrequency function is schematically described in figure 138.
Block
BLOCK BLKDMAGN
OR
Comparator
U < IntBlockLevel
Voltage Time integrator

Start
TimerOperation Mode & START
Selector START
Frequency Comparator Trip
f < StartFrequency Output
TimeDlyOperate TRIP Logic
TimeDlyReset TRIP
100 ms
Comparator RESTORE
TimeDlyRestore
f > RestoreFreq
en05000726.vsd
Figure 138: Schematic design of the underfrequency function

TUF1-
SAPTUF
U3P TRIP
BLOCK START
BLKTRIP RESTORE
BLKREST BLKDMAGN
en05000326.vsd
Figure 139: TUF function block

Section 8
Table 143: Input signals for the SAPTUF_81 (TUF1-) function block
Signal Description
BLKTRIP Blocking operate output.
BLKREST Blocking restore output.
Table 144: Output signals for the SAPTUF_81 (TUF1-) function block
Signal Description
TRIP Operate/trip signal for frequency.
START Start/pick-up signal for frequency.
RESTORE Restore signal for load restoring purposes.
BLKDMAGN Blocking indication due to low amplitude.
Table 145: Basic parameter group settings for the SAPTUF_81 (TUF1-) function
On
UBase 0.05 - 2000.00 0.05 400.00 kV Base setting for the
phase-phase voltage
in kV.
StartFrequency 35.00 - 75.00 0.01 48.80 Hz Frequency setting/
start value.
tTrip 0.000 - 60.000 0.001 0.200 s Operate time delay.
TimeDlyRestore 0.000 - 60.000 0.001 0.000 s Restore time delay.
RestoreFreq 45.00 - 65.00 0.01 50.10 Hz Restore frequency
level after operation.
TimerOperation Definite timer - Definite timer - Setting for choosing
Volt based timer timer mode.
UNom 50 - 150 1 100 %UB Nominal voltage in %
of UBase for voltage
based timer.
UMin 50 - 150 1 90 %UB Lower operation limit
in % of UBase for
voltage based timer.

Section 8

Exponent 1.0 0.1 0.0 - 5.0 - For calculation of the
curve form for voltage
based timer.
tMax 0.010 - 60.000 0.001 1.000 s Maximum time
operation limit for
tMin 0.010 - 60.000 0.001 1.000 s Minimum time
operation limit for
Table 146: Advanced parameter group settings for the SAPTUF_81 (TUF1-) function
IntBlkStVal 0 - 100 1 50 %UB Internal blocking level
in % of UBase.
tReset 0.000 - 60.000 0.001 0.000 s Time delay for reset.
8.2 Overfrequency protection (PTOF, 81)
Function block name: TOFx-- IEC 60617 graphical symbol:

ANSI number: 81
SAPTOF f>
8.2.1 Introduction
Overfrequency will occur at sudden load drops or shunt faults in the power network.
In some cases close to generating part governor problems can also cause
overfrequency.
The function can be used for generation shedding, remedial action schemes etc. It can
also be used as a sub-nominal frequency stage initiating load restoring.
Up to six independent frequency steps are available.

The Overfrequency (TOF) function is used to detect high power system frequency.
The function has a settable definite time delay. If the frequency remains above the

Section 8
set value for a time period corresponding to the chosen time delay, the corresponding
trip signal is issued. To avoid an unwanted trip due to uncertain frequency
measurement at low voltage magnitude, a voltage controlled blocking of the function
is available, i.e. if the voltage is lower than the set blocking voltage the function is
blocked and no start or trip signal is issued.
The fundamental frequency of the positive sequence voltage is measured

continuously, and compared with the set value, StartFrequency. The frequency
function is also dependent on the voltage magnitude. If the voltage magnitude
decreases below the setting IntBlkStVal, the overfrequency function is blocked, and
the output BLKDMAGN is issued. All voltage settings are made in percent of the
UBase, which should be set as a phase-phase voltage in kV. To avoid oscillations of
the output start signal, a hysteresis has been included, see section "Inverse
characteristics".
8.2.2.2 Time delay
The time delay for the overfrequency function is a settable definite time delay,
specified by the setting tTrip, see figure 140 and figure 141. The output STARTDUR,
gives the time elapsed from the issue of the start output, in percent of the total
operation time available in PST.
Trip signal issuing requires that the overfrequency condition continues for at least the
user set time delay. If the start condition, with respect to the measured frequency
ceases during the delay time, and is not fulfilled again within a user defined reset
time, tReset, the start output is reset, after that the defined reset time has elapsed. Here
it should be noted that after leaving the hysteresis area, the start condition must be
fulfilled again and it is not sufficient for the signal to only return back to the hysteresis
area.

Section 8
tReset
tReset
Frequency
START
TRIP
StartFrequency
Hysteresis Measured
Frequency
Time
START tTrip
TRIP
Time Integrator
tTrip
Time
en05000732.vsd
Figure 140: Frequency profile not causing a reset of the start signal

Section 8
tReset
Frequency tReset
START START TRIP
Hysteresis
StartFrequency
Measured
Frequency
Time
START tTrip
TRIP
Time Integrator
tTrip
Time
en05000733.vsd
Figure 141: Frequency profile causing a reset of the start signal
8.2.2.3 Blocking
The overfrequency function can be partially or totally blocked, by binary input signals
or by parameter settings, where:
TOF-BLOCK: blocks all outputs

TOF-BLKTRIP: blocks the TOF-TRIP output
If the measured voltage level decreases below the setting of IntBlkStVal, both the start
and the trip outputs, are blocked.
8.2.2.4 Design
The frequency measuring element continuously measures the frequency of the

positive sequence voltage and compares it to the setting StartFrequency. The
frequency signal is filtered to avoid transients due to switchings and faults in the

Section 8
power system. The time integrator operates due to a definite delay time. The design
of the overfrequency function is schematically described in figure 142.
BLOCK
BLKTRIP BLOCK
OR BLKDMAGN
Comparator
U < IntBlockLevel
Start
&
Trip
Voltage Time integrator Output
Logic
Definite Time Delay START START
Frequency Comparator
f > StartFrequency TimeDlyOperate
TRIP
TimeDlyReset
TRIP
en05000735.vsd
Figure 142: Schematic design of the overfrequency function

T OF1-
SAPTOF
U3P T RIP
BLOCK ST ART
BLKT RIP BLKDMAGN
en05000325.vsd
Figure 143: TOF function block
Table 147: Input signals for the SAPTOF_81 (TOF1-) function block
Signal Description

Section 8
Table 148: Output signals for the SAPTOF_81 (TOF1-) function block
Signal Description
TRIP Operate/trip signal for frequency.
START Start/pick-up signal for frequency.
BLKDMAGN Blocking indication due to low amplitude.
Table 149: Parameter group settings for the SAPTOF_81 (TOF1-) function
On
phase-phase voltage
in kV.
StartFrequency 35.00 - 75.00 0.01 51.20 Hz Frequency setting/
start value.
IntBlkStVall 0 - 100 1 50 %UB Internal blocking level
in % of UBase.
tTrip 0.000 - 60.000 0.001 0.000 s Operate time delay.
8.3 Rate-of-change frequency protection (PFRC,

81)
Function block name: RCFx-- IEC 60617 graphical symbol:

ANSI number: 81
SAPFRC df/dt >
<
8.3.1 Introduction
Rate of change of frequency function gives an early indication of a main disturbance
in the system.
The function can be used for generation shedding, load shedding, remedial action
schemes etc.

Section 8
Each step can discriminate between positive or negative change of frequency.
Up to six independent rate-of-change frequency steps are available.

The rate-of-change of frequency (RCF) function is used to detect fast power system
frequency changes, increase as well as decrease, at an early stage. The function has
a settable definite time delay. If the rate-of-change of frequency remains below the
set value, for negative rate-of-change, for a time period equal to the chosen time delay,
the trip signal is issued. If the rate-of-change of frequency remains above the set value,
for positive rate-of-change, for a time period equal to the chosen time delay, the trip
signal is issued. To avoid an unwanted trip due to uncertain frequency measurement
at low voltage magnitude, a voltage controlled blocking of the function is available,
i.e. if the voltage is lower than the set blocking voltage, the function is blocked and
no start or trip signal is issued. If the frequency recovers, after a frequency decrease,
a restore signal is issued.
The rate-of-change of the fundamental frequency of the selected voltage is measured

continuously, and compared with the set value, StartFreqGrad. The rate-of-change
of frequency function is also dependent on the voltage magnitude. If the voltage
magnitude decreases below the setting IntBlockLevel, the rate-of-change of frequency
function is blocked, and the output BLKDMAGN is issued. The sign of the setting
StartFreqGrad, controls if the rate-of-change of frequency function reacts on a
positive or on a negative change in frequency. If the rate-of-change of frequency
function is used for decreasing frequency, i.e. the setting StartFreqGrad has been
given a negative value, and a trip signal has been issued, then a 100 ms pulse is issued
on the RESTORE output, when the frequency recovers to a value higher than the
setting RestoreFreq. A positive setting of StartFreqGrad, sets the rate-of-change of
frequency function to start and trip for frequency increases.
To avoid oscillations of the output start signal, a hysteresis has been included, see
8.3.2.2 Time delay
The rate-of-change of frequency function has a settable definite time delay, tTrip.
The output STARTDUR, gives the time elapsed from the issue of the start output, in
percent of the total operation time.
Trip signal issuing requires that the rate-of-change of frequency condition continues
for at least the user set time delay, tTrip. If the start condition, with respect to the
measured frequency ceases during the delay time, and is not fulfilled again within a

Section 8
user defined reset time, tReset, the start output is reset, after that the defined reset
time has elapsed. Here it should be noted that after leaving the hysteresis area, the
start condition must be fulfilled again and it is not sufficient for the signal to only
return back into the hysteresis area, see figure 144-147.
The RESTORE output of the rate-of-change of frequency function is set, after a time
delay equal to the setting of tRestore, when the measured frequency has returned to
the level corresponding to RestoreFreq, after an issue of the TRIP output signal. If
tRestore is set to 0.000 s the restore functionality is disabled, and no output will be
given. The restore functionality is only active for lowering frequency conditions and
the restore sequence is disabled if a new negative frequency gradient is detected
during the restore period, defined by the settings RestoreFreq and tRestore.

Section 8
Rate-of-Change
of Frequency
Time
tReset
tReset
Measured Rate-of-
START Change of Frequency
Hysteresis
TRIP
StartFreqGrad
START tTrip
TRIP
Time Integrator
tTrip
Time
en05000727.vsd
Figure 144: Rate-of-change of frequency profile, set for frequency decrease conditions, not causing a reset of
the start signal

Section 8
Rate-of-Change
of Frequency
Time
tReset
tReset
START START Measured
Hysteresis Rate-of-Change
TRIP of Frequency
StartFreqGrad
START tTrip
TRIP
Time Integrator
tTrip
Time
en05000728.vsd
Figure 145: Frequency profile, set for frequency decrease conditions, causing a reset of the start signal

Section 8
tReset
Rate-of-Change
of Frequency tReset
START
TRIP
StartFreqGrad
Measured Rate-of-
Hysteresis
Change of Frequency
Time
START tTrip
TRIP
Time Integrator
tTrip
Time
en05000729.vsd
Figure 146: Rate-of-change of frequency profile, set for frequency increase conditions, not causing a reset of
the start signal

Section 8
Rate-of-Change
of Frequency tReset
tReset
START START TRIP
Hysteresis
StartFreqGrad
Measured
Rate-of-Change
of Frequency
Time
START tTrip
TRIP
Time Integrator
tTrip
Time
en05000730.vsd
Figure 147: Frequency profile, set for frequency increase conditions, causing a reset of the start signal
8.3.2.3 Blocking
The rate-of-change of frequency function can be partially or totally blocked, by binary

input signals or by parameter settings, where:

BLKTRIP: blocks the TRIP output
BLKREST: blocks the RESTORE output

Section 8
If the measured voltage level decreases below the setting of IntBlockLevel, both the
start and the trip outputs, are blocked.
8.3.2.4 Design
The rate-of-change of frequency measuring element continuously measures the

frequency of the selected voltage and compares it to the setting StartFreqGrad. The
frequency signal is filtered to avoid transients due to power system switchings and
faults. The time integrator operates with a definite delay time. When the frequency
has returned back to the setting of RestoreFreq, the RESTORE output is issued after
the time delay tRestore, if the TRIP signal has earlier been issued. The sign of the
setting StartFreqGrad is essential, and controls if the function is used for raising or
lowering frequency conditions. The design of the rate-of-change of frequency
function is schematically described in figure 148.
BLOCK
BLKTRIP
BLKRESET BLOCK
OR
Voltage Comparator BLKDMAGN

U < IntBlockLevel
Start
Rate-of-Change Time integrator &
Comparator
of Frequency Trip
If
Definite Time Delay Output
[StartFreqGrad<0 START START
Logic
AND
TimeDlyOperate
df/dt < StartFreqGrad]
OR
TimeDlyReset
[StartFreqGrad>0
AND
TRIP
df/dt > StartFreqGrad]
Then
START
100 ms
Frequency Comparator RESTORE

TimeDlyRestore
f > RestoreFreq
en05000835.vsd
Figure 148: Schematic design of the rate-of-change of frequency function

Section 8

RCF1-
SAPFRC
U3P T RIP
BLOCK ST ART
BLKT RIP REST ORE
BLKREST BLKDMAGN
en05000322.vsd
Figure 149: RCF function block
Table 150: Input signals for the SAPFRC_81 (RCF1-) function block
Signal Description
BLKREST Blocking restore output.
Table 151: Output signals for the SAPFRC_81 (RCF1-) function block
Signal Description
TRIP Operate/trip signal for frequencyGradient
START Start/pick-up signal for frequencyGradient
RESTORE Restore signal for load restoring purposes.
BLKDMAGN Blocking indication due to low amplitude
Table 152: Parameter group settings for the SAPFRC_81 (RCF1-) function
On
phase-phase voltage
in kV
StartFreqGrad -10.00 - 10.00 0.01 0.50 Hz/s Frequency gradient
start value. Sign
defines direction.
IntBlockLevel 0 - 100 1 50 %UB Internal blocking level
in % of UBase.

Section 8

tTrip 0.000 - 60.000 0.001 0.200 s Operate time delay in
pos./neg. frequency
gradient mode.
RestoreFreq 45.00 - 65.00 0.01 49.90 Hz Restore frequency if
frequency is above
frequency value (Hz)
tRestore 0.000 - 60.000 0.001 0.000 s Restore time delay.
Table 153: Rate-of-change frequency protection (PFRC, 81)

Operate value, start function (-10.00-10.00) Hz/s ± 10.0 mHz/s
Operate value, internal blocking (0-100)% of Ubase ± 1.0% of Ur
level
Operate time, start function 100 ms typically -

Section 9
Multipurpose protection
Section 9 Multipurpose protection
About this chapter

This chapter describes Multipurpose protection and includes the General current and
voltage function. The way the functions work, their setting parameters, function
blocks, input and output signals and technical data are included for each function.
9.1 General current and voltage protection (GAPC)
Function block name: GFxx- IEC 60617 graphical symbol:

ANSI number: 46, 51, 67, 51N, 67N, 27, 59, 21,
40
I< I>
IEC 61850 logical node name: CVGAPC
U< U>
9.1.1 Introduction
The function can be utilized as a negative sequence current protection detecting
unsymmetrical conditions such as open phase or unsymmetrical faults.
The function can also be used to improve phase selection for high resistive earth faults,
outside the distance protection reach, for the transmission line. Three functions are
used which measures the neutral current and each of the three phase voltages. This
will give an independence from load currents and this phase selection will be used in
conjunction with the detection of the earth fault from the directional earth fault
protection function.

Section 9
9.1.2.1 Measured quantities within the function
The function is always connected to three-phase current and three-phase voltage input
in the configuration tool, but it will always measure only one current and one voltage
quantity selected by the end user in the setting tool.
The user can select to measure one of the current quantities shown in table 154.
Table 154: Current selection for the GF function

Set value for the
parameter CurrentInput Comment
1 Phase1 GF function will measure the phase L1 current phasor
4 PosSeq GF function will measure internally calculated positive sequence current
phasor
5 NegSeq GF function will measure internally calculated negative sequence current
phasor
6 3ZeroSeq GF function will measure internally calculated zero sequence current
phasor multiplied by factor 3
7 MaxPh GF function will measure current phasor of the phase with maximum
magnitude
8 MinPh GF function will measure current phasor of the phase with minimum
magnitude
9 UnbalancePh GF function will measure magnitude of unbalance current, which is
internally calculated as the algebraic magnitude difference between the
current phasor of the phase with maximum magnitude and current phasor
of the phase with minimum magnitude. Phase angle will be set to 0° all
the time
10 Phase1-Phase2 GF function will measure the current phasor internally calculated as the
vector difference between the phase L1 current phasor and phase L2
current phasor (i.e. IL1-IL2)
13 MaxPh-Ph GF function will measure ph-ph current phasor with the maximum
magnitude
14 MinPh-Ph GF function will measure ph-ph current phasor with the minimum
magnitude
15 UnbalancePh-Ph GF function will measure magnitude of unbalance current, which is
ph-ph current phasor with maximum magnitude and ph-ph current phasor
with minimum magnitude. Phase angle will be set to 0° all the time
The user can select to measure one of the voltage quantities shown in table 155:

Section 9
Table 155: Voltage selection for the GF function

Set value for the
parameter Comment
VoltageInput
1 Phase1 GF function will measure the phase L1 voltage phasor
4 PosSeq GF function will measure internally calculated positive sequence voltage
phasor
5 -NegSeq GF function will measure internally calculated negative sequence voltage
phasor. This voltage phasor will be intentionally rotated for 180° in order
to enable easier settings for the directional feature when used.
6 -3ZeroSeq GF function will measure internally calculated zero sequence voltage
phasor multiplied by factor 3. This voltage phasor will be intentionally
rotated for 180° in order to enable easier settings for the directional
feature when used.
7 MaxPh GF function will measure voltage phasor of the phase with maximum
magnitude
8 MinPh GF function will measure voltage phasor of the phase with minimum
magnitude
9 UnbalancePh GF function will measure magnitude of unbalance voltage, which is
voltage phasor of the phase with maximum magnitude and voltage
phasor of the phase with minimum magnitude. Phase angle will be set to
0° all the time
10 Phase1-Phase2 GF function will measure the voltage phasor internally calculated as the
vector difference between the phase L1 voltage phasor and phase L2
voltage phasor (i.e. UL1-UL2)
13 MaxPh-Ph GF function will measure ph-ph voltage phasor with the maximum
magnitude
14 MinPh-Ph GF function will measure ph-ph voltage phasor with the minimum
magnitude
15 UnbalancePh-Ph GF function will measure magnitude of unbalance voltage, which is
ph-ph voltage phasor with maximum magnitude and ph-ph voltage
phasor with minimum magnitude. Phase angle will be set to 0° all the time
It is important to notice that the voltage selection from table 155 is always applicable
regardless the actual external VT connections. The three-phase VT inputs can be
connected to IED as either three phase-to-ground voltages UL1, UL2 & UL3 or three
phase-to-phase voltages UL1L2, UL2L3 & UL3L1). This information about actual VT
connection is entered as a setting parameter for the pre-processing block, which will
then take automatic care about it.

Section 9
The user can select one of the current quantities shown in table 156 for built-in current
restraint feature:
Table 156: Restraint current selection for the GF function

Set value for the
parameter RestrCurr Comment
1 PosSeq GF function will measure internally calculated positive sequence current
phasor
2 NegSeq GF function will measure internally calculated negative sequence current
phasor
3 3ZeroSeq GF function will measure internally calculated zero sequence current
phasor multiplied by factor 3
4 MaxPh GF function will measure current phasor of the phase with maximum
magnitude
9.1.2.2 Base quantities for GF function
The parameter settings for the base quantities, which represent the base (i.e. 100%)
for pickup levels of all measuring stages shall be entered as setting parameters for
every GF function.
Base current shall be entered as:
1. rated phase current of the protected object in primary amperes, when the
measured Current Quantity is selected from 1 to 9, as shown in table 154.
2. rated phase current of the protected object in primary amperes multiplied by √3
(i.e. 1,732 x Iphase), when the measured Current Quantity is selected from 10 to
15, as shown in table 154.
Base voltage shall be entered as:
1. rated phase-to-ground voltage of the protected object in primary kV, when the
measured Voltage Quantity is selected from 1 to 9, as shown in table 155.
2. rated phase-to-phase voltage of the protected object in primary kV, when the
measured Voltage Quantity is selected from 10 to 15, as shown in table 155.
9.1.2.3 Built-in overcurrent protection steps
Two overcurrent protection steps are available. They are absolutely identical and
therefore only one will be explained here.
Overcurrent step simply compares the magnitude of the measured current quantity
(see table 154) with the set pickup level. Non-directional overcurrent step will pickup
if the magnitude of the measured current quantity is bigger than this set level. Reset
ratio is settable, with default value of 0.96. However depending on other enabled
built-in features this overcurrent pickup might not cause the overcurrent step start
signal. Start signal will only come if all of the enabled built-in features in the
overcurrent step are fulfilled at the same time.

Section 9
Second harmonic feature

The overcurrent protection step can be restrained by a second harmonic component
in the measured current quantity (see table 154). However it shall be noted that this
feature is not applicable when one of the following measured currents is selected:
• PosSeq (i.e. positive sequence current)

• NegSeq (i.e. negative sequence current)
• UnbalancePh (i.e. unbalance phase current)
• UnbalancePh-Ph (i.e. unbalance ph-ph current)
This feature will simple prevent overcurrent step start if the second-to-first harmonic
ratio in the measured current exceeds the set level.
Directional feature
The overcurrent protection step operation can be can be made dependent on the
relevant phase angle between measured current phasor (see table 154) and measured
voltage phasor (see table 155). In protection terminology it means that the PGPF
function can be made directional by enabling this built-in feature. In that case
overcurrent protection step will only operate if the current flow is in accordance with
the set direction (i.e. Forward, which means towards the protected object, or
Reverse, which means from the protected object). For this feature it is of the outmost
importance to understand that the measured voltage phasor (see table 155) and
measured current phasor (see table 154) will be used for directional decision.
Therefore it is the sole responsibility of the end user to select the appropriate current
and voltage signals in order to get a proper directional decision. The PGPF function
will NOT do this automatically. It will just simply use the current and voltage phasors
selected by the end user to check for the directional criteria.
Table 157 gives an overview of the typical choices (but not the only possible ones)
for these two quantities for traditional directional relays.
Table 157: Typical current and voltage choices for directional feature
Set value for the Set value for the
parameter CurrentInput parameter Comment
VoltageInput
PosSeq PosSeq Directional positive sequence overcurrent function is
obtained. Typical setting for RCADir is from -45° to -90°
depending on the power
NegSeq -NegSeq Directional negative sequence overcurrent function is
obtained. Typical setting for RCADir is from -45° to -90°
depending on the power system voltage level (i.e. X/R
ratio)
3ZeroSeq -3ZeroSeq Directional zero sequence overcurrent function is
obtained. Typical setting for RCADir is from 0° to -90°
depending on the power system earthing (i.e. solidly
earthed, earthed via resistor, etc.)
Phase1 Phase2-Phase3 Directional overcurrent function for the first phase is
obtained. Typical setting for RCADir is +30° or +45°
Phase2 Phase3-Phase1 Directional overcurrent function for the second phase
is obtained. Typical setting for RCADir is +30° or +45°
Phase3 Phase1-Phase2 Directional overcurrent function for the third phase is
obtained. Typical setting for RCADir is +30° or +45°

Section 9
Unbalance current or voltage measurement shall not be used when the directional
feature is enabled.
Two types of directional measurement principles are available, I & U and

IcosPhi&U. The first principle, referred to as "I & U" in the parameter setting tool,
checks that:
• the magnitude of the measured current is bigger than the set pick-up level
• the phasor of the measured current is within the operating region (defined by the
relay operate angle, ROADir parameter setting; see figure 150).
U=-3U0
RCADir
Ipickup ROADir I=3Io
Operate region
mta line
en05000252.vsd
Figure 150: I & U directional operating principle for the GF function
where:
RCADir is -75°
ROADir is 50°
The second principle, referred to as "IcosPhi&U" in the parameter setting tool, checks
that:

Section 9
• that the product I·cos(Φ) is bigger than the set pick-up level, where Φ is angle
between the current phasor and the mta line
• that the phasor of the measured current is within the operating region (defined
by the I·cos(Φ) straight line and the relay operate angle, ROADir parameter
setting; see figure 150).
U=-3U0
RCADir
Ipickup ROADir F I=3Io
Operate region
mta line
en05000253.vsd
Figure 151: GF, IcosPhi&U directional operating principle
where:
RCADir is -75°
ROADir is 50°
Note that it is possible to decide by a parameter setting how the directional feature
shall behave when the magnitude of the measured voltage phasor falls below the pre-
set value. User can select one of the following three options:
• Non-directional (i.e. operation allowed for low magnitude of the reference

voltage)
• Block (i.e. operation prevented for low magnitude of the reference voltage)
• Memory (i.e. memory voltage shall be used to determine direction of the current)
It shall also be noted that the memory duration is limited in the algorithm to 100 ms.
After that time the current direction will be locked to the one determined during
memory time and it will re-set only if the current fails below set pickup level or voltage
goes above set voltage memory limit.
Voltage restraint/control feature

The overcurrent protection step operation can be can be made dependent of a
measured voltage quantity (see table 155). Practically then the pickup level of the
overcurrent step is not constant but instead decreases with the decrease in the
magnitude of the measured voltage quantity. Two different types of dependencies are
available:

Section 9
• Voltage restraint overcurrent (when setting parameter

VDepMode_OC1=Slope)
OC1 Stage Pickup Level
StartCurr_OC1
VDepFact_OC1 * StartCurr_OC1
ULowLimit_OC1 UHighLimit_OC1
Selected Voltage
Magnitude
en05000324.vsd
Figure 152: Example for OC1 step current pickup level variation as function of
measured voltage magnitude in Slope mode of operation
• Voltage controlled overcurrent (when setting parameter

VDepMode_OC1=Step has value = step)
OC1 Stage Pickup Level
StartCurr_OC1
VDepFact_OC1 * StartCurr_OC1
UHighLimit_OC1 Selected Voltage Magnitude
en05000323.vsd
Figure 153: Example for OC1 step current pickup level variation as function of
measured voltage magnitude in Step mode of operation
This feature will simple change the set overcurrent pickup level in accordance with
magnitude variations of the measured voltage. It shall be noted that this feature will

Section 9
as well affect the pickup current value for calculation of operate times for IDMT
curves (i.e. overcurrent with IDMT curve will operate faster during low voltage
conditions).
Current restraint feature

The overcurrent protection step operation can be can be made dependent of a
restraining current quantity (see table 156). Practically then the pickup level of the
overcurrent step is not constant but instead increases with the increase in the
magnitude of the restraining current.
IMeasured
ea ain
ar tr
te es
ra *I r
pe eff
O t rCo
es
I>R
IsetHigh
IsetLow
atan(RestrCoeff)
Restraint
en05000255.vsd
Figure 154: Current pickup variation with restraint current magnitude
This feature will simple prevent overcurrent step to start if the magnitude of the
measured current quantity is smaller than the set percentage of the restrain current
magnitude. However this feature will not affect the pickup current value for
calculation of operate times for IDMT curves. This means that the IDMT curve
operate time will not be influenced by the restrain current magnitude.
When set, the start signal will start definite time delay or inverse (i.e. IDMT) time
delay in accordance with the end user setting. If the start signal has value one for
longer time than the set time delay, the overcurrent step will set its trip signal to one.
Reset of the start and trip signal can be instantaneous or time delay in accordance
with the end user setting.
9.1.2.4 Built-in undercurrent protection steps
Two undercurrent protection steps are available. They are absolutely identical and
therefore only one will be explained here. Undercurrent step simply compares the
magnitude of the measured current quantity (see table 154) with the set pickup level.
The undercurrent step will pickup and set its start signal to one if the magnitude of
the measured current quantity is smaller than this set level. The start signal will start
definite time delay with set time delay. If the start signal has value one for longer

Section 9
time than the set time delay the undercurrent step will set its trip signal to one. Reset
of the start and trip signal can be instantaneous or time delay in accordance with the
setting.
9.1.2.5 Built-in overvoltage protection steps
Two overvoltage protection steps are available. They are absolutely identical and
Overvoltage step simply compares the magnitude of the measured voltage quantity
(see table 155) with the set pickup level. The overvoltage step will pickup if the
magnitude of the measured voltage quantity is bigger than this set level. Reset ratio
is settable, with default value of 0.99.
The start signal will start definite time delay or inverse (i.e. IDMT) time delay in
accordance with the end user setting. If the start signal has value one for longer time
than the set time delay, the overvoltage step will set its trip signal to one. Reset of the
start and trip signal can be instantaneous or time delay in accordance with the end
user setting.
9.1.2.6 Built-in undervoltage protection steps
Two undervoltage protection steps are available. They are absolutely identical and
Undervoltage step simply compares the magnitude of the measured voltage quantity
(see table 155 with the set pickup level. The undervoltage step will pickup if the
magnitude of the measured voltage quantity is smaller than this set level. Reset ratio
is settable, with default value of 1.01.
The start signal will start definite time delay or inverse (i.e. IDMT) time delay in
accordance with the end user setting. If the start signal has value one for longer time
than the set time delay, the undervoltage step will set its trip signal to one. Reset of
the start and trip signal can be instantaneous or time delay in accordance with the end
user setting.
The simplified internal logics, for the PGPF function are shown in the following
figures.

Section 9
REx670
ADM PGPF function
Current and voltage selection

settings
Phasor calculation of
scaling with CT ratio
individual currents
A/D conversion
Selection of which current Selected current

and voltage shall be given to
Phasors &
samples
the built-in protection Selected voltage
elements
Restraint current selection
Selected restraint current

A/D conversion scaling
Selection of restraint current

Phasor calculation of
individual voltages
with CT ratio
Phasors &
samples
en05000169.vsd
Figure 155: Treatment of measured currents within IED for PGPF function
Figure 155 shows how internal treatment of measured currents is done for
multipurpose protection function
The following currents and voltages are inputs to the multipurpose protection
function. They must all be expressed in true power system (primary) Amperes and
kilovolts.
1. Instantaneous values (samples) of currents & voltages from one three-phase

current and one three-phase voltage input.
2. Fundamental frequency phasors from one three-phase current and one three-
phase voltage input calculated by the pre-processing modules.
3. Sequence currents & voltages from one three-phase current and one three-phase
voltage input calculated by the pre-processing modules.
The multipurpose protection function:
1. Selects one current from the three phase input system (see table "") for internally
measured current.
2. Selects one voltage from the three phase input system (see table "") for internally
measured voltage.
3. Selects one current from the three phase input system (see table "") for internally
measured restraint current.

Section 9
CURRENT
UC1
nd TRUC1
2 Harmonic
Selected current restraint
STUC2
UC2
TRUC2
2nd Harmonic
restraint
STOC1
OC1 TROC1
2nd Harmonic BLK2ND

restraint ³1
Selected restraint current
Current restraint
DIROC1
Directionality
Voltage control /
restraint
STOC2
OC2 TROC2
2nd Harmonic
restraint
Current restraint ³1
UDIRLOW
Directionality DIROC2
Voltage control /
restraint
STOV1
OV1 TROV1
STOV2
OV2 TROV2
STUV1
Selected voltage
UV1 TRUV1
STUV2
UV2 TRUV2
VOLTAGE
en05000170.vsd
Figure 156: PGPF function main logic diagram for built in protection elements

Section 9
Logic in figure 156 can be summarized as follows:
1. The selected currents and voltage are given to built-in protection elements. Each
protection element and step makes independent decision about status of its
START and TRIP output signals.
2. More detailed internal logic for every protection element is given in the following
four figures
3. Common START and TRIP signals from all built-in protection elements & steps
(internal OR logic) are available from multipurpose function as well.
Enable
second
harmonic Second
harmonic check
1 DEF time BLKTROC
selected DEF 1 TROC1
AND
OR
Selected current a
a>b
b
OC1=On STOC1
AND
StartCurr_OC1 BLKOC1
X
Inverse
Voltage Directionality DIR_OK Inverse

control or time
check selected
restraint
feature
Selected voltage
Current
Restraint
Feature
Selected restrain current Imeasured > k Irestraint
en05000831.vsd
Figure 157: Simplified internal logic diagram for built-in first overcurrent step i.e. OC1 (step OC2 has the same
internal logic)

Section 9
Bin input: BLKUC1TR
Selected current a TRUC1

b>a
DEF AND
b
StartCurr_UC1
AND
Operation_UC1=On
STUC1
Bin input: BLKUC1
en05000750.vsd
Figure 158: Simplified internal logic diagram for built-in first undercurrent step i.e. UC1 (step UC2 has the same
internal logic)
DEF time BLKTROV1

selected DEF TROV1
AND
OR
Selected voltage a
a>b
b STOV1
StartVolt_OV1
AND
Inverse
Operation_OV1=On
Inverse time
BLKOV1 selected
en05000751.vsd
Figure 159: Simplified internal logic diagram for built-in first overvoltage step i.e.OV1 (step OV2 has the same
internal logic)

Section 9
DEF time BLKTRUV

selected DEF 1 TRUV1
AND
OR
Selected voltage a
b>a
b STUV1
AND
StartVolt_UV1
Inverse
Operation_UV1=On
Inverse time
BLKUV1 selected
en05000752.vsd
Figure 160: Simplified internal logic diagram for built-in first undervoltage step i.e.UV1 (step UV2 has the same
internal logic)

GF01-
CVGAPC
I3P TRIP
U3P TROC1
BLOCK TROC2
BLKOC1 TRUC1
BLKOC1TR TRUC2
ENMLTOC1 TROV1
BLKOC2 TROV2
BLKOC2TR TRUV1
ENMLTOC2 TRUV2
BLKUC1 START
BLKUC1TR STOC1
BLKUC2 STOC2
BLKUC2TR STUC1
BLKOV1 STUC2
BLKOV1TR STOV1
BLKOV2 STOV2
BLKOV2TR STUV1
BLKUV1 STUV2
BLKUV1TR BLK2ND
BLKUV2 DIROC1
BLKUV2TR DIROC2
UDIRLOW
CURRENT
ICOSFI
VOLTAGE
UIANGLE
en05000372.vsd
Figure 161: GF function block

Section 9
Table 158: Input signals for the CVGAPC (GF01-) function block
Signal Description
BLKOC1 Block of over current function OC1
BLKOC1TR Block of trip for over current function OC1
ENMLTOC1 When activated, the current multiplier is in use for OC1
BLKOC2 Block of over current function OC2
BLKOC2TR Block of trip for over current function OC2
ENMLTOC2 When activated, the current multiplier is in use for OC2
BLKUC1 Block of under current function UC1
BLKUC1TR Block of trip for under current function UC1
BLKUC2 Block of under current function UC2
BLKUC2TR Block of trip for under current function UC2
BLKOV1 Block of over voltage function OV1
BLKOV1TR Block of trip for over voltage function OV1
BLKOV2 Block of over voltage function OV2
BLKOV2TR Block of trip for over voltage function OV2
BLKUV1 Block of under voltage function UV1
BLKUV1TR Block of trip for under voltage function UV1
BLKUV2 Block of under voltage function UV2
BLKUV2TR Block of trip for under voltage function UV2
Table 159: Output signals for the CVGAPC (GF01-) function block
Signal Description
TRIP General trip signal
TROC1 Trip signal from overcurrent function OC1
TROC2 Trip signal from overcurrent function OC2
TRUC1 Trip signal from undercurrent function UC1
TRUC2 Trip signal from undercurrent function UC2
TROV1 Trip signal from overvoltage function OV1
TROV2 Trip signal from overvoltage function OV2
TRUV1 Trip signal from undervoltage function UV1
TRUV2 Trip signal from undervoltage function UV2
STOC1 Start signal from overcurrent function OC1
STOC2 Start signal from overcurrent function OC2
STUC1 Start signal from undercurrent function UC1

Section 9
Signal Description
STUC2 Start signal from undercurrent function UC2
STOV1 Start signal from overvoltage function OV1
STOV2 Start signal from overvoltage function OV2
STUV1 Start signal from undervoltage function UV1
STUV2 Start signal from undervoltage function UV2
BLK2ND Block from second harmonic detection
DIROC1 Directional mode of OC1 (nondir, forward,reverse)
DIROC2 Directional mode of OC2 (nondir, forward,reverse)
UDIRLOW Low voltage for directional polarization
CURRENT Measured current value
ICOSFI Measured current multiplied with cos (Phi)
VOLTAGE Measured voltage value
UIANGLE Angle between voltage and current
Table 160: Basic parameter group settings for the CVGAPC (GF01-) function
On
CurrentInput phase1 - MaxPh - Select current signal
phase2 which will be
phase3 measured inside
PosSeq function
NegSeq
3*ZeroSeq
MaxPh
MinPh
UnbalancePh
phase1-phase2
phase2-phase3
phase3-phase1
MaxPh-Ph
MinPh-Ph
UnbalancePh-Ph
IBase 1 - 99999 1 3000 A Base Current

Section 9

VoltageInput phase1 - MaxPh - Select voltage signal
phase2 which will be
phase3 measured inside
PosSeq function
-NegSeq
-3*ZeroSeq
MaxPh
MinPh
UnbalancePh
phase1-phase2
phase2-phase3
phase3-phase1
MaxPh-Ph
MinPh-Ph
UnbalancePh-Ph
UBase 0.05 - 2000.00 0.05 400.00 kV Base Voltage
OperHarmRestr Off - Off - Operation of 2nd
On harmonic restrain Off /
On
l_2nd/l_fund 10.0 - 50.0 1.0 20.0 % Ratio of second to
fundamental current
harmonic in %
BlkLevel2nd 10 - 5000 1 5000 %IB Harm analyse
disabled above this
Ibase
EnRestrainCurr Off - Off - Enable current
On restrain function On /
Off
RestrCurrInput PosSeq - PosSeq - Select current signal
NegSeq which will be used for
3*ZeroSeq curr restrain
Max
RestrCurrCoeff 0.00 0.01 0.00 - 5.00 - Restraining current
coefficient
RCADir -180 - 180 1 -75 Deg Relay Characteristic
Angle
ROADir 1 - 90 1 75 Deg Relay Operate Angle
LowVolt_VM 0.0 - 5.0 0.1 0.5 %UB Below this level in %
of Ubase setting
ActLowVolt takes
over
Operation_OC1 Off - Off - Operation OC1 Off /
On On
StartCurr_OC1 2.0 - 5000.0 1.0 120.0 %IB Operate current level
for OC1 in % of Ibase

Section 9

CurveType_OC1 ANSI Ext. inv. - ANSI Def. Time - Selection of time
ANSI Norm. inv. OC1
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
tDef_OC1 0.00 - 6000.00 0.01 0.50 s Independent
of OC1
k_OC1 0.30 0.01 0.05 - 999.00 - Time multiplier for the
for OC1
tMin_OC1 0.00 - 6000.00 0.01 0.05 s Minimum operate
time for IEC IDMT
curves for OC1
VCntrlMode_OC1 Voltage control - Off - Control mode for
Input control voltage controlled
Volt/Input control OC1 function
Off
VDepMode_OC1 Step - Step - Voltage dependent
Slope mode OC1 (step,
slope)
VDepFact_OC1 1.00 0.01 0.02 - 5.00 - Multiplying factor for I
pickup when OC1 is U
dependent
ULowLimit_OC1 1.0 - 200.0 0.1 50.0 %UB Voltage low limit
setting OC1 in % of
Ubase
UHighLimit_OC1 1.0 - 200.0 0.1 100.0 %UB Voltage high limit
setting OC1 in % of
Ubase
HarmRestr_OC1 Off - Off - Enable block of OC1
On by 2nd harmonic
restrain
DirMode_OC1 Non-directional - Non-directional - Directional mode of
Forward OC1 (nondir,
Reverse forward,reverse)
DirPrinc_OC1 I&U - I&U - Measuring on IandU
IcosPhi&U or IcosPhiandU for
OC1
ActLowVolt1_VM Non-directional - Non-directional - Low voltage level
Block action for Dir_OC1
Memory (Nodir, Blk, Mem)

Section 9

Operation_OC2 Off - Off - Operation OC2 Off /
On On
StartCurr_OC2 2.0 - 5000.0 1.0 120.0 %IB Operate current level
for OC2 in % of Ibase
CurveType_OC2 ANSI Ext. inv. - ANSI Def. Time - Selection of time
ANSI Norm. inv. OC2
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
tDef_OC2 0.00 - 6000.00 0.01 0.50 s Independent
of OC2
k_OC2 0.30 0.01 0.05 - 999.00 - Time multiplier for the
for OC2
tMin_OC2 0.00 - 6000.00 0.01 0.05 s Minimum operate
time for IEC IDMT
curves for OC2
VCntrlMode_OC2 Voltage control - Off - Control mode for
Input control voltage controlled
Volt/Input control OC2 function
Off
VDepMode_OC2 Step - Step - Voltage dependent
Slope mode OC2 (step,
slope)
VDepFact_OC2 1.00 0.01 0.02 - 5.00 - Multiplying factor for I
pickup when OC2 is U
dependent
ULowLimit_OC2 1.0 - 200.0 0.1 50.0 %UB Voltage low limit
setting OC2 in % of
Ubase
UHighLimit_OC2 1.0 - 200.0 0.1 100.0 %UB Voltage high limit
setting OC2 in % of
Ubase
HarmRestr_OC2 Off - Off - Enable block of OC2
On by 2nd harmonic
restrain
DirMode_OC2 Non-directional - Non-directional - Directional mode of
Forward OC2 (nondir,
Reverse forward,reverse)
DirPrinc_OC2 I&U - I&U - Measuring on IandU
IcosPhi&U or IcosPhiandU for
OC2

Section 9

ActLowVolt2_VM Non-directional - Non-directional - Low voltage level
Block action for Dir_OC2
Memory (Nodir, Blk, Mem)
Operation_UC1 Off - Off - Operation UC1 Off /
On On
EnBlkLowI_UC1 Off - Off - Enable internal low
On current level blocking
for UC1
BlkLowCurr_UC1 0 - 150 1 20 %IB Internal low current
blocking level for UC1
in % of Ibase
StartCurr_UC1 2.0 - 150.0 1.0 70.0 %IB Operate undercurrent
level for UC1 in % of
Ibase
tDef_UC1 0.00 - 6000.00 0.01 0.50 s Independent
of UC1
tResetDef_UC1 0.00 - 6000.00 0.01 0.00 s Reset time delay used
curve UC1
HarmRestr_UC1 Off - Off - Enable block of UC1
On by 2nd harmonic
restrain
Operation_UC2 Off - Off - Operation UC2 Off /
On On
EnBlkLowI_UC2 Off - Off - Enable internal low
On current level blocking
for UC2
BlkLowCurr_UC2 0 - 150 1 20 %IB Internal low current
blocking level for UC2
in % of Ibase
StartCurr_UC2 2.0 - 150.0 1.0 70.0 %IB Operate undercurrent
level for UC2 in % of
Ibase
tDef_UC2 0.00 - 6000.00 0.01 0.50 s Independent
of UC2
HarmRestr_UC2 Off - Off - Enable block of UC2
On by 2nd harmonic
restrain
Operation_OV1 Off - Off - Operation OV1 Off /
On On
StartVolt_OV1 2.0 - 200.0 0.1 150.0 %UB Operate voltage level
for OV1 in % of Ubase
CurveType_OV1 Definite time - Definite time - Selection of time
Inverse curve A delay curve type for
Inverse curve B OV1
Inverse curve C
Prog. inv. curve
tDef_OV1 0.00 - 6000.00 0.01 1.00 s Operate time delay in
sec for definite time
use of OV1

Section 9

tMin_OV1 0.00 - 6000.00 0.01 0.05 s Minimum operate
time for IDMT curves
for OV1
k_OV1 0.30 0.01 0.05 - 999.00 - Time multiplier for the
for OV1
Operation_OV2 Off - Off - Operation OV2 Off /
On On
StartVolt_OV2 2.0 - 200.0 0.1 150.0 %UB Operate voltage level
for OV2 in % of Ubase
CurveType_OV2 Definite time - Definite time - Selection of time
Inverse curve B OV2
Inverse curve C
Prog. inv. curve
tDef_OV2 0.00 - 6000.00 0.01 1.00 s Operate time delay in
use of OV2
tMin_OV2 0.00 - 6000.00 0.01 0.05 s Minimum operate
for OV2
k_OV2 0.30 0.01 0.05 - 999.00 - Time multiplier for the
for OV2
Operation_UV1 Off - Off - Operation UV1 Off /
On On
StartVolt_UV1 2.0 - 150.0 0.1 50.0 %UB Operate undervoltage
level for UV1 in % of
Ubase
CurveType_UV1 Definite time - Definite time - Selection of time
Inverse curve B UV1
Prog. inv. curve
tDef_UV1 0.00 - 6000.00 0.01 1.00 s Operate time delay in
use of UV1
tMin_UV1 0.00 - 6000.00 0.01 0.05 s Minimum operate
for UV1
k_UV1 0.30 0.01 0.05 - 999.00 - Time multiplier for the
for UV1
EnBlkLowV_UV1 Off - On - Enable internal low
On voltage level blocking
for UV1
BlkLowVolt_UV1 0.0 - 5.0 0.1 0.5 %UB Internal low voltage
blocking level for UV1
in % of Ubase
Operation_UV2 Off - Off - Operation UV2 Off /
On On
StartVolt_UV2 2.0 - 150.0 0.1 50.0 %UB Operate undervoltage
level for UV2 in % of
Ubase

Section 9

CurveType_UV2 Definite time - Definite time - Selection of time
Inverse curve B UV2
Prog. inv. curve
tDef_UV2 0.00 - 6000.00 0.01 1.00 s Operate time delay in
use of UV2
tMin_UV2 0.00 - 6000.00 0.01 0.05 s Minimum operate
for UV2
k_UV2 0.30 0.01 0.05 - 999.00 - Time multiplier for the
for UV2
EnBlkLowV_UV2 Off - On - Enable internal low
On voltage level blocking
for UV2
BlkLowVolt_UV2 0.0 - 5.0 0.1 0.5 %UB Internal low voltage
blocking level for UV2
in % of Ubase
Table 161: Advanced parameter group settings for the CVGAPC (GF01-) function
CurrMult_OC1 2.0 0.1 1.0 - 10.0 - Multiplier for scaling
the current setting
value for OC1
ResCrvType_OC1 Instantaneous - Instantaneous - Selection of reset
IEC Reset curve type for OC1
ANSI reset
tResetDef_OC1 0.00 - 6000.00 0.01 0.00 s Reset time delay used
curve OC1
P_OC1 0.020 0.001 0.001 - 10.000 - Parameter P for
customer
programmable curve
for OC1
A_OC1 0.140 0.001 0.000 - 999.000 - Parameter A for
customer
programmable curve
for OC1
B_OC1 0.000 0.001 0.000 - 99.000 - Parameter B for
customer
programmable curve
for OC1
C_OC1 1.000 0.001 0.000 - 1.000 - Parameter C for
customer
programmable curve
for OC1
PR_OC1 0.500 0.001 0.005 - 3.000 - Parameter PR for
customer
programmable curve
for OC1

Section 9

TR_OC1 13.500 0.001 0.005 - 600.000 - Parameter TR for
customer
programmable curve
for OC1
CR_OC1 1.0 0.1 0.1 - 10.0 - Parameter CR for
customer
programmable curve
for OC1
CurrMult_OC2 2.0 0.1 1.0 - 10.0 - Multiplier for scaling
the current setting
value for OC2
ResCrvType_OC2 Instantaneous - Instantaneous - Selection of reset
IEC Reset curve type for OC2
ANSI reset
tResetDef_OC2 0.00 - 6000.00 0.01 0.00 s Reset time delay used
curve OC2
P_OC2 0.020 0.001 0.001 - 10.000 - Parameter P for
customer
programmable curve
for OC2
A_OC2 0.140 0.001 0.000 - 999.000 - Parameter A for
customer
programmable curve
for OC2
B_OC2 0.000 0.001 0.000 - 99.000 - Parameter B for
customer
programmable curve
for OC2
C_OC2 1.000 0.001 0.000 - 1.000 - Parameter C for
customer
programmable curve
for OC2
PR_OC2 0.500 0.001 0.005 - 3.000 - Parameter PR for
customer
programmable curve
for OC2
TR_OC2 13.500 0.001 0.005 - 600.000 - Parameter TR for
customer
programmable curve
for OC2
CR_OC2 1.0 0.1 0.1 - 10.0 - Parameter CR for
customer
programmable curve
for OC2
tResetDef_UC2 0.00 - 6000.00 0.01 0.00 s Reset time delay used
curve UC2
ResCrvType_OV1 Instantaneous - Instantaneous - Selection of reset
Frozen timer curve type for OV1
Linearly
decreased
tResetDef_OV1 0.00 - 6000.00 0.01 0.00 s Reset time delay in
use of OV1

Section 9

tResetIDMT_OV1 0.00 - 6000.00 0.01 0.00 s Reset time delay in
sec for IDMT curves
for OV1
A_OV1 0.140 0.001 0.005 - 999.000 - Parameter A for
customer
programmable curve
for OV1
B_OV1 1.000 0.001 0.500 - 99.000 - Parameter B for
customer
programmable curve
for OV1
C_OV1 1.000 0.001 0.000 - 1.000 - Parameter C for
customer
programmable curve
for OV1
D_OV1 0.000 0.001 0.000 - 10.000 - Parameter D for
customer
programmable curve
for OV1
P_OV1 0.020 0.001 0.001 - 10.000 - Parameter P for
customer
programmable curve
for OV1
ResCrvType_OV2 Instantaneous - Instantaneous - Selection of reset
Frozen timer curve type for OV2
Linearly
decreased
tResetDef_OV2 0.00 - 6000.00 0.01 0.00 s Reset time delay in
use of OV2
tResetIDMT_OV2 0.00 - 6000.00 0.01 0.00 s Reset time delay in
sec for IDMT curves
for OV2
A_OV2 0.140 0.001 0.005 - 999.000 - Parameter A for
customer
programmable curve
for OV2
B_OV2 1.000 0.001 0.500 - 99.000 - Parameter B for
customer
programmable curve
for OV2
C_OV2 1.000 0.001 0.000 - 1.000 - Parameter C for
customer
programmable curve
for OV2
D_OV2 0.000 0.001 0.000 - 10.000 - Parameter D for
customer
programmable curve
for OV2
P_OV2 0.020 0.001 0.001 - 10.000 - Parameter P for
customer
programmable curve
for OV2

Section 9

ResCrvType_UV1 Instantaneous - Instantaneous - Selection of reset
Frozen timer curve type for UV1
Linearly
decreased
tResetDef_UV1 0.00 - 6000.00 0.01 0.00 s Reset time delay in
use of UV1
tResetIDMT_UV1 0.00 - 6000.00 0.01 0.00 s Reset time delay in
sec for IDMT curves
for UV1
A_UV1 0.140 0.001 0.005 - 999.000 - Parameter A for
customer
programmable curve
for UV1
B_UV1 1.000 0.001 0.500 - 99.000 - Parameter B for
customer
programmable curve
for UV1
C_UV1 1.000 0.001 0.000 - 1.000 - Parameter C for
customer
programmable curve
for UV1
D_UV1 0.000 0.001 0.000 - 10.000 - Parameter D for
customer
programmable curve
for UV1
P_UV1 0.020 0.001 0.001 - 10.000 - Parameter P for
customer
programmable curve
for UV1
ResCrvType_UV2 Instantaneous - Instantaneous - Selection of reset
Frozen timer curve type for UV2
Linearly
decreased
tResetDef_UV2 0.00 - 6000.00 0.01 0.00 s Reset time delay in
use of UV2
tResetIDMT_UV2 0.00 - 6000.00 0.01 0.00 s Reset time delay in
sec for IDMT curves
for UV2
A_UV2 0.140 0.001 0.005 - 999.000 - Parameter A for
customer
programmable curve
for UV2
B_UV2 1.000 0.001 0.500 - 99.000 - Parameter B for
customer
programmable curve
for UV2

Section 9

C_UV2 1.000 0.001 0.000 - 1.000 - Parameter C for
customer
programmable curve
for UV2
D_UV2 0.000 0.001 0.000 - 10.000 - Parameter D for
customer
programmable curve
for UV2
P_UV2 0.020 0.001 0.001 - 10.000 - Parameter P for
customer
programmable curve
for UV2
Table 162: General current and voltage protection (GAPC)

Measuring current input phase1, phase2, phase3, -
PosSeq, NegSeq, 3*ZeroSeq,
MaxPh, MinPh, UnbalancePh,
phase1-phase2, phase2-
phase3, phase3-phase1,
MaxPh-Ph, MinPh-Ph,
UnbalancePh-Ph
Base current (1 - 99999) A -
Measuring voltage input phase1, phase2, phase3, -
PosSeq, -NegSeq, -3*ZeroSeq,
MaxPh, MinPh, UnbalancePh,
phase1-phase2, phase2-
phase3, phase3-phase1,
MaxPh-Ph, MinPh-Ph,
UnbalancePh-Ph
Base voltage (0.05 - 2000.00) kV -
Start overcurrent, step 1 and 2 (2 - 5000)% of Ibase ± 1.0% of Ir for I<Ir
± 1.0% of I for I>Ir
Start undercurrent, step 1 and 2 (2 - 150)% of Ibase ± 1.0% of Ir for I<Ir

± 1.0% of I for I>Ir
Definite time delay (0.00 - 6000.00) s ± 0.5% ± 10 ms

Operate time start overcurrent 25 ms typically at 0 to 2 x Iset -
Reset time start overcurrent 25 ms typically at 2 to 0 x Iset -
Operate time start undercurrent 25 ms typically at 2 to 0 x Iset -
Reset time start undercurrent 25 ms typically at 0 to 2 x Iset -

Section 9

See table 436 and table 437 Parameter ranges for customer See table 436 and table 437
defined characteristic no 17:
k: 0.05 - 999.00
A: 0.0000 - 999.0000
B: 0.0000 - 99.0000
C: 0.0000 - 1.0000
P: 0.0001 - 10.0000
PR: 0.005 - 3.000
TR: 0.005 - 600.000
CR: 0.1 - 10.0
Voltage level where voltage (0.0 - 5.0)% of Ubase ± 1.0% of Ur
memory takes over
Start overvoltage, step 1 and 2 (2.0 - 200.0)% of Ubase ± 1.0% of Ur for U<Ur
± 1.0% of U for U>Ur
Start undervoltage, step 1 and 2 (2.0 - 150.0)% of Ubase ± 1.0% of Ur for U<Ur
± 1.0% of U for U>Ur
Operate time, start overvoltage 25 ms typically at 0 to 2 x Uset -
Reset time, start overvoltage 25 ms typically at 2 to 0 x Uset -
Operate time start undervoltage 25 ms typically 2 to 0 x Uset -
Reset time start undervoltage 25 ms typically at 0 to 2 x Uset -
High and low voltage limit, (1.0 - 200.0)% of Ubase ± 1.0% of Ur for U<Ur
voltage dependent operation ± 1.0% of U for U>Ur
Directional function Settable: NonDir, forward and -

reverse
Relay characteristic angle (-180 to +180) degrees ± 2.0 degrees
Relay operate angle (1 to 90) degrees ± 2.0 degrees
Reset ratio, overcurrent > 95% -
Reset ratio, undercurrent < 105% -
Reset ratio, overvoltage > 95% -
Reset ratio, undervoltage < 105% -
Overcurrent:

Undercurrent:

Overvoltage:

Undervoltage:

Section 10
Secondary system supervision
Section 10 Secondary system supervision
About this chapter

This chapter describes functions like Current circuit supervision and Fuse failure
supervision. The way the functions work, their setting parameters, function blocks,
input and output signals and technical data are included for each function.
10.1 Current circuit supervision (RDIF)
Function block name: CCSx- IEC 60617 graphical symbol:

ANSI number:
IEC 61850 logical node name: CCSRDIF
10.1.1 Introduction
Open or short circuited current transformer cores can cause unwanted operation of
many protection functions such as differential, earth fault current and negative
sequence current functions.
It must be remembered that a blocking of protection functions at an occurring open

CT circuit will mean that the situation will remain and extremely high voltages will
stress the secondary circuit.
The current circuit supervision function compares the residual current from a three
phase set of current transformer cores with the neutral point current on a separate
input taken from another set of cores on the current transformer.
A detection of a difference indicates a fault in the circuit and is used as alarm or to

block protection functions expected to give unwanted tripping.

The supervision function compares the absolute value of the vectorial sum of the three
phase currents |ΣIphase| and the numerical value of the residual current |Iref| from
another current transformer set, see figure 162.
The FAIL output will be set to a logical one when the following criteria are fulfilled:

Section 10
• The numerical value of the difference |ΣIphase| – |Iref| is higher than 80% of the
numerical value of the sum |ΣIphase| + |Iref|.
• The numerical value of the current |ΣIphase| – |Iref| is equal to or higher than the
set operate value IMinOp.
• No phase current has exceeded Ip>Block during the last 10 ms.
• The current circuit supervision is enabled by setting Operation = On.
The FAIL output remains activated 100 ms after the AND-gate resets when being
activated for more than 20 ms. If the FAIL lasts for more than 150 ms a ALARM will
be issued. In this case the FAIL and ALARM will remain activated 1 s after the AND-
gate resets. This prevents unwanted resetting of the blocking function when phase
current supervision element(s) operate, e.g. during a fault.
Figure 162: Simplified logic diagram for the current circuit supervision
The operate characteristic is percentage restrained, see figure 163.
| åI phase | - | I ref |
Slope = 1
Operation
Slope = 0.8
area
I MinOp
| åI phase | + | I ref |
99000068.vsd
Figure 163: Operate characteristics

Section 10
Due to the formulas for the axis compared, |SIphase | - |I ref | and |S
I phase | + | I ref | respectively, the slope can not be above 2.

CCS1-
CCSRDIF
I3P FAIL
IREF ALARM
BLOCK
en05000389.vsd
Figure 164: CCS function block
Table 163: Input signals for the CCSRDIF (CCS1-) function block
Signal Description
I3P Group signal for three phase current input
IREF TBD
Table 164: Output signals for the CCSRDIF (CCS1-) function block
Signal Description
FAIL Detection of current circuit failure
ALARM Alarm for current circuit failure
Table 165: Parameter group settings for the CCSRDIF (CCS1-) function
On
IBase 1 - 99999 1 3000 A IBase value for
current level
detectors
Ip>Block 5 - 500 1 150 %IB Block of the function
at high phase current,
in % of IBase
IMinOp 5 - 200 1 20 %IB Minimum operate
current differential
level in % of IBase

Section 10
Table 166: Current circuit supervision (RDIF)

Operate current (5-200)% of Ir ± 10.0% of Ir at I £ Ir
± 10.0% of I at I > Ir
Block current (5-500)% of Ir ± 5.0% of Ir at I £ Ir

± 5.0% of I at I > Ir
10.2 Fuse failure supervision (RFUF)
Function block name: FSDx- IEC 60617 graphical symbol:

ANSI number:
IEC 61850 logical node name: SDDRFUF
10.2.1 Introduction
The aim of the fuse failure supervision function (FSD) is to block voltage measuring
functions at failures in the secondary circuits between the voltage transformer and
the IED in order to avoid unwanted operations that otherwise might occur.
The fuse failure supervision function basically has two different algorithms, negative
sequence and zero sequence based algorithm and an additional delta voltage and delta
current algorithm.
The negative sequence detection algorithm is recommended for IEDs used in isolated
or high-impedance earthed networks. It is based on the negative-sequence measuring
quantities, a high value of voltage 3·U2 without the presence of the negative-sequence
current 3·I2.
The zero sequence detection algorithm is recommended for IEDs used in directly or
low impedance earthed networks. It is based on the zero sequence measuring
quantities, a high value of voltage 3·U0 without the presence of the residual current
3·I0.
A criterion based on delta current and delta voltage measurements can be added to
the fuse failure supervision function in order to detect a three phase fuse failure, which
in practice is more associated with voltage transformer switching during station
operations.
For better adaptation to system requirements, an operation mode setting has been
introduced which makes it possible to select the operating conditions for negative
sequence and zero sequence based function. The selection of different operation

Section 10
modes makes it possible to choose different interaction possibilities between the

negative sequence and zero sequence based algorithm.
10.2.2.1 Zero sequence
The function can be set in five different modes by setting the parameter OpMode.
The zero sequence function continuously measure the internal currents and voltages
in all three phases and calculate:
• the zero-sequence voltage 3U0

• the zero-sequence current 3I0.
The measured signals are compared with their respective set values 3U0< and
3I0>.
The function enable the internal signal fuseFailDetected if the measured zero
sequence voltage is higher than the set value 3U0>, the measured zero sequence
current is below the set value 3I0< and the operation mode selector (OpMode is set
to 2 (zero sequence mode). This will activate the output signal BLKU, intended to
block voltage related protection functions in the IED. The output signal BLKZ will
be activated as well if not the internal dead line detection is activaded at the same
time.
If the fuseFailDetected signal is present for more than 5 seconds at the same time as
all phase voltages are below the set value UPh> and the setting parameter ISealIn is
set to On, the function will activate the output signals 3PH, BLKU and BLKZ. The
same signals will aslo be activated if all phase voltages are below the value UPh>,
SealIn=On and any of the phase voltages below the setting value for more than 5
seconds.
It is recommended to always set SealIn to On since this will secure that no unwanted
operation of fuse failure will occur at closing command of breaker when the line is
already energized from the other end. The system voltages shall be normal before
fuse failure is allowed to be activated and initiate block of different protection
functions.
The output signal BLKU can also be activated if no phase voltages is below the setting
UPh> for more than 60 seconds at the same time as the zero sequence voltage is
above the set value 3U0> for more than 5 seconds, all phase currents are below the
setting IDLD< (operate level for dead line detection) and the circuit breaker is closed
(input CBCLOSED is activated). This condition covers for fuse failure at open
breaker position.
Fuse failure condition is unlatched when the normal voltage conditions are restored.

Section 10
Fuse failure condition is stored in the non volatile memory in the IED. In the new
start-up procedure the IED checks the stored value in its non volatile memory and
establishes the corresponding starting conditions.
TEST
TEST ACTIVE
AND
BlocFuse = Yes
BLOCK
OR
BLKTRIP
fufailStarted AND
OR
All UL less
than Uph>
3PH
AND
SealIn = On AND
5s
Any UL less AND
OR t
than Uph>
Fuse fail detected fuseFaildetected

(3U0 high and 3I0 low AND
for t>3 ms)
BLKU
AND
OR
OpMode = 2
setLatch U I
BLKZ
200 ms AND
AND OR
deadLineCondition t
150 ms
MCBOP
t
60 sec
All UL> UPh> t
AND
UN > 3U0> for
t>5 s AND
All IL < IDLD<

CBCLOSED
DISCPOS
en06000394.vsd
Figure 165: Simplified logic diagram for fuse failure supervision function, zero sequence based

Section 10
Input and output signals

The output signals 3PH, BLKU and BLKZ can be blocked in the following conditions:
• The input BLOCK is activated

• The input BLKTRIP is activated at the same time as the internal signal
fufailStarted is not present
• The operation mode selector OpMode is set to Off.
• The IED is in TEST status (TEST-ACTIVE is high) and the function has been
blocked from the HMI (BlockFUSE=Yes)
The input BLOCK signal is a general purpose blocking signal of the fuse failure
supervision function. It can be connected to a binary input of the IED in order to
receive a block command from external devices or can be software connected to other
internal functions of the IED itself in order to receive a block command from internal
functions. Through OR gate it can be connected to both binary inputs and internal
function outputs.
The input BLKSP is intended to be connected to the trip output at any of the protection
functions included in the IED. When activated for more than 20 ms, the operation of
the fuse failure is blocked during a fixed time of 100 ms. The aim is to increase the
security against unwanted operations during the opening of the breaker, which might
cause unbalance conditions for which the fuse failure might operate.
The output signal BLKZ will also be blocked if the internal dead line detection is
activated. The block signal has a 200 ms drop-off time delay.
The input signal MCBOP is supposed to be connected via a terminal binary input to
the N.C. auxiliary contact of the miniature circuit breaker protecting the VT secondary
circuit. The MCBOP signal sets the output signals BLKU and BLKZ in order to block
all the voltage related functions when the MCB is open independent of the setting of
OpMode selector. The additional drop-off timer of 150 ms prolongs the presence of
MCBOP signal to prevent the unwanted operation of voltage dependent function due
to non simultaneous closing of the main contacts of the miniature circuit breaker.
The input signal DISCPOS is supposed to be connected via a terminal binary input
to the N.C. auxiliary contact of the line disconnector. The DISCPOS signal sets the
output signal BLKU in order to block the voltage related functions when the line
disconnector is open. The impedance protection function is not affected by the
position of the line disconnector since there will be no line currents that can cause
maloperation of the distance protection. If DISCPOS=0 it signifies that the line is
connected to the system and when the DISCPOS=1 it signifies that the line is
disconnected from the system and the block signal BLKU is generated.
The output BLKU can be used for blocking the voltage related measuring functions
(undervoltage protection, synchro-check etc.) except for the impedance protection.
The function output BLKZ can be used for blocking the impedance protection
function.

Section 10
The BLKZ will only be activated if not the internal dead line detection is activated
at the same time.
The fuse failure condition is unlatched when the normal voltage conditions are
restored.
When the output 3PH is activated, all three voltage are low.
10.2.2.2 Negative sequence
The negative sequence operates in the same way as the zero sequence, but it calculates
the negative sequence component of current and voltage.
• the negative sequence current 3I2

• the negative sequence voltage 3U2
The function enable the internal signal fuseFailDetected if the measured negative
sequence voltage is higher than the set value 3U2>, the measured negative sequence
current is below the value 3I2< and the operation mode selector (OpMode) is set to
1 (negative sequence mode).
10.2.2.3 du/dt and di/dt
The delta function can be activated by setting the parameter OperationDUDI to On.
When it is selected On it operates in parallel with the sequence based algorithm.
The current and voltage is continuously measured in all three phases and the following
quantities are calculated:
• The change of voltage DU/Dt

• The change of current DI/Dt
The calculated delta quantities are compared with their respective set values DI< and
DU>.
The delta current and delta voltage algorithm, detects a fuse failure if a sufficient
negative change in voltage amplitude without a sufficient change in current amplitude
is detected in each phase separately. This check is performed if the circuit breaker is
closed. Information about the circuit breaker position is brought to the function input
CBCLOSED through a binary input of the IED.
There are two conditions for activating the internal STDU signal and set the latch:

Section 10
• The magnitude of ΔU is higher than the corresponding setting DU> and ΔI is

below the setting DI> in any phase at the same time as the circuit breaker is
closed (CBCLOSED = 1)
• The magnitude ΔU is higher than the setting DU> and the magnitude of ΔI is
below the setting DI> in any phase at the same time as the magnitude of the phase
current in the same phase is higher than the setting IPh>.
The first criterion requires that the delta condition shall be fulfilled in any phase at
the same time as circuit breaker is closed. Opening circuit breaker at one end and
energizing the line from other end onto a fault could lead to wrong start of the fuse
failure function at the end with the open breaker. If this is considering to bee an
important disadvantage, connect the CBCLOSED input to FALSE. In this way only
the second criterion can activate the delta function.
The second criterion means that detection of failure in one phase together with high
current for the same phase will set the latch. The measured phase current is used to
reduce the risk of false fuse failure detection. If the current on the protected line is
low, a voltage drop in the system (not caused by fuse failure) is not by certain followed
by current change and a false fuse failure might occur. To prevent that the phase
current criterion is introduced.
If the signal setLatchΔUΔI is set (see figure 165) and if all measured voltages are low
(lower than the setting UPh>) the output 3PH will be activated indicating fuse failure
in all three phases. The output BLKU and BLKZ will be activated as well.
If the signal setLatchΔUΔI is activated but not all three phases are below the setting
UPh> only BLKU will be activated.
The BLKZ will be activated as well if not the internal dead line detection is activated.
10.2.2.4 Operation modes
The fuse failure supervision function can be switched on or off by the setting
parameter Operation to On or Off.
Negative and zero sequence algorithm

For increased flexibility and adaptation to system requirements, an operation mode
selector, OperationMode has been introduced to make it possible to select different
operating modes for the negative and zero sequence based algorithm. The different
operation modes are:
• OpMode = 0, the negative and zero sequence function is switched off

• OpMode = 1; Negative sequence is selected
• OpMode = 2; Zero sequence is selected

Section 10
• OMode = 3; Both negative and zero sequence is activated and working in parallel
in an OR-condition
• OpMode = 4; Both negative and zero sequence is activated and working in series
(AND-condition for operation)
• OpMode = 5; Optimum of negative and zero sequence (the function that has the
highest magnitude of measured negative and zero sequence current will be
activated).
du/dt and di/dt algorithm

The DU and DI function can be switched on or off by the setting parameter
OpDUDI to On or Off.
10.2.2.5 Dead line detection
The function input signal deadLineCondition (see figure 165) is related to the internal
dead line detection function. This signal is activated from the dead line condition
function when the voltage and the current in at least one phase is below their respective
setting values UDLD< and IDLD<. It prevents the blocking of the impedance
protection by a fuse failure detection during dead line condition (that occurs also
during single pole auto-reclosing). The 200 ms drop-off timer prolongs the dead line
condition after the line-energization in order to prevent the blocking of the impedance
protection for unequal pole closing.

FSD1-
SDDRFUF
BLOCK BLKZ
I3P BLKU
U3P 3PH
CBCLOSED
MCBOP
DISCPOS
BLKSP
en05000700.vsd
Figure 166: FSD function block
Table 167: Input signals for the SDDRFUF (FSD1-) function block
Signal Description
CBCLOSED Active when circuit breaker is closed

Section 10
Signal Description
MCBOP Active when external MCB opens protected voltage circuit
DISCPOS Active when line disconnector is open
BLKSP Blocks operation of function when active
Table 168: Output signals for the SDDRFUF (FSD1-) function block
Signal Description
BLKZ Start of current and voltage controlled function
BLKU General start of function
3PH Three-phase start of function
Table 169: Parameter group settings for the SDDRFUF (FSD1-) function
On
IBase 1 - 99999 1 3000 A Base value for current
settings in A
UBase 0.05 - 2000.00 0.05 400.00 kV Base value for voltage
settings in kV
OpMode Off - UZsIZs - Operating mode
UNsINs selection
UZsIZs
UZsIZs OR
UNsINs
UZsIZs AND
UNsINs
OptimZsNs
3U0> 1 - 100 1 30 %UB Operate level of
residual overvoltage
element in % of
UBase
3I0< 1 - 100 1 10 %IB Operate level of
residual undercurrent
element in % of IBase
3U2> 1 - 100 1 30 %UB Operate level of neg
seq overvoltage
element in % of
UBase
3I2< 1 - 100 1 10 %IB Operate level of neg
seq undercurrent
element in % of IBase
OperationDUDI Off - Off - Operation of change
On based function Off/On

Section 10

DU> 1 - 100 1 60 %UB Operate level of
change in phase
voltage in % of UBase
DI< 1 - 100 1 15 %IB Operate level of
change in phase
UPh> 1 - 100 1 70 %UB Operate level of
phase voltage in % of
UBase
IPh> 1 - 100 1 10 %IB Operate level of
phase current in % of
IBase
SealIn Off - On - Seal in functionality
On Off/On
USealln< 1 - 100 1 70 %UB Operate level of seal-
in phase voltage in %
of UBase
IDLD< 1 - 100 1 5 %IB Operate level for open
phase current
detection in % of
IBase
UDLD< 1 - 100 1 60 %UB Operate level for open
phase voltage
detection in % of
UBase
Table 170: Fuse failure supervision (RFUF)

Operate voltage, zero sequence (1-100)% of Ubase ± 1.0% of Ur
Operate current, zero sequence (1–100)% of Ibase ± 1.0% of Ir
Operate voltage, negative sequence (1–100)% of Ubase ± 1.0% of Ur
Operate current, negative sequence (1–100)% of Ibase ± 1.0% of Ir
Operate voltage change level (1–100)% of Ubase ± 5.0% of Ur
Operate current change level (1–100)% of Ibase ± 5.0% of Ir

Section 11
Control
Section 11 Control
About this chapter

This chapter describes the control functions. The way the functions work, their setting
parameters, function blocks, input and output signals and technical data are included
for each function.
11.1 Synchrocheck and energizing check (RSYN,

25)
Function block name: SYNx- IEC 60617 graphical symbol:

ANSI number: 25
SECRSYN
sc/vc
11.1.1 Introduction
The synchrocheck function checks that the voltages on both sides of the circuit breaker
are in synchronism, or with at least one side dead to ensure that closing can be done
safely.
The function includes a built-in voltage selection scheme for double bus and one- and
a half or ring busbar arrangements.
Manual closing as well as automatic reclosing can be checked by the function and
can have different settings, e.g. the allowed frequency difference can be set to allow
wider limits for the auto-reclose attempt than for the manual closing.
11.1.2.1 Basic functionality
The synchronism check function measures the conditions across the circuit breaker
and compares them to set limits. The output is only given when all measured quantities
are simultaneously within their set limits.

Section 11
Control
The energizing check function measures the bus and line voltages and compares them
to both high and low threshold detectors. The output is only given when the actual
measured quantities match the set conditions.
For single circuit breaker and 1 1/2 circuit breaker arrangements, the SYN function
blocks have the capability to make the necessary voltage selection. For single circuit
breaker arrangements, selection of the correct voltage is made using auxiliary contacts
of the bus disconnectors. For 1 1/2 circuit breaker arrangements, correct voltage
selection is made using auxiliary contacts of the bus disconnectors as well as the
circuit breakers
The internal logic for each function block as well as the Input and Outputs and the
setting parameters with default setting and setting ranges is described in this
document. For application related information, please refer to the “Application
manual”.
11.1.2.2 Logic diagrams
The logic diagrams that follow illustrate the main principles of the Synchrocheck
function components such as Synchronism check, Energizing check and Voltage
selection, and are intended to simplify the understanding of the function.
Synchronism check
The voltage difference, frequency difference and phase angle difference values are
measured in the IED centrally and are available for the Synchrocheck function for
evaluation. If the bus voltage is connected as phase-phase and the line voltage as
phase-neutral (or the opposite), this need to be compensated. This is done with a
setting, which scales up the line voltage to a level equal to the bus voltage.
When the function is set to Operation = On, the measuring will start.
The function will compare the bus and line voltage values with the set values for
UHighBusSync and UHighLineSync.
If both sides are higher than the set values the measured values are compared with
the set values for acceptable frequency, phase angle and voltage difference FreqDiff,
PhaseDiff and UDiff. If a compensation factor is set due to the use of different voltages
on the Bus and Line, the factor is deducted from the line voltage before the comparison
of the phase angle values.
The frequency on both sides of the circuit breaker is also measured. The frequencies
must not deviate from the rated frequency more than +/-5Hz. The frequency
difference between the bus frequency and the line frequency is measured and may
not exceed the set value.
Two sets of settings for frequency difference and phase angle difference are available
and used for the Manual closing and Auto-Reclose functions respectively as required.
The inputs BLOCK and BLKSYNCH are available for total block of the complete
Synchrocheck function and block of the Synchronism check function respectively.

Section 11
Control
TSTAUTSY will allow testing of the function where the fulfilled conditions are
connected to a separate test output
Two outputs MANSYOK resp. AUTOSYOK are activated when the actual measured
conditions match the set conditions for the respective output. The output signal can
be delayed independently for MANSYOK conditions and for ARSYNOK.
A number of outputs are available as information about fulfilled checking conditions.

UOK shows that the voltages are high, UDIFF, FRDIFFM/A, PHDIFFM/A shows
when the voltage difference, frequency difference and phase angle difference
conditions are met.
Energizing check
Voltage values are measured in the IED centrally and are available for evaluation by
the Synchrocheck function. If the bus voltage is connected as phase-phase and the
line voltage as phase-neutral, (or the opposite) this needs to be compensated. This is
done with a setting, which scales the line voltage to a level equal to the bus voltage.
The function measures voltages on the busbar and the line to verify whether they are
live or dead. This is done by comparing with the set values UHighLineEnerg and
ULowLineEnerg for bus respectively line energizing.
The frequency on both sides of the circuit breaker is also measured. The frequencies
must not deviate from the rated frequency more than +/-5Hz. The frequency
difference between the bus frequency and the line frequency is measured and shall
not exceed a set value.
The Energizing direction can be selected individually for the Manual and the
Automatic functions respectively. When the conditions are met the outputs
AUTOENOK and MANENOK respectively will be activated if the fuse supervision
conditions are fulfilled. The output signal can be delayed independently for
MANENOK conditions and for AUTOENOK.
The inputs BLOCK and BLKENERG are available for total block of the complete
Synchrocheck function resp. block of the Energizing check function. TSTENOK will
allow testing of the function where the fulfilled conditions are connected to a separate
test output.

Section 11
Control
OperationSync = On
AND TSTSYNOK
AND
TSTSYNC AND
BLKSYNC AND
BLOCK OR
SYNOK
AND
AND
SelectedFuseOK
0-60 s
AND t
OR
tSync
0-60 s
AND t
AND
tSync2
UDiff 50 ms
AND t
UHighBusSync
UOK
AND
UHighLineSync
UDIFF
1
FRDIFFA
FreqDiffA 1
FRDIFFM
FreqDiffM 1
PHDIFFA
PhaseDiffA 1
PHDIFFM
PhaseDiffM 1
UDIFFME
voltageDifferenceValue
FRDIFFME
frequencyDifferenceValue
PHDIFFME
phaseAngleDifferenceValue
en05000790.vsd
Figure 167: Simplified logic diagram for the Synchronism check function
Voltage selection
The voltage selection module including supervision of included voltage transformer
fuses for the different arrangements is a basic part of the Synchrocheck function and
determines the parameters fed to the Synchronism check and Energizing check
functions. This includes the selection of the appropriate Line and Bus voltages and
fuse supervision.
The voltage selection type to be used is set with the parameter CBConfig. The
different alternatives are described below.
If NoVoltageSel is set the default voltages used will be ULine1 and UBus1. This is
also the case when external voltage selection is provided. Fuse failure supervision for
the used inputs must also be connected.
The voltage selection function selected voltages and fuse conditions are the
Synchronism check and Energizing check inputs.

Section 11
Control
For the disconnector positions it is advisable to use (NO) a and (NC) b type contacts
to supply Disconnector Open and Closed positions but it is of course also possible to
use an inverter for one of the positions.
Fuse failure supervision

External fuse-failure signals or signals from a tripped fuse switch/MCB are connected
to binary inputs that are configured to the inputs of the Synchrocheck functions in the
terminal. Alternatively the internal signals from fuse failure supervision can be used
when available. There are two alternative connection possibilities. Inputs labelled OK
must be connected if the available contact indicates that the voltage circuit is healthy.
Inputs labelled FF must be connected if the available contact indicates that the voltage
circuit is faulty.
The SYN1(2)-UB1/2OK and SYN1(2)-UB1/2FF inputs are related to the busbar

voltage and the SYN1(2)-ULN1/2OK and SYN1(2)-ULN1/2FF inputs are related to
the line voltage. Configure them to the binary inputs or function outputs that indicate
the status of the external fuse failure of the busbar and line voltages. In the event of
a fuse failure, the energizing check functions are blocked. The synchronism check
requires full voltage on both sides and will be blocked automatically in the event of
fuse failures.
Voltage selection for a single circuit breaker with double busbars

This function uses the binary input from the disconnectors auxiliary contacts
B1QOPEN-B1QCLD for Bus 1, and B2QOPEN-B2QCLD for Bus 2 to select
between bus 1 and bus 2 voltages. If the disconnector connected to bus 2 is closed
and the disconnector connected to bus 1 is opened the bus 2 voltage is used. All other
combinations use the bus 1 voltage. The Outputs B1SEL and B2SEL respectively
indicate the selected Bus voltage.
The function also checks the fuse-failure signals for bus 1, bus 2 and line voltage
transformers. Inputs UB1OK-UB1FF supervise the fuse for Bus 1. UB2OK-UB2FF
supervises the fuse for Bus 2 and ULNOK-ULNFF supervises the fuse for the Line
voltage transformer. The inputs fail (FF) or healthy (OK) can alternatively be used
dependent on the available signal. If a fuse-failure is detected in the selected voltage
source an output signal USELFAIL is set. This output signal is true if the selected
bus or line voltages have a fuse failure. This output as well as the function can be
blocked with the input signal BLOCK. The function logic diagram is shown in figure
168.

Section 11
Control
B1QOPEN
B1SEL
B1QCLD AND
B2QOPEN B2SEL
1
B2QCLD AND
AND invalidSelection
bus1Voltage
busVoltage
bus2Voltage
UB1OK AND
UB1FF OR
OR
AND selectedFuseOK
UB2OK AND
UB2FF OR USELFAIL
AND
ULN1OK
ULN1FF OR
BLOCK
en05000779.vsd
Figure 168: Logic diagram for the voltage selection function of a single circuit
breaker with double busbars
Voltage selection for a 1 1/2 circuit breaker arrangement

Note that with 11/2 breaker schemes two Synchrocheck functions must be used in
the IED (three for two IEDs in a complete bay). Below, the scheme for one Bus breaker
and the Tie breakers is described.
This voltage selection function uses the binary inputs from the disconnectors and
circuit breakers auxiliary contacts to select the right voltage for the Synchrocheck
(Synchronism and Energizing check) function. For the bus circuit breaker one side
of the circuit breaker is connected to the busbar and the other side is connected either
to line 1, line 2 or the other busbar depending on the arrangement.
Inputs LN1QOPEN-LN1QCLD, B1QOPEN-B1QCLD, B2QOPEN-B2QCLD,

LN2QOPEN-LN2QCLD are inputs for the position of the Line disconnectors
respectively the Bus and Tie breakers. The Outputs LN1SEL, LN2SEL and B2SEL
will give indication of the selected Line voltage as a reference to the fixed Bus 1
voltage.
The fuse supervision is connected to ULNOK-ULNFF etc. and with alternative

Healthy or Failing fuse signals depending on what is available for each of fuse (MCB).
The tie circuit breaker is connected either to bus 1 or line 1 on one side and the other
side is connected either to bus 2 or line 2. Four different output combinations are
possible, bus to bus, bus to line, line to bus and line to line.

Section 11
Control
• The line 1 voltage is selected if the line 1 disconnector is closed.

• The bus 1 voltage is selected if the line 1 disconnector is open and the bus 1
circuit breaker is closed.
• The line 2 voltage is selected if the line 2 disconnector is closed.
• The bus 2 voltage is selected if the line 2 disconnector is open and the bus 2
Circuit breaker is closed.
The function also checks the fuse-failure signals for bus 1, bus 2, line 1 and line 2. If
a fuse-failure is detected in the selected voltage an output signal USELFAIL is set.
This output signal is true if the selected bus or line voltages have a fuse failure. This
output as well as the function can be blocked with the input signal BLOCK.The
function block diagram for the voltage selection of a bus circuit breaker is shown in
169 and for the tie circuit breaker in 170
LN1QOPEN
AND
LN1SEL
LN1QCLD
B1QOPEN
LN2SEL
B1QCLD AND AND
OR
B2SEL
LN2QOPEN
LN2QCLD AND
AND invalidSelection
AND
B2QOPEN
B2QCLD AND
line1Voltage
lineVoltage
line2Voltage
bus2Voltage
UB1OK
UB1FF OR
OR
UB2OK AND
AND selectedFuseOK
UB2FF OR
USELFAIL
ULN1OK AND
AND
ULN1FF OR
ULN2OK
AND
ULN2FF OR
BLOCK
en05000780.vsd
Figure 169: Simplified logic diagram for the voltage selection function for a bus
circuit breaker in a 1 1/2 breaker arrangement.

Section 11
Control
LN1QOPEN
LN1SEL
LN1QCLD AND
B1SEL
1
B1QOPEN AND
AND
B1QCLD AND
line1Voltage
busVoltage
bus1Voltage
LN2QOPEN
LN2SEL
LN2QCLD AND
B2SEL
1
OR invalidSelection
B2QOPEN AND
AND
B2QCLD AND
line2Voltage
lineVoltage
bus2Voltage
UB1OK AND
UB1FF OR
OR
UB2OK AND selectedFuseOK
AND
UB2FF OR
USELFAIL
ULN1OK AND
AND
ULN1FF OR
ULN2OK
AND
ULN2FF OR
BLOCK
en05000781.vsd
Figure 170: Simplified logic diagram for the voltage selection function for the tie
circuit breaker in 1 1/2 breaker arrangement.

The Synchrocheck function block is shown in 171. Tables describing the inputs,
outputs and setting parameters of this function are presented in the following sections
of this document. Refer to the “Application manual” for the use of inputs and outputs
in your particular application.

Section 11
Control
SYN1-
SECRSYN
U3PBB1 B1SEL
U3PBB2 B2SEL
U3PLN1 LN1SEL
U3PLN2 LN2SEL
B1QOPEN USELFAIL
B1QCLD AUTOENOK
B2QOPEN MANENOK
B2QCLD TSTENOK
LN1QOPEN MANSYOK
LN1QCLD TSTMANSY
LN2QOPEN UDIFF
LN2QCLD FRDIFFM
UB1OK FRDIFFA
UB1FF PHDIFFM
UB2OK PHDIFFA
UB2FF UOK
ULN1OK AUTOSYOK
ULN1FF TSTAUTSY
ULN2OK
ULN2FF
TSTENERG
TSTSYNC
BLKENERG
BLKSYNC
BLOCK
en05000702.vsd
Figure 171: SYN function block
Table 171: Input signals for the SECRSYN_25 (SYN1-) function block
Signal Description
U3PBB1 Group signal for voltage input busbar 1
U3PBB2 Group signal for voltage input busbar 2
U3PLN1 Group signal for voltage input line 1
U3PLN2 Group signal for voltage input line 2
B1QOPEN Open status for CB or disconnector connected to bus1
B1QCLD Close status for CB or disconnector connected to bus1
B2QOPEN Open status for CB or disconnector connected to bus2
B2QCLD Close status for CB or disconnector connected to bus2
LN1QOPEN Open status for CB or disconnector connected to line1
LN1QCLD Close status for CB or disconnector connected to line1
LN2QOPEN Open status for CB or disconnector connected to line2
LN2QCLD Close status for CB or disconnector connected to line2
UB1OK Bus1 voltage transformer OK
UB1FF Bus1 voltage transformer fuse failure

Section 11
Control
Signal Description
UB2OK Bus2 voltage transformer OK
UB2FF Bus2 voltage transformer fuse failure
ULN1OK Line1 voltage transformer OK
ULN1FF Line1 voltage transformer fuse failure
ULN2OK Line2 voltage transformer OK
ULN2FF Line2 voltage transformer fuse failure
TSTENERG Energizing check in test mode
TSTSYNC Synchrocheck in test mode
BLKENERG Energizing check blocked
BLKSYNC Synchrocheck blocked
Table 172: Output signals for the SECRSYN_25 (SYN1-) function block
Signal Description
B1SEL Bus1 selected
B2SEL Bus2 selected
LN1SEL Line1 selected
LN2SEL Line2 selected
USELFAIL Selected voltage transformer fuse failed
AUTOENOK Automatic energizing check OK
MANENOK Manual energizing check OK
TSTENOK Energizing check OK test output
MANSYOK Manual synchro check OK
TSTMANSY Manual synchro check OK test output
UDIFF Voltage difference out of limit
FRDIFFM Frequency difference out of limit for Manual operation
FRDIFFA Frequency difference out of limit for Auto operation
PHDIFFM Phase angle difference out of limit for Manual Operation
PHDIFFA Phase angle difference out of limit for Auto operation
UOK Voltage amplitudes above set limits
AUTOSYOK Auto synchro check OK
TSTAUTSY Auto synchro check OK test output

Section 11
Control
Table 173: Basic parameter group settings for the SECRSYN_25 (SYN1-) function
On
SelPhaseBus1 phase1 - phase2 - Select phase for bus1
phase2
phase3
phase1-phase2
phase2-phase3
phase3-phase1
SelPhaseBus2 phase1 - phase2 - Select phase for bus2
phase2
phase3
phase1-phase2
phase2-phase3
phase3-phase1
SelPhaseLine1 phase1 - phase2 - Select phase for line1
phase2
phase3
phase1-phase2
phase2-phase3
phase3-phase1
SelPhaseLine2 phase1 - phase2 - Select phase for line2
phase2
phase3
phase1-phase2
phase2-phase3
phase3-phase1
CBConfig No voltage sel. - No voltage sel. - Select CB
Double bus configuration
1 1/2 bus CB
1 1/2 bus alt. CB
Tie CB
UBase 0.001 - 9999.999 0.001 400.000 kV Base voltage in kV
PhaseShift -180 - 180 5 0 Deg Phase shift
URatio 0.20 - 5.00 0.01 1.00 - Voltage ratio
OperationSync Off - On - Operation for
On synchronism check
function Off/On
UHighBusSync 50.0 - 120.0 1.0 80.0 %UB Voltage high limit bus
for synchrocheck in %
of UBase
UHighLineSync 50.0 - 120.0 1.0 80.0 %UB Voltage high limit line
for synchrocheck in %
of UBase
UDiff 2.0 - 50.0 1.0 15.0 %UB Voltage difference
limit between bus and
line in % of UBase
FreqDiffM 0.003 - 1.000 0.001 0.050 Hz Frequency difference
line Manual
FreqDiffA 0.003 - 1.000 0.001 0.200 Hz Frequency difference
line Auto

Section 11
Control

PhaseDiffM 5.0 - 90.0 1.0 25.0 Deg Phase angle
difference limit
between bus and line
Manual
PhaseDiffA 5.0 - 90.0 1.0 25.0 Deg Phase angle
difference limit
Auto
tSyncM 0.000 - 60.000 0.001 1.000 s Time delay output for
synchrocheck
tSyncA 0.000 - 60.000 0.001 0.100 s Time delay output for
synchrocheck for
Auto operation
UHighBusEnerg 50.0 - 120.0 1.0 80.0 %UB Voltage high limit bus
for energizing check
in % of UBase
UHighLineEnerg 50.0 - 120.0 1.0 80.0 %UB Voltage high limit line
in % of UBase
ULowBusEnerg 10.0 - 80.0 1.0 40.0 %UB Voltage low limit bus
in % of UBase
ULowLineEnerg 10.0 - 80.0 1.0 40.0 %UB Voltage low limit line
in % of UBase
AutoEnerg Off - DLLB - Automatic energizing
DLLB check mode
DBLL
Both
ManEnerg Off - DLLB - Manual energizing
DLLB check mode
DBLL
Both
tAutoEnerg 0.000 - 60.000 0.001 0.100 s Time delay for
automatic energizing
check
tManEnerg 0.000 - 60.000 0.001 0.100 s Time delay for manual
energizing check
ManEnergDBDL Off - Off - Manual dead bus,
On dead line energizing
UMaxEnerg 80.0 - 140.0 1.0 115.0 %UB Maximum voltage for
energizing in % of
UBase

Section 11
Control
Table 174: Synchrocheck and energizing check (RSYN, 25)

Phase shift, jline - jbus (-180 to 180) degrees -
Voltage ratio, Ubus/Uline (0.20-5.00)% of Ubase -
Voltage high limit for (50.0-120.0)% of Ubase ± 1.0% of Ur at U ≤ Ur

synchrocheck ± 1.0% of U at U > Ur
Reset ratio, synchrocheck > 95% -

Frequency difference limit (0.003-1.000) Hz ± 2.0 mHz
Phase angle difference limit (5.0-90.0) degrees ± 2.0 degrees
Voltage difference limit between (2.0-50.0)% of Ubase ± 1.0% of Ur
bus and line
Time delay output for (0.000-60.000) s ± 0.5% ± 10 ms
synchrocheck
Voltage high limit for energizing (50.0-120.0)% of Ubase ± 1.0% of Ur at U ≤ Ur
check ± 1.0% of U at U > Ur
Reset ratio, voltage high limit > 95% -

Voltage low limit for energizing (10.0-80.0)% of Ubase ± 1.0% of Ur
check
Reset ratio, voltage low limit < 105% -
Maximum voltage for energizing (80.0-140.0)% of Ubase ± 1.0% of Ur at U ≤ Ur
± 1.0% of U at U > Ur
Time delay for energizing check (0.000-60.000) s ± 0.5% ± 10 ms

Operate time for synchrocheck 160 ms typically -
function
Operate time for energizing 80 ms typically -
function
11.2 Autorecloser (RREC, 79)
Function block name: ARx-- IEC 60617 graphical symbol:

ANSI number: 79
SMBRREC O->I
11.2.1 Introduction
The autoreclosing function provides high-speed and/or delayed auto-reclosing for
single or multi-breaker applications.

Section 11
Control
Up to five reclosing attempts can be programmed. The first attempt can be single-,
two and/or three phase for single phase or multi-phase faults respectively.
Multiple autoreclosing functions are provided for multi-breaker arrangements. A

priority circuit allows one circuit breaker to close first and the second will only close
if the fault proved to be transient.
Each autoreclosing function can be configured to co-operate with a synchrocheck

function.
11.2.2.1 Logic Diagrams
The logic diagrams below illustrate the principles applicable in the understanding of
the functionality.
11.2.2.2 Auto-reclosing operation Off and On
Operation of the automatic reclosing can be set to Off or On via the setting parameters
and through external control. With the setting Operation=ON, the function is
activated while with the setting Operation=OFF the function is deactivated. With the
setting Operation=External ctrl, the activation/deactivation is made by input signal
pulses, for example from a control system.
When the function is set On and is operative the output SETON is activated (high).
Other input conditions such as CBPOS and CBREADY must also be fulfilled. At this
point the automatic recloser is prepared to start the reclosing cycle and the output
signal READY on the AR function block is activated (high).
11.2.2.3 Start auto-reclosing and conditions for start of a reclosing cycle
The usual way in which to start a reclosing cycle, or sequence, is to start it when a
line protection tripping has occurred, by applying a signal to the START input. Should
it be necessary to adjust three-phase auto-reclosing open time, (dead time) for
different power system configurations or during tripping at different protection
stages, the input STARTHS (start high-speed reclosing) can also be used.
For a new auto-reclosing cycle to be started, a number of conditions need to be met.

They are linked to dedicated inputs. The inputs are: a) CBREADY, CB ready for a
reclosing cycle, e.g. charged operating gear, b) CBPOS to ensure that the CB was
closed when the line fault occurred and start was applied, c) No blocking or inhibit
signal shall be present. After the start has been accepted, it is latched in and an internal
signal “Started” is set. It can be interrupted by certain events, like an inhibit signal.
To start auto-reclosing by CB position Open instead of from protection trip signals,

one has to configure the CB Open position signal to inputs CBPOS and START and
set a parameter StartByCBOpen = ON and CBAuxContType = NormClosed (normally

Section 11
Control
closed, 52b). One also has to configure and connect signals from manual trip
commands to input INHIBIT.
The logic for switching the auto-recloser ON/OFF and the starting of the reclosing is
shown in figure 172. The following should be considered.
• Setting Operation can be set to Off, External ctrl or ON. External ctrl offers the
possibility of switching by external switches to inputs ON and OFF,
communication commands to the same inputs etc.
• Autoreclose AR is normally started by tripping. It is either a Zone 1 and
Communication aided trip or a general trip. If the general trip is used the function
must be blocked from all back-up tripping connected to INHIBIT. In both
alternatives the breaker failure function must be connected to inhibit the function.
START makes a first attempt with synchrocheck, STARTHS makes its first
attempt without synchrocheck. TRSOTF starts shots 2-5.
• Circuit breaker checks that the breaker was closed for a certain length of time
before the starting occurred and that the CB has sufficient stored energy to
perform an auto-reclosing sequence and is connected to inputs CBPOS and
CBREADY.
Operation:On
Operation:Off
Operation:External Ctrl
OR
ON AND SETON
AND S
OR
OFF AND R
START
STARTHS OR
OR initiate
autoInitiate
Additional conditions
TRSOTF AND
start
120 ms
CBREADY AND
t AND
AND S
tCBClosedMin
CBPOS CB Closed
t R
AND
Blocking conditions READY
AND
OR
Inhibit condistions
count 0
en05000782.vsd
Figure 172: Auto-reclosing Off/On and start
11.2.2.4 Control of the auto-reclosing open time for shot 1
It is possible to use up to four different time settings for the first shot, and one
extension time. There are separate settings for single-, two- and three-phase auto-
reclosing open times, t1 1Ph, t1 2Ph, t1 3Ph. If no particular input signal is applied,

Section 11
Control
and an auto-reclosing program with single-phase reclosing is selected, the auto-

reclosing open time t1 1Ph will be used. If one of the inputs TR2P or TR3P is activated
in connection with the start, the auto-reclosing open time for two-phase or three-phase
reclosing is used. There is also a separate time setting facility for three-phase high-
speed auto-reclosing, t1 3PhHS available for use when required. It is activated by
input STARTHS.
An auto-reclosing open time extension delay, tExtended t1, can be added to the normal
shot 1 delay. It is intended to come into use if the communication channel for
permissive line protection is lost. In a case like this there can be a significant time
difference in fault clearance at the two line ends. A longer auto-reclosing open time
can then be useful. This extension time is controlled by setting parameter Extended
t1 = On and the input PLCLOST.
11.2.2.5 Long trip signal
In normal circumstances the trip command resets quickly due to fault clearing. The
user can set a maximum trip pulse duration tTrip. When trip signals are longer, the
auto-reclosing open time is extended by tExtended t1. If Extended t1 = Off. A long
trip signal interrupts the reclosing sequence in the same way as a signal to input
INHIBIT.
Extended t1
PLCLOST Extend t1
initiate AND OR AND
AND
tTrip
t
AND
start
long duration
AND
(block AR)
en05000783.vsd
Figure 173: Control of extended auto-reclosing open time and long trip pulse
detection
Reclosing checks and the reclaim timer

When dead time has elapsed during the auto-reclosing procedure certain conditions
must be fulfilled before the CB closing command is issued. To achieve this, signals
are exchanged between program modules to check that these conditions are met. In
three-phase reclosing a synchronizing and/or energizing check can be used. It is
possible to use a synchronism check function in the same physical device or an
external one. The release signal is configured by connecting to the auto-reclosing
function input SYNC. If reclosing without checking is preferred the SYNC input can

Section 11
Control
be set to TRUE (set high). Another possibility is to set the output of the synchro-check
function to a permanently activated state. At confirmation from the synchro-check,
or if the reclosing is of single-phase or two-phase type, the signal passes on. At single-
phase, two-phase reclosing and at three-phase high-speed reclosing started by
STARTHS, synchronization is not checked, and the state of the SYNC input is
disregarded.
By choosing CBReadyType = CO (CB ready for a Close-Open sequence) the

readiness of the circuit breaker is also checked before issuing the CB closing
command. If the CB has a readiness contact of type CBReadyType = OCO (CB ready
for an Open-Close-Open sequence) this condition may not be complied with after the
tripping and at the moment of reclosure. The Open-Close-Open condition was
however checked at the start of the reclosing cycle and it is then likely that the CB is
prepared for a Close-Open sequence.
The synchronism check or energizing check must be fulfilled within a set time
interval, tSync. If it is not, or if other conditions are not met, the reclosing is interrupted
and blocked.
The reclaim timer defines a time from the issue of the reclosing command, after which
the reclosing function resets. Should a new trip occur during this time, it is treated as
a continuation of the first fault. The reclaim timer is started when the CB closing
command is given.
A number of outputs for Autoreclosing state control keeps track of the actual state in
the reclosing sequence.

Section 11
Control
t1 1Ph
"AR Open time" timers
t
From logic for OR 1P2PTO

t1 2Ph
reclosing t
programs
1P2PTO t1 3Ph HS
t
3PHSTO
3PHSTO
3PT1TO
t1 3Ph
3PT2TO t
3PT1TO
3PT3TO OR
AND
3PT4TO OR Pulse AR
3PT5TO AND
SYNC
initiate AND Blocking X
CBREADY AND OR
AR State
tSync Control
AND t
COUNTER
0 Shot 0
CL Shot 1
1
2 Shot 2
3 Shot 3
tReclaim
Pulse AR (above) AND t R 4 Shot 4
OR Shot 5
5
TR2P LOGIC Reclaim Timer On
TR3P reclosing
1PT1
programs
start 2PT1
initiate 3PHS INPROGR
Shot 0 3PT1 OR
Shot 1 3PT2
Shot 2
Shot 3 3PT3
Shot 4
Shot 5 3PT4
PERMIT1P
3PT5
PREP3P
1
Y Blocking tInhibit
OR Inhibit Y
INHIBIT t
en05000784.vsd
Figure 174: Reclosing Reclaim and Inhibit timers
Pulsing of the CB closing command

The CB closing command, CLOSECB is a pulse with a duration set by parameter
tPulse. For circuit-breakers without anti-pumping function, the close pulse cutting
described below can be used. This is done by selecting the parameter
CutPulse=On. In case of a new trip pulse, the closing command pulse is cut
(interrupted). The minimum duration of the pulse is always 50 ms. See figure 175
When a reclosing command is issued, the appropriate reclosing operation counter is

incremented. There is a counter for each type of reclosing and one for the total number
of reclosing commands issued.

Section 11
Control
tPulse
pulse
**) AND CLOSECB
OR
initiate
50 ms
1PT1 AND COUNT1P

counter
2PT1 AND
counter
COUNT2P
3PT1 AND COUNT3P1

counter
3PT2 AND COUNT3P2

counter
3PT3 AND COUNT3P3

counter
3PT4 AND COUNT3P4

counter
3PT5 AND COUNT3P5

counter
counter COUNTAR
RSTCOUNT
**) Only if "CutPulse" = On
en05000785.vsd
Figure 175: Pulsing of closing command and driving the operation counters
Transient fault
After the reclosing command the reclaim timer tReclaim starts running for the set
time. If no tripping occurs within this time, the auto-reclosing will reset.
Permanent fault and reclosing unsuccessful signal

If a new trip occurs after the CB closing command, and a new input signal START
or TRSOTF appears, the output UNSUCCL (unsuccessful closing) is set high. The
timers for the first shot can no longer be started. Depending on the setting for the
number of reclosing shots, further shots may be made or the reclosing sequence will
be ended. After the reclaim time has elapsed, the auto-reclosing function resets but
the CB remains open. The CB closed data at the CBPOS input will be missing.
Because of this, the reclosing function will not be ready for a new reclosing cycle.
Normally the signal UNSUCCL appears when a new trip and start is received after
the last reclosing shot has been made and the auto-reclosing function is blocked. The
signal resets once the reclaim time has elapsed. The “unsuccessful“ signal can also
be made to depend on CB position input. The parameter UnsucClByCBChk should
then be set to CBCheck, and a timer tUnsucCl should also be set. If the CB does not
respond to the closing command and does not close, but remains open, the output
UNSUCCL is set high after time tUnsucCl.

Section 11
Control
initiate
block start AND
OR UNSUCCL
AND S
shot 0
R
UnsucClByCBchk = CBcheck
Pulse AR (Closing) OR tUnsucCl

AND
AND t
CBPOS CBclosed
eno5000786.vsd
Figure 176: Issue of signal UNSUCCL, unsuccessful reclosing
Automatic continuation of the reclosing sequence

The auto-reclosing function can be programmed to proceed to the following reclosing
shots (if selected) even if the start signals are not received from the protection
functions, but the breaker is still not closed. This is done by setting parameter
AutoCont = On and tAutoContWait to the required delay for the function to proceed
without a new start.
tAutoContWait
t
AND
CLOSECB
AND
S Q
AND
CBPOS CBClosed
OR
initiate
START OR
en05000787.vsd
Figure 177: Automatic proceeding of shot 2 to 5
Start of reclosing from CB open information

If a user wants to apply starting auto-reclosing from CB open position instead of from
protection trip signals, the function offers such a possibility. This starting mode is

Section 11
Control
selected by a setting parameter StartByCBOpen = On. One needs then to block

reclosing at all manual trip operations. Typically one also set CBAuxContType =
NormClosed and connect a CB auxiliary contact of type NC (normally closed, 52b)
to inputs CBPOS and START. When the signal changes from CB closed to CB open
an auto-reclosing start pulse is generated and latched in the function, subject to the
usual checks. Then the reclosing sequence continues as usual. One needs to connect
signals from manual tripping and other functions, which shall prevent reclosing, to
the input INHIBIT.
StartByCBOpen = On
START AND
STARTHS AND
start
³1
100 ms
AND
100 ms
AND
en05000788.vsd
Figure 178: Pulsing of the start inputs at "StartByCBOpen=On"
11.2.2.6 Time sequence diagrams
Some examples of the timing of internal and external signals at typical transient and
permanent faults are shown below in figures 179 to 182.

Section 11
Control
Fault
CB POS
Closed Open Closed
CB READY
START (Trip)
SYNC
tReclaim
READY
INPROG
1PT1
ACTIVE
CLOSE CB t1 1Ph tPulse
PREP3P
SUCCL
Time
en04000196.vsd
Figure 179: Transient single-phase fault. Single -phase reclosing
Fault
CB POS Open
Closed Open C C
CB READY
START (Trip)
TR3P
SYNC
READY
INPROGR
3PT1 t1 3Ph
3PT2 t2 3Ph
ACTIVE tReclaim
CLOSE CB tPulse tPulse
PREP3P
UNSUCCL
Time
en04000197.vsd
Figure 180: Permanent fault. Three-phase trip. Two-shot reclosing

Section 11
Control
Fault
AR01-CBCLOSED
AR01-CBREADY(CO)
AR01-START
AR01-TR3P
AR01-SYNC
AR01-READY
AR01-INPROGR
AR01-1PT1
AR01-T1
AR01-T2
AR01-CLOSECB t1s
AR01-P3P
AR01-UNSUC
tReclaim
en04000198.vsd
Figure 181: Permanent single-phase fault. Program 1/2/3ph, single-phase

single-shot reclosing
Fault
AR01-CBCLOSED
AR01-CBREADY(CO)
AR01-START
AR01-TR3P
AR01-SYNC
AR01-READY
AR01-INPROGR
AR01-1PT1
AR01-T1
AR01-T2
t2
AR01-CLOSECB t1s
AR01-P3P
AR01-UNSUC
tReclaim
en04000199.vsd
Figure 182: Permanent single-phase fault. Program 1ph + 3ph or 1/2ph + 3ph,
two-shot reclosing

Section 11
Control

AR01-
SMBRREC
ON BLOCKED
OFF SET ON
BLKON READY
BLKOFF ACT IVE
RESET SUCCL
INHIBIT UNSUCCL
START INPROGR
ST ART HS 1PT1
T RSOT F 2PT1
SKIPHS 3PT1
TR2P 3PT2
TR3P 3PT3
T HOLHOLD 3PT4
CBREADY 3PT5
CBPOS PERMIT 1P
PLCLOST PREP3P
SYNC CLOSECB
WAIT WFMAST ER
RST COUNT COUNT 1P
COUNT 2P
COUNT 3P1
COUNT 3P2
COUNT 3P3
COUNT 3P4
COUNT 3P5
COUNT AR
en04000402.vsd
Figure 183: AR function block
Table 175: Input signals for the SMBRREC_79 (AR01-) function block
Signal Description
ON Switches the AR on (at Operation = ExternalCtrl)
OFF Switches the AR off (at Operation = ExternalCtrl)
BLKON Sets the AR in blocked state
BLKOFF Releases the AR from the blocked state
RESET Resets the AR to initial conditions
INHIBIT Interrupts and inhibits reclosing sequence
START Reclosing sequence starts by a protection trip signal
STARTHS Start HS reclosing without SC: t13PhHS
TRSOTF Makes AR to continue to shots 2-5 at a trip from SOTF
SKIPHS Will skip the high speed shot and continue on delayed shots.
TR2P Signal to the AR that a two-phase tripping occurred
TR3P Signal to the AR that a three-phase tripping occurred
THOLHOLD Hold the AR in wait state
CBREADY CB must be ready for CO/OCO operation to allow start / close
CBPOS Status of the circuit breaker Closed/Open
PLCLOST Power line carrier or other form of permissive sigÂnal lost
SYNC Synchronizing check fulfilled (for 3Ph attempts)
WAIT Wait for master (in Multi-breaker arrangements)
RSTCOUNT Resets all counters

Section 11
Control
Table 176: Output signals for the SMBRREC_79 (AR01-) function block
Signal Description
BLOCKED The AR is in blocked state
SETON The AR operation is switched on, operative
READY Indicates that the AR function is ready for a new sequence
ACTIVE Reclosing sequence in progress
SUCCL Activated if CB closes during the time tUnsucCl
UNSUCCL Reclosing unsuccessful, signal resets after the reclaim time
INPROGR Reclosing shot in progress, activated during open time
1PT1 Single-phase reclosing is in progress, shot 1
2PT1 Two-phase reclosing is in progress, shot 1
3PT1 Three-phase reclosing in progress, shot 1
PERMIT1P Permit single-phase trip, inverse signal to PREP3P
PREP3P Prepare three-phase trip, control of the next trip operation
CLOSECB Closing command for CB
WFMASTER Signal to Slave issued by Master for sequential reclosing
COUNT1P Counting the number of single-phase reclosing shots
COUNT2P Counting the number of two-phase reclosing shots
COUNT3P1 Counting the number of three-phase reclosing shot 1
COUNTAR Counting total number of reclosing shots

Section 11
Control
Table 177: Parameter group settings for the SMBRREC_79 (AR01-) function
Operation Off - External ctrl - 0 = Off, 1 =
External ctrl ExternalCtrl, 2 = On
On
NoOfShots 1 - 1 - Max number of
2 reclosing shots 1-5
3
4
5
FirstShot 3 phase - 1/2/3ph - Restriction of fault
1/2/3ph type for shot 1
1/2ph
1ph+1*2ph
1/2ph+1*3ph
1ph+1*2/3ph
StartByCBOpen Off - Off - To be set ON if AR is
On to be started by CB
open position
CBAuxContType NormClosed - NormOpen - Select the CB aux
NormOpen contact type NC/NO
for CBPOS input
CBReadyType CO - CO - Select type of circuit
OCO breaker ready signal
CO/OCO
t1 1Ph 0.000 - 60.000 0.001 1.000 s Open time for shot 1,
single-phase
two-phase
delayed reclosing 3ph
t1 3PhHS 0.000 - 60.000 0.001 0.400 s Open time for shot 1,
high speed reclosing
3ph
three-phase
three-phase
three-phase
three-phase
tReclaim 0.00 - 6000.00 0.01 60.00 s Duration of the
reclaim time
tSync 0.00 - 6000.00 0.01 30.00 s Maximum wait time
for synchrocheck OK
Extended t1 Off - Off - Extended open time
On for loss of permissive
channel
tExtended t1 0.000 - 60.000 0.001 0.400 s Open time extended
by this value if
Extended t1 is true

Section 11
Control

tInhibit 0.000 - 60.000 0.001 5.000 s Inhibit reclosing reset
time
tTrip 0.000 - 60.000 0.001 0.200 s Maximum trip pulse
duration
CutPulse Off - Off - Shorten closing pulse
On at a new trip Off/On
tPulse 0.000 - 60.000 0.001 0.200 s Duration of the circuit
breaker closing pulse
Follow CB Off - Off - Advance to next shot
On if CB has been closed
during dead time
tCBClosedMin 0.00 - 6000.00 0.01 5.00 s Min time that CB must
be closed before new
sequence allows
AutoCont Off - Off - Continue with next
On reclosing-shot if
breaker did not close
tAutoContWait 0.000 - 60.000 0.001 2.000 s Wait time after close
command before
proceeding to next
shot
UnsucClByCBChk NoCBCheck - NoCBCheck - Unsuccessful closing
CB check signal obtained by
checking CB position
BlockByUnsucCl Off - Off - Block AR at
On unsuccessful
reclosing
tUnsucCl 0.00 - 6000.00 0.01 30.00 s Wait time for CB
before indicating
unsuccessful/
successful
Priority None - None - Priority selection
Low between adjacent
High terminals None/Low/
High
tWaitForMaster 0.00 - 6000.00 0.01 60.00 s Maximum wait time
for release from
Master

Section 11
Control
Table 178: Autorecloser (RREC, 79)

Number of autoreclosing shots 1-5 -
Number of autoreclosing programs 8 -
Autoreclosing open time:
shot 1 - t1 1Ph (0.000-60.000) s ± 0.5% ± 10 ms
shot 1 - t1 2Ph
shot 1 - t1 3PhHS
shot 1 - t1 3PhDld
shot 2 - t2 (0.00-6000.00) s
shot 3 - t3
shot 4 - t4
shot 5 - t5
Extended autorecloser open time (0.000-60.000) s
Autorecloser maximum wait time for (0.00-6000.00) s
sync
Maximum trip pulse duration (0.000-60.000) s
Inhibit reset time (0.000-60.000) s
Reclaim time (0.00-6000.00) s
Minimum time CB must be closed (0.00-6000.00) s
before AR becomes ready for
autoreclosing cycle
Circuit breaker closing pulse length (0.000-60.000) s
CB check time before unsuccessful (0.00-6000.00) s
Wait for master release (0.00-6000.00) s
Wait time after close command before (0.000-60.000) s
proceeding to next shot
11.3 Apparatus control (APC)
11.3.1 Introduction
The apparatus control is a function for control and supervision of circuit breakers,
disconnectors and earthing switches within a bay. Permission to operate is given after
evaluation of conditions from other functions such as interlocking, synchrocheck,
operator place selection and external or internal blockings.

A bay can handle, for example a power line, a transformer, a reactor, or a capacitor
bank. The different primary apparatuses within the bay can be controlled via the
apparatus control function directly by the operator or indirectly by automatic
sequences.
Because a primary apparatus can be allocated to many functions within a Substation

Automation system, the object-oriented approach with a function module that handles

Section 11
Control
the interaction and status of each process object ensures consistency in the process
information used by higher-level control functions.
Primary apparatuses such as breakers and disconnectors are controlled and supervised
by one software module (SCSWI) each. Because the number and type of signals
connected to a breaker and a disconnector are almost the same, the same software is
used to handle these two types of apparatuses.
The software module is connected to the physical process in the switchyard via an
interface module by means of a number of digital inputs and outputs. One type of
interface module is intended for a circuit breaker (SXCBR) and another type is
intended for a disconnector or earthing switch (SXSWI). Four types of function blocks
are available to cover most of the control and supervision within the bay. These
function blocks are interconnected to form a control function reflecting the switchyard
configuration. The total number used depends on the switchyard configuration. These
four types are:
• Bay control QCBAY

• Switch controller SCSWI
• Circuit breaker SXCBR
• Circuit switch SXSWI
The three latter functions are logical nodes according to IEC 61850. The function
blocks LocalRemote and LocRemControl, to handle the local/remote switch, and the
function blocks QCRSV and RESIN, for the reservation function, also belong to the
apparatus control function. The principles of operation, function block, input and
output signals and setting parameters for all these functions are described below.
11.3.3 Bay control (QCBAY)
This function is used to handle the selection of the operator place per bay. The bay
control function also provides blocking functions that can be distributed to different
apparatuses within the bay.
The functionality of the bay control function is not defined in the IEC 61850–8–1
standard, which means that the function is a vendor specific logical node.
The function sends information about the Permitted Source To Operate (PSTO) and
blocking conditions to other functions within the bay e.g. switch control functions,
voltage control functions and measurement functions.
Local panel switch

The local panel switch is a switch that defines the operator place selection. The switch
connected to this function can have three positions remote/local/off. The positions

Section 11
Control
are here defined so that remote means that operation is allowed from station/remote
level and local from the IED level. The local/remote switch is normally situated on
the control/protection IED itself, which means that the position of the switch and its
validity information are connected internally, and not via I/O boards. When the switch
is mounted separately on the IED the signals are connected to the function via I/O
boards.
When the local panel switch is in Off position all commands from remote and local
level will be ignored. If the position for the local/remote switch is not valid the PSTO
output will always be set to faulty state (3), which means no possibility to operate.
To adapt the signals from the local HMI or from an external local/remote switch, the
function blocks LocalRemote and LocRemControl are needed and connected to
QCBAY. For more information, see section "Local/Remote switch (LocalRemote,
LocRemControl)".
Permitted Source To Operate (PSTO)

The actual state of the operator place is presented by the value of the Permitted Source
To Operate, PSTO signal. The PSTO value is evaluated from the local/remote switch
position according to table 179. In addition, there is one configuration parameter that
affects the value of the PSTO signal. If the parameter AllPSTOValid is set and LR-
switch position is in Local or Remote state, the PSTO value is set to 5 (all), i.e. it is
permitted to operate from both local and remote level without any priority. When the
external panel switch is in Off position the PSTO value shows the actual state of
switch, i.e. 0. In this case it is not possible to control anything.
Table 179: PSTO values for different Local panel switch positions
Local panel switch PSTO value AllPSTOValid Possible locations that shall be able to
positions (configuration operate
parameter)
0 = Off 0 -- Not possible to operate
1 = Local 1 FALSE Local Panel
1 = Local 5 TRUE Local or Remote level without any
priority
2 = Remote 2 FALSE Remote level
2 = Remote 5 TRUE Local or Remote level without any
priority
3 = Faulty 3 -- Not possible to operate
Blockings
The blocking states for position indications and commands are intended to provide
the possibility for the user to make common blockings for the functions configured
within a complete bay.
The blocking facilities provided by the bay control function are the following:

Section 11
Control
• Blocking of position indications, BL_UPD. This input will block all inputs
related to apparatus positions for all configured functions within the bay.
• Blocking of commands, BL_CMD. This input will block all commands for all
configured functions within the bay.
• Blocking of function, BLOCK, signal from DO (Data Object) Behavior (IEC
61850–8–1). If DO Behavior is set to "blocked" it means that the function is
active, but no outputs are generated, no reporting, control commands are rejected
and functional and configuration data is visible.
The switching of the Local/Remote switch requires an Control level password. This
will be requested at attempt to operate if authority levels has been defined in the IED.
Default password is "abb".

CB01-
QCBAY
LR_OFF PSTO
LR_LOC UPD_BLKD
LR_REM CMD_BLKD
LR_VALID
BL_UPD
BL_CMD
en05000796.vsd
Figure 184: CB function block
Table 180: Input signals for the QCBAY (CB01-) function block
Signal Description
LR_OFF External Local/Remote switch is in Off position
LR_LOC External Local/Remote switch is in Local position
LR_REM External Local/Remote switch is in Remote position
LR_VALID Data representing the L/R switch position is valid
BL_UPD Steady signal to block the position updates
BL_CMD Steady signal to block the command
Table 181: Output signals for the QCBAY (CB01-) function block
Signal Description
PSTO The value for the operator place allocation
UPD_BLKD The update of position is blocked
CMD_BLKD The function is blocked for commands

Section 11
Control
Table 182: General settings for the QCBAY (CB01-) function

AllPSTOValid Priority - Priority - The priority of
No priority originators
11.3.4 Local/Remote switch (LocalRemote, LocRemControl)
The signals from the local LCD HMI or from an external local/remote switch are
applied via function blocks LocalRemote and LocRemControl to the Bay control
QCBAY function block. A parameter in function block LocalRemote is set to choose
if the switch signals are coming from the local LCD HMI or from an external hardware
switch connected via binary inputs.
The function block LocalRemote handles the signals coming from the local/remote
switch. The connections are seen in figure 185, where the inputs on function block
LocalRemote are connected to binary inputs if an external switch is used. When a
local LCD HMI is used, the inputs are not used and are set to FALSE in the
configuration. The outputs from the LocalRemote function block control the output
PSTO (Permitted Source To Operate) on QCBAY.

Section 11
Control
LR01- CB01-
LocalRemote QCBAY
CTRLOFF OFF LR_OFF PSTO
LOCCTRL LOCAL LR_LOC UPD_BLKD
REMCTRL REMOTE LR_REM CMD_BLKD
LHMICTRL VALID LR_VALID
BL_UPD
BL_CMD
LR02- CB02-
LocalRemote QCBAY
CTRLOFF OFF LR_OFF PSTO
LOCCTRL LOCAL LR_LOC UPD_BLKD
REMCTRL REMOTE LR_REM CMD_BLKD
LHMICTRL VALID LR_VALID
BL_UPD
BL_CMD
LRC1-
LocRemControl
PSTO1 HMICTR1
PSTO2 HMICTR2
PSTO3 HMICTR3
PSTO4 HMICTR4
PSTO5 HMICTR5
PSTO6 HMICTR6
PSTO7 HMICTR7
PSTO8 HMICTR8
PSTO9 HMICTR9
PSTO10 HMICTR10
PSTO11 HMICTR11
PSTO12 HMICTR12
en05000250.vsd
Figure 185: Configuration for the local/remote handling for a local LCD HMI with
two bays and two screen pages
If the IED contains control functions for several bays, the local/remote position can
be different for the included bays. When the local LCD HMI is used the position of
the local/remote switch can be different depending on which single line diagram
screen page that is presented on the local HMI. The function block LocRemControl
controls the presentation of the LEDs for the local/remote position to applicable bay
and screen page.
The local-remote switching is under strict password control. This is activated by

defining an administrator and user with their passwords. Default password i “abb”.
The selected position local-remote or local and remote is indicated by LEDs.
LR01-
LocalRemote
CT RLOFF OFF
LOCCT RL LOCAL
REMCT RL REMOT E
LHMICT RL VALID
en05000360.vsd
Figure 186: LR function block

Section 11
Control
LRC1-
LocRemControl
PST O1 HMICT R1
PST O2 HMICT R2
PST O3 HMICT R3
PST O4 HMICT R4
PST O5 HMICT R5
PST O6 HMICT R6
PST O7 HMICT R7
PST O8 HMICT R8
PST O9 HMICT R9
PST O10 HMICT R10
PST O11 HMICT R11
PST O12 HMICT R12
en05000361.vsd
Figure 187: LRC function block
Table 183: Input signals for the LocalRemote (LR01-) function block
Signal Description
CTRLOFF Disable control
LOCCTRL Local in control
REMCTRL Remote in control
LHMICTRL LHMI control
Table 184: Output signals for the LocalRemote (LR01-) function block
Signal Description
OFF Control is disabled
LOCAL Local control is activated
REMOTE Remote control is activated
VALID Outputs are valid
Table 185: Input signals for the LocRemControl (LRC1-) function block
Signal Description
PSTO1 PSTO input channel 1

Section 11
Control
Signal Description
Table 186: Output signals for the LocRemControl (LRC1-) function block
Signal Description
HMICTR1 Bitmask output 1 to local remote LHMI input
Table 187: General settings for the LocalRemote (LR01-) function

ControlMode Internal LR-switch - Internal LR-switch - Control mode for
External LR- internal/external LR-
switch switch
11.3.5 Switch controller (SCSWI)
The Switch controller (SCSWI) initializes and supervises all functions to properly
select and operate switching primary apparatuses. The Switch controller may handle
and operate on one three-phase device or three one-phase switching devices.

Section 11
Control
The function is provided with verification checks for the select - execute sequence,
i.e. checks the conditions prior each step of the operation. The involved functions for
these condition verifications are interlocking, reservation, blockings and
synchrocheck.
Command handling
Two types of command models can be used. The two command models are "direct
with enhanced security" and "SBO (Select-Before-Operate) with enhanced security".
Which one of these two command models that are used is defined by the parameter
CtlModel. The meaning with "direct with enhanced security" model is that no select
is required. The meaning with "SBO with enhanced security" model is that a select
is required before execute.
In this function only commands with enhanced security is supported regarding

changing of the position. With enhanced security means that the command sequence
is supervised in three steps, the selection, command evaluation and the supervision
of position. Each step ends up with a pulsed signal to indicate that the respective step
in the command sequence is finished. If an error occurs in one of the steps in the
command sequence, the sequence is terminated and the error is mapped into the
enumerated variable "cause" attribute belonging to the pulsed response signal for the
IEC61850 communication. The last cause L_CAUSE can be read from the function
block and used for example at commissioning. The meaning of the cause signals can
be found in table 2.
There is not any relation between the command direction and the
actual position. For example, if the switch is in close position it is
possible to execute a close command.
Before an executing command, an evaluation of the position is done. If the parameter

PosDependent is true and the position is in intermediate state or in bad state no
executing command is send. If the parameter is false the execution command is send
independent of the position value.
Evaluation of position
In the case when there are three one-phase switches connected to the switch control
function, the switch control will "merge" the position of the three switches to the
resulting three-phase position. In the case when the position differ between the one-
phase switches, following principles will be applied:
All switches in open position: switch control position = open

All switches in close position: switch control position = close
One switch =open, two switches= close (or switch control position = intermediate
inversely):
Any switch in intermediate position: switch control position = intermediate
Any switch in bad state: switch control position = bad state

Section 11
Control
The time stamp of the output three-phase position from switch control will have the
time stamp of the last changed phase when it goes to end position. When it goes to
intermediate position or bad state, it will get the time stamp of the first changed phase.
In addition, there is also the possibility that one of the one-phase switches will change
position at any time due to a trip. Such situation is here called pole discordance and
is supervised by this function. In case of a pole discordance situation, i.e. the position
of the one-phase switches are not equal for a time longer than the setting
tPoleDiscord, an error signal POLEDISC will be set.
In the supervision phase, the switch controller function evaluates the "cause" values
from the switch modules XCBR/XSWI. At error the "cause" value with highest
priority is shown.
Blocking principles
The blocking signals are normally coming from the bay control function (QCBAY)
and via the IEC61850 communication from the operator place.
The different blocking possibilities are:
• Block/deblock of command. It is used to block command for operation of

position.
• Blocking of function, BLOCK, signal from DO (Data Object) Behavior
(IEC61850). If DO Behavior is set to "blocked" it means that the function is
The different block conditions will only affect the operation of this
function, i.e. no blocking signals will be "forwarded" to other
functions. The above blocking outputs are stored in a non-volatile
memory.
Interaction with synchrocheck and synchronizing functions

The switch controller works in conjunction with the synchrocheck and the
synchronizing function SECRSYN. It is assumed that the synchrocheck function is
continuously in operation and gives the result to the SCSWI. The result from the
synchrocheck function is evaluated during the close execution. If the operator
performs an override of the synchrocheck, the evaluation of the synchrocheck state
is omitted. When there is a positive confirmation from the synchrocheck function,
the switch controller SCSWI will send the close signal EXE_CL to the switch function
SXCBR.
When there is no positive confirmation from the synchrocheck function, the SCSWI
will send a start signal START_SY to the synchronizing function, which will send
the closing command to the SXCBR when the synchronizing conditions are fulfilled,
see figure 188. If no synchronizing function is included, the timer for supervision of
the "synchronizing in progress signal" is set to 0, which means no start of the

Section 11
Control
synchronizing function. The SCSWI will then set the attribute "blocked-by-
synchrocheck" in the "cause" signal. See also the time diagram in figure 192.
SCSWI SXCBR
EXE_CL
OR CLOSE
SYNC_OK
START_SY
SY_INPRO
SECRSYN
CLOSE. CB
Synchro Synchronizing
Check function
en05000091.vsd
Figure 188: Example of interaction between SCSWI, SECRSYN (synchrocheck

and synchronizing function) and SXCBR function
Time diagrams
The SCSWI function has timers for evaluating different time supervision conditions.
These timers are explained here.
The timer tSelect is used for supervising the time between the select and the execute
command signal, i.e. the time the operator has to perform the command execution
after the selection of the object to operate.
select
execute command
tSelect
timer t1 t1>tSelect, then long-
operation-time in 'cause'
is set
en05000092.vsd
Figure 189: tSelect
The parameter tResResponse is used to set the maximum allowed time to make the
reservation, i.e. the time between reservation request and the feedback reservation
granted from all bays involved in the reservation function.

Section 11
Control
select
reservation request RES_RQ
reservation granted RES_GRT
command termination
tResResponse t1>tResResponse, then
timer 1-of-n-control in 'cause'
t1 is set
en05000093.vsd
Figure 190: tResResponse
The timer tExecutionFB supervises the time between the execute command and the
command termination, see figure 191.
execute command
position L1 open
close
position L2 open
close
position L3 open
close
cmd termination L1
cmd termination L2
cmd termination L3
cmd termination *
position open
close
tExecutionFB t1>tExecutionFB, then

timer long-operation-time in
t1 'cause' is set
* The cmd termination will be delayed one execution sample.

en05000094.vsd
Figure 191: tExecutionFB
The parameter tSynchrocheck is used to define the maximum allowed time between
the execute command and the input SYNC_OK to become true. If SYNC_OK=true
at the time the execute command signal is received, the timer "tSynchrocheck" will
not start. The start signal for the synchronizing is obtained if the synchrocheck
conditions are not fulfilled.

Section 11
Control
execute command
SYNC_OK
tSynchrocheck
t1
START_SY
SY_INPRO
tSynchronizing t2>tSynchronizing, then

t2 blocked-by-synchrocheck in
'cause' is set
en05000095.vsd
Figure 192: tSynchroCheck and tSynchronizing
Error handling
Depending on what error that occurs during the command sequence the error signal
will be set with a value. Table 188 describes vendor specific cause values in addition
to these specified in IEC 61850-8-1 standard.The list of values of the “cause” are in
order of priority. The values are available over the IEC 61850. An output L_CAUSE
on the function block indicates the latest value of the error during the command.
Table 188: Values for "cause" signal in priority order

Apparatus control Description
function
–22 wrongCTLModel
–23 blockedForCommand
–24 blocked-for-open-command
–25 blocked-for-close-command
–30 longOperationTime
–31 switch-not-start-moving
–32 persistent-intermediate-state
–33 switch-returned-to-initial-position
–34 switch-in-bad-state
–35 not-expected-final-position

Section 11
Control

CS01-
SCSWI
BLOCK EXE_OP
PSTO EXE_CL
L_SEL SELECTED
L_OPEN RES_RQ
L_CLOSE START_SY
AU_OPEN POSITION
AU_CLOSE OPENPOS
BL_CMD CLOSEPOS
RES_GRT POLEDISC
RES_EXT CMD_BLK
SY_INPRO L_CAUSE
SYNC_OK XOUT
EN_OPEN
EN_CLOSE
XPOS1
XPOS2
XPOS3
en05000337.vsd
Figure 193: CS function block
Table 189: Input signals for the SCSWI (CS01-) function block
Signal Description
PSTO Operator place selection
L_SEL Select signal from local panel
L_OPEN Open signal from local panel
L_CLOSE Close signal from local panel
AU_OPEN Used for local automation function
AU_CLOSE Used for local automation function
BL_CMD Steady signal for block of the command
RES_GRT Positive acknowledge that all reservations are made
RES_EXT Reservation is made externally
SY_INPRO Synchronizing function in progress
SYNC_OK Closing is permitted at set to true by the synchrocheck
EN_OPEN Enables open operation
EN_CLOSE Enables close operation
XPOS1 Group signal for XCBR input

Section 11
Control
Table 190: Output signals for the SCSWI (CS01-) function block
Signal Description
EXE_OP Execute command for open direction
EXE_CL Execute command for close direction
SELECTED The select conditions are fulfilled
RES_RQ Request signal to the reservation function
START_SY Starts the synchronizing function
POSITION Position indication
OPENPOS Open position indication
CLOSEPOS Closed position indication
POLEDISC The positions for poles L1-L3 are not equal after a set time
CMD_BLK Commands are blocked
L_CAUSE Latest value of the error indication during command
XOUT Execution information to XCBR/XSWI
Table 191: General settings for the SCSWI (CS01-) function

CtlModel Dir Norm - SBO Enh - Specifies the type for
SBO Enh (ABB) control model
Dir Norm (ABB) according to IEC
SBO Enh 61850
PosDependent Always permitted - Always permitted - Permission to operate
Not perm at 00/11 depending on the
position
tSelect 0.000 - 60.000 0.001 30.000 s Max time between
select and execute
signals
tResResponse 0.000 - 60.000 0.001 5.000 s Allowed time from
reservation request to
reservation granted
tSynchrocheck 0.00 - 6000.00 0.01 10.00 s Allowed time for
synchrocheck to fulfil
close conditions
tSynchronizing 0.000 - 60.000 0.001 0.000 s Supervision time to
get the signal
synchronizing in
progress
tExecutionFB 0.000 - 60.000 0.001 30.000 s Max time from
command execution
to termination
tPoleDiscord 0.000 - 60.000 0.001 2.000 s Allowed time to have
discrepancy between
the poles

Section 11
Control
11.3.6 Circuit breaker (SXCBR)
The purpose of this function is to provide the actual status of positions and to perform
the control operations, i.e. pass all the commands to primary apparatuses in the form
of circuit breakers via output boards and to supervise the switching operation and
position.
The intended user of this function is other functions such as e.g. Switch controller,
protection functions, autorecloser function or an IEC 61850 client residing in another
IED or the operator place. This switch function executes commands, evaluate block
conditions and evaluate different time supervision conditions. Only if all conditions
indicate a switch operation to be allowed, the function performs the execution
command. In case of erroneous conditions, the function indicates an appropriate
"cause" value.
The function has an operation counter for closing and opening commands. The
counter value can be read remotely from the operator place. The value is reset from
a binary input or remotely from the operator place.
Local/Remote switch
One binary input signal LR_SWI is included in this function to indicate the local/
remote switch position from switchyard provided via the I/O board. If this signal is
set to TRUE it means that change of position is allowed only from switchyard level.
If the signal is set to FALSE it means that command from IED or higher level is
permitted. When the signal is set to TRUE all commands (for change of position)
from internal IED clients are rejected, even trip commands from protection functions
are rejected. The functionality of the local/remote switch is described in figure 194.
Local= Operation at
UE switch yard level
TR
From I/O switchLR

FAL
SE
Remote= Operation at
IED or higher level
en05000096.vsd
Figure 194: Local/Remote switch
Blocking principles
The function includes several blocking principles. The basic principle for all blocking
signals is that they will affect commands from all other clients e.g. operators place,
protection functions, autoreclosure etc.

Section 11
Control
The blocking possibilities are:
• Block/deblock for open command. It is used to block operation for open

command. Note that this block signal also affects the input OPEN for immediate
command.
• Block/deblock for close command. It is used to block operation for close
command. Note that this block signal also affects the input CLOSE for immediate
command.
• Update block/deblock of positions. It is used to block the updating of position
values. Other signals related to the position will be reset.
The above blocking outputs are stored in a non-volatile memory.
Substitution
The substitution part in this function is used for manual set of the position for the
switch. The typical use of substitution is that an operator enters a manual value
because that the real process value is erroneous of some reason. The function will
then use the manually entered value instead of the value for positions determined by
the process.
It is always possible to make a substitution, independently of the

position indication and the status information of the I/O board. When
substitution is enabled, the position values are blocked for updating
and other signals related to the position are reset. The substituted
values are stored in a non-volatile memory.
Time diagrams
There are two timers for supervising of the execute phase, tStartMove and
tIntermediate. tStartMove supervises that the primary device starts moving after the
execute output pulse is sent. tIntermediate defines the maximum allowed time for
intermediate position. Figure 195 explains these two timers during the execute phase.

Section 11
Control
EXE_CL AdaptivePulse = TRUE

Close pulse duration
OPENPOS
CLOSEPOS
if t1 > tStartMove then

tStartMove timer "switch-not-start-moving"
t1 attribute in 'cause' is set
tStartMove
if t2 > tIntermediate then

tIntermediate timer "persisting-intermediate-state"
tIntermediate
en05000097.vsd
Figure 195: The timers tStartMove and tIntermediate
The timers tOpenPulse and tClosePulse are the length of the execute output pulses
to be sent to the primary equipment. Note that the output pulses for open and close
command can have different pulse lengths. The pulses can also be set to be adaptive
with the configuration parameter AdaptivePulse. Figure 196 shows the principle of
the execute output pulse. The adaptively parameter will have affect on both execute
output pulses.
OPENPOS
CLOSEPOS
AdaptivePulse=FALSE
EXE_CL
tClosePulse
AdaptivePulse=TRUE
EXE_CL
tClosePulse
en05000098.vsd
Figure 196: Execute output pulse
If the pulse is set to be adaptive, it is not possible for the pulse to exceed
tOpenPulse or tClosePulse.
The execute output pulses are reset when:

Section 11
Control
• the new expected final position is reached and the configuration parameter
AdaptivePulse is set to true
• the timer tOpenPulse or tClosePulse has elapsed
• an error occurs due to the switch does not start moving, i.e. tStartMove has
elapsed.
If the start position indicates bad state (OPENPOS=1 and

CLOSEPOS =1) when a command is executed the execute output
pulse resets only when timer "tOpenPulse" or "tClosePulse" has
elapsed.
There is one exception from the first item above. If the primary device is in open
position and an open command is executed or if the primary device is in close position
and a close command is executed. In these cases, with the additional condition that
the configuration parameter AdaptivePulse is true, the execute output pulse is always
activated and resets when tStartMove has elapsed. If the configuration parameter
AdaptivePulse is set to false the execution output remains active until the pulse
duration timer has elapsed.
An example of when a primary device is open and an open command is executed is

shown in figure 197 .
OPENPOS
CLOSEPOS
EXE_OP AdaptivePulse=FALSE
tOpenPulse
EXE_OP AdaptivePulse=TRUE
tOpenPulse
tStartMove timer
en05000099.vsd
Figure 197: Open command with open position indication
Error handling
will be set with a value. Table 192 describes vendor specific cause values in addition
to these specified in IEC 61850-8-1 standard. The list of values of the “cause” are in
order of priority. The values are available over the IEC 61850. An output L_CAUSE
on the function block indicates the latest value of the error during the command.

Section 11
Control
Table 192: Vendor specific cause values for Apparatus control in priority order
Apparatus control Description
function
–22 wrongCTLModel
–23 blockedForCommand
–24 blocked-for-open-command
–25 blocked-for-close-command
–30 longOperationTime
–31 switch-not-start-moving
–32 persistent-intermediate-state
–33 switch-returned-to-initial-position
–34 switch-in-bad-state
–35 not-expected-final-position

XC01-
SXCBR
BLOCK GRPConABS1
LR_SWI EXE_OP
OPEN GRPConABS2
CLOSE EXE_CL
BL_OPEN SUBSTED
BL_CLOSE OP_BLKD
BL_UPD CL_BLKD
POSOPEN UPD_BLKD
POSCLOSE POSITION
TR_OPEN OPENPOS
TR_CLOSE CLOSEPOS
RS_CNT TR_POS
XIN CNT_VAL
TERVALUE L_CAUSE
OSEVALUE
PENVALUE
en05000338.vsd
Figure 198: XC function block
Table 193: Input signals for the SXCBR (XC01-) function block
Signal Description
LR_SWI Local/Remote switch indication from switchyard
OPEN Pulsed signal used to immediately open the switch
CLOSE Pulsed signal used to immediately close the switch
BL_OPEN Signal to block the open command
BL_CLOSE Signal to block the close command

Section 11
Control
Signal Description
BL_UPD Steady signal for block of the position updating
POSOPEN Signal for open position of apparatus from I/O
POSCLOSE Signal for close position of apparatus from I/O
TR_OPEN Signal for open position of truck from I/O
TR_CLOSE Signal for close position of truck from I/O
RS_CNT Resets the operation counter
XIN Execution information from CSWI
Table 194: Output signals for the SXCBR (XC01-) function block
Signal Description
XPOS Group signal for XCBR output
EXE_OP Executes the command for open direction
EXE_CL Executes the command for close direction
SUBSTED Indication that the position is substituted
OP_BLKD Indication that the function is blocked for open commands
CL_BLKD Indication that the function is blocked for close commands
UPD_BLKD The update of position indication is blocked
OPENPOS Apparatus open position
CLOSEPOS Apparatus closed position
TR_POS Truck position indication
CNT_VAL The value of the operation counter
Table 195: General settings for the SXCBR (XC01-) function

tStartMove 0.000 - 60.000 0.001 0.100 s Supervision time for
the apparatus to
move after a
command
tIntermediate 0.000 - 60.000 0.001 0.150 s Allowed time for
intermediate position
AdaptivePulse Not adaptive - Not adaptive - The output resets
Adaptive when a new correct
end position is
reached
tOpenPulse 0.000 - 60.000 0.001 0.200 s Output pulse length
for open command
tClosePulse 0.000 - 60.000 0.001 0.200 s Output pulse length
for close command

Section 11
Control
11.3.7 Circuit switch (SXSWI)
The purpose of this function is to provide the actual status of positions and to perform
the control operations, i.e. pass all the commands to primary apparatuses in the form
of disconnectors or earthing switches via output boards and to supervise the switching
operation and position.
The intended user of this function is other functions such as e.g. Switch controller,
protection functions, autorecloser function or a 61850 client residing in another IED
or the operator place. This switch function executes commands, evaluate block
conditions and evaluate different time supervision conditions. Only if all conditions
indicate a switch operation to be allowed, the function performs the execution
command. In case of erroneous conditions, the function indicates an appropriate
"cause" value.
The function has an operation counter for closing and opening commands. The
counter value can be read remotely from the operator place. The value is reset from
a binary input or remotely from the operator place.
Local/Remote switch
One binary input signal LR_SWI is included in this function to indicate the local/
remote switch position from switchyard provided via the I/O board. If this signal is
set to TRUE it means that change of position is allowed only from switchyard level.
If the signal is set to FALSE it means that command from IED or higher level is
permitted. When the signal is set to TRUE all commands (for change of position)
from internal IED clients are rejected, even trip commands from protection functions
are rejected. The functionality of the local/remote switch is described in figure 199.
Local= Operation at
UE switch yard level
TR
From I/O switchLR

FAL
SE
Remote= Operation at
IED or higher level
en05000096.vsd
Figure 199: Local/Remote switch
Blocking principles
The function includes several blocking principles. The basic principle for all blocking
signals is that they will affect commands from all other clients e.g. operators place,
protection functions, autoreclosure etc.

Section 11
Control
The blocking possibilities are:
• Block/deblock for open command. It is used to block operation for open

command. Note that this block signal also affects the input OPEN for immediate
command.
• Block/deblock for close command. It is used to block operation for close
command. Note that this block signal also affects the input CLOSE for immediate
command.
• Update block/deblock of positions. It is used to block the updating of position
values. Other signals related to the position will be reset.
The above blocking outputs are stored in a non-volatile memory.
Substitution
The substitution part in this function is used for manual set of the position for the
switch. The typical use of substitution is that an operator enters a manual value
because that the real process value is erroneous of some reason. The function will
then use the manually entered value instead of the value for positions determined by
the process.
It is always possible to make a substitution, independently of the

position indication and the status information of the I/O board. When
substitution is enabled, the position values are blocked for updating
and other signals related to the position are reset. The substituted
values are stored in a non-volatile memory.
Time diagrams
There are two timers for supervising of the execute phase, tStartMove and
tIntermediate. tStartMove supervises that the primary device starts moving after the
execute output pulse is sent. tIntermediate defines the maximum allowed time for
intermediate position. Figure 200 explains these two timers during the execute phase.

Section 11
Control
EXE_CL AdaptivePulse = TRUE

Close pulse duration
OPENPOS
CLOSEPOS
if t1 > tStartMove then

tStartMove timer "switch-not-start-moving"
tStartMove
if t2 > tIntermediate then

tIntermediate timer "persisting-intermediate-state"
tIntermediate
en05000097.vsd
Figure 200: The timers tStartMove and tIntermediate
The timers tOpenPulse and tClosePulse are the length of the execute output pulses
to be sent to the primary equipment. Note that the output pulses for open and close
command can have different pulse lengths. The pulses can also be set to be adaptive
with the configuration parameter AdaptivePulse. Figure 201 shows the principle of
the execute output pulse. The adaptively parameter will have affect on both execute
output pulses.
OPENPOS
CLOSEPOS
AdaptivePulse=FALSE
EXE_CL
tClosePulse
AdaptivePulse=TRUE
EXE_CL
tClosePulse
en05000098.vsd
Figure 201: Execute output pulse
If the pulse is set to be adaptive, it is not possible for the pulse to exceed
tOpenPulse or tClosePulse.
The execute output pulses are reset when:
• the new expected final position is reached and the configuration parameter
AdaptivePulse is set to true
• the timer tOpenPulse or tClosePulse has elapsed
• an error occurs due to the switch does not start moving, i.e. tStartMove has
elapsed.

Section 11
Control
If the start position indicates bad state (OPENPOS=1 and

CLOSEPOS =1) when a command is executed the execute output
pulse resets only when timer "tOpenPulse" or "tClosePulse" has
elapsed.
There is one exception from the first item above. If the primary device is in open
position and an open command is executed or if the primary device is in close position
and a close command is executed. In these cases, with the additional condition that
the configuration parameter AdaptivePulse is true, the execute output pulse is always
activated and resets when tStartMove has elapsed. If the configuration parameter
AdaptivePulse is set to false the execution output remains active until the pulse
duration timer has elapsed.
An example when a primary device is open and an open command is executed is

shown in figure 202.
OPENPOS
CLOSEPOS
EXE_OP AdaptivePulse=FALSE
tOpenPulse
EXE_OP AdaptivePulse=TRUE
tOpenPulse
tStartMove timer
en05000099.vsd
Figure 202: Open command with open position indication
Error handling
will be set with a value. Table 196 describes possible values of the "cause" in priority
order. The values are available over the IEC 61850. An output L_CAUSE on the
function block indicates the latest value of the error during the command.
Table 196: Values for "cause" signal in priority order

Cause (value) Description
0 no-error
8 blocked-by-mode
2 blocked-by-switching-hierarchy
24 blocked-for-open-command
25 blocked-for-close-command

Section 11
Control
Cause (value) Description

9 blocked-by-process
12 command-already-in-execution
31 switch-not-start-moving
32 persistent-intermediate-state
33 switch-returned-to-initial-position
34 switch-in-bad-state
35 not-expected-final-position

XS01-
SXSWI
BLOCK XPOS
LR_SWI EXE_OP
OPEN EXE_CL
CLOSE SUBSTED
BL_OPEN OP_BLKD
BL_CLOSE CL_BLKD
BL_UPD UPD_BLKD
POSOPEN POSITION
POSCLOSE OPENPOS
RS_CNT CLOSEPOS
XIN CNT_VAL
L_CAUSE
en05000339.vsd
Figure 203: XS function block
Table 197: Input signals for the SXSWI (XS01-) function block
Signal Description
LR_SWI Local/Remote switch indication from switchyard
OPEN Pulsed signal used to immediately open the switch
CLOSE Pulsed signal used to immediately close the switch
BL_OPEN Signal to block the open command
BL_CLOSE Signal to block the close command
BL_UPD Steady signal for block of the position updating
POSOPEN Signal for open position of apparatus from I/O
POSCLOSE Signal for close position of apparatus from I/O
RS_CNT Resets the operation counter
XIN Execution information from CSWI

Section 11
Control
Table 198: Output signals for the SXSWI (XS01-) function block
Signal Description
XPOS Group signal for XSWI output
EXE_OP Executes the command for open direction
EXE_CL Executes the command for close direction
SUBSTED Indication that the position is substituted
OP_BLKD Indication that the function is blocked for open commands
CL_BLKD Indication that the function is blocked for close commands
UPD_BLKD The update of position indication is blocked
OPENPOS Apparatus open position
CLOSEPOS Apparatus closed position
CNT_VAL The value of the operation counter
Table 199: General settings for the SXSWI (XS01-) function

tStartMove 0.000 - 60.000 0.001 3.000 s Supervision time for
the apparatus to
move after a
command
tIntermediate 0.000 - 60.000 0.001 15.000 s Allowed time for
intermediate position
AdaptivePulse Not adaptive - Not adaptive - The output resets
Adaptive when a new correct
end position is
reached
tOpenPulse 0.000 - 60.000 0.001 0.200 s Output pulse length
for open command
tClosePulse 0.000 - 60.000 0.001 0.200 s Output pulse length
for close command
SwitchType Load Break - Disconnector - Switch Type
Disconnector
Earthing Switch
HS Earthing
Switch
11.3.8 Bay reserve (QCRSV)
The purpose of the reservation function is primarily to transfer interlocking

information between IEDs in a safe way and to prevent double operation in a bay,
switchyard part, or complete substation.

Section 11
Control
The function block QCRSV handles the reservation. The function starts to operate in
two ways. It starts when there is a request for reservation of the own bay or if there
is a request for reservation from another bay. It is only possible to reserve the function
if it is not currently reserved. The signal that can reserve the own bay is the input
signal RES_RQx (x=1-8) coming from switch controller SCWI. The signals for
request from another bay are the outputs RE_RQ_B and V_RE_RQ from function
block RESIN. These signals are included in signal EXCH_OUT from RESIN and are
connected to RES_DATA in QCRSV.
The parameters ParamRequestx (x=1-8) are chosen at reservation of the own bay
only (TRUE) or other bays (FALSE). To reserve the own bay only means that no
reservation request RES_BAYS is created.
Reservation request of own bay

If the reservation request comes from the own bay, the function QCRSV has to know
which apparatus the request comes from. This information is available with the input
signal RES_RQx and parameter ParamRequestx (where x=1-8 is the number of the
requesting apparatus). In order to decide if a reservation request of the current bay
can be permitted QCRSV has to know whether the own bay already is reserved by
itself or another bay. This information is available in the output signal RESERVED.
If the RESERVED output is not set, the selection is made with the output RES_GRTx
(where x=1-8 is the number of the requesting apparatus), which is connected to switch
controller SCSWI. If the bay already is reserved the command sequence will be reset
and the SCSWI will set the attribute "1-of-n-control" in the "cause" signal.
Reservation of other bays

When the function QCRSV receives a request from an apparatus in the own bay that
requires other bays to be reserved as well, it checks if it already is reserved. If not, it
will send a request to the other bays that are predefined (to be reserved) and wait for
their response (acknowledge). The request of reserving other bays is done by
activating the output RES_BAYS.
When it receives acknowledge from the bays via the input RES_DATA, it sets the
output RES_GRTx (where x=1-8 is the number of the requesting apparatus). If not
acknowledgement from all bays is received within a certain time defined in SCSWI
(tResResponse), the SCSWI will reset the reservation and set the attribute "1-of-n-
control" in the "cause" signal.
Reservation request from another bay

When another bay requests for reservation, the input BAY_RES in corresponding
function block RESIN is activated. The signal for reservation request is grouped into
the output signal EXCH_OUT in RESIN, which is connected to input RES_DATA
in QCRSV. If the bay is not reserved, the bay will be reserved and the
acknowledgment from output ACK_T_B is sent back to the requested bay. If the bay
already is reserved the reservation is kept and no acknowledgment is sent.

Section 11
Control
Blocking and overriding of reservation

If the function QCRSV is blocked (input BLK_RES is set to true) the reservation is
blocked. That is, no reservation can be made from the own bay or any other bay. This
can be set, for example, via a binary input from an external device to prevent
operations from another operator place at the same time.
The reservation function can also be overridden in the own bay with the OVERRIDE
input signal, i.e. reserving the own bay without waiting for the external acknowledge.
Bay with more than eight apparatuses

If only one instance of QCRSV is used for a bay i.e. use of up to eight apparatuses,
the input EXCH_IN must be set to FALSE.
If there are more than eight apparatuses in the bay there has to be one additional
QCRSV. The both functions QCRSV have to communicate and this is done through
the input EXCH_IN and EXCH_OUT according to figure 10. If more then one
QCRSV are used, the execution order is very important. The execution order must
be in the way that the first QCRSV has a lower number than the next one.
CR01-
QCRSV
EXCH_IN RES_GRT1
RES_RQ1 RES_GRT2
RES_RQ2 RES_GRT3
RES_RQ3 RES_GRT4
RES_RQ4 RES_GRT5
RES_RQ5 RES_GRT6
RES_RQ6 RES_GRT7
RES_RQ7 RES_GRT8
RES_RQ8 RES_BAYS
BLK_RES ACK_TO_B
OVERRIDE RESERVED
RES_DATA EXCH_OUT
CR02-
QCRSV
EXCH_IN RES_GRT1
RES_RQ1 RES_GRT2
RES_BAYS
RES_RQ2 RES_GRT3 ³1
RES_RQ3 RES_GRT4
RES_RQ4 RES_GRT5
RES_RQ5 RES_GRT6 ACK_TO_B
RES_RQ6 RES_GRT7 ³1
RES_RQ7 RES_GRT8
RES_RQ8 RES_BAYS
BLK_RES ACK_TO_B RESERVED
³1
OVERRIDE RESERVED
RES_DATA EXCH_OUT
en05000088.vsd
Figure 204: Connection of two QCRSV function blocks

Section 11
Control

CR01-
QCRSV
EXCH_IN RES_GRT 1
RES_RQ1 RES_GRT 2
RES_RQ2 RES_GRT 3
RES_RQ3 RES_GRT 4
RES_RQ4 RES_GRT 5
RES_RQ5 RES_GRT 6
RES_RQ6 RES_GRT 7
RES_RQ7 RES_GRT 8
RES_RQ8 RES_BAYS
BLK_RES ACK_T O_B
OVERRIDE RESERVED
RES_DAT A EXCH_OUT
en05000340.vsd
Figure 205: CR function block
Table 200: Input signals for the QCRSV (CR01-) function block
Signal Description
EXCH_IN Used for exchange signals between different BayRes blocks
RES_RQ1 Signal for app. 1 that requests to do a reservation
BLK_RES Reservation is not possible and the output signals are reset
OVERRIDE Signal to override the reservation
RES_DATA Reservation data coming from function block ResIn
Table 201: Output signals for the QCRSV (CR01-) function block
Signal Description
RES_GRT1 Reservation is made and the app. 1 is allowed to operate

Section 11
Control
Signal Description
RES_BAYS Request for reservation of other bays
ACK_TO_B Acknowledge to other bays that this bay is reserved
RESERVED Indicates that the bay is reserved
EXCH_OUT Used for exchange signals between different BayRes blocks
Table 202: General settings for the QCRSV (CR01-) function

tCancelRes 0.000 - 60.000 0.001 10.000 s Supervision time for
canceling the
reservation
ParamRequest1 Other bays res. - Only own bay res. - Reservation of the
Only own bay res. own bay only, at
selection of apparatus
1
2
3
4
5
6
7
8

Section 11
Control
11.3.9 Reservation input (RESIN)
The function block RESIN receives the reservation information from other bays. The
number of instances is the same as the number of involved bays (up to 60 instances
are available).
The reservation input function is based purely on Boolean logic conditions. The logic
diagram in figure 206 shows how the output signals are created. The inputs of the
function block are connected to a receive function block representing signals
transferred over the station bus from another bay.
EXCH_IN INT
BIN
ACK_F_B
&
FutureUse
³1
ANY_ACK
BAY_ACK ³1
VALID_TX
&
BAY_VAL ³1
RE_RQ_B
³1
BAY_RES &
V _RE_RQ
³1
BIN
EXCH_OUT
INT
en05000089.vsd
Figure 206: Logic diagram for RESIN
Figure 207 describes the principle of the data exchange between all RESIN modules
in the current bay. There is one RESIN function block per "other bay" used in the
reservation mechanism. The output signal EXCH_OUT in the last RESIN functions
block are connected to the module QCRSV that handles the reservation function in
the own bay. The value to the input EXCH_IN on the first RESIN module in the chain

Section 11
Control
has the integer value 5. This is provided by the use of instance number one of the
function block RESIN (RE01-), where the input EXCH_IN is set to #5, but is hidden
for the user.
RE01-
RESIN
BAY_ACK ACK_F_B
Bay 1 BAY_VAL ANY_ACK
BAY_RES VALID_TX
RE_RQ_B
V_RE_RQ
EXCH_OUT
RE02-
RESIN
EXCH_IN ACK_F_B
BAY_ACK ANY_ACK
Bay 2 BAY_VAL VALID_TX
BAY_RES RE_RQ_B
V_RE_RQ
EXCH_OUT
REnn-
RESIN
EXCH_IN ACK_F_B
BAY_ACK ANY_ACK
CR01-
Bay n BAY_VAL VALID_TX
BAY_RES RE_RQ_B QCRSV
V_RE_RQ
EXCH_OUT RES_DATA
en05000090.vsd
Figure 207: Diagram of the chaining principle for RESIN

RE01-
RESIN
BAY_ACK ACK_F_B
BAY_VAL ANY_ACK
BAY_RES VALID_TX
RE_RQ_B
V_RE_RQ
EXCH_OUT
en05000341.vsd
Figure 208: RE function block
Table 203: Input signals for the RESIN (RE01-) function block
Signal Description
BAY_ACK Another bay has acknow. the reservation req. from this bay
BAY_VAL The reserv. and acknow. signals from another bay are valid
BAY_RES Request from other bay to reserve this bay

Section 11
Control
Table 204: Output signals for the RESIN (RE01-) function block
Signal Description
ACK_F_B All other bays have acknow. the reserv. req. from this bay
ANY_ACK Any other bay has acknow. the reserv. req. from this bay
VALID_TX The reserv. and acknow. signals from other bays are valid
RE_RQ_B Request from other bay to reserve this bay
V_RE_RQ Check if the request of reserving this bay is valid
EXCH_OUT Used for exchange signals between different ResIn blocks
Table 205: General settings for the RESIN (RE01-) function

FutureUse Bay in use - Bay in use - The bay for this ResIn
Bay future use block is for future use
11.4 Interlocking
11.4.1 Introduction
The interlocking function blocks the possibility to operate high-voltage switching
devices, for instance when a disconnector is under load, in order to prevent material
damage and/or accidental human injury.
Each control IED has interlocking functions for different switchyard arrangements,
each handling the interlocking of one bay. The function is distributed to each control
IED and not dependent on any central function. For the station-wide interlocking, the
IEDs communicate via the station bus or by using hard wired binary inputs/outputs.
The interlocking conditions depend on the circuit configuration and status of the
installation at any given time.

The interlocking function consists of software modules located in each control IED.
The function is distributed and not dependent on any central function.
Communication between modules in different bays is performed via the station bus.
The reservation function (see section "Apparatus control (APC)") is used to ensure
that HV apparatuses that might affect the interlock are blocked during the time gap,
which arises between position updates. This can be done by means of the
communication system, reserving all HV apparatuses that might influence the

Section 11
Control
interlocking condition of the intended operation. The reservation is maintained until

the operation is performed.
After the selection and reservation of an apparatus, the function has complete data on
the status of all apparatuses in the switchyard that are affected by the selection. Other
operators cannot interfere with the reserved apparatus or the status of switching
devices that may affect it.
The open or closed positions of the HV apparatuses are inputs to software modules
distributed in the control IEDs. Each module contains the interlocking logic for a bay.
The interlocking logic in a module is different, depending on the bay function and
the switchyard arrangements, that is, double-breaker or 1 1/2 breaker bays have
different modules. Specific interlocking conditions and connections between standard
interlocking modules are performed with an engineering tool. Bay-level interlocking
signals can include the following kind of information:
• Positions of HV apparatuses (sometimes per phase)

• Valid positions (if evaluated in the control module)
• External release (to add special conditions for release)
• Line voltage (to block operation of line earthing switch)
• Output signals to release the HV apparatus
The interlocking module is connected to the surrounding functions within a bay as

shown in figure 209.
Apparatus control
Interlocking
modules
modules in
SCILO SCSWI
other bays SXSWI
Apparatus control
modules
Interlocking SCILO SCSWI SXCBR
module
Apparatus control
modules
en04000526.vsd SCILO SCSWI SXSWI
Figure 209: Interlocking module on bay level.
Bays communicate via the station bus and can convey information regarding the
following:
• Unearthed busbars
• Busbars connected together
• Other bays connected to a busbar
• Received data from other bays is valid

Section 11
Control
Figure 210 illustrates the data exchange principle.
Station bus
Bay 1 Bay n Bus coupler
Disc QB1 and QB2 closed Disc QB1 and QB2 closed WA1 unearthed
WA1 unearthed
WA1 and WA2 interconn
...
WA1 not earthed WA1 not earthed
WA2 not earthed WA2 not earthed WA1 and WA2 interconn
WA1 and WA2 interconn WA1 and WA2 interconn in other bay
..
WA1
WA2
QB1 QB2 QB1 QB2 QB1 QB2 QC1 QC2
QA1 QA1 QA1
QB9 QB9
en05000494.vsd
Figure 210: Data exchange between interlocking modules.
When invalid data such as intermediate position, loss of a control terminal, or input
board error are used as conditions for the interlocking condition in a bay, a release
for execution of the function will not be given.
On the station HMI an override function exists, which can be used to bypass the
interlocking function in cases where not all the data required for the condition is valid.
For all interlocking modules these general rules apply:
• The interlocking conditions for opening or closing of disconnectors and earthing

switches are always identical.
• Earthing switches on the line feeder end, e.g. rapid earthing switches, are
normally interlocked only with reference to the conditions in the bay where they
are located, not with reference to switches on the other side of the line. So a line
voltage indication may be included into line interlocking modules. If there is no
line voltage supervision within the bay, then the appropriate inputs must be set
to no voltage, and the operator must consider this when operating.
• Earthing switches can only be operated on isolated sections e.g. without load/
voltage. Circuit breaker contacts cannot be used to isolate a section, i.e. the status
of the circuit breaker is irrelevant as far as the earthing switch operation is
concerned.
• Disconnectors cannot break power current or connect different voltage systems.
Disconnectors in series with a circuit breaker can only be operated if the circuit
breaker is open, or if the disconnectors operate in parallel with other closed
connections. Other disconnectors can be operated if one side is completely
isolated, or if the disconnectors operate in parallel to other closed connections,
or if they are earthed on both sides.
• Circuit breaker closing is only interlocked against running disconnectors in its
bay or additionally in a transformer bay against the disconnectors and earthing

Section 11
Control
switch on the other side of the transformer, if there is no disconnector between

CB and transformer.
• Circuit breaker opening is only interlocked in a bus-coupler bay, if a bus bar
transfer is in progress.
To make the implementation of the interlocking function easier, a number of

standardized and tested software interlocking modules containing logic for the
interlocking conditions are available:
• Line for double and transfer busbars, ABC_LINE

• Bus for double and transfer busbars, ABC_BC
• Transformer bay for double busbars, AB_TRAFO
• Bus-section breaker for double busbars, A1A2_BS
• Bus-section disconnector for double busbars, A1A2_DC
• Busbar earthing switch, BB_ES
• Double CB Bay, DB_BUS_A, DB_LINE, DB_BUS_B
• 1 1/2-CB diameter, BH_LINE_A, BH_CONN, BH_LINE_B
The interlocking conditions can be altered, to meet the customers specific

requirements, by adding configurable logic by means of the graphical configuration
tool PCM 600. The inputs Qx_EXy on the interlocking modules are used to add these
specific conditions.
The input signals EXDU_xx shall be set to true if there is no transmission error at the
transfer of information from other bays. Required signals with designations ending
in TR are intended for transfer to other bays.
11.4.3 Logical node for interlocking (SCILO)
The function SCILO is used to enable a switching operation if the interlocking

conditions permit. The function itself does not provide any interlocking functionality.
The interlocking conditions are generated in separate function blocks containing the
interlocking logic.
The function contains logic to enable the open and close commands respectively if
the interlocking conditions are fulfilled. That means also, if the switch has a defined
end position e.g. open, then the appropriate enable signal (in this case EN_OPEN) is
false. The enable signals EN_OPEN and EN_CLOSE can be true at the same time
only in the intermediate and bad position state and if they are enabled by the
interlocking function. The position inputs come from the logical nodes Circuit
breaker/switch SXCBR/SXSWI and the enable signals come from the interlocking
logic. The outputs are connected to the logical node Switch controller SCSWI. One
instance per switching device is needed.

Section 11
Control
POSOPEN SCILO
POSCLOSE =1 1
EN_OPEN
&
>1
&
OPEN_EN
CLOSE_EN & EN_CLOSE
>1
&
en04000525.vsd
Figure 211: SCILO function logic diagram

CI01-
SCILO
POSOPEN EN_OPEN
POSCLOSE EN_CLOSE
OPEN_EN
CLOSE_EN
en05000359.vsd
Figure 212: CI function block
Table 206: Input signals for the SCILO (CI01-) function block
Signal Description
POSOPEN Open position of switch device
POSCLOSE Closed position of switch device
OPEN_EN Open operation from interlocking logic is enabled
CLOSE_EN Close operation from interlocking logic is enabled
Table 207: Output signals for the SCILO (CI01-) function block
Signal Description
EN_OPEN Open operation at closed or interm. or bad pos. is enabled
EN_CLOSE Close operation at open or interm. or bad pos. is enabled

Section 11
Control
11.4.4 Interlocking for line bay (ABC_LINE)
The interlocking module ABC_LINE is used for a line connected to a double busbar
arrangement with a transfer busbar according to figure 213. The module can also be
used for a double busbar arrangement without transfer busbar or a single busbar
arrangement with/without transfer busbar.
WA1 (A)
WA2 (B)
WA7 (C)
QB1 QB2 QB7
QC1
QA1
QC2
QB9
QC9
en04000478.vsd
Figure 213: Switchyard layout ABC_LINE

Section 11
Control

IF01-
ABC_LINE
QA1_OP QA1CLREL
QA1_CL QA1CLIT L
QB9_OP QB9REL
QB9_CL QB9IT L
QB1_OP QB1REL
QB1_CL QB1IT L
QB2_OP QB2REL
QB2_CL QB2IT L
QB7_OP QB7REL
QB7_CL QB7IT L
QC1_OP QC1REL
QC1_CL QC1IT L
QC2_OP QC2REL
QC2_CL QC2IT L
QC9_OP QC9REL
QC9_CL QC9IT L
QC11_OP QB1OPT R
QC11_CL QB1CLT R
QC21_OP QB2OPT R
QC21_CL QB2CLT R
QC71_OP QB7OPT R
QC71_CL QB7CLT R
BB7_D_OP QB12OPT R
BC_12_CL QB12CLT R
BC_17_OP VPQB1T R
BC_17_CL VPQB2T R
BC_27_OP VPQB7T R
BC_27_CL VPQB12T R
VOLT _OFF
VOLT _ON
VP_BB7_D
VP_BC_12
VP_BC_17
VP_BC_27
EXDU_ES
EXDU_BPB
EXDU_BC
QB9_EX1
QB9_EX2
QB1_EX1
QB1_EX2
QB1_EX3
QB2_EX1
QB2_EX2
QB2_EX3
QB7_EX1
QB7_EX2
QB7_EX3
QB7_EX4
en05000357.vsd
Figure 214: IF function block

Section 11
Control
ABC_LINE
QA1_OP
QA1_CL =1 VPQA1
QB9_OP
QB9_CL =1 VPQB9
QA1CLREL
QB1_OP
QB1_CL =1 VPQB1 QA1CLITL
& 1
QB2_OP
QB2_CL =1 VPQB2
QB7_OP
QB7_CL =1 VPQB7
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC9_OP
QC9_CL =1 VPQC9
QC11_OP
QC11_CL =1 VPQC11
QC21_OP
QC21_CL =1 VPQC21
QC71_OP
QC71_CL =1 VPQC71
VOLT_OFF
VOLT_ON =1 VPVOLT
VPQA1
VPQC1 QB9REL
VPQC2 & >1
QB9ITL
1
VPQC9
QA1_OP
QC1_OP
QC2_OP
QC9_OP
QB9_EX1
VPQC2
VPQC9
&
QC2_CL
QC9_CL
QB9_EX2
en04000527.vsd

Section 11
Control
VPQA1 QB1REL
& ³1
VPQB2
VPQC1 1 QB1ITL
VPQC2
VPQC11
QA1_OP
QB2_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQB2 &
VP_BC_12
QB2_CL
BC_12_CL
EXDU_BC
QB1_EX2
VPQC1 &
VPQC11
QC1_CL
QC11_CL
EXDU_ES
QB1EX3
en04000528.vsd

Section 11
Control
VPQA1 QB2REL
& ³1
VPQB1
VPQC1 1 QB2ITL
VPQC2
VPQC21
QA1_OP
QB1_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQB1 &
VP_BC_12
QB1_CL
BC_12_CL
EXDU_BC
QB2_EX2
VPQC1 &
VPQC21
QC1_CL
QC21_CL
EXDU_ES
QB2_EX3
en04000529.vsd

Section 11
Control
VPQC9 QB7REL
& >1
VPQC71
VP_BB7_D 1 QB7ITL
VP_BC_17
VP_BC_27
QC9_OP
QC71_OP
EXDU_ES
BB7_D_OP
EXDU_BPB
BC_17_OP
BC_27_OP
EXDU_BC
QB7_EX1
VPQA1
VPQB1
VPQC9
&
VPQB9
VPQC71
VP_BB7_D
VP_BC_17
QA1_CL
QB1_CL
QC9_OP
QB9_CL
QC71_OP
EXDU_ES
BB7_D_OP
EXDU_BPB
BC_17_CL
EXDU_BC
QB7_EX2

Section 11
Control
VPQA1
VPQB2
& >1
VPQC9
VPQB9
VPQC71
VP_BB7_D
VP_BC_27
QA1_CL
QB2_CL
QC9_OP
QB9_CL
QC71_OP
EXDU_ES
BB7_D_OP
EXDU_BPB
BC_27_CL
EXDU_BC
QB7_EX3
VPQC9
VPQC71
&
QC9_CL
QC71_CL
EXDU_ES
QB7_EX4
VPQB1 QC1REL
VPQB2 QC1ITL
VPQB9 & 1
QC2REL
QB1_OP
QB2_OP QC2ITL
1
QB9_OP
VPQB7
VPQB9 QC9REL
VPVOLT &
QC9ITL
QB7_OP 1
QB9_OP
VOLT_OFF
en04000531.vsd

Section 11
Control
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
QB7_OP QB7OPTR
QB7_CL QB7CLTR
VPQB7 VPQB7TR
QB1_OP QB12OPTR
QB2_OP >1 QB12CLTR
VPQB1 1
VPQB12TR
VPQB2 &
en04000532.vsd
Table 208: Input signals for the ABC_LINE (IF01-) function block
Signal Description
QA1_OP QA1 is in open position
QA1_CL QA1 is in closed position
QB9_OP QB9 is in open position
QB9_CL QB9 is in closed position
QC1_OP QC1 is in open position
QC1_CL QC1 is in closed position
QC11_OP Earthing switch QC11 on busbar WA1 is in open position
QC11_CL Earthing switch QC11 on busbar WA1 is in closed position

Section 11
Control
Signal Description
BB7_D_OP Disconnectors on busbar WA7 except in the own bay are
open
BC_12_CL A bus coupler connection exists between busbar WA1 and
WA2
BC_17_OP No bus coupler connection exists between busbar WA1 and
WA7
WA7
BC_27_OP No bus coupler connection exists between busbar WA2 and
WA7
WA7
VOLT_OFF There is no voltage on the line and not VT (fuse) failure
VOLT_ON There is voltage on the line or there is a VT (fuse) failure
VP_BB7_D Switch status of the disconnectors on busbar WA7 are valid
VP_BC_12 Status of the bus coupler app. between WA1 and WA2 are
valid
valid
valid
EXDU_ES No transm error from any bay containing earthing switches
EXDU_BPB No transm error from any bay with disconnectors on WA7
EXDU_BC No transmission error from any bus coupler bay
QB9_EX1 External condition for apparatus QB9

Section 11
Control
Table 209: Output signals for the ABC_LINE (IF01-) function block
Signal Description
QA1CLREL Closing of QA1 is allowed
QA1CLITL Closing of QA1 is forbidden
QB9REL Switching of QB9 is allowed
QB9ITL Switching of QB9 is forbidden
QC1REL Switching of QC1 is allowed
QC1ITL Switching of QC1 is forbidden
QB1OPTR QB1 is in open position
QB1CLTR QB1 is in closed position
QB12OPTR QB1 or QB2 or both are in open position
QB12CLTR QB1 and QB2 are not in open position
VPQB1TR Switch status of QB1 is valid (open or closed)
VPQB12TR Switch status of QB1 and QB2 are valid (open or closed)
11.4.5 Interlocking for bus-coupler bay (ABC_BC)
The interlocking module ABC_BC is used for a bus-coupler bay connected to a double
busbar arrangement according to figure 215. The module can also be used for a single
busbar arrangement with transfer busbar or double busbar arrangement without
transfer busbar.

Section 11
Control
WA1 (A)
WA2 (B)
WA7 (C)
QB1 QB2 QB20 QB7
QC1
QA1
QC2
en04000514.vsd
Figure 215: Switchyard layout ABC_BC

IG01-
ABC_BC
QA1_OP QA1OPREL
QA1_CL QA1OPIT L
QB1_OP QA1CLREL
QB1_CL QA1CLIT L
QB2_OP QB1REL
QB2_CL QB1IT L
QB7_OP QB2REL
QB7_CL QB2IT L
QB20_OP QB7REL
QB20_CL QB7IT L
QC1_OP QB20REL
QC1_CL QB20IT L
QC2_OP QC1REL
QC2_CL QC1IT L
QC11_OP QC2REL
QC11_CL QC2IT L
QC21_OP QB1OPT R
QC21_CL QB1CLT R
QC71_OP QB220OT R
QC71_CL QB220CT R
BBT R_OP QB7OPT R
BC_12_CL QB7CLT R
VP_BBT R QB12OPT R
VP_BC_12 QB12CLT R
EXDU_ES BC12OPT R
EXDU_12 BC12CLT R
EXDU_BC BC17OPT R
QA1O_EX1 BC17CLT R
QA1O_EX2 BC27OPT R
QA1O_EX3 BC27CLT R
QB1_EX1 VPQB1T R
QB1_EX2 VQB220T R
QB1_EX3 VPQB7T R
QB2_EX1 VPQB12T R
QB2_EX2 VPBC12T R
QB2_EX3 VPBC17T R
QB20_EX1 VPBC27T R
QB20_EX2
QB7_EX1
QB7_EX2
en05000350.vsd
Figure 216: IG function block

Section 11
Control
ABC_BC
QA1_OP
QA1_CL =1 VPQA1
QB1_OP
QB1_CL =1 VPQB1
QB20_OP
QB20_CL =1 VPQB20
QB7_OP
QB7_CL =1 VPQB7
QB2_OP
QB2_CL =1 VPQB2
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC11_OP
QC11_CL =1 VPQC11
QC21_OP
QC21_CL =1 VPQC21
QC71_OP
QC71_CL =1 VPQC71
VPQB1
QB1_OP QA1OPREL
& >1 QA1OPITL
QA1O_EX1 1
VPQB20
QB20_OP &
QA1O_EX2
VP_BBTR
BBTR_OP &
EXDU_12
QA1O_EX3
VPQB1 QA1CLREL
VPQB2 QA1CLITL
VPQB7 & 1
VPQB20
en04000533.vsd

Section 11
Control
VPQA1
VPQB2 QB1REL
& >1
VPQC1 QB1ITL
VPQC2 1
VPQC11
QA1_OP
QB2_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQB2
VP_BC_12
&
QB2_CL
BC_12_CL
EXDU_BC
QB1_EX2
VPQC1
VPQC11
&
QC1_CL
QC11_CL
EXDU_ES
QB1_EX3
en04000534.vsd

Section 11
Control
VPQA1
VPQB1 QB2REL
& >1
VPQC1 QB2ITL
VPQC2 1
VPQC21
QA1_OP
QB1_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQB1
VP_BC_12
&
QB1_CL
BC_12_CL
EXDU_BC
QB2_EX2
VPQC1
VPQC21
&
QC1_CL
QC21_CL
EXDU_ES
QB2_EX3
en04000535.vsd

Section 11
Control
VPQA1
VPQB20 QB7REL
& >1
VPQC1 QB7ITL
VPQC2 1
VPQC71
QA1_OP
QB20_OP
QC1_OP
QC2_OP
QC71_OP
EXDU_ES
QB7_EX1
VPQC2
VPQC71
&
QC2_CL
QC71_CL
EXDU_ES
QB7_EX2
VPQA1
VPQB7 QB20REL
& >1
VPQC1 QB20ITL
VPQC2 1
VPQC21
QA1_OP
QB7_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB20_EX1
VPQC2
VPQC21
&
QC2_CL
QC21_CL
EXDU_ES
QB20_EX2
en04000536.vsd

Section 11
Control
VPQB1 QC1REL
VPQB20 QC1ITL
& 1
VPQB7
QC2REL
VPQB2
QB1_OP QC2ITL
1
QB20_OP
QB7_OP
QB2_OP
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
QB20_OP QB220OTR
QB2_OP & QB220CTR
VPQB20 1
VQB220TR
VPQB2 &
QB7_OP QB7OPTR
QB7_CL QB7CLTR
VPQB7 VPQB7TR
QB1_OP QB12OPTR
QB2_OP >1 QB12CLTR
VPQB1 1
VPQB12TR
VPQB2 &
QA1_OP BC12OPTR
QB1_OP >1 BC12CLTR
QB20_OP 1
VPQA1
VPBC12TR
VPQB1 &
VPQB20
QA1_OP BC17OPTR
QB1_OP >1 BC17CLTR
QB7_OP 1
VPQA1
VPBC17TR
VPQB1 &
VPQB7
QA1_OP BC27OPTR
QB2_OP >1 BC27CLTR
QB7_OP 1
VPQA1
VPBC27TR
VPQB2 &
VPQB7
en04000537.vsd
Table 210: Input signals for the ABC_BC (IG01-) function block
Signal Description

Section 11
Control
Signal Description
BBTR_OP No busbar transfer is in progress
WA2
VP_BBTR Status are valid for app. involved in the busbar transfer
valid
EXDU_12 No transm error from any bay connected to WA1/WA2
busbars
EXDU_BC No transmission error from any other bus coupler bay
QA1O_EX1 External open condition for apparatus QA1

Section 11
Control
Table 211: Output signals for the ABC_BC (IG01-) function block
Signal Description
QA1OPREL Opening of QA1 is allowed
QA1OPITL Opening of QA1 is forbidden
QB220OTR QB2 and QB20 are in open position
QB220CTR QB2 or QB20 or both are not in open position
BC12OPTR No connection via the own bus coupler between WA1 and
WA2
BC12CLTR Conn. exists via the own bus coupler between WA1 and WA2
WA7
WA7
VQB220TR Switch status of QB2 and QB20 are valid (open or closed)

Section 11
Control
Signal Description
VPBC12TR Status of the bus coupler app. between WA1 and WA2 are
valid
valid
valid
11.4.6 Interlocking for transformer bay (AB_TRAFO)
The interlocking module AB_TRAFO is used for a transformer bay connected to a

double busbar arrangement according to figure 217. The module is used when there
is no disconnector between circuit breaker and transformer. Otherwise, the module
ABC_LINE can be used. This module can also be used in single busbar arrangements.
WA1 (A)
WA2 (B)
QB1 QB2
QC1
QA1
AB_TRAFO
QC2
QC3
QA2
QA2 and QC4 are not
QC4 used in this interlocking
QB3 QB4
en04000515.vsd
Figure 217: Switchyard layout AB_TRAFO

Section 11
Control

IE01-
AB_TRAFO
QA1_OP QA1CLREL
QA1_CL QA1CLIT L
QB1_OP QB1REL
QB1_CL QB1IT L
QB2_OP QB2REL
QB2_CL QB2IT L
QC1_OP QC1REL
QC1_CL QC1IT L
QC2_OP QC2REL
QC2_CL QC2IT L
QB3_OP QB1OPT R
QB3_CL QB1CLT R
QB4_OP QB2OPT R
QB4_CL QB2CLT R
QC3_OP QB12OPT R
QC3_CL QB12CLT R
QC11_OP VPQB1T R
QC11_CL VPQB2T R
QC21_OP VPQB12T R
QC21_CL
BC_12_CL
VP_BC_12
EXDU_ES
EXDU_BC
QA1_EX1
QA1_EX2
QA1_EX3
QB1_EX1
QB1_EX2
QB1_EX3
QB2_EX1
QB2_EX2
QB2_EX3
en05000358.vsd
Figure 218: IE function block

Section 11
Control
AB_TRAFO
QA1_OP
QA1_CL =1 VPQA1
QB1_OP
QB1_CL =1 VPQB1
QB2_OP
QB2_CL =1 VPQB2
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QB3_OP
QB3_CL =1 VPQB3
QB4_OP
QB4_CL =1 VPQB4
QC3_OP
QC3_CL =1 VPQC3
QC11_OP
QC11_CL =1 VPQC11
QC21_OP
QC21_CL =1 VPQC21
VPQB1 QA1CLREL
VPQB2 QA1CLITL
VPQC1 & 1
VPQC2
VPQB3
VPQB4
VPQC3
QA1_EX2
QC3_OP
QA1_EX3
QC1_CL >1
QC2_CL
QC3_CL &
QA1_EX1
en04000538.vsd

Section 11
Control
VPQA1
VPQB2 QB1REL
& >1
VPQC1 QB1ITL
VPQC2 1
VPQC3
VPQC11
QA1_OP
QB2_OP
QC1_OP
QC2_OP
QC3_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQB2
VPQC3
&
VP_BC_12
QB2_CL
QC3_OP
BC_12_CL
EXDU_BC
QB1_EX2
VPQC1
VPQC2
&
VPQC3
VPQC11
QC1_CL
QC2_CL
QC3_CL
QC11_CL
EXDU_ES
QB1_EX3
en04000539.vsd

Section 11
Control
VPQA1
VPQB1 QB2REL
& >1
VPQC1 QB2ITL
VPQC2 1
VPQC3
VPQC21
QA1_OP
QB1_OP
QC1_OP
QC2_OP
QC3_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQB1
VPQC3
&
VP_BC_12
QB1_CL
QC3_OP
BC_12_CL
EXDU_BC
QB2_EX2
VPQC1
VPQC2
&
VPQC3
VPQC21
QC1_CL
QC2_CL
QC3_CL
QC21_CL
EXDU_ES
QB2_EX3
en04000540.vsd

Section 11
Control
VPQB1 QC1REL
VPQB2 QC1ITL
& 1
VPQB3
QC2REL
VPQB4
QB1_OP QC2ITL
1
QB2_OP
QB3_OP
QB4_OP
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
QB1_OP QB12OPTR
QB2_OP >1 QB12CLTR
VPQB1 1
VPQB12TR
VPQB2 &
en04000541.vsd
Table 212: Input signals for the AB_TRAFO (IE01-) function block
Signal Description
QC11_OP QC11 on busbar WA1 is in open position
QC11_CL QC11 on busbar WA1 is in closed position
QC21_OP QC21 on busbar WA2 is in open position
QC21_CL QC21 on busbar WA2 is in closed position

Section 11
Control
Signal Description
WA2
valid
EXDU_BC No transmission error from any bus coupler bay
QA1_EX1 External condition for apparatus QA1
Table 213: Output signals for the AB_TRAFO (IE01-) function block
Signal Description

Section 11
Control
11.4.7 Interlocking for bus-section breaker (A1A2_BS)
The interlocking module A1A2_BS is used for one bus-section circuit breaker
between section 1 and 2 according to figure 219. The module can be used for different
busbars, which includes a bus-section circuit breaker.
WA1 (A1) WA2 (A2)
QC1 QB1 QB2 QC2
QA1
QC3 QC4
en04000516.vsd
A1A2_BS
Figure 219: Switchyard layout A1A2_BS

IH01-
A1A2_BS
QA1_OP QA1OPREL
QA1_CL QA1OPIT L
QB1_OP QA1CLREL
QB1_CL QA1CLIT L
QB2_OP QB1REL
QB2_CL QB1IT L
QC3_OP QB2REL
QC3_CL QB2IT L
QC4_OP QC3REL
QC4_CL QC3IT L
S1QC1_OP QC4REL
S1QC1_CL QC4IT L
S2QC2_OP S1S2OPT R
S2QC2_CL S1S2CLT R
BBT R_OP QB1OPT R
VP_BBT R QB1CLT R
EXDU_12 QB2OPT R
EXDU_ES QB2CLT R
QA1O_EX1 VPS1S2T R
QA1O_EX2 VPQB1T R
QA1O_EX3 VPQB2T R
QB1_EX1
QB1_EX2
QB2_EX1
QB2_EX2
en05000348.vsd
Figure 220: IH function block

Section 11
Control
A1A2_BS
QA1_OP
QA1_CL =1 VPQA1
QB1_OP
QB1_CL =1 VPQB1
QB2_OP
QB2_CL =1 VPQB2
QC3_OP
QC3_CL =1 VPQC3
QC4_OP
QC4_CL =1 VPQC4
S1QC1_OP
S1QC1_CL =1 VPS1QC1
S2QC2_OP
S2QC2_CL =1 VPS2QC2
VPQB1
QB1_OP QA1OPREL
& >1
QA1O_EX1 QA1OPITL
1
VPQB2
QB2_OP
&
QA1O_EX2
VP_BBTR
BBTR_OP
&
EXDU_12
QA1O_EX3
VPQB1 QA1CLREL
VPQB2 & QA1CLITL
1
VPQA1
VPQC3 QB1REL
& >1
VPQC4 QB1ITL
1
VPS1QC1
QA1_OP
QC3_OP
QC4_OP
S1QC1_OP
EXDU_ES
QB1_EX1
VPQC3
VPS1QC1
&
QC3_CL
S1QC1_CL
EXDU_ES
QB1_EX2
en04000542.vsd

Section 11
Control
VPQA1
VPQC3 QB2REL
VPQC4 & >1
QB2ITL
VPS2QC2 1
QA1_OP
QC3_OP
QC4_OP
S2QC2_OP
EXDU_ES
QB2_EX1
VPQC4
VPS2QC2
&
QC4_CL
S2QC2_CL
EXDU_ES
QB2_EX2
VPQB1 QC3REL
VPQB2 QC3ITL
QB1_OP & 1
QC4REL
QB2_OP
QC4ITL
1
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
QB1_OP S1S2OPTR
QB2_OP >1 S1S2CLTR
QA1_OP 1
VPQB1
VPS1S2TR
VPQB2 &
VPQA1
en04000543.vsd
Table 214: Input signals for the A1A2_BS (IH01-) function block
Signal Description

Section 11
Control
Signal Description
S1QC1_OP QC1 on bus section 1 is in open position
S1QC1_CL QC1 on bus section 1 is in closed position
BBTR_OP No busbar transfer is in progress
VP_BBTR Status are valid for app. involved in the busbar transfer
EXDU_12 No transm error from any bay connected to busbar 1 and 2
EXDU_ES No transm error from bays containing earth. sw. QC1 or QC2
Table 215: Output signals for the A1A2_BS (IH01-) function block
Signal Description
QA1OPREL Opening of QA1 is allowed
QA1OPITL Opening of QA1 is forbidden
S1S2OPTR No bus section connection between bus section 1 and 2
S1S2CLTR Bus coupler connection between bus section 1 and 2 exists

Section 11
Control
Signal Description
VPS1S2TR Status of the app. between bus section 1 and 2 are valid
11.4.8 Interlocking for bus-section disconnector (A1A2_DC)
The interlocking module A1A2_DC is used for one bus-section disconnector between
section 1 and 2 according to figure 221. The module can be used for different busbars,
which includes a bus-section disconnector.
QB
WA1 (A1) WA2 (A2)
QC1 QC2
A1A2_DC en04000492.vsd
Figure 221: Switchyard layout A1A2_DC

II01-
A1A2_DC
QB_OP QBOPREL
QB_CL QBOPIT L
S1QC1_OP QBCLREL
S1QC1_CL QBCLIT L
S2QC2_OP DCOPT R
S2QC2_CL DCCLT R
S1DC_OP VPDCT R
S2DC_OP
VPS1_DC
VPS2_DC
EXDU_ES
EXDU_BB
QBCL_EX1
QBCL_EX2
QBOP_EX1
QBOP_EX2
QBOP_EX3
en05000349.vsd
Figure 222: II function block

Section 11
Control
A1A2_DC
QB_OP
VPQB VPDCTR
QB_CL =1
DCOPTR
DCCLTR
S1QC1_OP
VPS1QC1
S1QC1_CL =1
S2QC2_OP
VPS2QC2
S2QC2_CL =1
VPS1QC1
VPS2QC2
VPS1_DC & >1 QBOPREL
S1QC1_OP QBOPITL
1
S2QC2_OP
S1DC_OP
EXDU_ES
EXDU_BB
QBOP_EX1
VPS1QC1
VPS2QC2
VPS2_DC &
S1QC1_OP
S2QC2_OP
S2DC_OP
EXDU_ES
EXDU_BB
QBOP_EX2
VPS1QC1
VPS2QC2
S1QC1_CL &
S2QC2_CL
EXDU_ES
QBOP_EX3
en04000544.vsd

Section 11
Control
Table 216: Input signals for the A1A2_DC (II01-) function block
Signal Description
QB_OP QB is in open position
QB_CL QB is in closed position
S1DC_OP All disconnectors on bus section 1 are in open position
S2DC_OP All disconnectors on bus section 2 are in open position
VPS1_DC Switch status of disconnectors on bus section 1 are valid
VPS2_DC Switch status of disconnectors on bus section 2 are valid
EXDU_ES No transm error from bays containing earth. sw. QC1 or QC2
EXDU_BB No transm error from bays with disc conn to section 1 and 2
QBCL_EX1 External close condition for section disconnector QB
QBCL_EX2 External close condition for section disconnector QB
QBOP_EX1 External open condition for section disconnector QB

Section 11
Control
Table 217: Output signals for the A1A2_DC (II01-) function block
Signal Description
QBOPREL Opening of QB is allowed
QBOPITL Opening of QB is forbidden
QBCLREL Closing of QB is allowed
QBCLITL Closing of QB is forbidden
DCOPTR The bus section disconnector is in open position
DCCLTR The bus section disconnector is in closed position
VPDCTR Switch status of QB is valid (open or closed)
11.4.9 Interlocking for busbar earthing switch (BB_ES)
The interlocking module BB_ES is used for one busbar earthing switch on any busbar
parts according to figure 223.
QC
en04000504.vsd
Figure 223: Switchyard layout BB_ES

IJ01-
BB_ES
QC_OP QCREL
QC_CL QCITL
BB_DC_OP BBESOPTR
VP_BB_DC BBESCLTR
EXDU_BB
en05000347.vsd
Figure 224: IJ function block

Section 11
Control
BB_ES
VP_BB_DC QCREL
BB_DC_OP QCITL
EXDU_BB & 1
QC_OP BBESOPTR
QC_CL BBESCLTR
en04000546.vsd
Table 218: Input signals for the BB_ES (IJ01-) function block
Signal Description
QC_OP Busbar earthing switch QC is in open position
QC_CL Busbar earthing switch QC is in closed position
BB_DC_OP All disconnectors on this busbar part are open
VP_BB_DC Status for all disconnectors on this busbar part are valid
EXDU_BB No transm error from bays with disc on this busbar part
Table 219: Output signals for the BB_ES (IJ01-) function block
Signal Description
QCREL Switching of QC is allowed
QCITL Switching of QC is forbidden
BBESOPTR QC on this busbar part is in open position
BBESCLTR QC on this busbar part is in closed position
11.4.10 Interlocking for double CB bay (DB)
The interlocking modules DB_BUS_A, DB_LINE and DB_BUS_B are used for a
line connected to a double circuit breaker arrangement according to figure 225.

Section 11
Control
WA1 (A)
WA2 (B)
QB1 QB2
QC1 QC4
QA1 QA2
DB_BUS_A DB_BUS_B
QC2 QC5
QB61 QB62
QC3
QB9
DB_LINE
QC9
en04000518.vsd
Figure 225: Switchyard layout double circuit breaker.
Three types of interlocking modules per double circuit breaker bay are defined.
DB_LINE is the connection from the line to the circuit breaker parts that are connected
to the busbars. DB_BUS_A and DB_BUS_B are the connections from the line to the
busbars.
IB01-
DB_BUS_A
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB1_OP QB61REL
QB1_CL QB61ITL
QB61_OP QB1REL
QB61_CL QB1ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
QC3_OP QB1OPTR
QC3_CL QB1CLTR
QC11_OP VPQB1TR
QC11_CL
EXDU_ES
QB61_EX1
QB61_EX2
QB1_EX1
QB1_EX2
en05000354.vsd
Figure 226: IB function block

Section 11
Control
IA01-
DB_LINE
QA1_OP QB9REL
QA1_CL QB9ITL
QA2_OP QC3REL
QA2_CL QC3ITL
QB61_OP QC9REL
QB61_CL QC9ITL
QC1_OP
QC1_CL
QC2_OP
QC2_CL
QB62_OP
QB62_CL
QC4_OP
QC4_CL
QC5_OP
QC5_CL
QB9_OP
QB9_CL
QC3_OP
QC3_CL
QC9_OP
QC9_CL
VOLT_OFF
VOLT_ON
QB9_EX1
QB9_EX2
QB9_EX3
QB9_EX4
QB9_EX5
en05000356.vsd
Figure 227: IA function block
IC01-
DB_BUS_B
QA2_OP QA2CLREL
QA2_CL QA2CLITL
QB2_OP QB62REL
QB2_CL QB62ITL
QB62_OP QB2REL
QB62_CL QB2ITL
QC4_OP QC4REL
QC4_CL QC4ITL
QC5_OP QC5REL
QC5_CL QC5ITL
QC3_OP QB2OPTR
QC3_CL QB2CLTR
QC21_OP VPQB2TR
QC21_CL
EXDU_ES
QB62_EX1
QB62_EX2
QB2_EX1
QB2_EX2
en05000355.vsd
Figure 228: IC function block

Section 11
Control
DB_BUS_A
QA1_OP
QA1_CL =1 VPQA1
QB61_OP
QB61_CL =1 VPQB61
QB1_OP
QB1_CL =1 VPQB1
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC3_OP
QC3_CL =1 VPQC3
QC11_OP
QC11_CL =1 VPQC11
VPQB61 QA1CLREL
VPQB1 & QA1CLITL
1
VPQA1
VPQC1 QB61REL
& >1
VPQC2 QB61ITL
1
VPQC3
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QB61_EX1
VPQC2
VPQC3
&
QC2_CL
QC3_CL
QB61_EX2
VPQA1
VPQC1 QB1REL
& >1
VPQC2 QB1ITL
1
VPQC11
QA1_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQC1
VPQC11
&
QC1_CL
QC11_CL
EXDU_ES
QB1_EX2
en04000547.vsd

Section 11
Control
VPQB61 QC1REL
VPQB1 QC1ITL
& 1
QB61_OP QC2REL
QB1_OP QC2ITL
1
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
en04000548.vsd

Section 11
Control
DB_LINE
QA1_OP
QA1_CL =1 VPQA1
QA2_OP
QA2_CL =1 VPQA2
QB61_OP
QB61_CL =1 VPQB61
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QB62_OP
QB62_CL =1 VPQB62
QC4_OP
QC4_CL =1 VPQC4
QC5_OP
QC5_CL =1 VPQC5
QB9_OP
QB9_CL =1 VPQB9
QC3_OP
QC3_CL =1 VPQC3
QC9_OP
QC9_CL =1 VPQC9
VOLT_OFF
VOLT_ON =1 VPVOLT
VPQA1
VPQA2 QB9REL
VPQC1 & >1
QB9ITL
1
VPQC2
VPQC3
VPQC4
VPQC5
VPQC9
QA1_OP
QA2_OP
QC1_OP
QC2_OP
QC3_OP
QC4_OP
QC5_OP
QC9_OP
QB9_EX1
& en04000549.vsd

Section 11
Control
VPQA1
VPQC1
VPQC2 & >1
VPQC3
VPQC9
VPQB62
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QC9_OP
QB62_OP
QB9_EX2
VPQA2
VPQB61
&
VPQC3
VPQC4
VPQC5
VPQC9
QA2_OP
QB61_OP
QC3_OP
QC4_OP
QC5_OP
QC9_OP
QB9_EX3
VPQC3
VPQC9
&
VPQB61
VPQB62
QC3_OP
QC9_OP
QB61_OP
QB62_OP
QB9_EX4
VPQC3
VPQC9
&
QC3_CL
QC9_CL
QB9_EX5
en04000550.vsd

Section 11
Control
VPQB61
VPQB62 QC3REL
VPQB9 &
QC3ITL
1
QB61_OP
QB62_OP
QB9_OP
VPQB9
VPVOLT QC9REL
QB9_OP &
QC9ITL
1
VOLT_OFF
en04000551.vsd

Section 11
Control
DB_BUS_B
QA2_OP
QA2_CL =1 VPQA2
QB62_OP
QB62_CL =1 VPQB62
QB2_OP
QB2_CL =1 VPQB2
QC4_OP
QC4_CL =1 VPQC4
QC5_OP
QC5_CL =1 VPQC5
QC3_OP
QC3_CL =1 VPQC3
QC21_OP
QC21_CL =1 VPQC21
VPQB62 QA2CLREL
VPQB2 & QA2CLITL
1
VPQA2
VPQC4 QB62REL
& >1
VPQC5 QB62ITL
1
VPQC3
QA2_OP
QC4_OP
QC5_OP
QC3_OP
QB62_EX1
VPQC5
VPQC3
&
QC5_CL
QC3_CL
QB62_EX2
VPQA2
VPQC4 QB2REL
& >1
VPQC5 QB2ITL
1
VPQC21
QA2_OP
QC4_OP
QC5_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQC4
VPQC21
&
QC4_CL
QC21_CL
EXDU_ES
QB2_EX2
en04000552.vsd

Section 11
Control
VPQB62 QC4REL
VPQB2 QC4ITL
& 1
QB62_OP QC5REL
QB2_OP QC5ITL
1
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
en04000553.vsd
Table 220: Input signals for the DB_BUS_A (IB01-) function block
Signal Description
EXDU_ES No transm error from bay containing earthing switch QC11
Table 221: Output signals for the DB_BUS_A (IB01-) function block
Signal Description

Section 11
Control
Signal Description
Table 222: Input signals for the DB_LINE (IA01-) function block
Signal Description
VOLT_OFF There is no voltage on the line and not VT (fuse) failure

Section 11
Control
Signal Description
Table 223: Output signals for the DB_LINE (IA01-) function block
Signal Description
Table 224: Input signals for the DB_BUS_B (IC01-) function block
Signal Description

Section 11
Control
Table 225: Output signals for the DB_BUS_B (IC01-) function block
Signal Description
11.4.11 Interlocking for 1 1/2 CB diameter (BH)
The interlocking modules BH_LINE_A, BH_CONN and BH_LINE_B are used for
lines connected to a breaker-and-a-half diameter according to figure 229.

Section 11
Control
WA1 (A)
WA2 (B)
QB1 QB2
QC1 QC1
QA1 QA1
QC2 QC2
QB6 QB6
QC3 QC3
BH_LINE_A BH_LINE_B
QB61 QA1 QB62
QB9 QB9
QC1 QC2
QC9 QC9
BH_CONN
en04000513.vsd
Figure 229: Switchyard layout breaker-and-a-half
Three types of interlocking modules per diameter are defined. BH_LINE_A and
BH_LINE_B are the connections from a line to a busbar. BH_CONN is the
connection between the two lines of the diameter in the breaker and a half switchyard
layout.
11.4.11.2 Function blocks

Section 11
Control
IL01-
BH_LINE_A
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB6_OP QB6REL
QB6_CL QB6ITL
QB1_OP QB1REL
QB1_CL QB1ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
QC3_OP QC3REL
QC3_CL QC3ITL
QB9_OP QB9REL
QB9_CL QB9ITL
QC9_OP QC9REL
QC9_CL QC9ITL
CQA1_OP QB1OPTR
CQA1_CL QB1CLTR
CQB61_OP VPQB1TR
CQB61_CL
CQC1_OP
CQC1_CL
CQC2_OP
CQC2_CL
QC11_OP
QC11_CL
VOLT_OFF
VOLT_ON
EXDU_ES
QB6_EX1
QB6_EX2
QB1_EX1
QB1_EX2
QB9_EX1
QB9_EX2
QB9_EX3
QB9_EX4
QB9_EX5
QB9_EX6
QB9_EX7
en05000352.vsd
Figure 230: IL function block

Section 11
Control
IM01-
BH_LINE_B
QA1_OP QA1CLREL
QA1_CL QA1CLIT L
QB6_OP QB6REL
QB6_CL QB6IT L
QB2_OP QB2REL
QB2_CL QB2IT L
QC1_OP QC1REL
QC1_CL QC1IT L
QC2_OP QC2REL
QC2_CL QC2IT L
QC3_OP QC3REL
QC3_CL QC3IT L
QB9_OP QB9REL
QB9_CL QB9IT L
QC9_OP QC9REL
QC9_CL QC9IT L
CQA1_OP QB2OPT R
CQA1_CL QB2CLT R
CQB62_OP VPQB2T R
CQB62_CL
CQC1_OP
CQC1_CL
CQC2_OP
CQC2_CL
QC21_OP
QC21_CL
VOLT _OFF
VOLT _ON
EXDU_ES
QB6_EX1
QB6_EX2
QB2_EX1
QB2_EX2
QB9_EX1
QB9_EX2
QB9_EX3
QB9_EX4
QB9_EX5
QB9_EX6
QB9_EX7
en05000353.vsd
Figure 231: IM function block
IK01-
BH_CONN
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB61_OP QB61REL
QB61_CL QB61ITL
QB62_OP QB62REL
QB62_CL QB62ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
1QC3_OP
1QC3_CL
2QC3_OP
2QC3_CL
QB61_EX1
QB61_EX2
QB62_EX1
QB62_EX2
en05000351.vsd
Figure 232: IK function block

Section 11
Control
BH_LINE_A
QA1_OP
QA1_CL =1 VPQA1
QB1_OP
QB1_CL =1 VPQB1
QB6_OP
QB6_CL =1 VPQB6
QC9_OP
QC9_CL =1 VPQC9
QB9_OP
QB9_CL =1 VPQB9
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC3_OP
QC3_CL =1 VPQC3
CQA1_OP
CQA1_CL =1 VPCQA1
CQC1_OP
CQC1_CL =1 VPCQC1
CQC2_OP
CQC2_CL =1 VPCQC2
CQB61_OP
CQB61_CL =1 VPCQB61
QC11_OP
QC11_CL =1 VPQC11
VOLT_OFF
VOLT_ON =1 VPVOLT
VPQB1 QA1CLREL
VPQB6 QA1CLITL
& 1
VPQB9
VPQA1
VPQC1 QB6REL
VPQC2 & >1
QB6ITL
1
VPQC3
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QB6_EX1
VPQC2
VPQC3
&
QC2_CL
QC3_CL
QB6_EX2
en04000554.vsd

Section 11
Control
VPQA1
VPQC1 QB1REL
VPQC2 & >1
QB1ITL
1
VPQC11
QA1_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQC1
VPQC11
&
QC1_CL
QC11_CL
EXDU_ES
QB1_EX2
VPQB1 QC1REL
VPQB6 QC1ITL
QB1_OP & 1
QC2REL
QB6_OP QC2ITL
VPQB6 1
VPQB9 QC3REL
VPCQB61 &
QC3ITL
1
QB6_OP
QB9_OP
CQB61_OP
VPQA1 QB9REL
VPQB6 QB9ITL
VPQC9 & >1 1
VPQC1
VPQC2
VPQC3
VPCQA1
VPCQB61
VPCQC1
VPCQC2
QB9_EX1
QB6_OP
QB9_EX2
>1
QA1_OP
QC1_OP
QC2_OP &
QB9_EX3
en04000555.vsd

Section 11
Control
CQB61_OP
QB9_EX4
>1 & >1
CQA1_OP
CQC1_OP
CQC2_OP &
QB9_EX5
QC9_OP
QC3_OP
QB9_EX6
VPQC9
VPQC3
&
QC9_CL
QC3_CL
QB9_EX7
VPQB9 QC9REL
VPVOLT QC9ITL
QB9_OP & 1
VOLT_OFF
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
en04000556.vsd

Section 11
Control
BH_LINE_B
QA1_OP
QA1_CL =1 VPQA1
QB2_OP
QB2_CL =1 VPQB2
QB6_OP
QB6_CL =1 VPQB6
QC9_OP
QC9_CL =1 VPQC9
QB9_OP
QB9_CL =1 VPQB9
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC3_OP
QC3_CL =1 VPQC3
CQA1_OP
CQA1_CL =1 VPCQA1
CQC1_OP
CQC1_CL =1 VPCQC1
CQC2_OP
CQC2_CL =1 VPCQC2
CQB62_OP
CQB62_CL =1 VPCQB62
QC21_OP
QC21_CL =1 VPQC21
VOLT_OFF
VOLT_ON =1 VPVOLT
VPQB2 QA1CLREL
VPQB6 QA1CLITL
& 1
VPQB9
VPQA1
VPQC1 QB6REL
VPQC2 & >1
QB6ITL
1
VPQC3
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QB6_EX1
VPQC2
VPQC3
&
QC2_CL
QC3_CL
QB6_EX2
en04000557.vsd

Section 11
Control
VPQA1
VPQC1 QB2REL
VPQC2 & >1
QB2ITL
1
VPQC21
QA1_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQC1
VPQC21
&
QC1_CL
QC21_CL
EXDU_ES
QB2_EX2
VPQB2 QC1REL
VPQB6 QC1ITL
QB2_OP & 1
QC2REL
QB6_OP QC2ITL
VPQB6 1
VPQB9 QC3REL
VPCQB62 &
QC3ITL
1
QB6_OP
QB9_OP
CQB62_OP
VPQA1 QB9REL
VPQB6 QB9ITL
VPQC9 & >1 1
VPQC1
VPQC2
VPQC3
VPCQA1
VPCQB62
VPCQC1
VPCQC2
QB9_EX1
QB6_OP
QB9_EX2
>1
QA1_OP
QC1_OP
QC2_OP &
QB9_EX3
en04000558.vsd

Section 11
Control
CQB62_OP
QB9_EX4
>1 & >1
CQA1_OP
CQC1_OP
CQC2_OP &
QB9_EX5
QC9_OP
QC3_OP
QB9_EX6
VPQC9
VPQC3
&
QC9_CL
QC3_CL
QB9_EX7
VPQB9 QC9REL
VPVOLT QC9ITL
QB9_OP & 1
VOLT_OFF
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
en04000559.vsd

Section 11
Control
BH_CONN
QA1_OP
QA1_CL =1 VPQA1
QB61_OP
QB61_CL =1 VPQB61
QB62_OP
QB62_CL =1 VPQB62
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
1QC3_OP
1QC3_CL =1 VP1QC3
2QC3_OP
2QC3_CL =1 VP2QC3
VPQB61 QA1CLREL
VPQB62 & QA1CLITL
1
VPQA1
VPQC1 QB61REL
& >1
VPQC2 QB61ITL
1
VP1QC3
QA1_OP
QC1_OP
QC2_OP
1QC3_OP
QB61_EX1
VPQC1
VP1QC3
&
QC1_CL
1QC3_CL
QB61_EX2
VPQA1
VPQC1 QB62REL
& >1
VPQC2 QB62ITL
1
VP2QC3
QA1_OP
QC1_OP
QC2_OP
2QC3_OP
QB62_EX1
VPQC2
VP2QC3
&
QC2_CL
2QC3_CL
QB62_EX2
VPQB61 QC1REL
VPQB62 QC1ITL
& 1
QB61_OP QC2REL
QB62_OP QC2ITL
1
en04000560.vsd

Section 11
Control
Table 226: Input signals for the BH_LINE_A (IL01-) function block
Signal Description
QB6_CL QB6 is in close position
CQA1_OP QA1 in module BH_CONN is in open position
CQA1_CL QA1 in module BH_CONN is in closed position
CQB61_OP QB61 in module BH_CONN is in open position
CQB61_CL QB61 in module BH_CONN is in closed position
CQC1_OP QC1 in module BH_CONN is in open position
CQC1_CL QC1 in module BH_CONN is in closed position
VOLT_OFF There is no voltage on line and not VT (fuse) failure

Section 11
Control
Signal Description
Table 227: Output signals for the BH_LINE_A (IL01-) function block
Signal Description
Table 228: Input signals for the BH_LINE_B (IM01-) function block
Signal Description
QB6_CL QB6 is in close position

Section 11
Control
Signal Description
CQA1_OP QA1 in module BH_CONN is in open position
CQA1_CL QA1 in module BH_CONN is in closed position
CQB62_OP QB62 in module BH_CONN is in open position
CQB62_CL QB62 in module BH_CONN is in closed position
VOLT_OFF There is no voltage on line and not VT (fuse) failure
Table 229: Output signals for the BH_LINE_B (IM01-) function block
Signal Description

Section 11
Control
Signal Description
Table 230: Input signals for the BH_CONN (IK01-) function block
Signal Description
1QC3_OP QC3 on line 1 is in open position
1QC3_CL QC3 on line 1 is in closed position
2QC3_OP QC3 on line 2 is in open position
2QC3_CL QC3 on line 2 is in closed position

Section 11
Control
Table 231: Output signals for the BH_CONN (IK01-) function block
Signal Description
11.5 Logic rotating switch for function selection and

LHMI presentation (GGIO)
11.5.1 Introduction
The Logic rotating switch for function selection and LHMI presentation (LSR, or the
selector switch function block, as it is also known) is used within the CAP tool in
order to get a selector switch functionality similar with the one provided by a hardware
selector switch. Hardware selector switches are used extensively by utilities, in order
to have different functions operating on pre-set values. Hardware switches are
however sources for maintenance issues, lower system reliability and extended
purchase portfolio. The virtual selector switches eliminate all these problems.

The selector switch can be operated either from the control menu on the Local HMI
or with logic prepared in the configuration.
The LSR has two operating inputs – UP and DOWN. When a signal is received on
the UP input, the block will activate the output next to the present activated output,
in ascending order (if the present activated output is 3 – for example and one operates
the UP input, then the output 4 will be activated). When a signal is received on the
DOWN input, the block will activate the output next to the present activated output,
in descending order (if the present activated output is 3 – for example and one operates
the DOWN input, then the output 2 will be activated). Depending on the output
settings the output signals can be steady or pulsed. In case of steady signals, in case
of UP or DOWN operation, the previously active output will be deactivated. Also,
depending on the settings one can have a time delay between the UP or DOWN
activation signal positive front and the output activation.

Section 11
Control
Repeated down or up when end position has been reached will give repeated pulses
on the selected step. This can e.g. be used to have multiple activations on two position
switches.
One can block the function operation, by activating the BLOCK input. In this case,
the present position will be kept and further operation will be blocked. The operator
place (local or remote) is specified through the PSTO input.
The LSR function block has also an integer value output, that generates the actual
position number. The positions names are fully settable by the user.

Section 11
Control

SL01-
SLGGIO
BLOCK SWPOS01
PSTO SWPOS02
UP SWPOS03
DOWN SWPOS04
SWPOS05
SWPOS06
SWPOS07
SWPOS08
SWPOS09
SWPOS10
SWPOS11
SWPOS12
SWPOS13
SWPOS14
SWPOS15
SWPOS16
SWPOS17
SWPOS18
SWPOS19
SWPOS20
SWPOS21
SWPOS22
SWPOS23
SWPOS24
SWPOS25
SWPOS26
SWPOS27
SWPOS28
SWPOS29
SWPOS30
SWPOS31
SWPOS32
SWPOSN
INSTNAME
NAME1
NAME2
NAME3
NAME4
NAME5
NAME6
NAME7
NAME8
NAME9
NAME10
NAME11
NAME12
NAME13
NAME14
NAME15
NAME16
NAME17
NAME18
NAME19
NAME20
NAME21
NAME22
NAME23
NAME24
NAME25
NAME26
NAME27
NAME28
NAME29
NAME30
NAME31
NAME32
en05000658.vsd
Figure 233: LRS1 function block, example for LRS1-LRS6

Section 11
Control
Table 232: Input signals for the SSGGIO (LRS1-) function block
Signal Description
BLOCK Block of function.
PSTO Operator place selection.
UP Binary "UP" command
DOWN Binary "DOWN" command
Table 233: Output signals for the SSGGIO (LRS1-) function block
Signal Description
SWPOS01 Selector switch position 1

Section 11
Control
Signal Description
SWPOSN Switch position (integer).
NAME01 User define string for position 1

Section 11
Control
Table 234: General settings for the SSGGIO (LRS1-) function

StopAtExtremes Disabled - Disabled - Stop when min or max
Enabled position is reached
Table 235: Parameter group settings for the SSGGIO (LRS1-) function
Operation Off - Off - Operation Off/On
On
NrPos 2 - 32 1 32 - Number of positions
in the switch
OutType Pulsed - Steady - Output type, steady
Steady (=1) or pulse (=0)
tPulse 0.000 - 60.000 0.001 0.200 s Operate pulse
duration, in [s]
tDelay 0.000 - 60000.000 0.010 0.000 s Time delay on the
output, in [s]
11.6 Generic double point function block (DPGGIO)
11.6.1 Introduction
The DPGGIO function block is used to send three logical signals to other systems or
equipment in the substation. It is especially conceived to be used in the interlocking
and reservation station-wide logics.

Upon receiving the input signals, the DPGGIO function block will send the signals
over IEC 61850-8-1 (via its non-transparent-to-CAP user outputs) to the equipment
or system that requests these signals. To be able to get the signals, one must use other
tools, described in the Application Manual, Chapter 2: “Engineering of the IED” and
define which function block in which equipment or system should receive this
information.

DP01-
DPGGIO
OPEN POSITION
CLOSE
VALID
en07000200.vsd
Figure 234: DP function block

Section 11
Control
Table 236: Input signals for the DPGGIO (DP01-) function block
Signal Description
OPEN Open indication
CLOSE Close indication
VALID Valid indication
Table 237: Output signals for the DPGGIO (DP01-) function block
Signal Description
POSITION Double point indication


Section 12
Scheme communication
Section 12 Scheme communication
About this chapter

This chapter describes the scheme communication logic that is used in distance and
earth fault protection function to obtain almost instantaneous fault clearance for faults
on the protected line. The chapter considers scheme communication logic (ZCOM),
current reversal and weak-end in-feed logic (ZCAL) for the distance protection
function and scheme communication logic for residual overcurrent protection (EFC)
and current reversal and weak-end in-feed logic (EFC) for the residual overcurrent
function.
Also Local acceleration logic (ZCLC) is discussed which is a function that can
generate instantaneous tripping as a result of remote end faults without any
telecommunication.
The chapter contains a short description of the design, simplified logical block
diagrams, figure of the function block, input and output signals and setting
parameters.
12.1 Scheme communication logic for distance

protection (PSCH, 85)
Function block name: ZCOM-- IEC 60617 graphical symbol:

ANSI number: 85
ZCPSCH
12.1.1 Introduction
To achieve instantaneous fault clearance for all line faults, a scheme communication
logic is provided. All types of communication schemes e.g. permissive underreach,
permissive overreach, blocking, intertrip etc. are available. The built-in
communication module (LDCM) can be used for scheme communication signalling
when included.
Logic for loss of load and/or local acceleration in co-operation with autoreclose
function is also provided for application where no communication channel is
available.

Section 12

Depending on whether a reverse or forward directed impedance zone is used to issue
the send signal, the communication schemes are divided into Blocking and Permissive
schemes, respectively.
A permissive scheme is inherently faster and has better security against false tripping
than a blocking scheme. On the other hand, a permissive scheme depends on a
received signal for a fast trip, so its dependability is lower than that of a blocking
scheme.
12.1.2.1 Blocking scheme
The principal of operation for a blocking scheme is that an overreaching zone is

allowed to trip instantaneously after the settable co-ordination time tCoord has
elapsed, when no signal is received from the remote terminal.
The received signal, which shall be connected to CR, is used to not release the zone
to be accelerated to clear the fault instantaneously (after time tCoord). The
overreaching zone to be accelerated is connected to the input CACC, see
figure 235.
In case of external faults, the blocking signal (CR) must be received before the settable
timer tCoord elapses, to prevent a false trip, see figure 235.
The function can be totally blocked by activating the input BLOCK, block of trip by
activating the input BLKTR, Block of carrier send by activating the input BLKCS.
tCoord
CACC
t TRIP
CR AND
en05000512.vsd
Figure 235: Basic logic for trip carrier in blocking scheme
Channels for communication in each direction must be available.
12.1.2.2 Permissive underreach scheme
In a permissive underreach scheme, a forward directed underreach measuring element

(normally zone1) sends a permissive signal CS to the remote end if a fault is detected
in forward direction. The received signal CR is used to allow an overreaching zone
to trip after the tCoord timer has elapsed. The tCoord is in permissive underreach
schemes normally set to zero.
The logic for trip carrier in permissive scheme is shown in figure 236.

Section 12
tCoord
CACC
t TRIP
CR AND
en05000513.vsd
Figure 236: Logic for trip carrier in permissive scheme
The permissive underreach scheme has the same blocking possibilities as mentioned
for blocking scheme above.
12.1.2.3 Permissive overreach scheme
In a permissive overreach scheme, a forward directed overreach measuring element

(normally zone2) sends a permissive signal CS to the remote end if a fault is detected
in forward direction. The received signal CR is used to allow an overreaching zone
to trip after the settable tCoord timer has elapsed. The tCoord is in permissive
overreach schemes normally set to zero.
The logic for trip carrier is the same as for permissive underreach, i.e. figure 236.
The permissive overreach scheme has the same blocking possibilities as mentioned
for blocking scheme above.
12.1.2.4 Unblocking scheme
In unblocking scheme, the lower dependability in permissive scheme is overcome by

using the loss of guard signal from the communication equipment to locally create a
carrier receive signal. It is common or suitable to use the function when older, less
reliable, power-line carrier (PLC) communication is used.
The unblocking function uses a carrier guard signal CRG, which must always be
present, even when no CR signal is received. The absence of the CRG signal for a
time longer than the setting tSecurity time is used as a CR signal, see figure 237. This
also enables a permissive scheme to operate when the line fault blocks the signal
transmission.
The carrier received signal created by the unblocking function is reset 150 ms after
the security timer has elapsed. When that occurs an output signal LCG is activated
for signalling purpose. The unblocking function is reset 200 ms after that the guard
signal is present again.

Section 12
CR
tSecurity CRL
t >1
1
CRG
200 ms 150 ms
t OR t AND
AND
LCG
en05000746.vsd
Figure 237: Carrier guard logic with unblocking scheme
The unblocking function can be set in three operation modes (setting Unblock):
Off: The unblocking function is out of operation

No restart: Communication failure shorter than tSecurity will be ignored
If CRG disappears a CRL signal will be transferred to the trip logic
There will not be any information in case of communication failure (LCG)
Restart Communication failure shorter than tSecure will be ignored
It sends a defined (150 ms) CRL after the disappearance of the CRG signal
The function will activate LCG output in case of communication failure
If the communication failure comes and goes (<200 ms) there will not be recurrent
signalling
12.1.2.5 Intertrip scheme
In the direct inter-trip scheme, the carrier send signal CS is sent from an underreaching
zone that is tripping the line.
The received signal CR is directly transferred to a TRIP for tripping without local
criteria. The signal is further processed in the tripping logic. In case of single-pole
tripping in multi-phase systems, a phase selection is performed.
12.1.2.6 Simplified logic diagram
The simplified logic diagram for the complete logic is shown in figure 238.

Section 12
Unblock =
Off
CR
Unblock =
OR CRL
NoRestart AND
CRL
Unblock =
tSecurit
Restart
y
CRG 1 t AND
200 ms 150 ms LCG

AND
t OR AND t
SchemeType =
Intertrip
CSUR
tSendMi
n AND
OR
BLOCK AND
CSBLK OR
CRL
Schemetype =
Permissive UR AND CS
OR
tCoord
AND 25 ms
OR t TRIP
CACC t
Schemetype =
Permissive OR
CSOR OR AND
AND
tSendMin
OR
AND
SchemeType =
Blocking
BLKCS
AND
en05000515.vsd
Figure 238: Scheme communication logic for distance protection, simplified logic
diagram

Section 12

ZCOM-
ZCPSCH
BLOCK TRIP
BLKTR CS
BLKCS CRL
CSBLK LCG
CACC
CSOR
CSUR
CR
CRG
en05000332.vsd
Figure 239: ZCOM function block
Table 238: Input signals for the ZCPSCH_85 (ZCOM-) function block
Signal Description
BLKTR Signal for block of trip output from communication logic
BLKCS Block of carrier send in permissive OR and blocking schemes
CSBLK Reverse directed distance protection zone signal
CACC Permissive distance protection zone signal
CSOR Overreaching distance protection zone signal
CSUR Underreaching distance protection zone signal
CR Carrier Signal Received
CRG Carrier guard signal received
Table 239: Output signals for the ZCPSCH_85 (ZCOM-) function block
Signal Description
TRIP Trip output
CS Carrier Send signal
CRL Carrier signal received or missing carrier guard signal
LCG Loss of carrier guard signal

Section 12
Table 240: Parameter group settings for the ZCPSCH_85 (ZCOM-) function
On
SchemeType Off - Permissive UR - Scheme type
Intertrip
Permissive UR
Permissive OR
Blocking
tCoord 0.000 - 60.000 0.001 0.035 s Co-ordination time for
blocking
communication
scheme
tSendMin 0.000 - 60.000 0.001 0.100 s Minimum duration of a
carrier send signal
Unblock Off - Off - Operation mode of
NoRestart unblocking logic
Restart
tSecurity 0.000 - 60.000 0.001 0.035 s Security timer for loss
of carrier guard
detection
Table 241: Scheme communication logic for distance protection (PSCH, 85)
Scheme type Intertrip -
Permissive UR
Permissive OR
Blocking
Co-ordination time for blocking (0.000-60.000) s ± 0.5% ± 10 ms
communication scheme
Minimum duration of a carrier send (0.000-60.000) s ± 0.5% ± 10 ms
signal
Security timer for loss of carrier guard (0.000-60.000) s ± 0.5% ± 10 ms
detection
Operation mode of unblocking logic Off -
NoRestart
Restart
12.2 Current reversal and weak-end infeed logic for

distance protection (PSCH, 85)

Section 12
Function block name: ZCAL- IEC 60617 graphical symbol:

ANSI number: 85
ZCRWPSCH
12.2.1 Introduction
The current reversal function is used to prevent unwanted operations due to current
reversal when using permissive overreach protection schemes in application with
parallel lines when the overreach from the two ends overlaps on the parallel line.
The weak-end infeed logic is used in cases where the apparent power behind the
protection can be too low to activate the distance protection function. When activated,
received carrier signal together with local under voltage criteria and no reverse zone
operation gives an instantaneous trip. The received signal is also echoed back to
accelerate the sending end.
12.2.2.1 Current reversal logic
The current reversal logic uses a reverse zone connected to the input IRLV to
recognize the fault on the parallel line. When the reverse zone has been activated for
a certain settable time tPickUpRev it prevents sending of a communication signal and
activation of trip signal for a predefined time tDelayRev. This makes it possible for
the carrier receive signal to reset before the carrier aided trip signal is activated due
to the current reversal by the forward directed zone, see figure 240.
Figure 240: Current reversal logic
The preventing of sending carrier send signal CS and activating of the TRIP in the
scheme communication block ZCOM is carried out by connecting the IRLV signal
to input BLOCK in the ZCOM function.
The function has an internal 10 ms drop-off timer which secure that the current
reversal logic will be activated for short input signals even if the pick-up timer is set
to zero.

Section 12
12.2.2.2 Weak end infeed logic
The WEI function sends back (echoes) the received carrier signal under the condition
that no fault has been detected on the weak end by different fault detection elements
(distance protection in forward and reverse direction).
The WEI function returns the received carrier signal, see figure 241, when:
• The functional input CRL is active. This input is usually connected to the CRL
output on the scheme communication logic ZCOM.
• The WEI function is not blocked by the active signal connected to the WEIBLK1
functional input or to the VTSZ functional input. The latest is usually configured
to the STGEN functional output of the fuse-failure function.
• No active signal has been present for at least 200 ms on the WEIBLK2 functional
input. An OR combination of all fault detection functions (not undervoltage) as
present within the terminal is usually used for this purpose.
Figure 241: Echo of a received carrier signal by the WEI function
When an echo function is used in both terminals, a spurious signal can be looped
round by the echo logics. To avoid a continuous lock-up of the system, the duration
of the echoed signal is limited to 200 ms.
An undervoltage criteria is used as an additional tripping criteria, when the tripping

of the local breaker is selected, setting WEI = Echo&Trip, together with the WEI
function and ECHO signal has been issued by the echo logic, see figure 242.

Section 12
Figure 242: Tripping part of the WEI logic, simplified diagram

ZCAL-
ZCRWPSCH
U3P IRVL
BLOCK TRWEI
IRVBLK TRWEIL1
IRV TRWEIL2
WEIBLK1 TRWEIL3
WEIBLK2 ECHO
VTSZ
CBOPEN
CRL
en05000334.vsd
Figure 243: ZCAL function block
Table 242: Input signals for the ZCRWPSCH_85 (ZCAL-) function block
Signal Description
IRVBLK Block of current reversal function
IRV Activation of current reversal logic
WEIBLK1 Block of WEI logic
WEIBLK2 Block of WEI logic due to operation of other protections
VTSZ Block of trip from WEI logic through fuse-failure function
CBOPEN Block of trip from WEI logic by an open breaker
CRL POR Carrier receive for WEI logic

Section 12
Table 243: Output signals for the ZCRWPSCH_85 (ZCAL-) function block
Signal Description
IRVL Operation of current reversal logic
TRWEI Trip of WEI logic
TRWEIL1 Trip of WEI logic in phase L1
ECHO Carrier send by WEI logic
Table 244: Parameter group settings for the ZCRWPSCH_85 (ZCAL-) function
CurrRev Off - Off - Operating mode of
On Current Reversal
Logic
tPickUpRev 0.000 - 60.000 0.001 0.020 s Pickup time for
current reversal logic
tDelayRev 0.000 - 60.000 0.001 0.060 s Time Delay to prevent
Carrier send and local
trip
WEI Off - Off - Operating mode of
Echo WEI logic
Echo & Trip
tPickUpWEI 0.000 - 60.000 0.001 0.010 s Coordination time for
the WEI logic
voltage level
UPP< 10 - 90 1 70 %UB Phase to Phase
voltage for detection
of fault condition
UPN< 10 - 90 1 70 %UB Phase to Neutral
of fault condition
Table 245: Current reversal and weak-end infeed logic for distance protection (PSCH, 85)
Detection level phase to neutral (10-90)% of Ubase ± 1.0% of Ur
voltage
Detection level phase to phase (10-90)% of Ubase ± 1.0% of Ur
voltage
Reset ratio <105% -

Section 12

Operate time for current reversal (0.000-60.000) s ± 0.5% ± 10 ms
Delay time for current reversal (0.000-60.000) s ± 0.5% ± 10 ms
Coordination time for weak-end (0.000-60.000) s ± 0.5% ± 10 ms
infeed logic
12.3 Local acceleration logic (PLAL)
Function block name: ZCLC- IEC 60617 graphical symbol:

ANSI number:
ZPLAL
12.3.1 Introduction
To achieve fast clearing of faults on the whole line, when no communication channel
is available, local acceleration logic (ZCLC) can be used. This logic enables fast fault
clearing during certain conditions, but naturally, it can not fully replace a
communication channel.
The logic can be controlled either by the auto re-closer (zone extension) or by the
loss of load current (loss-of-load acceleration).
12.3.2.1 Zone extension
The overreaching zone is connected to the input -EXACC. For this reason, configure
the ARREADY functional input to a READY functional output of a used auto-
reclosing function or via the selected binary input to an external autoreclosing device,
see figure 244.
This will allow the overreaching zone to trip instantaneously.

Section 12
Figure 244: Simplified logic diagram for local acceleration logic
After the auto-recloser initiates the close command and remains in the reclaim state,
there will be no ARREADY signal, and the protection will trip normally with step
distance time functions. In case of a fault on the adjacent line within the overreaching
zone range, an unwanted auto-reclosing cycle will occur. The step distance function
at the reclosing attempt will prevent an unwanted retrip when the breaker is reclosed.
On the other hand, at a persistent line fault on line section not covered by instantaneous
zone (normally zone 1) only the first trip will be "instantaneous".
The function will be blocked if the input BLOCK is activated (common with loss of
load acceleration).
12.3.2.2 Loss-of-load acceleration
When the "acceleration" is controlled by a loss of load, the overreaching zone used
for "acceleration" connected to LLACC is not allowed to trip "instantaneously" during
normal non-fault system conditions. When all three-phase currents have been above
the set value MinCurr for more than setting tLowCurr, an overreaching zone will be
allowed to trip "instantaneously" during a fault condition when one or two of the
phase currents will become low due to a three phase trip at the opposite terminal, see
figure 245. The current measurement is performed internally and the STILL signal
becomes logical one under the described conditions. The load current in a healthy
phase is in this way used to indicate the tripping at the opposite terminal. Note that
this function will not operate in case of three-phase faults, because none of the phase
currents will be low when the opposite terminal is tripped.

Section 12
Figure 245: Loss of load acceleration - simplified logic diagram
Breaker closing signals can if decided be connected to block the function during
normal closing.

ZCLC-
ZCLCPLAL
I3P TRZE
BLOCK TRLL
ARREADY
NDST
EXACC
BC
LLACC
en05000333.vsd
Figure 246: ZCLC function block
Table 246: Input signals for the ZCLC (ZCLC-) function block
Signal Description
ARREADY Autoreclosure ready, releases function used for fast trip
NDST Non directional criteria used to prevent instantaneous trip
EXACC Connected to function used for tripping at zone xtension
BC Breaker Close
LLACC Connected to function used for tripping at loss of load

Section 12
Table 247: Output signals for the ZCLC (ZCLC-) function block
Signal Description
TRZE Trip by zone extension
TRLL Trip by loss of load
Table 248: Parameter group settings for the ZCLC (ZCLC-) function
On
current values
LoadCurr 1 - 100 1 10 %IB Load current before
disturbance in % of
IBase
LossOfLoad Off - Off - Enable/Disable
On operation of Loss of
load.
ZoneExtension Off - Off - Enable/Disable
On operation of Zone
extension
MinCurr 1 - 100 1 5 %IB Lev taken as curr loss
due to remote CB trip
in % of IBase
tLowCurr 0.000 - 60.000 0.001 0.200 s Time delay on pick-up
for MINCURR value
tLoadOn 0.000 - 60.000 0.001 0.000 s Time delay on pick-up
for load current
release
tLoadOff 0.000 - 60.000 0.001 0.300 s Time delay on drop off
for load current
release
12.4 Scheme communication logic for residual

overcurrent protection (PSCH, 85)
Function block name: EFC-- IEC 60617 graphical symbol:

ANSI number: 85
ECPSCH

Section 12
12.4.1 Introduction
To achieve fast fault clearance of earth faults on the part of the line not covered by
the instantaneous step of the residual overcurrent protection, the directional residual
overcurrent protection can be supported with a logic that uses communication
channels.
In the directional scheme, information of the fault current direction must be

transmitted to the other line end. With directional comparison, an operate time of the
protection of 50 – 60 ms including a channel transmission time of 20 ms, can be
achieved. This short operate time enables rapid autoreclosing function after the fault
clearance.
The communication logic module for directional residual current protection for the
REx670 IEDs enables blocking as well as permissive under/overreach schemes. The
logic can also be supported by additional logic for weak-end-infeed and current
reversal, included in the EFCA function.

The directional residual overcurrent protection (TEF) is configured to give input
information, i.e. directional fault detection signals, to the EFC logic:
• CACC: Signal to be used for tripping of the communication scheme, normally

the start signal of a forward overreach step of STFW.
• CSBLK: Signal to be used for sending block signal in the blocking
communication scheme, normally the start signal of a reverse overreach step of
STRV.
• CSUR: Signal to be used for sending permissive signal in the underreach
permissive communication scheme, normally the start signal of a forward
underreach step of STINn, where n corresponds to the underacting step.
• CSOR: Signal to be used for sending permissive signal in the overreach
permissive communication scheme, normally the start signal of a forward
overreach step of STINn, where n corresponds to the overreach step.
In addition to this a signal from the autoreclosing function should be configured to

the BLKCS input for blocking of the function at a single phase reclosing cycle.
12.4.2.1 Blocking scheme
In the blocking scheme a signal is sent to the other line end if the directional element
detects an earth fault in the reverse direction. When the forward directional element
operates, it trips after a short time delay if no blocking signal is received from the
other line end. The time delay, normally 30 – 40 ms, depends on the communication
transmission time and a chosen safety margin.
One advantage of the blocking scheme is that only one channel (carrier frequency) is
needed if the ratio of source impedances at both end is approximately equal for zero

Section 12
and positive sequence source impedances, the channel can be shared with the
impedance-measuring system, if that system also works in the blocking mode. The
power line carrier communication signal is transmitted on a healthy line and no signal
attenuation will occur due to the fault.
Blocking schemes are particular favorable for three-terminal applications if there is

no zero-sequence outfeed from the tapping. The blocking scheme is immune to
current reversals because the received carrier signal is maintained long enough to
avoid unwanted operation due to current reversal. There is never any need for weak-
end-infeed logic, because the strong end trips for an internal fault when no blocking
signal is received from the weak end. The fault clearing time is however generally
longer for a blocking scheme than for a permissive scheme.
If the fault is on the line, the forward direction measuring element operates. If no
blocking signal comes from the other line end via the CR binary input (carrier receive)
the TRIP output is activated after the tCoord set time delay.
Figure 247: Simplified logic diagram for blocking scheme.
12.4.2.2 Permissive under/overreach scheme
In the permissive scheme the forward directed earth fault measuring element sends a
permissive signal to the other end, if an earth fault is detected in the forward direction.
The directional element at the other line end must wait for a permissive signal before
activating an operation signal. Independent channels must be available for the
communication in each direction.
An impedance measuring relay which works in the same type of permissive mode,
with one channel in each direction, can share the channels with the communication
scheme for residual overcurrent protection. If the impedance measuring relay works
in the permissive overreach mode, common channels can be used in single-line
applications. In case of double lines connected to a common bus at both ends, use
common channels only if the ratio Z1S/Z0S (positive through zero-sequence source

Section 12
impedance) is about equal at both ends. If the ratio is different, the impedance
measuring and the directional earth-fault current system of the healthy line may detect
a fault in different directions, which could result in unwanted tripping.
Common channels cannot be used when the weak-end-infeed function is used in the
distance or earth fault protection.
In case of an internal earth fault, the forward directed measuring element operates
and sends a permissive signal to the remote end via the CS output (carrier send). Local
tripping is permitted when the forward direction measuring element operates and a
permissive signal is received via the CR binary input (carrier receive).
The permissive scheme can of either underreach or overreach type. In the underreach
alternative an underreach directional residual overcurrent measurement element will
be used as sending criterion of the permissive send signal CSUR.
In the overreach alternative an overreach directional residual overcurrent

measurement element will be used as sending criterion of the permissive send signal
CSOR. Also the underreach signal CSUR can initiate sending.
12.4.2.3 Unblocking scheme
In unblocking scheme, the lower dependability in permissive scheme is overcome by

using the loss of guard signal from the communication equipment to locally create a
carrier receive signal. It is common or suitable to use the function when older, less
reliable, power-line carrier (PLC) communication is used.
The unblocking function uses a carrier guard signal CRG, which must always be
present, even when no CR signal is received. The absence of the CRG signal for a
time longer than the setting tSecurity time is used as a CR signal, see figure 248. This

Section 12
also enables a permissive scheme to operate when the line fault blocks the signal
transmission.
The carrier received signal created by the unblocking function is reset 150 ms after
the security timer has elapsed. When that occurs an output signal LCG is activated
for signalling purpose. The unblocking function is reset 200 ms after that the guard
signal is present again.
CR
tSecurity CRL
t >1
1
CRG
200 ms 150 ms
t OR t AND
AND
LCG
en05000746.vsd
Figure 248: Carrier guard logic with unblocking scheme
The unblocking function can be set in three operation modes (setting Unblock):
Off: The unblocking function is out of operation

No restart: Communication failure shorter than tSecurity will be ignored
If CRG disappeares a CRL signal will be transferred to the trip logic
There will not be any information in case of communication failure (LCG)
Restart Communication failure shorter than tSecure will be ignored
It sends a defined (150 ms) CRL after the disappearance of the CRG signal
The function will activate LCG output in case of communication failure
If the communication failure comes and goes (<200 ms) there will not be recurrent
signalling

EFC1-
ECPSCH
BLOCK TRIP
BLKTR CS
BLKCS CRL
CSBLK LCG
CACC
CSOR
CSUR
CR
CRG
en05000659.vsd
Figure 249: EFC function block

Section 12
Table 249: Input signals for the ECPSCH_85 (EFC1-) function block
Signal Description
BLKTR Signal for blocking trip due to communication logic
BLKCS Signal for blocking CS in Overreach and Blocking schemes
CSBLK Reverse residual overcurrent signal for Carrier Send
CACC Signal to be used for tripping by Communication Scheme
CSOR Overreaching residual overcurrent signal for Carrier Send
CSUR Underreaching residual overcurrent signal for Carrier Send
CR Carrier Receive for Communication Scheme Logic
CRG Carrier guard signal received
Table 250: Output signals for the ECPSCH_85 (EFC1-) function block
Signal Description
TRIP Trip by Communication Scheme Logic
CS Carrier Send by Communication Scheme Logic
CRL Carrier Receive from Communication Scheme Logic
LCG loss of carrier guard signal
Table 251: Parameter group settings for the ECPSCH_85 (EFC1-) function
On
SchemeType Off - Permissive UR - Scheme type, Mode
Intertrip of Operation
Permissive UR
Permissive OR
Blocking
tCoord 0.000 - 60.000 0.001 0.035 s Communication
scheme coordination
time
tSendMin 0.000 - 60.000 0.001 0.100 s Minimum duration of a
carrier send signal
Unblock Off - Off - Operation mode of
NoRestart unblocking logic
Restart
tSecurity 0.000 - 60.000 0.001 0.035 s Security timer for loss
of carrier guard
detection

Section 12
Table 252: Scheme communication logic for residual overcurrent protection (PSCH, 85)
Communication scheme (0.000-60.000) s ± 0.5% ± 10 ms
coordination time
Scheme type Permissive UR -
Permissive OR
Blocking
12.5 Current reversal and weak-end infeed logic for

residual overcurrent protection (PSCH, 85)
Function block name: EFCA- IEC 60617 graphical symbol:

ANSI number: 85
ECRWPSCH
12.5.1 Introduction
The EFCA additional communication logic is a supplement to the EFC scheme
communication logic for the residual overcurrent protection.
To achieve fast fault clearing for all earth faults on the line, the directional earth-fault
protection function can be supported with logic, that uses communication channels.
REx670 terminals have for this reason available additions to scheme communication
logic.
If parallel lines are connected to common busbars at both terminals, overreaching

permissive communication schemes can trip unselectively due to fault current
reversal. This unwanted tripping affects the healthy line when a fault is cleared on
the other line. This lack of security can result in a total loss of interconnection between
the two buses. To avoid this type of disturbance, a fault current-reversal logic
(transient blocking logic) can be used.
Permissive communication schemes for residual overcurrent protection, can basically

operate only when the protection in the remote terminal can detect the fault. The
detection requires a sufficient minimum residual fault current, out from this terminal.
The fault current can be too low due to an opened breaker or high positive and/or zero
sequence source impedance behind this terminal. To overcome these conditions, weak
end infeed (WEI) echo logic is used.

Section 12
12.5.2.1 Directional comparison logic function
The directional comparison function contains logic for blocking overreach and
permissive overreach schemes.
The circuits for the permissive overreach scheme contain logic for current reversal
and weak end infeed functions. These functions are not required for the blocking
overreach scheme.
Use the independent or inverse time functions in the directional earth-fault protection
module to get back-up tripping in case the communication equipment malfunctions
and prevents operation of the directional comparison logic.
Figure 250 and figure 251 show the logic circuits.
Connect the necessary signal from the auto-recloser for blocking of the directional
comparison scheme, during a single-phase auto-reclosing cycle, to the BLOCK input
of the directional comparison module.
12.5.2.2 Fault current reversal logic
The fault current reversal logic uses a reverse directed element, connected to IRV,
which recognizes that the fault is in reverse direction. When the reverse direction
element is activated during the tPickUp time, the IRVL signal is activated, see
figure 250. The logic is now ready to handle a current reversal without tripping. IRVL
will be connected to the block input on the permissive overreach scheme.
When the fault current is reversed on the non faulty line, IRV is deactivated and
IRVBLK is activated. The reset of IRVL is delayed by the tDelay time, see
figure 250. This ensures the reset of the carrier receive CR signal.
Figure 250: Simplified logic diagram, current reversal
12.5.2.3 Weak and infeed logic
The weak end infeed function can be set to send only an echo signal (WEI=Echo) or
an echo signal and a trip signal (WEI=Trip). See figure 251 and figure 252.

Section 12
The weak end infeed logic uses normally a reverse and a forward direction element,
connected to WEIBLK via an OR-gate. See figure 251. If neither the forward nor the
reverse directional measuring element is activated during the last 200 ms. The weak-
end-infeed logic echoes back the received permissive signal. See figure 251.
If the forward or the reverse directional measuring element is activated during the
last 200 ms, the fault current is sufficient for the IED to detect the fault with the earth-
fault function that is in operation.
Figure 251: Simplified logic diagram, weak end infeed - echo.
With the Trip setting, the logic sends an echo according to above. Further, it activates
the TRWEI signal to trip the breaker if the echo conditions are fulfilled and the neutral
point voltage is above the set operate value for 3U0>
The voltage signal that is used to calculate the zero sequence voltage is set in the
earth-fault function that is in operation.
Figure 252: Simplified logic diagram, weak end infeed - Trip.
The weak end infeed echo sent to the strong line end has a maximum duration of 200
ms. When this time period has elapsed, the conditions that enable the echo signal to
be sent are set to zero for a time period of 50 ms. This avoids ringing action if the
weak end echo is selected for both line ends.

Section 12

EFCA-
ECRWPSCH
U3P IRVL
BLOCK TRWEI
IRVBLK ECHO
IRV CR
WEIBLK1
WEIBLK2
VTSZ
CBOPEN
CRL
en05000335.vsd
Figure 253: EFCA function block
Table 253: Input signals for the ECRWPSCH_85 (EFCA-) function block
Signal Description
IRVBLK Block of current reversal function
IRV Activation of current reversal logic
WEIBLK1 Block of WEI Logic
WEIBLK2 Block of WEI logic due to operation of other protections
VTSZ Block of trip from WEI logic through fuse-failure function
CBOPEN Block of trip from WEI logic by an open breaker
CRL POR Carrier receive for WEI logic
Table 254: Output signals for the ECRWPSCH_85 (EFCA-) function block
Signal Description
IRVL Operation of current reversal logic
TRWEI Trip of WEI logic
ECHO Carrier send by WEI logic
CR POR Carrier signal received from remote end

Section 12
Table 255: Parameter group settings for the ZCRWPSCH_85 (ZCAL-) function
CurrRev Off - Off - Operating mode of
On Current Reversal
Logic
tPickUpRev 0.000 - 60.000 0.001 0.020 s Pickup time for
current reversal logic
tDelayRev 0.000 - 60.000 0.001 0.060 s Time Delay to prevent
Carrier send and local
trip
WEI Off - Off - Operating mode of
Echo WEI logic
Echo & Trip
tPickUpWEI 0.000 - 60.000 0.001 0.010 s Coordination time for
the WEI logic
voltage level
UPP< 10 - 90 1 70 %UB Phase to Phase
of fault condition
UPN< 10 - 90 1 70 %UB Phase to Neutral
of fault condition
Table 256: Current reversal and weak-end infeed logic for residual overcurrent protection (PSCH,
85)
Operate voltage 3Uo for WEI trip (5-70)% of Ubase ± 1.0% of Ur
Reset ratio >95% -

Operate time for current reversal (0.000-60.000) s ± 0.5% ± 10 ms
Delay time for current reversal (0.000-60.000) s ± 0.5% ± 10 ms
Coordination time for weak-end (0.000–60.000) s ± 0.5% ± 10 ms
infeed logic

490
Section 13
Logic
Section 13 Logic
About this chapter

This chapter describes primarily tripping and trip logic functions. The way the
functions work, their setting parameters, function blocks, input and output signals
and technical data are included for each function.
13.1 Tripping logic (PTRC, 94)
Function block name: TRPx- IEC 60617 graphical symbol:

ANSI number: 94
SMPPTRC I->O
13.1.1 Introduction
A function block for protection tripping is provided for each circuit breaker involved
in the tripping of the fault. It provides the pulse prolongation to ensure a trip pulse of
sufficient length, as well as all functionality necessary for correct co-operation with
autoreclosing functions.
The trip function block includes functionality for evolving faults and breaker lock-
out.

The duration of a trip output signal from the TRPx function is settable (tTripMin).
The pulse length should be long enough to secure the breaker opening.
For three-pole tripping, TRPx function has a single input (TRIN) through which all
trip output signals from the protection functions within the IED, or from external
protection functions via one or more of the IEDs binary inputs, are routed. It has a
single trip output (TRIP) for connection to one or more of the IEDs binary outputs,
as well as to other functions within the IED requiring this signal.

Section 13
Logic
BLOCK
tTripMin TRIP
TRIN OR
AND t
Operation Mode = On
Program = 3Ph
en05000789.vsd
Figure 254: Simplified logic diagram for three phase trip
The TRPx function for single- and two-pole tripping has additional phase segregated
inputs for this, as well as inputs for faulted phase selection. The latter inputs enable
single- and two-pole tripping for those functions which do not have their own phase
selection capability, and therefore which have just a single trip output and not phase
segregated trip outputs for routing through the phase segregated trip inputs of the
expanded TRPx function. Examples of such protection functions are the residual
overcurrent protections. The expanded TRPx function has two inputs for these
functions, one for impedance tripping (e.g. carrier-aided tripping commands from the
scheme communication logic), and one for earth fault tripping (e.g. tripping output
from a residual overcurrent protection). Additional logic secures a three-pole final
trip command for these protection functions in the absence of the required phase
selection signals.
The expanded TRPx function has three trip outputs TRL1, TRL2, TRL3 (besides the
trip output TRIP), one per phase, for connection to one or more of the IEDs binary
outputs, as well as to other functions within the IED requiring these signals. There
are also separate output signals indicating single pole, two pole or three pole trip.
These signals are important for cooperation with the auto-reclosing function.
The expanded TRPx function is equipped with logic which secures correct operation
for evolving faults as well as for reclosing on to persistent faults. A special input is
also provided which disables single- and two-pole tripping, forcing all tripping to be
three-pole.
In multi-breaker arrangements, one TRPx function block is used for each breaker.
This can be the case if single pole tripping and auto-reclosing is used.
The breaker close lockout function can be activated from an external trip signal from
another protection function via input (SETLKOUT) or internally at a three pole trip,
if desired.
It is possible to lockout seal in the tripping output signals or use blocking of closing
only the choice is by setting TripLockout.

Section 13
Logic
TRINL1
TRINL2
OR
TRINL3
1PTRZ OR
1PTREF
OR
TRIN RSTTRIP - cont.
AND
Program = 3ph
en05000517.vsd
Figure 255: Three-phase front logic — simplified logic diagram
Figure 256: Phase segregated front logic

Section 13
Logic
Figure 257: Additional logic for the 1ph/3ph operating mode

Section 13
Logic
Figure 258: Additional logic for the 1ph/2ph/3ph operating mode
Figure 259: Final tripping circuits

Section 13
Logic

TRP1-
SMPPTRC_94
BLOCK TRIP
BLKLKOUT TRL1
TRIN TRL2
TRINL1 TRL3
TRINL2 TR1P
TRINL3 TR2P
PSL1 TR3P
PSL2 CLLKOUT
PSL3
1PTRZ
1PTREF
P3PTR
SETLKOUT
RSTLKOUT
en05000707.vsd
Figure 260: TRP function block
Table 257: Input signals for the SMPPTRC_94 (TRP1-) function block
Signal Description
BLKLKOUT Blocks circuit breaker lockout output (CLLKOUT)
TRIN Trip all phases
TRINL1 Trip phase 1
TRINL2 Trip phase 2
TRINL3 Trip phase 3
PSL1 Functional input for phase selection in phase L1
1PTRZ Zone Trip with a separate phase selection
1PTREF Single phase DEF Trip for separate phase selection
P3PTR Prepare all tripping to be three-phase
SETLKOUT Input for setting the circuit breaker lockout function
RSTLKOUT Input for resetting the circuit breaker lockout function
Table 258: Output signals for the SMPPTRC_94 (TRP1-) function block
Signal Description
TRIP General trip output signal

Section 13
Logic
Signal Description
TR1P Tripping single-pole
TR2P Tripping two-pole
TR3P Tripping three-pole
CLLKOUT Circuit breaker lockout output (set until reset)
Table 259: Parameter group settings for the SMPPTRC_94 (TRP1-) function
On
Program 3 phase - 1ph/3ph - Three ph; single or
1ph/3ph three ph; single, two
1ph/2ph/3ph or three ph trip
TripLockout Off - Off - On: activate output
On (CLLKOUT) and trip
latch, Off: only outp
AutoLock Off - Off - On: lockout from input
On (SETLKOUT) and
trip, Off: only inp
tTripMin 0.000 - 60.000 0.001 0.150 s Minimum duration of
trip output signal
Table 260: Tripping logic (PTRC, 94)

Trip action 3-ph, 1/3-ph, 1/2/3-ph -
Minimum trip pulse length (0.000-60.000) s ± 0.5% ± 10 ms
Timers (0.000-60.000) s ± 0.5% ± 10 ms
13.2 Trip matrix logic (GGIO, 94X)
13.2.1 Introduction
Twelve trip matrix logic blocks are included in the IED. The function blocks are used
in the configuration of the IED to route trip signals and/or other logical output signals
to the different output relays.

Section 13
Logic
The matrix and the physical outputs will be seen in the PCM 600 engineering tool
and this allows the user to adapt the signals to the physical tripping outputs according
to the specific application needs.

Tripping matrix logic block is provided with 32 input signals and 3 output signals.
The function block incorporates internal logic OR gates in order to provide the
necessary grouping of connected input signals (e.g. for tripping and alarming
purposes) to the three output signals from the function block.
Internal built-in OR logic is made in accordance with the following three rules:
1. when any one of first 16 inputs signals (i.e. INPUT1 to INPUT16) has logical
value 1 (i.e. TRUE) the first output signal (i.e. OUTPUT1) will get logical value
1 (i.e. TRUE). Additional time delays can be introduced for OUTPUT1 via
setting parameters "PulseTime1", "OnDelayTime1" & "OffDelayTime1".
2. when any one of second 16 inputs signals (i.e. INPUT17 to INPUT32) has logical
value 1 (i.e. TRUE) the second output signal (i.e. OUTPUT2) will get logical
value 1 (i.e. TRUE). Additional time delays can be introduced for OUTPUT2
via setting parameters "PulseTime2", "OnDelayTime2" & "OffDelayTime2"
3. when any one of all 32 input signals (i.e. INPUT1 to INPUT32) has logical value
1 (i.e. TRUE) the third output signal (i.e. OUTPUT3) will get logical value 1
(i.e. TRUE). Additional time delays can be introduced for OUTPUT3 via setting
parameters "PulseTime3", "OnDelayTime3" & "OffDelayTime3".
Detailed logical diagram is shown in see figure 261

Section 13
Logic
Figure 261: Tripping Matrix Internal Logic.
Output signals from this function block are typically connected to other logic blocks
or directly to output contacts from the IED. When used for direct tripping of the circuit
breaker(s) the pulse time delay on that output signal shall be set to approximately
0,150s in order to obtain satisfactory minimum duration of the trip pulse to the circuit
breaker trip coils.
Twelve such function blocks are available in the IED.

Section 13
Logic

T R01-
TRMGGIO
INPUT 1 OUT PUT 1
INPUT 2 OUT PUT 2
INPUT 3 OUT PUT 3
INPUT 4
INPUT 5
INPUT 6
INPUT 7
INPUT 8
INPUT 9
INPUT 10
INPUT 11
INPUT 12
INPUT 13
INPUT 14
INPUT 15
INPUT 16
INPUT 17
INPUT 18
INPUT 19
INPUT 20
INPUT 21
INPUT 22
INPUT 23
INPUT 24
INPUT 25
INPUT 26
INPUT 27
INPUT 28
INPUT 29
INPUT 30
INPUT 31
INPUT 32
en05000370.vsd
Figure 262: TR function block
Table 261: Input signals for the TRMGGIO (TR01-) function block
Signal Description
INPUT1 Binary input 1

Section 13
Logic
Signal Description
Table 262: Output signals for the TRMGGIO (TR01-) function block
Signal Description
OUTPUT1 Binary output 1
Table 263: Parameter group settings for the TRMGGIO (TR01-) function
On
PulseTime1 0.000 - 60.000 0.001 0.000 s Output pulse time for
output 1
OnDelayTime1 0.000 - 60.000 0.001 0.000 s Output on delay time
for output 1
OffDelayTime1 0.000 - 60.000 0.001 0.000 s Output off delay time
for output 1

Section 13
Logic

output 2
for output 2
for output 2
output 3
for output 3
for output 3
13.3 Configurable logic blocks (LLD)
13.3.1 Introduction
A high number of logic blocks and timers are available for user to adapt the
configuration to the specific application needs.
13.3.2 Inverter function block (INV)
I001-
INV
INPUT OUT
en04000404.vsd
Figure 263: INV function block
Table 264: Input signals for the INV (I001-) function block
Signal Description
INPUT Input
Table 265: Output signals for the INV (I001-) function block
Signal Description
OUT Output
13.3.3 OR function block (OR)

Section 13
Logic
The OR function is used to form general combinatory expressions with boolean

variables. The OR function block has six inputs and two outputs. One of the outputs
is inverted.
O001-
OR
INPUT1 OUT
INPUT2 NOUT
INPUT3
INPUT4
INPUT5
INPUT6
en04000405.vsd
Figure 264: OR function block
Table 266: Input signals for the OR (O001-) function block

Signal Description
INPUT1 Input 1 to OR gate
Table 267: Output signals for the OR (O001-) function block

Signal Description
OUT Output from OR gate
NOUT Inverted output from OR gate
13.3.4 AND function block (AND)

The AND function is used to form general combinatory expressions with boolean
variables.The AND function block has four inputs and two outputs. One of the inputs
and one of the outputs are inverted.
A001-
AND
INPUT 1 OUT
INPUT 2 NOUT
INPUT 3
INPUT 4N
en04000406.vsd
Figure 265: AND function block

Section 13
Logic
Table 268: Input signals for the AND (A001-) function block
Signal Description
INPUT1 Input 1
INPUT2 Input 2
INPUT3 Input 3
INPUT4N Input 4 inverted
Table 269: Output signals for the AND (A001-) function block
Signal Description
OUT Output
NOUT Output inverted
13.3.5 Timer function block (Timer)

The function block TIMER has drop-out and pick-up delayed outputs related to the
input signal. The timer has a settable time delay (parameter T).
T M01-
Timer
INPUT ON
T OFF
en04000378.vsd
Figure 266: TM function block
Table 270: Input signals for the Timer (TM01-) function block
Signal Description
INPUT Input to timer
Table 271: Output signals for the Timer (TM01-) function block
Signal Description
ON Output from timer , pick-up delayed
OFF Output from timer, drop-out delayed
Table 272: General settings for the Timer (TM01-) function

T 0.000 - 90000.000 0.001 0.000 s Time delay of function

Section 13
Logic
13.3.6 Pulse timer function block (PULSE)

The pulse function can be used, for example, for pulse extensions or limiting of
operation of outputs. The pulse timer TP has a settable length.
TP01-
Pulse
INPUT OUT
en04000407.vsd
Figure 267: PULSE function block
Table 273: Input signals for the Pulse (TP01-) function block
Signal Description
INPUT Input to pulse timer
Table 274: Output signals for the Pulse (TP01-) function block
Signal Description
OUT Output from pulse timer
Table 275: General settings for the Pulse (TP01-) function

T 0.000 - 90000.000 0.001 0.010 s Time delay of function
13.3.7 Exclusive OR function block (XOR)

The exclusive OR function XOR is used to generate combinatory expressions with
boolean variables. The function block XOR has two inputs and two outputs. One of
the outputs is inverted. The output signal is 1 if the input signals are different and 0
if they are equal.
XO01-
XOR
INPUT 1 OUT
INPUT 2 NOUT
en04000409.vsd
Figure 268: XOR function block
Table 276: Input signals for the XOR (XO01-) function block
Signal Description
INPUT1 Input 1 to XOR gate
INPUT2 Input 2 to XOR gate

Section 13
Logic
Table 277: Output signals for the XOR (XO01-) function block
Signal Description
OUT Output from XOR gate
NOUT Inverted output from XOR gate
13.3.8 Set-reset with memory function block (SRM)

The Set-Reset function SRM is a flip-flop with memory that can set or reset an output
from two inputs respectively. Each SRM function block has two outputs, where one
is inverted. The memory setting controls if the flip-flop after a power interruption
will return the state it had before or if it will be reset.
SM01-
SRM
SET OUT
RESET NOUT
en04000408.vsd
Figure 269: SM function block
Table 278: Input signals for the SRM (SM01-) function block
Signal Description
SET Set input
RESET Reset input
Table 279: Output signals for the SRM (SM01-) function block
Signal Description
OUT Output
NOUT Output inverted
Table 280: Parameter group settings for the SRM (SM01-) function
Memory Off - Off - Operating mode of
On the memory function
13.3.9 Controllable gate function block (GT)

The GT function block is used for controlling if a signal should be able to pass from
the input to the output or not depending on a setting.

Section 13
Logic
GT 01-
GT
INPUT OUT
en04000410.vsd
Figure 270: GT function block
Table 281: Input signals for the GT (GT01-) function block

Signal Description
INPUT Input to gate
Table 282: Output signals for the GT (GT01-) function block

Signal Description
OUT Output from gate
Table 283: Parameter group settings for the GT (GT01-) function

On
13.3.10 Settable timer function block (TS)

The function block TS timer has outputs for delayed input signal at drop-out and at
pick-up. The timer has a settable time delay. It also has an Operation setting On, Off
that controls the operation of the timer.
TS01-
TimerSet
INPUT ON
OFF
en04000411.vsd
Figure 271: TS function block
Table 284: Input signals for the TimerSet (TS01-) function block
Signal Description
INPUT Input to timer
Table 285: Output signals for the TimerSet (TS01-) function block
Signal Description
ON Output from timer, pick-up delayed
OFF Output from timer, drop-out delayed

Section 13
Logic
Table 286: Parameter group settings for the TimerSet (TS01-) function
On
t 0.000 - 90000.000 0.001 0.000 s Delay for settable
timer n
Table 287: Configurable logic blocks

Logic block Quantity with update rate Range or value Accuracy
fast medium normal
LogicAND 60 60 160 - -
LogicOR 60 60 160 - -
LogicXOR 10 10 20 - -
LogicInverter 30 30 80 - -
LogicSRMemory 10 10 20 - -
LogicGate 10 10 20 - -
LogicTimer 10 10 20 (0.000– ± 0.5% ± 10
90000.000) s ms
LogicPulseTimer 10 10 20 (0.000– ± 0.5% ± 10
90000.000) s ms
LogicTimerSet 10 10 20 (0.000– ± 0.5% ± 10
90000.000) s ms
LogicLoopDelay 10 10 20 (0.000– ± 0.5% ± 10
90000.000) s ms
13.4 Fixed signal function block (FIXD)
13.4.1 Introduction
The fixed signals function block generates a number of pre-set (fixed) signals that
can be used in the configuration of an IED, either for forcing the unused inputs in the
other function blocks to a certain level/value, or for creating a certain logic.

There are eight outputs from the FIXD function block: OFF is a boolean signal, fixed
to OFF (boolean 0) value; ON is a boolean signal, fixed to ON (boolean 1) value;
INTZERO is an integer number, fixed to integer value 0; INTONE is an integer
number, fixed to integer value 1; REALZERO is a floating point real number, fixed
to 0.0 value; STRNULL is a string, fixed to an empty string (null) value; ZEROSMPL

Section 13
Logic
is a 32-bit integer, fixed to 0 value; GRP_OFF is a 32-bit integer, fixed to 0 value;

The function does not allow any settings and therefore it’s not present in PCM 600.
For examples on how to use each type of output in the configuration, please read the
Application Manual.

FIXD-
FixedSignals
OFF
ON
INTZERO
INTONE
REALZERO
STRNULL
ZEROSMPL
GRP_OFF
en05000445.vsd
Figure 272: FIXD function block
Table 288: Output signals for the FixedSignals (FIXD-) function block
Signal Description
OFF Boolean signal fixed off
ON Boolean signal fixed on
INTZERO Integer signal fixed zero
INTONE Integer signal fixed one
REALZERO Real signal fixed zero
STRNULL String signal with no characters
ZEROSMPL Channel id for zero sample
GRP_OFF Group signal fixed off


510
Section 14
Monitoring
Section 14 Monitoring
About this chapter

This chapter describes the functions that handle measurements, events and
disturbances. The way the functions work, their setting parameters, function blocks,
input and output signals, and technical data are included for each function.
14.1 Measurements (MMXU)
Function block name: SVRx- IEC 60617 graphical symbol:

ANSI number:
CVMMXU
Function block name: CPxx IEC 60617 graphical symbol:

ANSI number:
CMMXU
Function block name: VPx- IEC 60617 graphical symbol:

ANSI number:
VMMXU
Function block name: CSQx IEC 60617 graphical symbol:

ANSI number:
CMSQI

Section 14
Monitoring
Function block name: VSQx IEC 60617 graphical symbol:

ANSI number:
VMSQI
14.1.1 Introduction
Measurement functions is used for power system measurement, supervision and
reporting to the local HMI, monitoring tool within PCM 600 or to station level (i.e.
IEC61850). The possibility to continuously monitor measured values of active power,
reactive power, currents, voltages, frequency, power factor etc. is vital for efficient
production, transmission and distribution of electrical energy. It provides to the
system operator fast and easy overview of the present status of the power system.
Additionally it can be used during testing and commissioning of protection and
control IEDs in order to verify proper operation and connection of instrument
transformers (i.e. CTs & VTs). During normal service by periodic comparison of the
measured value from the IED with other independent meters the proper operation of
the IED analog measurement chain can be verified. Finally it can be used to verify
proper direction orientation for distance or directional overcurrent protection
function.
The available measured values of an IED are depending on the actual

hardware (TRM) and the logic configuration made in PCM 600.
All measured values can be supervised with four settable limits, i.e. low-low limit,
low limit, high limit and high-high limit. A zero clamping reduction is also supported,
i.e the measured value below a settable limit is forced to zero which reduces the impact
of noise in the inputs.
Dead-band supervision can be used to report measured signal value to station level
when change in measured value is above set threshold limit or time integral of all
changes since the last time value updating exceeds the threshold limit. Measure value
can also be based on periodic reporting.
The measuring function, SVR, provides the following power system quantities:
• P, Q and S: three phase active, reactive and apparent power

• PF: power factor
• U: phase-to-phase voltage magnitude
• I: phase current magnitude
• F: power system frequency
The measuring functions CP and VP provides physical quantities:

Section 14
Monitoring
• I: phase currents (magnitude and angle)

• U: phase-phase voltages (magnitude and angle)
It is possible to calibrate the measuring function above to get class 0.5 presentation.
This is accomplished by angle and amplitude compensation at 5, 30 and 100% of
rated current and voltage.
The power system quantities provided, depends on the actual

hardware, (TRM) and the logic configuration made in PCM 600.
The measuring functions CSQ and VSQ provides sequential quantities:
• I: sequence currents (positive, zero, negative sequence, magnitude and angle)

• U: sequence voltages (positive, zero and negative sequence, magnitude and
angle).
The SVR function calculates three-phase power quantities by using fundamental

frequency phasors (i.e. DFT values) of the measured current and voltage signals. The
measured power quantities are available either as instantaneously calculated
quantities or averaged values over a period of time (i.e. low pass filtered) depending
on the selected settings.
The IED can be provided with up to 3 SVR-, 10 CP-, 5 VP-, 3 CSQ- and 3 VSQ-
measurement functions.
14.1.2.1 Measurement supervision
The protection, control, and monitoring IEDs have functionality to measure and
further process information for currents and voltages obtained from the pre-
processing blocks. The number of processed alternate measuring quantities depends
on the type of IED and built-in options.
The information on measured quantities is available for the user at different locations:
• Locally by means of the local HMI

• Remotely using the monitoring tool within PCM 600 or over the station bus (IEC
61850-8)
• Internally by connecting the analog output signals to the Disturbance Report
function
Phase angle reference

All phase angles are presented in relation to a defined reference channel. The
parameter PhaseAngleRef defines the reference, see section "Analog inputs".

Section 14
Monitoring
Zero point clamping

Measured value below zero point clamping limit is forced to zero. This allows the
noise in the input signal to be ignored. The zero point clamping limit is a general
setting (XZeroDb where X equals S, P, Q, PF, U, I, F, IL1-3, UL12-31, I1, I2, 3I0,
U1, U2 or 3U0).). Observe that this measurement supervision zero point clamping
might be overridden by the zero point clamping used for the service values within
SVR.
Continuous monitoring of the measured quantity

Users can continuously monitor the measured quantity available in each function
block by means of four built-in operating thresholds, see figure 273. The monitoring
has two different modes of operating:
• Overfunction, when the measured current exceeds the High limit (XHiLim) or
High-high limit (XHiHiLim) pre-set values
• Underfunction, when the measured current decreases under the Low limit
(XLowLim) or Low-low limit (XLowLowLim) pre-set values.
X_RANGE is illustrated in figure 273.
X_RANGE = 3
High-high limit
X_RANGE= 1 Hysteresis
High limit
X_RANGE=0
X_RANGE=0 t
Low limit
X_RANGE=2
Low-low limit
X_RANGE=4
en05000657.vsd
Figure 273: Presentation of operating limits
Each analog output has one corresponding supervision level output (X_RANGE).
The output signal is an integer in the interval 0-4 (0: Normal, 1: High limit exceeded,
3: High-high limit exceeded, 2: below Low limit and 4: below Low-low limit). The
output may be connected to a measurement expander block (XP) to get measurement
supervision as binary signals.
The logical value of the functional output signals changes according to figure 273.
The user can set the hysteresis (XLimHyst), which determines the difference between
the operating and reset value at each operating point, in wide range for each measuring

Section 14
Monitoring
channel separately. The hysteresis is common for all operating values within one
channel.
Actual value of the measured quantity

The actual value of the measured quantity is available locally and remotely. The
measurement is continuous for each measured separately, but the reporting of the
value to the higher levels depends on the selected reporting mode. The following
basic reporting modes are available:
• Cyclic reporting (Cyclic)

• Amplitude dead-band supervision (Dead band)
• Integral dead-band supervision (Int deadband)
Cyclic reporting
The cyclic reporting of measured value is performed according to chosen setting
(XRepTyp). The measuring channel reports the value independent of amplitude or
integral dead-band reporting.
Y
Value Reported Value Reported
(1st)
Y3 Value Reported
Y2 Y4
Y1 Y5
t (*) t (*) t (*) t (*)
t
Value 1
Value 2
Value 3
Value 4
Value 5
en05000500.vsd
(*)Set value for t: XDbRepInt
Figure 274: Periodic reporting
Amplitude dead-band supervision

If a measuring value is changed, compared to the last reported value, and the change
is larger than the ±ΔY predefined limits that are set by user (XZeroDb), then the
measuring channel reports the new value to a higher level, if this is detected by a new
measured value. This limits the information flow to a minimum necessary.
Figure 275 shows an example with the amplitude dead-band supervision. The picture
is simplified: the process is not continuous but the values are evaluated with a time
interval of one execution cycle from each other.

Section 14
Monitoring
Value Reported
Y

Value Reported
(1st)
Y3 DY
DY
Y2 DY
DY
DY
DY
Y1
99000529.vsd
Figure 275: Amplitude dead-band supervision reporting
After the new value is reported, the ±ΔY limits for dead-band are automatically set
around it. The new value is reported only if the measured quantity changes more than
defined by the ±ΔY set limits.
Integral dead-band reporting

The measured value is reported if the time integral of all changes exceeds the pre-set
limit (XZeroDb), figure 276, where an example of reporting with integral dead-band
supervision is shown. The picture is simplified: the process is not continuous but the
values are evaluated with a time interval of one execution cycle from each other.
The last value reported, Y1 in figure 276 serves as a basic value for further
measurement. A difference is calculated between the last reported and the newly
measured value and is multiplied by the time increment (discrete integral). The
absolute values of these integral values are added until the pre-set value is exceeded.
This occurs with the value Y2 that is reported and set as a new base for the following
measurements (as well as for the values Y3, Y4 and Y5).
The integral dead-band supervision is particularly suitable for monitoring signals with
small variations that can last for relatively long periods.

Section 14
Monitoring
Y A1 >=
A >= pre-set value
A2 >=
pre-set value pre-set value
Y3 A3 + A4 + A5 + A6 + A7 >=
pre-set value
Y2 A1 A2
A4 A6
Value Reported Y4 A3 A5 A7
(1st) Value
Value Reported Y5
A Reported Value
Reported Value
Y1 Reported
t
99000530.vsd
Figure 276: Reporting with integral dead-band supervision
14.1.2.2 Service values (MMXU, SVR)
Mode of operation
The measurement function must be connected to three-phase current and three-phase
voltage input in the configuration tool (group signals), but it is capable to measure
and calculate above mentioned quantities in nine different ways depending on the
available VT inputs connected to the IED. The end user can freely select by a
parameter setting, which one of the nine available measuring modes shall be used
within the function. Available options are summarized in the following table:
Set value for Formula used for complex, three- Formula used for voltage and Comment
parameter phase power calculation current magnitude calculation
“Mode”
1 L1, L2, L3 Used when
* *
S = U L1 × I L1 + U L 2 × I L 2 + U L 3 × I L 3
*
U = ( U L1 + U L 2 + U L 3 ) / 3 three phase-
to-earth
I = ( I L1 + I L 2 + I L 3 ) / 3 voltages are
available
2 Arone Used when
three two
S = U L1 L 2 × I L1 - U L 2 L 3 × I L 3
* *
U = ( U L1 L 2 + U L 2 L 3 ) / 2
phase-to-
phase
I = ( I L1 + I L 3 ) / 2 voltages are
available
3 PosSeq Used when
only
S = 3 × U PosSeq × I PosSeq
*
U = 3 × U PosSeq symmetrical
three phase
I = I PosSeq power shall
be measured
4 L1L2 Used when
only UL1L2
S = U L1 L 2 × ( I L1 - I L 2 )
* *
U = U L1 L 2
phase-to-
phase voltage
I = ( I L1 + I L 2 ) / 2 is available

Section 14
Monitoring
Set value for Formula used for complex, three- Formula used for voltage and Comment
parameter phase power calculation current magnitude calculation
“Mode”
5 L2L3 Used when
only UL2L3
S = U L 2 L3 × ( I L 2 - I L3 )
* *
U = U L2 L3
phase-to-
phase voltage
I = ( I L2 + I L3 ) / 2 is available
6 L3L1 Used when

only UL3L1
S = U L 3 L1 × ( I L 3 - I L1 )
* *
U = U L 3 L1
phase-to-
phase voltage
I = ( I L 3 + I L1 ) / 2 is available
7 L1 Used when
only UL1
S = 3 × U L1 × I L1
*
U = 3 × U L1
phase-to-
earth voltage
I = I L1 is available
8 L2 Used when
only UL2
S = 3 ×U L2 × I L2
*
U = 3 × U L2
phase-to-
earth voltage
I = IL2 is available
9 L3 Used when
only UL3
S = 3 ×U L3 × I L3
*
U = 3 × U L3
phase-to-
earth voltage
I = I L3 is available
* means complex conjugated value
It shall be noted that only in the first two operating modes (i.e. 1 & 2) the measurement
function calculates exact three-phase power. In other operating modes (i.e. from 3 to
9) it calculates the three-phase power under assumption that the power system is fully
symmetrical. Once the complex apparent power is calculated then the P, Q, S, & PF
are calculated in accordance with the following formulas:
P = Re( S )
(Equation 83)
Q = Im( S )
(Equation 84)
S = S = P +Q
2 2
(Equation 85)
PF = cosj = P
S (Equation 86)

Section 14
Monitoring
Additionally to the power factor value the two binary output signals from the function
are provided which indicates the angular relationship between current and voltage
phasors. Binary output signal ILAG is set to one when current phasor is lagging
behind voltage phasor. Binary output signal ILEAD is set to one when current phasor
is leading the voltage phasor.
Each analog output has a corresponding supervision level output (X_RANGE). The
output signal is an integer in the interval 0-4, see section "Measurement
supervision".
Calibration of analog inputs

Measured currents and voltages used in the SVR function can be calibrated to get
class 0.5 measuring accuracy. This is achieved by amplitude and angle compensation
at 5, 30 and 100% of rated current and voltage. The compensation below 5% and
above 100% is constant and linear in between, see example in figure 277.
Amplitude
% of Ir compensation
-10
IAmpComp5 Measured
IAmpComp30 current
IAmpComp100
5 30 100 % of Ir
0-5%: Constant
-10 5-30-100%: Linear
>100%: Constant
Degrees Angle
compensation
-10
IAngComp30 Measured
current
IAngComp5
IAngComp100
5 30 100 % of Ir
-10
en05000652.vsd
Figure 277: Calibration curves
The first current and voltage phase in the group signals will be used as reference and
the amplitude and angle compensation will be used for related input signals.
Low pass filtering

In order to minimize the influence of the noise signal on the measurement it is possible
to introduce the recursive, low pass filtering of the measured values for P, Q, S, U, I
& power factor. This will make slower measurement response to the step changes in

Section 14
Monitoring
the measured quantity. Filtering is performed in accordance with the following

recursive formula:
X = k × X Old + (1 - k ) × X Calculated
(Equation 87)
where:
X is a new measured value (i.e. P, Q, S, U, I or PF) to be given out from the function
XOld is the measured value given from the measurement function in previous execution cycle
XCalculated is the new calculated value in the present execution cycle
k is settable parameter by the end user which influence the filter properties
Default value for parameter k is 0.00. With this value the new calculated value is
immediately given out without any filtering (i.e. without any additional delay). When
k is set to value bigger than 0, the filtering is enabled. Appropriate value of k shall be
determined separately for every application. Some typical value for k =0.14.
Zero point clamping

In order to avoid erroneous measurements when either current or voltage signal is not
present, it is possible for the end user to set the magnitude IGenZeroDb level for
current and voltage measurement UGenZeroDb is forced to zero. When either current
or voltage measurement is forced to zero automatically the measured values for power
(i.e. P, Q & S) and power factor are forced to zero as well. Since the measurement
supervision functionality, included in the SVR function, is using these values the zero
clamping will influence the subsequent supervision (observe the possibility to do zero
point clamping within measurement supervision, see section "Measurement
supervision").
Compensation facility
In order to compensate for small magnitude and angular errors in the complete
measurement chain (i.e. CT error, VT error, IED input transformer errors etc.) it is
possible to perform on site calibration of the power measurement. This is achieved
by setting the complex constant which is then internally used within the function to
multiply the calculated complex apparent power S. This constant is set as magnitude
(i.e. setting parameter PowAmpFact, default value 1.000) and angle (i.e. setting
parameter PowAngComp, default value 0.0 degrees). Default values for these two
parameters are done in such way that they do not influence internally calculated value
(i.e. complex constant has default value 1). In this way calibration, for specific
operating range (e.g. around rated power) can be done at site. However to perform
this calibration it is necessary to have external power meter of the high accuracy class
available.
Directionality
In CT earthing parameter is set as described in section "Analog inputs", active and
reactive power will be measured always towards the protected object. This is shown
in the following figure 278.

Section 14
Monitoring
Busbar
P Q
Protected
Object
en05000373.vsd
Figure 278: Internal IED directionality convention for P & Q measurements
That practically means that active and reactive power will have positive values when
they flow from the busbar towards the protected object and they will have negative
values when they flow from the protected object towards the busbar.
In some application, like for example when power is measured on the secondary side
of the power transformer it might be desirable, from the end client point of view, to
have actually opposite directional convention for active and reactive power
measurements. This can be easily achieved by setting parameter PowAngComp to
value of 180.0 degrees. With such setting the active and reactive power will have
positive values when they flow from the protected object towards the busbar.
Frequency
Frequency is actually not calculated within measurement block. It is simply obtained
from the pre-processing block and then just given out from the measurement block
as an output.
14.1.2.3 Current Phasors (MMXU, CP)
The CP function must be connected to three-phase current input in the configuration

tool to be operable. Currents handled in the function can be calibrated to get class 0.5
measuring accuracy for internal use, on the outputs and IEC 61850. This is achieved
by amplitude and angle compensation at 5, 30 and 100% of rated current. The
compensation below 5% and above 100% is constant and linear in between, see
figure 277 above.
Phase currents (amplitude and angle) are available on the outputs and each amplitude
output has a corresponding supervision level output (ILx_RANG). The supervision
output signal is an integer in the interval 0-4, see section "Measurement
supervision".

Section 14
Monitoring
14.1.2.4 Voltage phasors (MMXU, VP)
The VP function must be connected to three-phase voltage input in the configuration

tool to be operable. Voltages are handled in the same way as currents when it comes
to 0.5 calibrations, see above.
Phase to phase voltages (amplitude and angle) are available on the outputs and each
amplitude output has a corresponding supervision level output (ULxy_RANG). The
supervision output signal is an integer in the interval 0-4, see section "Measurement
supervision".
14.1.2.5 Sequence quantities (MSQI, CSQ and VSQ)
The measurement functions must be connected to three-phase current (CSQ) or

voltage (VSQ) input in the configuration tool to be operable. No outputs, but XRANG,
are calculated within the measuring block and it is not possible to calibrate the signals.
Input signals are obtained from the pre-processing block and transferred to
corresponding output.
Positive, negative and three times zero sequence quantities are available on the
outputs (voltage and current, amplitude and angle). Each amplitude output has a
corresponding supervision level output (XRANGE). The output signal is an integer
in the interval 0-4, see section "Measurement supervision".

The available function blocks of an IED are depending on the actual hardware (TRM)
and the logic configuration made in PCM 600.
SVR1-
CVMMXU
I3P S
U3P S_RANGE
P_INST
P
P_RANGE
Q_INST
Q
Q_RANGE
PF
PF_RANGE
ILAG
ILEAD
U
U_RANGE
I
I_RANGE
F
F_RANGE
en05000772.vsd
Figure 279: SVR function block

Section 14
Monitoring
CP01-
CMMXU
I3P IL1
IL1RANG
IL1ANGL
IL2
IL2RANG
IL2ANGL
IL3
IL3RANG
IL3ANGL
en05000699.vsd
Figure 280: CP function block
VP01-
VMMXU
U3P UL12
UL12RANG
UL23
UL23RANG
UL31
UL31RANG
en05000701.vsd
Figure 281: VP function block
CSQ1-
CMSQI
I3P 3I0
3I0RANG
I1
I1RANG
I2
I2RANG
en05000703.vsd
Figure 282: CS function block
VSQ1-
VMSQI
U3P 3U0
3U0RANG
U1
U1RANG
U2
U2RANG
en05000704.vsd
Figure 283: VS function block
Table 289: Input signals for the CVMMXU (SVR1-) function block
Signal Description

Section 14
Monitoring
Table 290: Output signals for the CVMMXU (SVR1-) function block
Signal Description
S Apparent Power magnitude of deadband value
S_RANGE Apparent Power range
P Active Power magnitude of deadband value
P_RANGE Active Power range
Q Active Power magnitude of deadband value
Q_RANGE Reactive Power range
PF Power Factor magnitude of deadband value
PF_RANGE Power Factor range
ILAG Current is lagging voltage
ILEAD Current is leading voltage
U Calculate voltage magnitude of deadband value
U_RANGE Calcuate voltage range
I Calculated current magnitude of deadband value
I_RANGE Calculated current range
F System frequency magnitude of deadband value
F_RANGE System frequency range
Table 291: Input signals for the CMMXU (CP01-) function block
Signal Description
I3P Group connection abstract block 1
Table 292: Output signals for the CMMXU (CP01-) function block
Signal Description
IL1 IL1 Amplitude, magnitude of reported value
IL1RANG IL1 Amplitude range
Table 293: Input signals for the VMMXU (VP01-) function block
Signal Description
U3P Group connection abstract block 2

Section 14
Monitoring
Table 294: Output signals for the VMMXU (VP01-) function block
Signal Description
UL12 UL12 Amplitude, magnitude of reported value
UL12RANG UL12 Amplitude range
Table 295: Input signals for the CMSQI (CSQ1-) function block
Signal Description
I3P Group connection abstract block 3
Table 296: Output signals for the CMSQI (CSQ1-) function block
Signal Description
3I0 3I0 Amplitude, magnitude of reported value
3I0RANG 3I0 Amplitude range
I1 I1 Amplitude, magnitude of reported value
I1RANG I1 Amplitude range
I2 I2 Amplitude, magnitude of reported value
I2RANG I2 Amplitude range
Table 297: Input signals for the VMSQI (VSQ1-) function block
Signal Description
U3P Group connection abstract block 4
Table 298: Output signals for the VMSQI (VSQ1-) function block
Signal Description
3U0 3U0 Amplitude, magnitude of reported value
3U0RANG 3U0 Amplitude range
U1 U1 Amplitude, magnitude of reported value
U1RANG U1 Amplitude range
U2 U2 Amplitude, magnitude of reported value
U2RANG U2 Amplitude range

Section 14
Monitoring

The available setting parameters of the measurement function (MMXU, MSQI) are
depending on the actual hardware (TRM) and the logic configuration made in PCM
600.
Table 299: General settings for the CVMMXU (SVR1-) function

SDbRepInt 1 - 300 1 10 s,%, Cycl: Report interval
%s (s), Db: In % of range,
Int Db: In %s
SZeroDb 0 - 100000 1 0 1/100 Zero point clamping in
0% 0,001% of range
SHiHiLim 0.000 - 0.001 900000000.000 VA High High limit
10000000000.000 (physical value)
SHiLim 0.000 - 0.001 800000000.000 VA High limit (physical
10000000000.000 value)
SLowLim 0.000 - 0.001 0.000 VA Low limit (physical
10000000000.000 value)
SLowLowLim 0.000 - 0.001 0.000 VA Low Low limit
10000000000.000 (physical value)
SMin 0.000 - 0.001 0.000 VA Minimum value
10000000000.000
SMax 0.000 - 0.001 1000000000.000 VA Maximum value
10000000000.000
SRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
SLimHyst 0.000 - 100.000 0.001 5.000 % Hysteresis value in %
of range (common for
all limits)
PDbRepInt 1 - 300 1 10 s,%, Cycl: Report interval
Int Db: In %s
PZeroDb 0 - 100000 1 0 1/100 Zero point clamping in
0% 0,001% of range
PHiHiLim -10000000000.00 0.001 900000000.000 W High High limit
0- (physical value)
10000000000.000
PHiLim -10000000000.00 0.001 800000000.000 W High limit (physical
0- value)
10000000000.000
PLowLim -10000000000.00 0.001 -800000000.000 W Low limit (physical
0- value)
10000000000.000
PLowLowLim -10000000000.00 0.001 -900000000.000 W Low Low limit
0- (physical value)
10000000000.000
PMin -10000000000.00 0.001 -1000000000.000 W Minimum value
0-
10000000000.000

Section 14
Monitoring

PMax -10000000000.00 0.001 1000000000.000 W Maximum value
0-
10000000000.000
PRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
PLimHyst 0.000 - 100.000 0.001 5.000 % Hysteresis value in %
all limits)
QDbRepInt 1 - 300 1 10 s,%, Cycl: Report interval
Int Db: In %s
QZeroDb 0 - 100000 1 0 1/100 Zero point clamping in
0% 0,001% of range
QHiHiLim -10000000000.00 0.001 900000000.000 VAr High High limit
0- (physical value)
10000000000.000
QHiLim -10000000000.00 0.001 800000000.000 VAr High limit (physical
0- value)
10000000000.000
QLowLim -10000000000.00 0.001 -800000000.000 VAr Low limit (physical
0- value)
10000000000.000
QLowLowLim -10000000000.00 0.001 -900000000.000 VAr Low Low limit
0- (physical value)
10000000000.000
QMin -10000000000.00 0.001 -1000000000.000 VAr Minimum value
0-
10000000000.000
On
QMax -10000000000.00 0.001 1000000000.000 VAr Maximum value
0-
10000000000.000
current level in A
QRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
voltage level in kV
QLimHyst 0.000 - 100.000 0.001 5.000 % Hysteresis value in %
all limits)
Mode L1, L2, L3 - L1, L2, L3 - Selection of
Arone measured current and
Pos Seq voltage
L1L2
L2L3
L3L1
L1
L2
L3

Section 14
Monitoring

PowAmpFact 0.000 - 6.000 0.001 1.000 - Amplitude factor to
scale power
calculations
PowAngComp -180.0 - 180.0 0.1 0.0 Deg Angle compensation
for phase shift
between measured I
&U
k 0.00 - 1.00 0.01 0.00 - Low pass filter
coefficient for power
measurement, U and
I
PFDbRepInt 1 - 300 1 10 s,%, Cycl: Report interval
Int Db: In %s
PFZeroDb 0 - 100000 1 0 1/100 Zero point clamping in
0% 0,001% of range
UGenZeroDb 1 - 100 1 5 % Zero point clamping in
% of Ubase
PFHiHiLim -3.000 - 3.000 0.001 3.000 - High High limit
(physical value)
IGenZeroDb 1 - 100 1 5 % Zero point clamping in
% of Ibase
PFHiLim -3.000 - 3.000 0.001 2.000 - High limit (physical
value)
PFLowLim -3.000 - 3.000 0.001 -2.000 - Low limit (physical
value)
PFLowLowLim -3.000 - 3.000 0.001 -3.000 - Low Low limit
(physical value)
PFMin -1.000 - 0.000 0.001 -1.000 - Minimum value
PFMax 0.000 - 1.000 0.001 1.000 - Maximum value
PFRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
PFLimHyst 0.000 - 100.000 0.001 5.000 % Hysteresis value in %
all limits)
UDbRepInt 1 - 300 1 10 s,%, Cycl: Report interval
Int Db: In %s
UZeroDb 0 - 100000 1 0 1/100 Zero point clamping in
0% 0,001% of range
UHiHiLim -10000000000.00 0.001 460000.000 V High High limit
0- (physical value)
10000000000.000
UHiLim -10000000000.00 0.001 450000.000 V High limit (physical
0- value)
10000000000.000
ULowLim -10000000000.00 0.001 380000.000 V Low limit (physical
0- value)
10000000000.000

Section 14
Monitoring

ULowLowLim -10000000000.00 0.001 350000.000 V Low Low limit
0- (physical value)
10000000000.000
UMin -10000000000.00 0.001 0.000 V Minimum value
0-
10000000000.000
UMax -10000000000.00 0.001 400000.000 V Maximum value
0-
10000000000.000
URepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
ULimHyst 0.000 - 100.000 0.001 5.000 % Hysteresis value in %
all limits)
IDbRepInt 1 - 300 1 10 s,%, Cycl: Report interval
Int Db: In %s
IZeroDb 0 - 100000 1 0 1/100 Zero point clamping in
0% 0,001% of range
IHiHiLim -10000000000.00 0.001 900.000 A High High limit
0- (physical value)
10000000000.000
IHiLim -10000000000.00 0.001 800.000 A High limit (physical
0- value)
10000000000.000
ILowLim -10000000000.00 0.001 -800.000 A Low limit (physical
0- value)
10000000000.000
ILowLowLim -10000000000.00 0.001 -900.000 A Low Low limit
0- (physical value)
10000000000.000
IMin -10000000000.00 0.001 0.000 A Minimum value
0-
10000000000.000
IMax -10000000000.00 0.001 1000.000 A Maximum value
0-
10000000000.000
IRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
ILimHyst 0.000 - 100.000 0.001 5.000 % Hysteresis value in %
all limits)
FrDbRepInt 1 - 300 1 10 s,%, Cycl: Report interval
Int Db: In %s
FrZeroDb 0 - 100000 1 0 1/100 Zero point clamping in
0% 0,001% of range
FrHiHiLim -10000000000.00 0.001 65.000 Hz High High limit
0- (physical value)
10000000000.000

Section 14
Monitoring

FrHiLim -10000000000.00 0.001 63.000 Hz High limit (physical
0- value)
10000000000.000
FrLowLim -10000000000.00 0.001 47.000 Hz Low limit (physical
0- value)
10000000000.000
FrLowLowLim -10000000000.00 0.001 45.000 Hz Low Low limit
0- (physical value)
10000000000.000
FrMin -10000000000.00 0.001 0.000 Hz Minimum value
0-
10000000000.000
FrMax -10000000000.00 0.001 70.000 Hz Maximum value
0-
10000000000.000
FrRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
FrLimHyst 0.000 - 100.000 0.001 5.000 % Hysteresis value in %
all limits)
UAmpComp5 -10.000 - 10.000 0.001 0.000 % Amplitude factor to
calibrate voltage at
5% of Ur
30% of Ur
100% of Ur
IAmpComp5 -10.000 - 10.000 0.001 0.000 % Amplitude factor to
calibrate current at
5% of Ir
30% of Ir
100% of Ir
IAngComp5 -10.000 - 10.000 0.001 0.000 Deg Angle calibration for
current at 5% of Ir
current at 30% of Ir

Section 14
Monitoring
Table 300: General settings for the CMMXU (CP01-) function

IL1DbRepInt 1 - 300 1 10 s,%, Cycl: Report interval
Int Db: In %s
Operation Off - On - Operation Mode On /
On Off
IL1ZeroDb 0 - 100000 1 0 1/100 Zero point clamping in
0% 0,001% of range
IL1HiHiLim -10000000000.00 0.001 900.000 A High High limit
0- (physical value)
10000000000.000
current level in A
5% of Ir
IL1HiLim -10000000000.00 0.001 800.000 A High limit (physical
0- value)
10000000000.000
30% of Ir
IL1LowLim -10000000000.00 0.001 -800.000 A Low limit (physical
0- value)
10000000000.000
100% of Ir
IL1LowLowLim -10000000000.00 0.001 -900.000 A Low Low limit
0- (physical value)
10000000000.000
current at 5% of Ir
IL1Min -10000000000.00 0.001 0.000 A Minimum value
0-
10000000000.000
IL1Max -10000000000.00 0.001 1000.000 A Maximum value
0-
10000000000.000
IL1RepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
IL1LimHys 0.000 - 100.000 0.001 5.000 % Hysteresis value in %
of range and is
common for all limits
IL1AngDbRepInt 1 - 300 1 10 s,%, Cycl: Report interval
Int Db: In %s

Section 14
Monitoring

IL1AngRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
Int Db: In %s
0% 0,001% of range
0- (physical value)
10000000000.000
0- value)
10000000000.000
0- value)
10000000000.000
0- (physical value)
10000000000.000
0-
10000000000.000
0-
10000000000.000
Dead band
Int deadband
of range and is
Int Db: In %s
Dead band
Int deadband
Int Db: In %s
0% 0,001% of range
0- (physical value)
10000000000.000
0- value)
10000000000.000
0- value)
10000000000.000

Section 14
Monitoring

0- (physical value)
10000000000.000
0-
10000000000.000
0-
10000000000.000
Dead band
Int deadband
of range and is
Int Db: In %s
Dead band
Int deadband
Table 301: General settings for the VMMXU (VP01-) function

UL12DbRepInt 1 - 300 1 10 s,%, Cycl: Report interval
Int Db: In %s
Operation Off - On - Operation Mode On /
On Off
UL12ZeroDb 0 - 100000 1 0 1/100 Zero point clamping in
0% 0,001% of range
UL12HiHiLim -10000000000.00 0.001 460000.000 V High High limit
0- (physical value)
10000000000.000
voltage level in kV
5% of Ur
UL12HiLim -10000000000.00 0.001 450000.000 V High limit (physical
0- value)
10000000000.000
30% of Ur
UL12LowLim -10000000000.00 0.001 380000.000 V Low limit (physical
0- value)
10000000000.000

Section 14
Monitoring

100% of Ur
UL12LowLowLim -10000000000.00 0.001 350000.000 V Low Low limit
0- (physical value)
10000000000.000
UL12Min -10000000000.00 0.001 0.000 V Minimum value
0-
10000000000.000
UL12Max -10000000000.00 0.001 450000.000 V Maximum value
0-
10000000000.000
UL12RepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
UL12LimHys 0.000 - 100.000 0.001 5.000 % Hysteresis value in %
of range and is
UL12AnDbRepInt 1 - 300 1 10 s,%, Cycl: Report interval
Int Db: In %s
UL12AngRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
Int Db: In %s
0% 0,001% of range
0- (physical value)
10000000000.000
0- value)
10000000000.000
0- value)
10000000000.000
0- (physical value)
10000000000.000
0-
10000000000.000
0-
10000000000.000
Dead band
Int deadband
of range and is

Section 14
Monitoring

Int Db: In %s
Dead band
Int deadband
Int Db: In %s
0% 0,001% of range
0- (physical value)
10000000000.000
0- value)
10000000000.000
0- value)
10000000000.000
0- (physical value)
10000000000.000
0-
10000000000.000
0-
10000000000.000
Dead band
Int deadband
of range and is
Int Db: In %s
Dead band
Int deadband

Section 14
Monitoring
Table 302: General settings for the CMSQI (CSQ1-) function

3I0DbRepInt 1 - 300 1 10 s,%, Cycl: Report interval
Int Db: In %s
3I0ZeroDb 0 - 100000 1 0 1/100 Zero point clamping in
0% 0,001% of range
3I0HiHiLim -10000000000.00 0.001 900.000 A High High limit
0- (physical value)
10000000000.000
3I0HiLim -10000000000.00 0.001 800.000 A High limit (physical
0- value)
10000000000.000
3I0LowLim -10000000000.00 0.001 -800.000 A Low limit (physical
0- value)
10000000000.000
3I0LowLowLim -10000000000.00 0.001 -900.000 A Low Low limit
0- (physical value)
10000000000.000
3I0Min -10000000000.00 0.001 0.000 A Minimum value
0-
10000000000.000
3I0Max -10000000000.00 0.001 1000.000 A Maximum value
0-
10000000000.000
3I0RepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
3I0LimHys 0.000 - 100.000 0.001 5.000 % Hysteresis value in %
of range and is
On Off
3I0AngDbRepInt 1 - 300 1 10 s,%, Cycl: Report interval
Int Db: In %s
3I0AngRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
I1DbRepInt 1 - 300 1 10 s,%, Cycl: Report interval
Int Db: In %s
I1ZeroDb 0 - 100000 1 0 1/100 Zero point clamping in
0% 0,001% of range
I1HiHiLim -10000000000.00 0.001 900.000 A High High limit
0- (physical value)
10000000000.000
I1HiLim -10000000000.00 0.001 800.000 A High limit (physical
0- value)
10000000000.000
I1LowLim -10000000000.00 0.001 -800.000 A Low limit (physical
0- value)
10000000000.000

Section 14
Monitoring

I1LowLowLim -10000000000.00 0.001 -900.000 A Low Low limit
0- (physical value)
10000000000.000
I1Min -10000000000.00 0.001 0.000 A Minimum value
0-
10000000000.000
I1Max -10000000000.00 0.001 1000.000 A Maximum value
0-
10000000000.000
I1RepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
I1LimHys 0.000 - 100.000 0.001 5.000 % Hysteresis value in %
of range and is
I1AngDbRepInt 1 - 300 1 10 s,%, Cycl: Report interval
Int Db: In %s
I1AngRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
I2DbRepInt 1 - 300 1 10 s,%, Cycl: Report interval
Int Db: In %s
I2ZeroDb 0 - 100000 1 0 1/100 Zero point clamping in
0% 0,001% of range
I2HiHiLim -10000000000.00 0.001 900.000 A High High limit
0- (physical value)
10000000000.000
I2HiLim -10000000000.00 0.001 800.000 A High limit (physical
0- value)
10000000000.000
I2LowLim -10000000000.00 0.001 -800.000 A Low limit (physical
0- value)
10000000000.000
I2LowLowLim -10000000000.00 0.001 -900.000 A Low Low limit
0- (physical value)
10000000000.000
I2Min -10000000000.00 0.001 0.000 A Minimum value
0-
10000000000.000
I2Max -10000000000.00 0.001 1000.000 A Maximum value
0-
10000000000.000
I2RepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband

Section 14
Monitoring

I2LimHys 0.000 - 100.000 0.001 5.000 % Hysteresis value in %
of range and is
I2AngDbRepInt 1 - 300 1 10 s,%, Cycl: Report interval
Int Db: In %s
I2AngRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
Table 303: General settings for the VMSQI (VSQ1-) function

3U0DbRepInt 1 - 300 1 10 s,%, Cycl: Report interval
Int Db: In %s
3U0ZeroDb 0 - 100000 1 0 1/100 Zero point clamping in
0% 0,001% of range
3U0HiHiLim -10000000000.00 0.001 460000.000 V High High limit
0- (physical value)
10000000000.000
3U0HiLim -10000000000.00 0.001 450000.000 V High limit (physical
0- value)
10000000000.000
3U0LowLim -10000000000.00 0.001 380000.000 V Low limit (physical
0- value)
10000000000.000
3U0LowLowLim -10000000000.00 0.001 350000.000 V Low Low limit
0- (physical value)
10000000000.000
3U0Min -10000000000.00 0.001 0.000 V Minimum value
0-
10000000000.000
3U0Max -10000000000.00 0.001 450000.000 V Maximum value
0-
10000000000.000
3U0RepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
3U0LimHys 0.000 - 100.000 0.001 5.000 % Hysteresis value in %
of range and is
On Off
3U0AngDbRepInt 1 - 300 1 10 s,%, Cycl: Report interval
Int Db: In %s
3U0AngRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband

Section 14
Monitoring

U1DbRepInt 1 - 300 1 10 s,%, Cycl: Report interval
Int Db: In %s
U1ZeroDb 0 - 100000 1 0 1/100 Zero point clamping in
0% 0,001% of range
U1HiHiLim -10000000000.00 0.001 460000.000 V High High limit
0- (physical value)
10000000000.000
U1HiLim -10000000000.00 0.001 450000.000 V High limit (physical
0- value)
10000000000.000
U1LowLim -10000000000.00 0.001 380000.000 V Low limit (physical
0- value)
10000000000.000
U1LowLowLim -10000000000.00 0.001 350000.000 V Low Low limit
0- (physical value)
10000000000.000
U1Min -10000000000.00 0.001 0.000 V Minimum value
0-
10000000000.000
U1Max -10000000000.00 0.001 450000.000 V Maximum value
0-
10000000000.000
U1RepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
U1LimHys 0.000 - 100.000 0.001 5.000 % Hysteresis value in %
of range and is
U1AngDbRepInt 1 - 300 1 10 s,%, Cycl: Report interval
Int Db: In %s
U1AngRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
U2DbRepInt 1 - 300 1 10 s,%, Cycl: Report interval
Int Db: In %s
U2ZeroDb 0 - 100000 1 0 1/100 Zero point clamping in
0% 0,001% of range
U2HiHiLim -10000000000.00 0.001 460000.000 V High High limit
0- (physical value)
10000000000.000
U2HiLim -10000000000.00 0.001 450000.000 V High limit (physical
0- value)
10000000000.000
U2LowLim -10000000000.00 0.001 380000.000 V Low limit (physical
0- value)
10000000000.000
U2LowLowLim -10000000000.00 0.001 350000.000 V Low Low limit
0- (physical value)
10000000000.000

Section 14
Monitoring

U2Min -10000000000.00 0.001 0.000 V Minimum value
0-
10000000000.000
U2Max -10000000000.00 0.001 450000.000 V Maximum value
0-
10000000000.000
U2RepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
U2LimHys 0.000 - 100.000 0.001 5.000 % Hysteresis value in %
of range and is
U2AngDbRepInt 1 - 300 1 10 s,%, Cycl: Report interval
Int Db: In %s
U2AngRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
Table 304: Measurements (MMXU)

Frequency (0.95-1.05) × fr ± 2.0 mHz
Voltage (0.1-1.5) × Ur ± 0.5% of Ur at U £ Ur

± 0.5% of U at U > Ur
Connected current (0.2-4.0) × Ir ± 0.5% of Ir at I £ Ir

± 0.5% of I at I > Ir
Active power, P 0.1 x Ur < U < 1.5 x Ur ± 1.0% of Sr at S ≤ Sr

0.2 x Ir < I < 4.0 x Ir ± 1.0% of S at S > Sr
Reactive power, Q 0.1 x Ur < U < 1.5 x Ur ± 1.0% of Sr at S ≤ Sr

Apparent power, S 0.1 x Ur < U < 1.5 x Ur ± 1.0% of Sr at S ≤ Sr

Power factor, cos (φ) 0.1 x Ur < U < 1.5 x Ur ± 0.02

0.2 x Ir < I < 4.0 x Ir
14.2 Event counter (GGIO)
Function block name: ECNx- IEC 60617 graphical symbol:

ANSI number:
CNTGGIO

Section 14
Monitoring
14.2.1 Introduction
The function consists of six counters which are used for storing the number of times
each counter has been activated. It is also provided with a common blocking function
for all six counters, to be used for example at testing. Every counter can separately
be set on or off by a parameter setting.

The function block has six inputs for increasing the counter values for each of the six
counters respectively. The content of the counters are stepped one step for each
positive edge of the input respectively. The maximum count up speed is 10 pulses
per second. The maximum counter value is 10 000. For counts above 10 000 the
counter will stop at 10 000 and no restart will take place.
To not risk that the flash memory is worn out due to too many writings, a mechanism
for limiting the number of writings per time period is included in the product. This
however gives as a result that it can take long time, up to several minutes, before a
new value is stored in the flash memory. And if a new CNTGGIO value is not stored
before auxiliary power interruption, it will be lost. The CNTGGIO stored values in
flash memory will however not be lost at an auxiliary power interruption.
The function block also has an input BLOCK. At activation of this input all six
counters are blocked. The input can for example be used for blocking the counters at
testing.
All inputs are configured via PCM 600.
14.2.2.1 Reporting
The content of the counters can be read in the local HMI. Refer to “Operators
manual” for procedure.
Reset of counters can be performed in the local HMI and a binary input. Refer to
“Operators manual” for procedure.
Reading of content and resetting of the counters can also be performed remotely, for
example PCM 600 or MicroSkada.
14.2.2.2 Design
The function block has six inputs for increasing the counter values for each of the six
counters respectively. The content of the counters are stepped one step for each
positive edge of the input respectively.
The function block also has an input BLOCK. At activation of this input all six
counters are blocked.

Section 14
Monitoring
The function block has an input RESET. At activation of this input all six counters
are set to 0.

CNT1-
CNTGGIO
BLOCK
COUNTER1
COUNTER2
COUNTER3
COUNTER4
COUNTER5
COUNTER6
RESET
en05000345.vsd
Figure 284: CNT function block
14.2.4 Input signals
Table 305: Input signals for the CNTGGIO (CNT1-) function block
Signal Description
COUNTER1 Input for counter1
RESET Reset of function

Table 306: Event counter (GGIO)

Counter value 0-10000 -
Max. count up speed 10 pulses/s -

Section 14
Monitoring
14.3 Event function (EV)
14.3.1 Introduction
When using a Substation Automation system with LON or SPA communication,
time-tagged events can be sent at change or cyclically from the IED to the station
level. These events are created from any available signal in the IED that is connected
to the Event function block. The event function block is used for LON and SPA
communication.
Analog and double indication values are also transferred through the event block.

The main purpose of the event function block is to generate events when the state or
value of any of the connected input signals is in a state, or is undergoing a state
transition, for which event generation is enabled.
Each event function block has 16 inputs INPUT1 - INPUT16. Each input can be given
a name from the CAP configuration tool. The inputs are normally used to create single
events, but are also intended for double indication events.
The function also has an input BLOCK to block the generation of events.
The events that are sent from the IED can originate from both internal logical signals
and binary input channels. The internal signals are time-tagged in the main processing
module, while the binary input channels are time-tagged directly on the input module.
The time-tagging of the events that are originated from internal logical signals have
a resolution corresponding to the execution cyclicity of the event function block. The
time-tagging of the events that are originated from binary input signals have a
resolution of 1 ms.
The outputs from the event function block are formed by the reading of status, events
and alarms by the station level on every single input. The user-defined name for each
input is intended to be used by the station level.
All events according to the event mask are stored in a buffer, which contains up to
1000 events. If new events appear before the oldest event in the buffer is read, the
oldest event is overwritten and an overflow alarm appears.
The events are produced according to the set-event masks. The event masks are treated
commonly for both the LON and SPA communication. The event mask can be set
individually for each input channel. These settings are available:

Section 14
Monitoring
• NoEvents
• OnSet
• OnReset
• OnChange
• AutoDetect
It is possible to define which part of the event function block that shall generate events.
This can be performed individually for the LON and SPA communication
respectively. For each communication type these settings are available:
• Off
• Channel 1-8
• Channel 9-16
• Channel 1-16
For LON communication the events normally are sent to station level at change. It is
possibly also to set a time for cyclic sending of the events individually for each input
channel.
To protect the SA system from signals with a high change rate that can easily saturate
the event system or the communication subsystems behind it, a quota limiter is
implemented. If an input creates events at a rate that completely consume the granted
quota then further events from the channel will be blocked. This block will be
removed when the input calms down and the accumulated quota reach 66% of the
maximum burst quota. The maximum burst quota per input channel equals 3 times
the configurable setting MaxEvPerSec.

Section 14
Monitoring

EV01-
Event
BLOCK
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
NAME1
NAME2
NAME3
NAME4
NAME5
NAME6
NAME7
NAME8
NAME9
NAME10
NAME11
NAME12
NAME13
NAME14
NAME15
NAME16
en05000697.vsd
Table 307: Input signals for the Event (EV01-) function block
Signal Description
INPUT1 Input 1
INPUT2 Input 2
INPUT3 Input 3
INPUT4 Input 4
INPUT5 Input 5
INPUT6 Input 6
INPUT7 Input 7
INPUT8 Input 8
INPUT9 Input 9
INPUT10 Input 10
INPUT11 Input 11
INPUT12 Input 12
INPUT13 Input 13

Section 14
Monitoring
Signal Description
INPUT14 Input 14
INPUT15 Input 15
INPUT16 Input 16
NAME1 User defined string for input 1
Table 308: General settings for the Event (EV01-) function

SPAChannelMask Off - Off - SPA channel mask
Channel 1-8
Channel 9-16
Channel 1-16
LONChannelMask Off - Off - LON channel mask
Channel 1-8
Channel 9-16
Channel 1-16
EventMask1 NoEvents - AutoDetect - Reporting criteria for
OnSet input 1
OnReset
OnChange
AutoDetect
OnSet input 2
OnReset
OnChange
AutoDetect

Section 14
Monitoring

OnSet input 3
OnReset
OnChange
AutoDetect
OnSet input 4
OnReset
OnChange
AutoDetect
OnSet input 5
OnReset
OnChange
AutoDetect
OnSet input 6
OnReset
OnChange
AutoDetect
OnSet input 7
OnReset
OnChange
AutoDetect
OnSet input 8
OnReset
OnChange
AutoDetect
OnSet input 9
OnReset
OnChange
AutoDetect
OnSet input 10
OnReset
OnChange
AutoDetect
OnSet input 11
OnReset
OnChange
AutoDetect
OnSet input 12
OnReset
OnChange
AutoDetect
OnSet input 13
OnReset
OnChange
AutoDetect

Section 14
Monitoring

OnSet input 14
OnReset
OnChange
AutoDetect
OnSet input 15
OnReset
OnChange
AutoDetect
OnSet input 16
OnReset
OnChange
AutoDetect
MinRepIntVal1 0 - 3600 1 2 s Minimum reporting
interval input 1
interval input 2
interval input 3
interval input 4
interval input 5
interval input 6
interval input 7
interval input 8
interval input 9
interval input 10
interval input 11
interval input 12
interval input 13
interval input 14
interval input 15
interval input 16
14.4 Fault locator (RFLO)

Section 14
Monitoring
Function block name: FL--- IEC 60617 graphical symbol:

ANSI number:
LMBRFLO
14.4.1 Introduction
The accurate fault locator is an essential component to minimize the outages after a
persistent fault and/or to pin-point a weak spot on the line.
The built-in fault locator is an impedance measuring function giving the distance to
the fault in percent, km or miles. The main advantage is the high accuracy achieved
by compensating for load current and for the mutual zero sequence effect on double
circuit lines.
The compensation includes setting of the remote and local sources and calculation of
the distribution of fault currents from each side. This distribution of fault current,
together with recorded load (pre-fault) currents, is used to exactly calculate the fault
position. The fault can be recalculated with new source data at the actual fault to
further increase the accuracy.
Specially on heavily loaded long lines (where the fault locator is most important)
where the source voltage angles can be up to 35-40 degrees apart the accuracy can
be still maintained with the advanced compensation included in fault locator.

The Fault Locator (FL) in the IED is an essential complement to other monitoring
functions, since it measures and indicates the distance to the fault with great accuracy.
When calculating distance to fault, pre-fault and fault phasors of currents and voltages
are selected from the Trip Value Recorder data, thus the analog signals used by the
fault locator must be among those connected to the disturbance report function. The
analog configuration (channel selection) is performed using the parameter setting tool
within PCM 600.
The calculation algorithm considers the effect of load currents, double-end infeed and
additional fault resistance.

Section 14
Monitoring
R0L+jX0L
R1L+jX1L
R1A+jX1A R1B+jX1B
Z0m=Z0m+jX0m
R0L+jX0L
R1L+jX1L en05000045.vsd
DRP
FL
Figure 285: Simplified network configuration with network data, required for
settings of the fault location-measuring function.
If source impedance in the near and far end of the protected line have changed in a
significant manner relative to the set values at fault location calculation time (due to
exceptional switching state in the immediate network, power generation out of order
etc.), new values can be entered via the local HMI and a recalculation of the distance
to the fault can be ordered using the algorithm described below. It’s also possible to
change fault loop. In this way, a more accurate location of the fault can be achieved.
The function indicates the distance to the fault as a percentage of the line length, in
kilometers or miles as selected on the local HMI. The fault location is stored as a part
of the disturbance report information (ER, DR, IND, TVR and FL) and managed via
the LHMI or PCM 600.
Additional information is specified in symbols before the distance-to-fault figure:
* A non-compensated model was used for calculation

E Error, the fault was found outside the measuring range
> The fault is located beyond the line, in forward direction
Two signs can be combined, for example, *>
14.4.2.1 Measuring Principle
For transmission lines with voltage sources at both line ends, the effect of double-end
infeed and additional fault resistance must be considered when calculating the
distance to the fault from the currents and voltages at one line end. If this is not done,
the accuracy of the calculated figure will vary with the load flow and the amount of
additional fault resistance.
The calculation algorithm used in the fault locator in compensates for the effect of
double-end infeed, additional fault resistance and load current.

Section 14
Monitoring
14.4.2.2 Accurate algorithm for measurement of distance to fault
Figure 286 shows a single-line diagram of a single transmission line, that is fed from
both ends with source impedances ZA and ZB. Assume, that the fault occurs at a
distance F from terminal A on a line with the length L and impedance ZL. The fault
resistance is defined as RF. A single-line model is used for better clarification of the
algorithm.
A B
ZA IA pZL IB (1-p).ZL ZB
IF
UA RF
xx01000171.vsd
Figure 286: Fault on transmission line fed from both ends.
From figure 286 it is evident that:
U A = I A × p × Z L + IF × R F
(Equation 88)
Where:
IA is the line current after the fault, that is, pre-fault current plus current change due to the fault,
IF is the fault current and
p is a relative distance to the fault
The fault current is expressed in measurable quantities by:
IF A
IF = --------
DA
(Equation 89)
Where:
IFA is the change in current at the point of measurement, terminal A and
DA is a fault current-distribution factor, that is, the ratio between the fault current at line end A and
the total fault current.

Section 14
Monitoring
For a single line, the value is equal to:
( 1 – p ) × Z L + ZB
DA = -----------------------------------------
Z A + Z L + ZB
(Equation 90)
Thus, the general fault location equation for a single line is:
I FA
U A = I A × p × Z L + -------
- × RF
DA
(Equation 91)
Table 309: Expressions for UA, IA and IFA for different types of faults
Fault type: UA IA IFA

L1-N UL1A IL1A + KN x INA
3
--- ´ D ( I L1A – I 0A )
2

3
--- ´ D ( I L2A – I 0A )
2

3
--- ´ D ( I L3A – I0A )
2
L1-L2-L3, L1-L2,L1-L2- UL1A-UL2A IL1A - IL2A
N DIL 1 L 2 A
L2-L3, L2-L3-N UL2A-UL3A IL2A - IL3A

DIL2L3A
L3-L1, L3-L1-N UL3A-UL1A IL3A - IL1A

DIL3L1A
The KN complex quantity for zero-sequence compensation for the single line is equal
to:
Z0L – Z 1L
K N = ------------------------
3 × Z1L
(Equation 98)
DI is the change in current, that is the current after the fault minus the current before
the fault.
In the following, the positive sequence impedance for ZA, ZB and ZL is inserted into
the equations, because this is the value used in the algorithm.
For double lines, the fault equation is:

Section 14
Monitoring
I FA
U A = I A × p × Z 1L + -------- × RF + I 0P × Z 0M
DA
(Equation 99)
Where:
I0P is a zero sequence current of the parallel line,
Z0M is a mutual zero sequence impedance and
DA is the distribution factor of the parallel line, which is:
( 1 – p ) × ( ZA + ZA L + ZB ) + Z B
DA = ----------------------------------------------------------------------------
-
2 × ZA + Z L + 2 × Z B
The KN compensation factor for the double line becomes:
Z0L – Z 1L Z 0M I 0P
K N = ----------------------- - × -------
- + ----------------
3 × Z1L 3 × Z1L I 0A
(Equation 101)
From these equations it can be seen, that, if Z0m = 0, then the general fault location
equation for a single line is obtained. Only the distribution factor differs in these two
cases.
Because the DA distribution factor according to equation 91 or 100 is a function of

p, the general equation 100 can be written in the form:
2
p – p × K1 + K2 – K3 × RF = 0
(Equation 102)
Where:
UA ZB
K 1 = ---------------
- + --------------------------
-+1
I A × ZL Z L + ZA DD
(Equation 103)
UA ZB
K2 = --------------- × æè --------------------------- + 1öø
IA × Z L Z L + Z A DD
(Equation 104)
IF A æ ZA + ZB
- × --------------------------- + 1ö
K 3 = ---------------
I A × Z L è Z 1 + ZA DD ø
(Equation 105)
and:
• ZADD = ZA + ZB for parallel lines.

• IA, IFA and UA are given in the above table.
• KN is calculated automatically according to equation 101.
• ZA, ZB, ZL, Z0L and Z0M are setting parameters.

Section 14
Monitoring
For a single line, Z0M = 0 and ZADD = 0. Thus, equation 102 applies to both single
and parallel lines.
Equation 102 can be divided into real and imaginary parts:

2
p – p × Re ( K 1 ) + Re ( K 2 ) – R F × Re ( K 3 ) = 0
(Equation 106)
– p × Im × ( K1 ) + Im × ( K 2 ) – R F × Im × ( K3 ) = 0
(Equation 107)
If the imaginary part of K3 is not zero, RF can be solved according to equation 107,
and then inserted to equation 106. According to equation 106, the relative distance
to the fault is solved as the root of a quadratic equation.
Equation 106 gives two different values for the relative distance to the fault as a
solution. A simplified load compensated algorithm, that gives an unequivocal figure
for the relative distance to the fault, is used to establish the value that should be
selected.
If the load compensated algorithms according to the above do not give a reliable
solution, a less accurate, non-compensated impedance model is used to calculate the
relative distance to the fault.
14.4.2.3 The non-compensated impedance model
In the non-compensated impedance model, IA line current is used instead of IFA fault
current:
U A = p × Z 1 L × IA + R F × IA
(Equation 108)
Where:
IA is according to table 309.
The accuracy of the distance-to-fault calculation, using the non-compensated impe-

dance model, is influenced by the pre-fault load current. So, this method is only used
if the load compensated models do not function and the display indicates whether the
non-compensated model was used when calculating the distance to the fault.
14.4.2.4 IEC 60870-5-103
The communication protocol IEC 60870-5-103 may be used to poll fault location
information from the IED to a master (i.e. station HSI). There are two outputs that
must be connected to appropriate inputs on the function block I103StatFltDis,
FLTDISTX gives distance to fault (reactance, according the standard) and
CALCMADE gives a pulse (100 ms) when a result is obtainable on FLTDISTX
output.

Section 14
Monitoring

FLO1-
LMBRFLO
PHSELL1 FLTDISTX
PHSELL2 CALCMADE
PHSELL3 BCD_80
CALCDIST BCD_40
BCD_20
BCD_10
BCD_8
BCD_4
BCD_2
BCD_1
en05000679.vsd
Figure 287: FLO function block
Table 310: Input signals for the LMBRFLO (FLO1-) function block
Signal Description
PHSELL1 Phase selecton L1
CALCDIST Do calculate fault distance (release)
Table 311: Output signals for the LMBRFLO (FLO1-) function block
Signal Description
FLTDISTX Reactive distance to fault
CALCMADE Fault calculation made
Table 312: General settings for the LMBRFLO (FLO1-) function

DrepChNoIL1 1 - 30 1 1 Ch Recorder input
number recording
phase current, IL1
number recording
phase current, IL2
number recording
phase current, IL3

Section 14
Monitoring

DrepChNoIN 0 - 30 1 4 Ch Recorder input
number recording
residual current, IN
DrepChNoIP 0 - 30 1 0 Ch Recorder input
number recording 3I0
on parallel line
DrepChNoUL1 1 - 30 1 5 Ch Recorder input
number recording
phase voltage, UL1
number recording
phase voltage, UL2
number recording
phase voltage, UL3
Table 313: Parameter group settings for the LMBRFLO (FLO1-) function
R1A 0.001 - 1500.000 0.001 2.000 ohm/p Source resistance A
(near end)
X1A 0.001 - 1500.000 0.001 12.000 ohm/p Source reactance A
(near end)
R1B 0.001 - 1500.000 0.001 2.000 ohm/p Source resistance B
(far end)
X1B 0.001 - 1500.000 0.001 12.000 ohm/p Source reactance B
(far end)
R1L 0.001 - 1500.000 0.001 2.000 ohm/p Positive sequence
line resistance
X1L 0.001 - 1500.000 0.001 12.500 ohm/p Positive sequence
line reactance
R0L 0.001 - 1500.000 0.001 8.750 ohm/p Zero sequence line
resistance
X0L 0.001 - 1500.000 0.001 50.000 ohm/p Zero sequence line
reactance
R0M 0.000 - 1500.000 0.001 0.000 ohm/p Zero sequence
mutual resistance
X0M 0.000 - 1500.000 0.001 0.000 ohm/p Zero sequence
mutual reactance
LineLength 0.0 - 10000.0 0.1 40.0 km Length of line

Section 14
Monitoring
Table 314: Fault locator (RFLO)

Function Value or range Accuracy
Reactive and resistive reach (0.001-1500.000) Ω/phase ± 2.0% static accuracy
± 2.0% degrees static angular
accuracy
Conditions:
Current range: (0.5-30) x Ir
Phase selection According to input signals -

Maximum number of fault 100 -
locations
14.5 Measured value expander block
Function block name: XP IEC 60617 graphical symbol:

ANSI number:
14.5.1 Introduction
The functions MMXU (SVR, CP and VP), MSQI (CSQ and VSQ) and MVGGIO
(MV) are provided with measurement supervision functionality. All measured values
can be supervised with four settable limits, i.e. low-low limit, low limit, high limit
and high-high limit. The measure value expander block (XP) has been introduced to
be able to translate the integer output signal from the measuring functions to 5 binary
signals i.e. below low-low limit, below low limit, normal, above high-high limit or
above high limit. The output signals can be used as conditions in the configurable
logic.

The input signal must be connected to the RANGE-output of a measuring function
block (MMXU, MSQI or MVGGIO). The function block converts the input integer
value to five binary output signals according to table 315.

Section 14
Monitoring
Table 315: Input integer value converted to binary output signals

Measured supervised below low-low between low‐ between low between high- above high-
value is: limit low and low and high limit high and high high limit
Output: limit limit
LOWLOW High
LOW High
NORMAL High
HIGH High
HIGHHIGH High

XP01-
RANGE_XP
RANGE HIGHHIGH
HIGH
NORMAL
LOW
LOWLOW
en05000346.vsd
Figure 288: XP function block
Table 316: Input signals for the RANGE_XP (XP01-) function block
Signal Description
RANGE Measured value range
Table 317: Output signals for the RANGE_XP (XP01-) function block
Signal Description
HIGHHIGH Measured value is above high-high limit
HIGH Measured value is between high and high-high limit
NORMAL Measured value is between high and low limit
LOW Measured value is between low and low-low limit
LOWLOW Measured value is below low-low limit
14.6 Disturbance report (RDRE)

Section 14
Monitoring
Function block name: DRP--, DRA1- – DRA4-, IEC 60617 graphical symbol:
DRB1- – DRB6-
ANSI number:
ABRDRE
14.6.1 Introduction
Complete and reliable information about disturbances in the primary and/or in the
secondary system together with continuous event-logging is accomplished by the
disturbance report functionality.
The disturbance report, always included in the IED, acquires sampled data of all
selected analogue input and binary signals connected to the function block i.e.
maximum 40 analogue and 96 binary signals.
The disturbance report functionality is a common name for several functions:
• Event List (EL)

• Indications (IND)
• Event recorder (ER)
• Trip Value recorder (TVR)
• Disturbance recorder (DR)
• Fault Locator (FL)
The function is characterized by great flexibility regarding configuration, starting

conditions, recording times and large storage capacity.
A disturbance is defined as an activation of an input in the DRAx or DRBy function

blocks which is set to trigger the disturbance recorder. All signals from start of pre-
fault time to the end of post-fault time, will be included in the recording.
Every disturbance report recording is saved in the IED in the standard Comtrade
format. The same applies to all events, which are continuously saved in a ring-buffer.
The Local Human Machine Interface (LHMI) is used to get information about the
recordings, but the disturbance report files may be uploaded to the PCM 600
(Protection and Control IED Manager) and further analysis using the disturbance
handling tool.

The disturbance report (DRP) is a common name for several facilities to supply the
operator, analysis engineer, etc. with sufficient information about events in the
system.
The facilities included in the disturbance report are:

Section 14
Monitoring
• General disturbance information

• Indications (IND)
• Event recorder (ER)
• Event list (EL)
• Trip values (phase values) (TVR)
• Disturbance recorder (DR)
• Fault locator (FL)
Figure 289Figure "" shows the relations among Disturbance Report, included
functions and function blocks. EL, ER and IND uses information from the binary
input function blocks (DRB1- 6). TVR uses analog information from the analog input
function blocks (DRA1-3) which is used by FL after estimation by TVR. The DR
function acquires information from both DRAx and DRBx.
DRA1-- 4- Disturbance Report
DRP- - FL01
A4RADR RDRE FL
Analog signals
Trip Value Rec Fault Locator
DRB1-- 6- Disturbance
Recorder
Binary signals B6RBDR

Event List
Event Recorder
Indications
en05000124.vsd
Figure 289: Disturbance report functions and related function blocks
The whole disturbance report can contain information for a number of recordings,
each with the data coming from all the parts mentioned above. The event list function
is working continuously, independent of disturbance triggering, recording time etc.
All information in the disturbance report is stored in non-volatile flash memories.
This implies that no information is lost in case of loss of auxiliary power. Each report
will get an identification number in the interval from 1-65536.

Section 14
Monitoring
Disturbance report
Record no. N Record no. N+1 Record no. N+100
General dist. Trip Event Disturbance

Indications Fault locator Event list
information values recordings recording
en05000125.vsd
Figure 290: Disturbance report structure
Up to 100 disturbance reports can be stored. If a new disturbance is to be recorded

when the memory is full, the oldest disturbance report is over-written by the new one.
The total recording capacity for the disturbance recorder is depending of sampling
frequency, number of analog and binary channels and recording time. The figure
291 shows number of recordings vs total recording time tested for a typical
configuration, i.e. in a 50 Hz system it’s possible to record 100 where the average
recording time is 3.4 seconds. The memory limit does not affect the rest of the
disturbance report (IND, ER, EL and TVR).
Number of recordings
100
3,4 s
80 3,4 s 20 analog
96 binary
40 analog
96 binary
60 6,3 s
6,3 s
6,3 s 50 Hz
40
60 Hz
Total recording time
250 300 350 400 s
en05000488.vsd
Figure 291: Number of recordings.
Disturbance information
Date and time of the disturbance, the indications, events, fault location and the trip
values are available on the local human-machine interface (LHMI). To acquire a

Section 14
Monitoring
complete disturbance report the use of a PC and PCM600 is required. The PC may
be connected to the IED-front, rear or remotely via the station bus (Ethernet ports).
Indications (IND)
Indications is a list of signals that were activated during the total recording time of
the disturbance (not time-tagged). (See section "Indications (RDRE)" for more
detailed information.)
Event recorder (ER)

The event recorder may contain a list of up to 150 time-tagged events, which have
occurred during the disturbance. The information is available via the LHMI or PCM
600. (See section "Event recorder (RDRE)" for more detailed information.)
Event list (EL)

The event list may contain a list of totally 1000 time-tagged events. The list
information is continuously updated when selected binary signals change state. The
oldest data is overwritten. The logged signals may be presented via LHMI or PCM
600. (See section "Event list (RDRE)" for more detailed information.)
Trip value recorder (TVR)

The recorded trip values include phasors of selected analog signals before the fault
and during the fault. (See section "Trip value recorder (RDRE)" for more detailed
information.)
Disturbance recorder (DR)

The disturbance recorder records analog and binary signal data before, during and
after the fault. (See section "Disturbance recorder (RDRE)" for more detailed
information.)
Fault locator (FL)

The fault location function calculates the distance to fault. (See section "Fault locator
(RFLO)" for more detailed information)
Time tagging
The IED has a built-in real-time calendar and clock. This function is used for all time
tagging within the disturbance report
Recording times
The disturbance report (DRP) records information about a disturbance during a
settable time frame. The recording times are valid for the whole disturbance report.
The disturbance recorder (DR), the event recorder (ER) and indication function
register disturbance data and events during tRecording, the total recording time.
The total recording time, tRecording, of a recorded disturbance is:
tRecording = PreFaultrecT + tFault + PostFaultrecT or PreFaultrecT + TimeLimit, depending on which

criterion stops the current disturbance recording

Section 14
Monitoring
Trig point
TimeLimit
PreFaultRecT PostFaultRecT
1 2 3
en05000487.vsd
Figure 292: The recording times definition
PreFaultRecT, 1 Pre-fault or pre-trigger recording time. The time before the fault including the operate
time of the trigger. Use the setting PreFaultRecT to set this time.
tFault, 2 Fault time of the recording. The fault time cannot be set. It continues as long as any
valid trigger condition, binary or analog, persists (unless limited by TimeLimit the
limit time).
PostFaultRecT, 3 Post fault recording time. The time the disturbance recording continues after all
activated triggers are reset. Use the setting PostFaultRecT to set this time.
TimeLimit Limit time. The maximum allowed recording time after the disturbance recording was
triggered. The limit time is used to eliminate the consequences of a trigger that does
not reset within a reasonable time interval. It limits the maximum recording time of
a recording and prevents subsequent overwriting of already stored
disturbances.Use the setting TimeLimit to set this time.
Analog signals
Up to 40 analog signals can be selected for recording by the Disturbance recorder and
triggering of the Disturbance report function. Out of these 40, 30 are reserved for
external analog signals, i.e. signals from the analog input modules (TRM) and line
differential communication module (LDCM) via preprocessing function blocks
(SMAI) and summation block (Sum3Ph). The last 10 channels may be connected to
internally calculated analog signals available as function block output signals (mA
input signals, phase differential currents, bias currents etc.).

Section 14
Monitoring
PRxx- DRA1-
SMAI A1RADR DRA2-
GRPNAME AI3P A2RADR DRA3-
External analog AI1NAME AI1 INPUT1 A3RADR
signals
AI2NAME AI2 INPUT2
TRM, LDCM AI3NAME AI3 INPUT3
SUxx
AI4NAME AI4 INPUT4
AIN INPUT5
INPUT6
...
A4RADR
INPUT31
Internal analog signals
T2Dx, T3Dx, INPUT32
REFx, HZDx, INPUT33
L3D, L6D,
LT3D, LT6D INPUT34
INPUT35
SVRx, CPxx, VP0x,
CSQx, VSQx, MVxx INPUT36
...
INPUT40
en05000653.vsd
Figure 293: Analog input function blocks
The external input signals will be acquired, filtered and skewed and (after
configuration) available as an input signal on the DRAx- function block via the PRxx
function block. The information is saved at the Disturbance report base sampling rate
(1000 or 1200 Hz). Internally calculated signals are updated according to the cycle
time of the specific function. If a function is running at lower speed than the base
sampling rate, the Disturbance recorder will use the latest updated sample until a new
updated sample is available.
If the IED is preconfigured the only tool needed for analogue configuration of the
Disturbance report is the Signal Matrix Tool (SMT, external signal configuration).
In case of modification of a preconfigured IED or general internal configuration the
Application Configuration tool within PCM600 is used.
The preprocessor function block (PRxx) calculates the residual quantities in cases
where only the three phases are connected (AI4-input not used). PRxx makes the
information available as a group signal output, phase outputs and calculated residual
output (AIN-output). In situations where AI4-input is used as a input signal the
corresponding information is available on the non-calculated output (AI4) on the
PRxx-block. Connect the signals to the DRAx accordingly.
For each of the analog signals, Operation = On means that it is recorded by the
disturbance recorder. The trigger is independent of the setting of Operation, and
triggers even if operation is set to Off. Both undervoltage and overvoltage can be used
as trigger conditions. The same applies for the current signals.

Section 14
Monitoring
The analog signals are presented only in the disturbance recording, but they affect
the entire disturbance report when being used as triggers.
Binary signals
Up to 96 binary signals can be selected to be handled by the disturbance report.The
signals can be selected from internal logical and binary input signals. A binary signal
is selected to be recorded when:
• the corresponding function block is included in the configuration

• the signal is connected to the input of the function block
Each of the 96 signals can be selected as a trigger of the disturbance report

(operation=ON/OFF). A binary signal can be selected to activate the red LED on the
local HMI (setLED=On/Off).
The selected signals are presented in the event recorder, event list and the disturbance
recording. But they affect the whole disturbance report when they are used as triggers.
The indications are also selected from these 96 signals with the LHMI
IndicationMask=Show/Hide.
Trigger signals
The trigger conditions affect the entire disturbance report, except the event list, which
runs continuously. As soon as at least one trigger condition is fulfilled, a complete
disturbance report is recorded. On the other hand, if no trigger condition is fulfilled,
there is no disturbance report, no indications, and so on. This implies the importance
of choosing the right signals as trigger conditions.
A trigger can be of type:
• Manual trigger
• Binary-signal trigger
• Analog-signal trigger (over/under function)
Manual trigger
A disturbance report can be manually triggered from the local HMI, from PCM600
or via station bus (IEC61850). When the trigger is activated, the manual trigger signal
is generated. This feature is especially useful for testing. Refer to “Operators
manual” for procedure.
Binary-signal trigger
Any binary signal state (logic one or a logic zero) can be selected to generate a trigger
(Triglevel = Trig on 0/Trig on 1).The binary signal must remain in a steady state for
at least 15 ms to be valid. When a binary signal is selected to generate a trigger from
a logic zero, the selected signal will not be listed in the indications list of the
disturbance report.

Section 14
Monitoring
Analog-signal trigger
All analog signals are available for trigger purposes, no matter if they are recorded
in the disturbance recorder or not. The settings are OverTrigOp, UnderTrigOp,
OverTrigLe and UnderTrigLe.
The check of the trigger condition is based on peak-to-peak values. When this is
found, the absolute average value of these two peak values is calculated. If the average
value is above the threshold level for an overvoltage or overcurrent trigger, this trigger
is indicated with a greater than (>) sign with the user-defined name.
If the average value is below the set threshold level for an undervoltage or
undercurrent trigger, this trigger is indicated with a less than (<) sign with its name.
The procedure is separately performed for each channel.
This method of checking the analog start conditions gives a function which is
insensitive to DC offset in the signal. The operate time for this start is typically in the
range of one cycle, 20 ms for a 50 Hz network.
All under/over trig signal information is available on the LHMI and PCM600, see
table 318.
Post Retrigger
The disturbance report function does not respond to any new trig condition, during a
recording. Under certain circumstances the fault condition may reoccur during the
post-fault recording, for instance by automatic reclosing to a still faulty power line.
In order to capture the new disturbance it is possible to allow retriggering (PostRetrig

= On)during the post-fault time. In this case a new, complete recording will start and,
during a period, run in parallel with the initial recording.
When the retrig parameter is disabled (PostRetrig = Off), a new recording will not
start until the post-fault (PostFaultrecT or TimeLimit) period is terminated. If a new
trig occurs during the post-fault period and lasts longer than the proceeding recording
a new complete recording will be fetched.
The disturbance report function can handle maximum 3 simultaneous disturbance

recordings.
DRP--
RDRE
DRPOFF
RECSTART
RECMADE
CLEARED
MEMUSED
en05000406.vsd
Figure 294: DRP function block

Section 14
Monitoring
DRA1-
A1RADR
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
NAME1
NAME2
NAME3
NAME4
NAME5
NAME6
NAME7
NAME8
NAME9
NAME10
en05000430.vsd
Figure 295: DRA1 function block, analog inputs, example for DRA1–DRA3
DRA4-
A4RADR
INPUT31
INPUT32
INPUT33
INPUT34
INPUT35
INPUT36
INPUT37
INPUT38
INPUT39
INPUT40
NAME31
NAME32
NAME33
NAME34
NAME35
NAME36
NAME37
NAME38
NAME39
NAME40
en05000431.vsd
Figure 296: DRA4 function block, derived analog inputs

Section 14
Monitoring
DRB1-
B1RBDR
INPUT 1
INPUT 2
INPUT 3
INPUT 4
INPUT 5
INPUT 6
INPUT 7
INPUT 8
INPUT 9
INPUT 10
INPUT 11
INPUT 12
INPUT 13
INPUT 14
INPUT 15
INPUT 16
NAME1
NAME2
NAME3
NAME4
NAME5
NAME6
NAME7
NAME8
NAME9
NAME10
NAME11
NAME12
NAME13
NAME14
NAME15
NAME16
en05000432.vsd
Figure 297: DRB1 function block, binary inputs, example for DRB1–DRB6
Table 318: Output signals for the RDRE (DRP--) function block
Signal Description
DRPOFF Disturbance report function turned off
RECSTART Disturbance recording started
RECMADE Disturbance recording made
CLEARED All disturbances in the disturbance report cleared
MEMUSED More than 80% of memory used
Table 319: Input signals for the A1RADR (DRA1-) function block, example for DRA1–DRA3
Signal Description
INPUT1 Group signal for input 1

Section 14
Monitoring
Signal Description
NAME1 User define string for analogue input 1
Table 320: Input signals for the A4RADR (DRA4-) function block
Signal Description
INPUT31 Analogue channel 31

Section 14
Monitoring
Table 321: Input signals for the B1RBDR (DRB1-) function block, example for DRB1–DRB6
Signal Description
INPUT1 Binary channel 1
NAME1 User define string for binary input 1

Section 14
Monitoring
Table 322: General settings for the RDRE (DRP--) function

OpModeTest Off - Off - Operation mode
On during test mode
On
PreFaultRecT 0.05 - 0.30 0.01 0.10 s Pre-fault
recording time
PostFaultRecT 0.1 - 5.0 0.1 0.5 s Post-fault
recording time
TimeLimit 0.5 - 6.0 0.1 1.0 s Fault recording
time limit
PostRetrig Off - Off - Post-fault retrig
On enabled (On) or
not (Off)
ZeroAngleRef 1 - 30 1 1 Ch Trip value
recorder, phasor
reference
channel
Table 323: General settings for the A1RADR (DRA1-) function

Operation01 Off - Off - Operation On/Off
On
NomValue01 0.0 - 999999.9 0.1 0.0 - Nominal value for
analogue
channel 1
UnderTrigOp01 Off - Off - Use under level
On trig for analogue
cha 1 (on) or not
(off)
UnderTrigLe01 0 - 200 1 50 % Under trigger
level for
analogue cha 1
in % of signal
OverTrigOp01 Off - Off - Use over level
cha 1 (on) or not
(off)
OverTrigLe01 0 - 5000 1 200 % Over trigger level
for analogue cha
1 in % of signal
On
analogue
channel 2
cha 2 (on) or not
(off)

Section 14
Monitoring

level for
analogue cha 2
in % of signal
cha 2 (on) or not
(off)
for analogue cha
2 in % of signal
On
analogue
channel 3
cha 3 (on) or not
(off)
level for
analogue cha 3
in % of signal
cha 3 (on) or not
(off)
OverTrigLe03 0 - 5000 1 200 % Overtrigger level
for analogue cha
3 in % of signal
On
analogue
channel 4
cha 4 (on) or not
(off)
level for
analogue cha 4
in % of signal
cha 4 (on) or not
(off)
for analogue cha
4 in % of signal
On

Section 14
Monitoring

analogue
channel 5
cha 5 (on) or not
(off)
level for
analogue cha 5
in % of signal
cha 5 (on) or not
(off)
for analogue cha
5 in % of signal
On
analogue
channel 6
cha 6 (on) or not
(off)
level for
analogue cha 6
in % of signal
cha 6 (on) or not
(off)
for analogue cha
6 in % of signal
On
analogue
channel 7
cha 7 (on) or not
(off)
level for
analogue cha 7
in % of signal
cha 7 (on) or not
(off)

Section 14
Monitoring

for analogue cha
7 in % of signal
On
analogue
channel 8
cha 8 (on) or not
(off)
level for
analogue cha 8
in % of signal
cha 8 (on) or not
(off)
for analogue cha
8 in % of signal
On
analogue
channel 9
cha 9 (on) or not
(off)
level for
analogue cha 9
in % of signal
cha 9 (on) or not
(off)
for analogue cha
9 in % of signal
On
analogue
channel 10
cha 10 (on) or not
(off)

Section 14
Monitoring

level for
analogue cha 10
in % of signal
cha 10 (on) or not
(off)
for analogue cha
10 in % of signal
Table 324: General settings for the A4RADR (DRA4-) function

Operation31 Off - Off - Operation On/off
On
analogue
channel 31
cha 31 (on) or not
(off)
level for
analogue cha 31
in % of signal
cha 31 (on) or not
(off)
for analogue cha
31 in % of signal
On
analogue
channel 32
cha 32 (on) or not
(off)
level for
analogue cha 32
in % of signal
cha 32 (on) or not
(off)

Section 14
Monitoring

for analogue cha
32 in % of signal
On
analogue
channel 33
cha 33 (on) or not
(off)
level for
analogue cha 33
in % of signal
cha 33 (on) or not
(off)
OverTrigLe33 0 - 5000 1 200 % Overtrigger level
for analogue cha
33 in % of signal
On
analogue
channel 34
cha 34 (on) or not
(off)
level for
analogue cha 34
in % of signal
cha 34 (on) or not
(off)
for analogue cha
34 in % of signal
On
analogue
channel 35
cha 35 (on) or not
(off)

Section 14
Monitoring

level for
analogue cha 35
in % of signal
cha 35 (on) or not
(off)
for analogue cha
35 in % of signal
On
analogue
channel 36
cha 36 (on) or not
(off)
level for
analogue cha 36
in % of signal
cha 36 (on) or not
(off)
for analogue cha
36 in % of signal
On
analogue
channel 37
cha 37 (on) or not
(off)
level for
analogue cha 37
in % of signal
cha 37 (on) or not
(off)
for analogue cha
37 in % of signal
On

Section 14
Monitoring

analogue
channel 38
cha 38 (on) or not
(off)
level for
analogue cha 38
in % of signal
cha 38 (on) or not
(off)
for analogue cha
38 in % of signal
On
analogue
channel 39
cha 39 (on) or not
(off)
level for
analogue cha 39
in % of signal
cha 39 (on) or not
(off)
for analogue cha
39 in % of signal
On
analogue
channel 40
cha 40 (on) or not
(off)

Section 14
Monitoring

level for
analogue cha 40
in % of signal
cha 40 (on) or not
(off)
for analogue cha
40 in % of signal
Setting parameters FUNCn and INFONOn (n=1-16) for the B1RBDR

(DRB1-) function are only available in the LHMI.
Table 325: General settings for the B1RBDR (DRB1-) function

Operation01 Off - Off - Trigger operation
On On/Off
TrigLevel01 Trig on 0 - Trig on 1 - Trig on positiv (1)
Trig on 1 or negative (0)
slope for binary
inp 1
IndicationMa01 Hide - Hide - Indication mask
Show for binary
channel 1
SetLED01 Off - Off - Set red-LED on
On HMI for binary
channel 1
On On/Off
slope for binary
inp 2
Show for binary
channel 2
On HMI for binary
channel 2
On On/Off
slope for binary
inp 3

Section 14
Monitoring

Show for binary
channel 3
On HMI for binary
channel 3
On On/Off
slope for binary
inp 4
Show for binary
channel 4
On HMI for binary
channel 4
On On/Off
slope for binary
inp 5
Show for binary
channel 5
On HMI for binary
channel 5
On On/Off
slope for binary
inp 6
Show for binary
channel 6
On HMI for binary
channel 6
On On/Off
slope for binary
inp 7
Show for binary
channel 7

Section 14
Monitoring

On HMI for binary
channel 7
On On/Off
slope for binary
inp 8
Show for binary
channel 8
On HMI for binary
channel 8
On On/Off
slope for binary
inp 9
Show for binary
channel 9
On HMI for binary
channel 9
On On/Off
slope for binary
inp 10
Show for binary
channel 10
On HMI for binary
channel 10
On On/Off
slope for binary
inp 11
Show for binary
channel 11
On HMI for binary
channel 11
On On/Off

Section 14
Monitoring

slope for binary
inp 12
Show for binary
channel 12
On HMI for binary
input 12
On On/Off
slope for binary
inp 13
Show for binary
channel 13
On HMI for binary
channel 13
On On/Off
slope for binary
inp 14
Show for binary
channel 14
On HMI for binary
channel 14
On On/Off
slope for binary
inp 15
Show for binary
channel 15
On HMI for binary
channel 15
On On/Off
slope for binary
inp 16

Section 14
Monitoring

Show for binary
channel 16
On HMI for binary
channel 16
FUNCT1 0 - 255 1 0 FunT Function type for
binary channel 1
(IEC
-60870-5-103)
binary channel 2
(IEC
-60870-5-103)
binary channel 3
(IEC
-60870-5-103)
binary channel 4
(IEC
-60870-5-103)
binary channel 5
(IEC
-60870-5-103)
binary channel 6
(IEC
-60870-5-103)
binary channel 7
(IEC
-60870-5-103)
binary channel 8
(IEC
-60870-5-103)
binary channel 9
(IEC
-60870-5-103)
binary channel
10 (IEC
-60870-5-103)
binary channel
11 (IEC
-60870-5-103)
binary channel
12 (IEC
-60870-5-103)

Section 14
Monitoring

binary channel
13 (IEC
-60870-5-103)
binary channel
14 (IEC
-60870-5-103)
binary channel
15 (IEC
-60870-5-103)
binary channel
16 (IEC
-60870-5-103)
INFONO1 0 - 255 1 0 InfNo Information
number for
binary channel 1
(IEC
-60870-5-103)
number for
binary channel 2
(IEC
-60870-5-103)
number for
binary channel 3
(IEC
-60870-5-103)
number for
binary channel 4
(IEC
-60870-5-103)
number for
binary channel 5
(IEC
-60870-5-103)
number for
binary channel 6
(IEC
-60870-5-103)
number for
binary channel 7
(IEC
-60870-5-103)
number for
binary channel 8
(IEC
-60870-5-103)

Section 14
Monitoring

number for
binary channel 9
(IEC
-60870-5-103)
number for
binary channel
10 (IEC
-60870-5-103)
number for
binary channel
11 (IEC
-60870-5-103)
number for
binary channel
12 (IEC
-60870-5-103)
number for
binary channel
13 (IEC
-60870-5-103)
number for
binary channel
14 (IEC
-60870-5-103)
number for
binary channel
15 (IEC
-60870-5-103)
number for
binary channel
16 (IEC
-60870-5-103)
Table 326: Disturbance report (RDRE)

Pre-fault time (0.05–0.30) s -
Post-fault time (0.1–5.0) s -
Limit time (0.5–6.0) s -
Maximum number of recordings 100 -
Time tagging resolution 1 ms See table26

Section 14
Monitoring

Maximum number of analog 30 + 10 (external + internally -
inputs derived)
Maximum number of binary inputs 96 -
Maximum number of phasors in 30 -
the Trip Value recorder per
recording
Maximum number of indications in 96 -
a disturbance report
Maximum number of events in the 150 -
Event recording per recording
Maximum number of events in the 1000, first in - first out -
Event list
Maximum total recording time (3.4 340 seconds (100 recordings) at -
s recording time and maximum 50 Hz, 280 seconds (80
number of channels, typical value) recordings) at 60 Hz
Sampling rate 1 kHz at 50 Hz -
1.2 kHz at 60 Hz
Recording bandwidth (5-300) Hz -
14.7 Event list (RDRE)
14.7.1 Introduction
Continuous event-logging is useful for monitoring of the system from an overview
perspective and is a complement to specific disturbance recorder functions.
The event list logs all binary input signals connected to the Disturbance report
function. The list may contain of up to 1000 time-tagged events stored in a ring-buffer.
The event list information is available in the IED and is reported to higher control
systems via the station bus together with other logged events in the IED. In absence
of any software tool the information seeker may use the local HMI to view the event
list.

When a binary signal, connected to the disturbance report function, changes status,
the event list function stores input name, status and time in the event list in
chronological order. The list can contain up to 1000 events from both internal logic
signals and binary input channels. If the list is full, the oldest event is overwritten
when a new event arrives.
The list can be configured to show oldest or newest events first with a setting on the
LHMI.

Section 14
Monitoring
The event list function runs continuously, in contrast to the event recorder function,
which is only active during a disturbance.
The name of the binary input signal that appears in the event recording is the user-
defined name assigned when the IED is configured. The same name is used in the
disturbance recorder function (DR), indications (IND) and the event recorder function
(ER).
The event list is stored and managed separate from the disturbance report information
(ER, DR, IND, TVR and FL).

The object has no function block of it’s own. It is included in the DRP- block and
uses information from the DRBx- block.

The event list logs the same binary input signals as configured for the Disturbance
Report function.
Table 327: Event list (RDRE)

Function Value
Buffer capacity Maximum number of events in the list 1000
Resolution 1 ms
Accuracy Depending on time
synchronizing
14.8 Indications (RDRE)
14.8.1 Introduction
To get fast, condensed and reliable information about disturbances in the primary
and/or in the secondary system it is important to know e.g. binary signals that have
changed status during a disturbance. This information is used in the short perspective
to get information via the LHMI in a straightforward way.
There are three LEDs on the LHMI (green, yellow and red), which will display status
information about the IED and the Disturbance Report function (trigged).
The Indication list function shows all selected binary input signals connected to the
Disturbance Report function that have changed status during a disturbance.

Section 14
Monitoring
The indication information is available for each of the recorded disturbances in the
IED and the user may use the Local Human Machine Interface (LHMI) to get the
information.

The LED indications display this information:
Green LED:
Steady light In Service

Flashing light Internal fail
Dark No power supply
Yellow LED:
Steady light A disturbance report is triggered

Flashing light The IED is in test mode or in configuration mode
Red LED:
Steady light Trigged on binary signal N with SetLEDN=On
Indication list:
The possible indicated signals are the same as the ones chosen for the disturbance
report function and disturbance recorder
The indication function tracks 0 to 1 changes of binary signals during the recording
period of the collection window. This means that constant logic zero, constant logic
one or state changes from logic one to logic zero will not be visible in the list of
indications. Signals are not time tagged. In order to be recorded in the list of
indications the:
• the signal must be connected to binary input (DRB1-6) function block

• the DRP parameter Operation must be set On
• the DRP must be trigged (binary or analogue)
• the input signal must change state from logical 0 to 1 during the recording time.
Indications are selected with the indication mask (IndicationMask) when configuring
the binary inputs.
The name of the binary input signal that appears in the Indication function is the user-
defined name assigned at configuration of the IED. The same name is used in

Section 14
Monitoring
disturbance recorder function (DR), indications (IND) and event recorder function
(ER).


The indication function may log the same binary input signals as the Disturbance
Report function.
Table 328: Indications

Function Value
Buffer capacity Maximum number of indications 96
presented for single disturbance
Maximum number of recorded 100
disturbances
14.9 Event recorder (RDRE)
14.9.1 Introduction
Quick, complete and reliable information about disturbances in the primary and/or in
the secondary system is vital e.g. time tagged events logged during disturbances. This
information is used for different purposes in the short term (e.g. corrective actions)
and in the long term (e.g. Functional Analysis).
The event recorder logs all selected binary input signals connected to the Disturbance
Report function. Each recording can contain up to 150 time-tagged events.
The event recorder information is available for the disturbances locally in the IED.
The information may be uploaded to the PCM 600 (Protection and Control IED
Manager) and further analysed using the Disturbance Handling tool.
The event recording information is an integrated part of the disturbance record

(Comtrade file).

Section 14
Monitoring

When one of the trig conditions for the disturbance report is activated, the event
recorder logs every status change in the 96 selected binary signals. The events can be
generated by both internal logical signals and binary input channels. The internal
signals are time-tagged in the main processor module, while the binary input channels
are time-tagged directly in each I/O module. The events are collected during the total
recording time (pre-, post-fault and limit time), and are stored in the disturbance report
flash memory at the end of each recording.
In case of overlapping recordings, due to PostRetrig = On and a new trig signal

appears during post-fault time, events will be saved in both recording files.
The name of the binary input signal that appears in the event recording is the user-
defined name assigned when configuring the IED. The same name is used in the
disturbance recorder function (DR), indications (IND) and event recorder function
(ER).
The event record is stored as a part of the disturbance report information (ER, DR,
IND, TVR and FL) and managed via the LHMI or PCM 600.


The event recorder function logs the same binary input signals as the Disturbance
Report function.
Table 329: Event recorder (RDRE)

Function Value
Buffer capacity Maximum number of events in disturbance report 150
Maximum number of disturbance reports 100
Resolution 1 ms
Accuracy Depending on
time
synchronizing

Section 14
Monitoring
14.10 Trip value recorder (RDRE)
14.10.1 Introduction
Information about the pre-fault and fault values for currents and voltages are vital for
the disturbance evaluation.
The Trip value recorder calculates the values of all selected analogue input signals
connected to the Disturbance report function. The result is magnitude and phase angle
before and during the fault for each analogue input signal.
The trip value recorder information is available for the disturbances locally in the
IED.
The information may be uploaded to the PCM 600 (Protection and Control IED
Manager) and further analysed using the Disturbance Handling tool.
The trip value recorder information is an integrated part of the disturbance record
(Comtrade file).

The trip value recorder (TVR) calculates and presents both fault and pre-fault
amplitudes as well as the phase angles of all the selected analog input signals. The
parameter ZeroAngleRef points out which input signal is used as the angle reference.
The calculated data is input information to the fault locator (FL).
When the disturbance report function is triggered the sample for the fault interception
is searched for, by checking the non-periodic changes in the analog input signals. The
channel search order is consecutive, starting with the analog input with the lowest
number.
When a starting point is found, the Fourier estimation of the pre-fault values of the
complex values of the analog signals starts 1.5 cycle before the fault sample. The
estimation uses samples during one period. The post-fault values are calculated using
the Recursive Least Squares (RLS) method. The calculation starts a few samples after
the fault sample and uses samples during 1/2 - 2 cycles depending on the shape of the
signals.
If no starting point is found in the recording, the disturbance report trig sample is used
as the start sample for the Fourier estimation. The estimation uses samples during one
cycle before the trig sample. In this case the calculated values are used both as pre-
fault and fault values.
The name of the analog input signal that appears in the Trip value recorder function
is the user-defined name assigned when the IED is configured. The same name is
used in the Disturbance recorder function (DR).

Section 14
Monitoring
The trip value record is stored as a part of the disturbance report information (ER,
DR, IND, TVR and FLOC) and managed in via the LHMI or PCM 600.


The trip value recorder function uses analog input signals connected to DRA1-3 (not
DRA4).
Table 330: Trip value recorder (RDRE)

Function Value
Buffer capacity Maximum number of analog inputs 30
14.11 Disturbance recorder (RDRE)
14.11.1 Introduction
The Disturbance Recorder function supplies fast, complete and reliable information
about disturbances in the power system. It facilitates understanding system behavior
and related primary and secondary equipment during and after a disturbance.
Recorded information is used for different purposes in the short perspective (e.g.
corrective actions) and long perspective (e.g. Functional Analysis).
The Disturbance Recorder acquires sampled data from all selected analogue input
and binary signals connected to the Disturbance Report function (maximum 40 analog
and 96 binary signals). The binary signals are the same signals as available under the
event recorder function.
The function is characterized by great flexibility and is not dependent on the operation
of protection functions. It can record disturbances not detected by protection
functions.
The disturbance recorder information for the last 100 disturbances are saved in the
IED and the Local Human Machine Interface (LHMI) is used to view the list of
recordings.

Section 14
Monitoring
The disturbance recording information can be uploaded to the PCM 600 (Protection
and Control IED Manager) and further analysed using the Disturbance Handling tool.

Disturbance recording (DR) is based on the acquisition of binary and analog signals.
The binary signals can be either true binary input signals or internal logical signals
generated by the functions in the IED. The analog signals to be recorded are input
channels from the Transformer Input Module (TRM), Line Differential
communication Module (LDCM) through the Signal Matrix Analog Input (SMAI)
and possible summation (Sum3Ph) function blocks and some internally derived
analog signals. For details, refer to section "Disturbance report (RDRE)".
DR collects analog values and binary signals continuously, in a cyclic buffer. The
pre-fault buffer operates according to the FIFO principle; old data will continuously
be overwritten as new data arrives when the buffer is full. The size of this buffer is
determined by the set pre-fault recording time.
Upon detection of a fault condition (triggering), the disturbance is time tagged and
the data storage continues in a post-fault buffer. The storage process continues as long
as the fault condition prevails - plus a certain additional time. This is called the post-
fault time and it can be set in the disturbance report.
The above mentioned two parts form a disturbance recording. The whole memory,
intended for disturbance recordings, acts as a cyclic buffer and when it is full, the
oldest recording is overwritten. The last 100 recordings are stored in the IED.
The time tagging refers to the activation of the trigger that starts the disturbance
recording. A recording can be trigged by, manual start, binary input and/or from
analog inputs (over-/underlevel trig).
A user-defined name for each of the signals can be set. These names are common for
all functions within the disturbance report functionality.
14.11.2.1 Memory and storage
When a recording is completed, a post recording processing occurs.
This post-recording processing comprises:
• Saving the data for analog channels with corresponding data for binary signals
• Add relevant data to be used by the Disturbance Handling tool (part of PCM 600)
• Compression of the data, which is performed without losing any data accuracy
• Storing the compressed data in a non-volatile memory (flash memory)
The recorded disturbance is now ready for retrieval and evaluation.
The recording files comply with the Comtrade standard IEC 60255-24 and are divided
into three files; a header file (HDR), a configuration file (CFG) and a data file (DAT).

Section 14
Monitoring
The header file (optional in the standard) contains basic information about the
disturbance i.e. information from the Disturbance Report functions (ER, TVR and
FL). The Disturbance Handling tool use this information and present the recording
in a user-friendly way.
General:
• Station name, object name and unit name

• Date and time for the trig of the disturbance
• Record number
• Sampling rate
• Time synchronization source
• Recording times
• Activated trig signal
• Active setting group
Analog:
• Signal names for selected analog channels

• Information e.g. trig on analog inputs
• Primary and secondary instrument transformer rating
• Over- or Undertrig: level and operation
• Over- or Undertrig status at time of trig
• CT direction
Binary:
• Signal names
• Status of binary input signals
The configuration file is a mandatory file containing information needed to interpret

the data file. For example sampling rate, number of channels, system frequency,
channel info etc.
The data file, which also is mandatory, containing values for each input channel for
each sample in the record (scaled value). The data file also contains a sequence
number and time stamp for each set of samples.
14.11.2.2 IEC 60870-5-103
The communication protocol IEC 60870-5-103 may be used to poll disturbance

recordings from the IED to a master (i.e. station HSI). The standard describes how
to handle 8 disturbance recordings, 8 analog channels (4 currents and 4 voltages)
using the public range and binary signals.
The last 8 recordings, out of maximum 100, are available for transfer to the master.
When the last one is transferred and acknowledged new recordings in the IED will
appear, in the master points of view (even if they already where stored in the IED).

Section 14
Monitoring
To be able to report 40 analog channels from the IED using IEC 60870-5-103 the first
8 channels are placed in the public range and the next 32 are placed in the private
range. To comply the standard the first 8 must be configured according to
table 331.
Table 331: Configuration of analog channels

Signal Disturbance recorder
IL1 DRA1 INPUT1
IL2 DRA1 INPUT2
IL3 DRA1 INPUT3
IN DRA1 INPUT4
UL1 DRA1 INPUT5
UL2 DRA1 INPUT6
UL3 DRA1 INPUT7
UN DRA1 INPUT8
The binary signals connected to DRB1-DRB6 are reported by polling. The function
blocks include function type and information number.

The object has no function block of it’s own. It is included in the DRP-, DRAx and
DRBx- block.

For signals see section, in Disturbance report, "Input and output signals".

For Setting parameters see table 322 - table 325.
Table 332: Disturbance recorder (RDRE)

Function Value
Buffer capacity Maximum number of analog inputs 40
Maximum number of binary inputs 96
Maximum total recording time (3.4 s recording time and maximum number of 340 seconds (100
channels, typical value) recordings) at 50
Hz 280 seconds
(80 recordings) at
60 Hz

596
Section 15
Metering
Section 15 Metering
About this chapter

This chapter describes among others, Pulse counter logic which is a function used to
meter externally generated binary pulses. The way the functions work, their setting
parameters, function blocks, input and output signals, and technical data are included
for each function.
15.1 Pulse counter logic (GGIO)
Function block name: PCxx- IEC 60617 graphical symbol:

ANSI number:
PCGGIO
15.1.1 Introduction
The pulse counter logic function counts externally generated binary pulses, for
instance pulses coming from an external energy meter, for calculation of energy
consumption values. The pulses are captured by the binary input module and then
read by the pulse counter function. A scaled service value is available over the station
bus. The special Binary input module with enhanced pulse counting capabilities must
be ordered to achieve this functionality.

The registration of pulses is done for positive transitions (0->1) on one of the 16 binary
input channels located on the Binary Input Module (BIM). Pulse counter values are
sent to the station HMI with predefined cyclicity without reset.
The integration time period can be set in the range from 30 seconds to 60 minutes
and is synchronized with absolute system time. Interrogation of additional pulse
counter values can be done with a command (intermediate reading) for a single
counter. All active counters can also be read by the LON General Interrogation
command (GI).

Section 15
Metering
The pulse counter in REx670 supports unidirectional incremental counters. That

means only positive values are possible. The counter uses a 32 bit format, that is, the
reported value is a 32-bit, signed integer with a range 0...+2147483647. The counter
is reset at initialization of the IED.
The reported value to station HMI over the LON bus contains Identity, Value, Time,
and Pulse Counter Quality. The Pulse Counter Quality consists of:
• Invalid (board hardware error or configuration error)

• Wrapped around
• Blocked
• Adjusted
The transmission of the counter value by SPA can be done as a service value, that is,
the value frozen in the last integration cycle is read by the station HMI from the
database. The pulse counter function updates the value in the database when an
integration cycle is finished and activates the NEW_VAL signal in the function block.
This signal can be connected to an Event function block, be time tagged, and
transmitted to the station HMI. This time corresponds to the time when the value was
frozen by the function.
The pulse counter function requires an binary input card, BIMp, that
is specially adapted to the pulse counter function.
Figure 298 shows the pulse counter function block with connections of the inputs and
outputs.
SingleCmdFunc PulseCounter EVENT

OUTx BLOCK
INVALID INPUT1
SingleCmdFunc Pulse RESTART INPUT2
OUTx INPUT OUT READ_VAL
Pulse length >1s BLOCKED INPUT3
I/O-module NEW_VAL INPUT4
BI_PULSE
”Reset counter” RS_CNT
NAME
SCAL_VAL IEC EVENT
SMS settings Database

1.Operation = Off/On Pulse counter value:
2.tReporting = 0s...60min 0...2147483647
3.Event Mask = No Events/Report Events
4.Scale = 1-90000
en05000744.vsd
Figure 298: Overview of the pulse counter function
The BLOCK and READ_VAL inputs can be connected to Single Command blocks,
which are intended to be controlled either from the station HMI or/and the local HMI.
As long as the BLOCK signal is set, the pulse counter is blocked. The signal connected

Section 15
Metering
to READ_VAL performs one additional reading per positive flank. The signal must
be a pulse with a length >1 second.
The BI_PULSE input is connected to the used input of the function block for the
Binary Input Module (BIM).
The NAME input is used for a user-defined name with up to 13 characters.
The RS_CNT input is used for resetting the counter.
Each pulse counter function block has four binary output signals that can be connected
to an Event function block for event recording: INVALID, RESTART, BLOCKED
and NEW_VAL. The SCAL_VAL signal can be connected to the IEC Event function
block.
The INVALID signal is a steady signal and is set if the Binary Input Module, where
the pulse counter input is located, fails or has wrong configuration.
The RESTART signal is a steady signal and is set when the reported value does not
comprise a complete integration cycle. That is, in the first message after IED start-
up, in the first message after deblocking, and after the counter has wrapped around
during last integration cycle.
The BLOCKED signal is a steady signal and is set when the counter is blocked. There
are two reasons why the counter is blocked:
• The BLOCK input is set, or

• The Binary Input Module, where the counter input is situated, is inoperative.
The NEW_VAL signal is a pulse signal. The signal is set if the counter value was
updated since last report.
The SCAL_VAL signal consists of value, time and status information.

PC01-
PCGGIO
BLOCK INVALID
READ_VAL RESTART
BI_PULSE BLOCKED
RS_CNT NEW_VAL
NAME
SCAL_VAL
en05000709.vsd
Figure 299: PC function block

Section 15
Metering
Table 333: Input signals for the PCGGIO (PC01-) function block
Signal Description
BLOCK Block pulse counter function
READ_VAL Initiates an additional pulse counter reading
BI_PULSE Connect binary input channel for metering
RS_CNT Resets pulse counter value
Table 334: Output signals for the PCGGIO (PC01-) function block
Signal Description
INVALID The pulse counter value is invalid
RESTART The reported value not comprise a complete integration
cycle
BLOCKED The pulse counter function is blocked
NEW_VAL A new pulse counter value is generated
NAME User defined string for pulse counter
SCAL_VAL Scaled value with time and status information
Table 335: General settings for the PCGGIO (PC01-) function

On
EventMask NoEvents - NoEvents - Report mask for
ReportEvents analog events
from pulse
counter
CountCriteria Off - RisingEdge - Pulse counter
RisingEdge criteria
Falling edge
OnChange
Scale 1.000 - 90000.000 0.001 1.000 - Scaling value for
SCAL_VAL
output to unit per
counted value
Quantity Count - Count - Measured
ActivePower quantity for
ApparentPower SCAL_VAL
ReactivePower output
ActiveEnergy
ApparentEnergy
ReactiveEnergy
tReporting 0 - 3600 1 60 s Cycle time for
reporting of
counter value

Section 15
Metering
Table 336: Pulse counter logic (GGIO)

Input frequency See Binary Input Module (BIM) -
Cycle time for report of counter (0–3600) s -
value

602
Section 16
Station communication
Section 16 Station communication
About this chapter

This chapter describes the functions and protocols used on the interfaces to the
substation automation and substation monitoring buses. The way these work, their
setting parameters, function blocks, input and output signals and technical data are
included for each function.
16.1 Overview
Each IED is provided with a communication interface, enabling it to connect to one

or many substation level systems or equipment, either on the Substation Automation
(SA) bus or Substation Monitoring (SM) bus.
Following communication protocols are available:
• IEC 61850-8-1 communication protocol

• LON communication protocol
• SPA or IEC 60870-5-103 communication protocol
Theoretically, several protocols can be combined in the same IED.
16.2 IEC 61850-8-1 communication protocol
16.2.1 Introduction
Single or double optical Ethernet ports for the new substation communication
standard IEC61850-8-1 for the station bus are provided. IEC61850-8-1 allows
intelligent devices (IEDs) from different vendors to exchange information and
simplifies SA engineering. Peer- to peer communication according to GOOSE is part
of the standard. Disturbance files uploading is provided.
When double Ethernet ports are activated, make sure that the two ports
are connected to different subnets. For example: Port 1 has IP-address
138.227.102.10 with subnet mask 255.255.255.0 and port 2 has IP-
address 138.227.103.10 with subnet mask 255.255.255.0

Section 16
16.2.2 Generic single point function block (SPGGIO)
The SPGGIO function block is used to send one single logical signal to other systems
or equipment in the substation.
Upon receiving a signal at its input, the SPGGIO function block will send the signal
over IEC 61850-8-1 (via its non-transparent-to-CAP user output) to the equipment
or system that requests this signal. To be able to get the signal, one must use other
tools, described in the Application Manual, Chapter 2: “Engineering of the IED” and
define which function block in which equipment or system should receive this
information.

SP01-
SPGGIO
IN
en05000409.vsd
Figure 300: SP function block
MP01-
SP16GGIO
BLOCK
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
IN10
IN11
IN12
IN13
IN14
IN15
IN16
en06000632.vsd
Figure 301: MP function block
Table 337: Input signals for the SPGGIO (SP01-) function block
Signal Description
IN Input status

Section 16
Table 338: Input signals for the SP16GGIO (MP01-) function block
Signal Description
IN1 Input 1 status
IN2 Input 2 status
IN3 Input 3 status
IN4 Input 4 status
IN5 Input 5 status
IN6 Input 6 status
IN7 Input 7 status
IN8 Input 8 status
IN9 Input 9 status
IN10 Input 10 status
16.2.3 Generic measured values function block (MVGGIO)
The MVGGIO function block is used to send the instantaneous value of an analog
output to other systems or equipment in the substation. It can also be used inside the
same IED, to attach a “RANGE” aspect to an analog value and to permit measurement
supervision on that value.
Upon receiving an analog signal at its input, the MVGGIO block will give the
instantaneous value of the signal and the range, as output values. In the same time, it
will send over IEC61850-8-1 (through two not-visible-to-CAP user outputs) the value
and the deadband, to other equipment or systems in the substation.

Section 16

MV01-
MVGGIO
IN VALUE
RANGE
en05000408.vsd
Figure 302: MV function block
Table 339: Input signals for the MVGGIO (MV01-) function block
Signal Description
IN Analogue input value
Table 340: Output signals for the MVGGIO (MV01-) function block
Signal Description
VALUE Magnitude of deadband value
RANGE Range
Table 341: General settings for the MVGGIO (MV01-) function

MV db 1 - 300 1 10 - Deadband value
in % of range (in
%s if integral is
used)
MV zeroDb 0 - 100000 1 500 - Values less than
this are forced to
zero in 0,001% of
range
MV hhLim -10000000000.00 0.001 90.000 - High High limit
0-
10000000000.000
MV hLim -10000000000.00 0.001 80.000 - High limit
0-
10000000000.000
MV lLim -10000000000.00 0.001 -80.000 - Low limit
0-
10000000000.000
MV llLim -10000000000.00 0.001 -90.000 - Low Low limit
0-
10000000000.000

Section 16

MV min -10000000000.00 0.001 -100.000 - Minimum value
0-
10000000000.000
MV max -10000000000.00 0.001 100.000 - Maximum value
0-
10000000000.000
MV dbType Cyclic - Dead band - Reporting type
Dead band (0=cyclic, 1=db,
Int deadband 2=integral db)
MV limHys 0.000 - 100.000 0.001 5.000 - Hysteresis value
in % of range and
is common for all
limits
Table 342: IEC 61850-8-1 communication protocol

Function Value
Protocol IEC 61850-8-1
Communication speed for the IEDs 100BASE-FX
16.3 LON communication protocol
16.3.1 Introduction
An optical network can be used within the Substation Automation system. This
enables communication with the IED through the LON bus from the operator’s
workplace, from the control center and also from other terminals.
The LON protocol is specified in LonTalkProtocol Specification Version 3 from

Echelon Corporation and is designed for communication in control networks. These
networks are characterized by high speed for data transfer, short messages (few
bytes), peer-to-peer communication, multiple communication media, low
maintenance, multivendor equipment, and low support costs. LonTalk supports the
needs of applications that cover a range of requirements. The protocol follows the
reference model for open system interconnection (OSI) designed by the International
Standardization Organization (ISO).
In this document the most common addresses for commands and events are available.
Other addresses can be found in a separate document, refer to section "Related
documents".
It is assumed that the reader is familiar with the LON communication protocol in
general.

Section 16

The speed of the network depends on the medium and transceiver design. With
protection and control devices, fiber optic media is used, which enables the use of the
maximum speed of 1.25 Mbits/s. The protocol is a peer-to-peer protocol where all
the devices connected to the network can communicate with each other. The own
subnet and node number are identifying the nodes (max. 255 subnets, 127 nodes per
one subnet).
The LON bus links the different parts of the protection and control system. The
measured values, status information, and event information are spontaneously sent
to the higher-level devices. The higher-level devices can read and write memorized
values, setting values, and other parameter data when required. The LON bus also
enables the bay level devices to communicate with each other to deliver, for example,
interlocking information among the terminals without the need of a bus master.
The LonTalk protocol supports two types of application layer objects: network
variables and explicit messages. Network variables are used to deliver short messages,
such as measuring values, status information, and interlocking/blocking signals.
Explicit messages are used to transfer longer pieces of information, such as events
and explicit read and write messages to access device data.
The benefits achieved from using the LON bus in protection and control systems
include direct communication among all terminals in the system and support for
multi-master implementations. The LON bus also has an open concept, so that the
terminals can communicate with external devices using the same standard of network
variables.
Introduction of LON protocol

For more information see ‘LON bus, LonWorks Network in Protection and Control,
User’s manual and Technical description, 1MRS 750035-MTD EN’.
LON protocol
Configuration of LON
Lon Network Tool (LNT 505) is a multi-purpose tool for LonWorks network
configuration. All the functions required for setting up and configuring a LonWorks
network is easily accessible on a single tool program. For details see the “Operators
manual”.
Activate LONCommunication
Activate LON communication in the PST Parameter Setting Tool under Settings ->
General settings – > Communication – > SLM configuration – > Rear optical LON,
where ADE should be set to ON.
Add LON Device Types LNT

A new device is added to LON Network Tool from the Device menu or by installing
the device from the ABB LON Device Types package for LNT 505, with the SLDT
IED 670 package version 1p2 r03.

Section 16
LON net address

To be able to establish a LON connection with the 670IEDs, the IED has to be given
a unique net address. The net address consists of a subnet and node number. This is
accomplished with the LON Network Tool by creating one device for each IED.
Vertical communication
Vertical communication describes communication between the monitoring devices
and protection and control IEDs. This communication includes sending of changed
process data to monitoring devices as events and transfer of commands, parameter
data and disturbance recorder files. This communication is implemented using
explicit messages.
Events and indications

Events sent to the monitoring devices are using explicit messages (message code 44H)
with unacknowledged transport service of the LonTalk protocol. When a signal is
changed in the 670IED, one message with the value, quality and time is transmitted
from terminal.
Binary events
Binary events are generated in event function blocks EV01 to EV20 in the 670IEDs.
The event function blocks have predefined LON addresses. table 343 shows the LON
addresses to the first input on the event function blocks. The addresses to the other
inputs on the event function block are consecutive after the first input. For example,
input 15 on event block EV17 has the address 1280 + 14 (15-1) = 1294.
For double indications only the first eight inputs 1–8 must be used. Inputs 9–16 can
be used for other type of events at the same event block.
As basic, 3 event function blocks EV01-EV03 running with a fast loop time (3 ms)
is available in the 670IEDS. The remaining event function blocks EV04-EV09 runs
with a loop time on 8 ms and EV10-EV20 runs with a loop time on 100 ms. The event
blocks are used to send binary signals, integers, real time values like analogue data
from measuring functions and mA input modules as well as pulse counter signals.
16 pulse counter value function blocks PC01 to PC16 and 24 mA input service values
function blocks SMMI1_In1 to 6 – SMMI4_In1 to 6 are available in the 670IEDs.
The first LON address in every event function block is found in table 343
Table 343: LON adresses for Event functions

Function block First LON address in
function block
EV01 1024
EV02 1040
EV03 1056
EV04 1072
EV05 1088
EV06 1104
EV07 1120

Section 16
Function block First LON address in

function block
EV08 1136
EV09 1152
EV10 1168
EV11 1184
EV12 1200
EV13 1216
EV14 1232
EV15 1248
EV16 1264
EV17 1280
EV18 1296
EV19 1312
EV20 1328
Event masks
The event mask for each input can be set individually from the Parameter Setting
Tool (PST) Under: Settings – > General Settings –> Monitoring –> Event function
as.
• No events
• OnSet, at pick-up of the signal
• OnReset, at drop-out of the signal
• OnChange, at both pick-up and drop-out of the signal
• AutoDetect, event system itself make the reporting decision, (reporting criteria
for integers has no semantic, prefer to be set by the user)
The following type of signals from application functions can be connected to the event
function block.
Single indication
Directly connected binary IO signal via binary input function block (SMBI) is always
reported on change, no changed detection is done in the event function block. Other
Boolean signals, for example a start or a trip signal from a protection function is event
masked in the event function block.
Double indications
Double indications can only be reported via switch-control (SCSWI) functions, the
event reporting is based on information from switch-control, no change detection is
done in the event function block.
Directly connected binary IO signal via binary input function block (SMBI) is not
possible to handle as double indication. Double indications can only be reported for
the first 8 inputs on an event function block.

Section 16
• 00 generates an intermediate event with the read status 0

• 01 generates an open event with the read status 1
• 10 generates a close event with the read status 2
• 11 generates an undefined event with the read status 3
Analog value
All analog values are reported cyclic, the reporting interval is taken from the
connected function if there is a limit supervised signal, otherwise it is taken from the
event function block.
Figure 303: Connection of protection signals for event handling.
Command handling
Commands are transferred using transparent SPA-bus messages. The transparent
SPA-bus message is an explicit LON message, which contains an ASCII character
message following the coding rules of the SPA-bus protocol. The message is sent
using explicit messages with message code 41H and using acknowledged transport
service.
Both the SPA-bus command messages (R or W) and the reply messages (D, A or N)
are sent using the same message code. It is mandatory that one device sends out only
one SPA-bus message at a time to one node and waits for the reply before sending
the next message.

Section 16
For commands from the operator workplace to the IED for apparatus control, i.e. the
function blocks type SCSWI 1 to 32, SXCBR 1 to 18and SXSWI 1 to 28; the SPA
addresses are according to table 344
Horizontal communication
Network variables are used for communication between REx 5xx and 670IEDs. The
supported network variable type is SNVT_state (NV type 83). SNVT_state is used
to communicate the state of a set of 1 to 16 Boolean values.
The multiple command send function block (MTxx) is used to pack the information
to one value. This value is transmitted to the receiving node and presented for the
application by a multiple command function block (CMxx). At horizontal
communication the input BOUND on the event function block (MTxx) must be set
to 1. There are 10 MT and 60 CM function blocks available. The MT and CM function
blocks are connected using Lon Network Tool (LNT 505). This tool also defines the
service and addressing on LON.
This is an overview description how to configure the network variables for 670IEDs.
Configuration of LON network variables

Configure the Network variables according to your application from the LON
network Tool. For more details see “LNT 505” in “Operators manual”. The following
is an example of how to configure network variables concerning e.g. interlocking
between two 670IEDs.
LON
BAY E1 BAY E3 BAY E4

MT07 CM09 CM09
en05000718.vsd
Figure 304: Examples connections between MT and CM function blocks in three

terminals.
The network variable connections are done from the NV Connection window. From
LNT window select Connections -> NVConnections -> New

Section 16
en05000719.vsd
Figure 305: The network variables window in LNT.
There are two ways of downloading NV connections. Either you use the drag-and-
drop method where you select all nodes in the device window, drag them to the
Download area in the bottom of the program window and drop them there. Or the
traditional menu selection, Configuration -> Download...

Section 16
en05000720.vsd
Figure 306: The download configuration window in LNT.
Communication ports
The serial communication module (SLM) is used for SPA or IEC 60870-5-103 and
LON communication. This module is a mezzanine module, and can be placed on the
Main Processing Module (NUM). The serial communication module can have
connectors for two plastic fiber cables (snap-in) or two glass fiber cables (ST,
bayonet) or a combination of plastic and glass fiber. Three different types are available
depending on type of fiber. The incoming optical fiber is connected to the RX receiver
input, and the outgoing optical fiber to the TX transmitter output. When the fiber optic
cables are laid out, pay special attention to the instructions concerning the handling,
connection, etc. of the optical fibers. The module is identified with a number on the
label on the module.
Table 344: SPA addresses for commands from the operator workplace to the IED for apparatus
control
Name Function SPA Description
block address
BL_CMD SCSWI01 1 I 5115 SPA parameters for block command

Section 16

block address
CANCEL SCSWI01 1 I 5107 SPA parameters for cancel
command
command
command
command
command
command
command
command
command
command

Section 16

block address
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command

Section 16

block address
SELECTOpen=00, SCSWI01 1 I 5105 SPA parameters for select (Open/
SELECTClose=01, Close) command
SELOpen+ILO=10, Note: Send select command before
SELClose+ILO=11, operate command
SELOpen+SCO=20,
SELClose+SCO=21,
SELOpen+ILO+SCO=30,
SELClose+ILO+SCO=31
SELECTClose=01, etc. Close) command

Section 16

block address
ExcOpen=00, SCSWI01 1 I 5106 SPA parameters for operate (Open/
ExcClose=01, Close) command
ExcOpen+ILO=10, Note: Send select command before
ExcClose+ILO=11, operate command
ExcOpen+SCO=20,
ExcClose+SCO=21,
ExcOpen+ILO+SCO=30,
ExcClose+ILO+SCO=31
ExcClose=01, etc. Close) command

Section 16

block address
Sub Value SXCBR01 2 I 7854 SPA parameter for position to be
substituted
Note: Send the value before Enable
substituted
substituted
substituted

Section 16

block address
substituted
substituted
substituted
substituted
Sub Value SXCBR09 3I7 SPA parameter for position to be
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
Sub Value SXSWI01 3 I 196 SPA parameter for position to be
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted

Section 16

block address
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
Sub Enable SXCBR01 2 I 7855 SPA parameter for substitute enable
command
Note: Send the Value before Enable
command
command
command
command
command

Section 16

block address
command
command
Sub Enable SXCBR09 3I8 SPA parameter for substitute enable
command
command
command
command
command
command
command
command
command
command
Sub Enable SXSWI01 3 I 197 SPA parameter for substitute enable
command
command
command
command
command
command
command
command
command
command
Sub Enable SXSWI11 3I 379 SPA parameter for substitute enable
command
command

Section 16

block address
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
Update Block SXCBR01 2 I 7853 SPA parameter for update block
command
command
command
command
command
command
command
command

Section 16

block address
Update Block SXCBR09 3I6 SPA parameter for update block
command
command
command
command
command
command
command
command
command
command
Update Block SXSWI01 3 I 198 SPA parameter for update block
command
command
command
command
command
command
command
command
command
command
command
command
command
command

Section 16

block address
command
command
command
command
command
command
command
command
command
command
command
command
command
command
Table 345: General settings for the NVLON (NV---) function

Operation Off - Off - Operation
On
Table 346: General settings for the LON (ADE1-) function

On
TimerClass Slow - Slow - Timer class
Normal
Fast

Section 16
Table 347: LON communication protocol

Function Value
Protocol LON
Communication speed 1.25 Mbit/s
16.4 SPA communication protocol
16.4.1 Introduction
In this section the most common addresses for commands and events are available.
Other addresses can be found in a separate document, refer to section "Related
documents".
It is assumed that the reader is familiar with the SPA communication protocol in
general.

The SPA bus uses an asynchronous serial communications protocol (1 start bit, 7 data
bits + even parity, 1 stop bit) with data transfer rate up to 38400 bit/s. Recommended
baud rate for each type of terminal will be found in the “Technical reference
manual”. Messages on the bus consist of ASCII characters.
Introduction of SPA protocol

The basic construction of the protocol assumes that the slave has no self-initiated
need to talk to the master but the master is aware of the data contained in the slaves
and, consequently, can request required data. In addition, the master can send data to
the slave. Requesting by the master can be performed either by sequenced polling
(e.g. for event information) or only on demand.
The master requests slave information using request messages and sends information
to the slave in write messages. Furthermore, the master can send all slaves in common
a broadcast message containing time or other data. The inactive state of bus transmit
and receive lines is a logical "1".
SPA protocol
The tables below specify the SPA addresses for reading data from and writing data
to an IED 670 with the SPA communication protocol implemented.
The SPA addresses for the mA input service values (MI03-MI16) are found in
table348

Section 16
Table 348: SPA addresses for the MIM (MI03-MI16) function

Function block SPA address
MI03-CH1 4-O-6508
MI03-CH2 4-O-6511
MI03-CH3 4-O-6512
MI03-CH4 4-O-6515
MI03-CH5 4-O-6516
MI03-CH6 4-O-6519
MI04-CH1 4-O-6527
MI04-CH2 4-O-6530
MI04-CH3 4-O-6531
MI04-CH4 4-O-6534
MI04-CH5 4-O-6535
MI04-CH6 4-O-6538
MI05-CH1 4-O-6546
MI05-CH2 4-O-6549
MI05-CH3 4-O-6550
MI05-CH4 4-O-6553
MI05-CH5 4-O-6554
MI05-CH6 4-O-6557
MI06-CH1 4-O-6565
MI06-CH2 4-O-6568
MI06-CH3 4-O-6569
MI06-CH4 4-O-6572
MI06-CH5 4-O-6573
MI06-CH6 4-O-6576
MI07-CH1 4-O-6584
MI07-CH2 4-O-6587
MI07-CH3 4-O-6588
MI07-CH4 4-O-6591
MI07-CH5 4-O-6592
MI07-CH6 4-O-6595
MI08-CH1 4-O-6603
MI08-CH2 4-O-6606
MI08-CH3 4-O-6607
MI08-CH4 4-O-6610
MI08-CH5 4-O-6611
MI08-CH6 4-O-6614
MI09-CH1 4-O-6622
MI09-CH2 4-O-6625

Section 16

MI09-CH3 4-O-6626
MI09-CH4 4-O-6629
MI09-CH5 4-O-6630
MI09-CH6 4-O-6633
MI10-CH1 4-O-6641
MI10-CH2 4-O-6644
MI10-CH3 4-O-6645
MI10-CH4 4-O-6648
MI10-CH5 4-O-6649
MI10-CH6 4-O-6652
MI11-CH1 4-O-6660
MI11-CH2 4-O-6663
MI11-CH3 4-O-6664
MI11-CH4 4-O-6667
MI11-CH5 4-O-6668
MI11-CH6 4-O-6671
MI12-CH1 4-O-6679
MI12-CH2 4-O-6682
MI12-CH3 4-O-6683
MI12-CH4 4-O-6686
MI12-CH5 4-O-6687
MI12-CH6 4-O-6690
MI13-CH1 4-O-6698
MI13-CH2 4-O-6701
MI13-CH3 4-O-6702
MI13-CH4 4-O-6705
MI13-CH5 4-O-6706
MI13-CH6 4-O-6709
MI14-CH1 4-O-6717
MI14-CH2 4-O-6720
MI14-CH3 4-O-6721
MI14-CH4 4-O-6724
MI14-CH5 4-O-6725
MI14-CH6 4-O-6728
MI15-CH1 4-O-6736
MI15-CH2 4-O-6739
MI15-CH3 4-O-6740
MI15-CH4 4-O-6743
MI15-CH5 4-O-6744

Section 16

MI15-CH6 4-O-6747
MI16-CH1 4-O-6755
MI16-CH2 4-O-6758
MI16-CH3 4-O-6759
MI16-CH4 4-O-6762
MI16-CH5 4-O-6763
MI16-CH6 4-O-6766
The SPA addresses for the pulse counter values PC01 – PC16 are found in table 349
Table 349: SPA addresses for the PCGGIO (PC01-PC16 function

PC01-CNT_VAL 3-O-5834
I/O modules
To read binary inputs, the SPA-addresses for the outputs of the I/O-module function
block are used, i.e. the addresses for BI1 – BI16. The SPA addresses are found in a
separate document, refer to section "Related documents".
Storage of settings in FLASH

Settings that do not belong to a setting group are usually written to FLASH on
command.
One example is for the limits of the mA-input modules (MIxx), where 0 value must
be written to the 10V43 address. Addresses for other settings that must be stored on

Section 16
command, can be found in a separate document, refer to section "Related

documents".
Single command function

The IEDs may be provided with a function to receive signals either from a substation
automation system or from the local human-machine interface, HMI. That receiving
function block has 16 outputs that can be used, for example, to control high voltage
apparatuses in switchyards. For local control functions, the local HMI can also be
used.
The single command function consists of three function blocks; CD01 – CD03 for
16 binary output signals each.
The signals can be individually controlled from the operator station, remote-control
gateway, or from the local HMI on the IED. The SPA addresses for the single
command function (CD) are shown in Table 3. For the single command function
block, CD01 to CD03, the address is for the first output. The other outputs follow
consecutively after the first one. For example, output 7 on the CD02 function block
has the 70O718 address.
The SPA addresses for the single command functions CD01 – CD03 are found in
table 350
Table 350: SPA addresses for the SingleCmd (CD01-CD03) function

CD01-CmdInput1 4-S-4639

Section 16

Table 350 SPA addresses for the controllable signals on the single command functions
Figure 307 shows an application example of how the user can, in a simplified way,
connect the command function via the configuration logic circuit in a protection
terminal for control of a circuit breaker.
A pulse via the binary outputs of the terminal normally performs this type of command
control. The SPA addresses to control the outputs OUT1 – OUT16 in CD01 are shown
in table 350

Section 16
Figure 307: Application example showing a simplified logic diagram for control of
a circuit breaker.
The MODE input defines if the output signals from CD01 shall be steady or pulsed
signals (1 = steady, 2 = pulsed).
Event function
This event function is intended to send time-tagged events to the station level (e.g.
operator workplace) over the station bus. The events are there presented in an event
list. The events can be created from both internal logical signals and binary input
channels, and all of them must be tied to the 6 DR function blocks. All internal signals
are time tagged in the main processing module, while the binary input channels are
time tagged directly on each I/O module. The events are produced according to the
set event masks. The event masks are treated commonly for both the LON and SPA
channels. All events according to the event mask are stored in a buffer, which contains
up to 1000 events. If new events appear before the oldest event in the buffer is read,
the oldest event is overwritten and an overflow alarm appears.
Two special signals for event registration purposes are available in the terminal,
Terminal Restarted (0E50) and Event buffer overflow (0E51).
The input parameters can be set individually from the Parameter Setting Tool (PST)
under EVENT MASKS/Binary Events as:
• No events (event mask 0)

• OnSet, at pick-up of the signal (event mask 1)
• OnReset, at drop-out of the signal (event mask 2)
• OnChange, at both pick-up and drop-out of the signal (event mask 3)
Double indications are used to handle a combination of two inputs at a time, for
example, one input for the open and one for the close position of a circuit breaker or
disconnector. The double indication consists of an odd and an even input number.
When the odd input is defined as a double indication, the next even input is considered
to be the other input. The odd inputs has a suppression timer to suppress events at 00
states. To be used as double indications the odd inputs are individually set from the
PST under EVENT MASKS/Binary Events as:

Section 16
• Double indication (event mask 4)

• Double indication with midposition suppression (event mask 5)
Here, the settings of the corresponding even inputs have no meaning. These states of
the inputs generate events.
The status is read by the station HMI on the status indication for the odd input:
• 00 generates an intermediate event with the read status 0

• 01 generates a close event with the read status 1
• 10 generates an open event with the read status 2
• 11 generates an undefined event with the read status 3
No analog events are available for SPA.
The Status and event codes for the Event functions are found in table 351

Section 16
Table 351: Status and event codes
Single indication1) Double indication 2)

Event block Status Set event Reset event Intermedia Closed 01 Open 10 Unde
te 00 fined
11
EV01
Input 1 2201 22E33 22E32 22E0 22E1 22E2 22
Input 2 2202 22E35 22E34 E3
Input 3 2203 22E37 22E36 22E4 22E5 22E6
Input 4 2204 22E39 22E38 22
Input 5 2205 22E41 22E40 22E8 22E9 22E10 E7
Input 6 2206 22E43 22E42
Input 7 2207 22E45 22E44 22E12 22E13 22E14 22
Input 8 2208 22E47 22E46 E1
Input 9 2209 22E49 22E48 22E16 22E17 22E18 1
Input 10 2210 22E51 22E50
Input 11 2211 22E53 22E52 22E20 22E21 22E22 22
Input 12 2212 22E55 22E54 E1
Input 13 2213 22E57 22E56 22E24 22E25 22E26 5
Input 14 2214 22E59 22E58
Input 15 2215 22E61 22E60 22E28 22E29 22E30 22
Input 16 2216 22E63 E1
EV01 3) 9
22
E2
3
22
E2
7
22
E3
1
EV02 230.. 23E.. 23E.. 23E.. 23E.. 23E.. 23
EV03 240.. 24E.. 24E.. 24E.. 23E.. 24E.. E..
- - - - - - - 24
- - - - - - - E..
- - - - - - - -
EV20 410.. 41E.. 41E.. 41E.. 41E.. 41E.. -
-
41
E..
1) These values are only applicable if the Event mask is masked 0, 1, 2 or 3.
2) These values are only applicable if the Event mask is masked 4 or 5.
3) This status value contains a value with all the 16 inputs combined to a hex-value
(0-FFF).
Example
The master requests the slave (no. 2) for latest events by addressing data category
L:>2RL:CCcr

Section 16
The slave sends the recent events from the buffer starting from the oldest event. If all
recent events do not fit into one message, rest of recent events will not be sent until
during the next request.
When events are requested from the slave and the buffer of the slave is empty, the
slave responds with an empty data message: If<2D::CCcrlf.
Connection of signals as events

Signals coming from different protection and control functions and shall be sent as
events to the station level over the SPA-bus (or LON-bus) are connected to the Event
function block according to figure 308
Figure 308: Connection of protection signals for event handling.
Note that corresponding Event mask must be set to an applicable value via the
Parameter Setting Tool (PST).

Section 16
16.4.2.1 Communication ports
Analog/Digital conversion module (ADM). The serial communication module can
have connectors for two plastic fiber cables (snap-in) or two glass fiber cables (ST,
depending on type of fiber.
The incoming optical fiber is connected to the RX receiver input, and the outgoing
optical fiber to the TX transmitter output. When the fiber optic cables are laid out,
pay special attention to the instructions concerning the handling, connection, etc. of
the optical fibers. The module is identified with a number on the label on the module.
The procedure to set the transfer rate and slave number can be found in the Installation
and commissioning manual for respective IED.
16.4.3 Design
When communicating locally with a Personal Computer (PC) in the station, using the
rear SPA port, the only hardware needed for a station monitoring system is:
• Optical fibres
• Opto/electrical converter for the PC
• PC
When communicating remotely with a PC using the rear SPA port, the same hardware
is needed plus telephone modems.
The software needed in the PC, either local or remote, is PCM 600.
When communicating between the LHMI and a PC, the only hardware required is a
front-connection cable.
Table 352: General settings for the SPA (SPA1-) function

SlaveAddress 1 - 899 1 30 - Slave address
BaudRate 300 Bd - 9600 Bd - Baudrate on
1200 Bd serial line
4800 Bd
9600 Bd
19200 Bd
38400 Bd
57600 Bd

Section 16
Table 353: General settings for the SPAviaSLM (SPA1-) function

1200 Bd serial line
4800 Bd
9600 Bd
19200 Bd
38400 Bd
Table 354: General settings for the SPAviaLON (SPA4-) function

On
Table 355: SPA communication protocol

Function Value
Protocol SPA
Communication speed 300, 1200, 2400, 4800, 9600, 19200 or
38400 Bd
Slave number 1 to 899
16.5 IEC 60870-5-103 communication protocol
16.5.1 Introduction
The IEC 60870-5-103 communication protocol is mainly used when a protection
terminal communicates with a third party control or monitoring system. This system
must have software that can interpret the IEC 60870-5-103 communication messages.
16.5.2.1 General
The IEC 60870-5-103 is an unbalanced (master-slave) protocol for coded-bit serial

communication exchanging information with a control system, and with a data
transfer rate up to 38400 bit/s. In IEC terminology a primary station is a master and
a secondary station is a slave. The communication is based on a point-to-point

Section 16
principle. The master must have software that can interpret the IEC 60870-5-103
communication messages.
Introduction of IEC 60870–5–103 protocol

The IEC 60870-5-103 protocol implementation in IED 670 consists of these
functions:
• Event handling
• Report of analog service values (measurements)
• Fault location
• Command handling
• Autorecloser ON/OFF
• Teleprotection ON/OFF
• Protection ON/OFF
• LED reset
• Characteristics 1 - 4 (Setting groups)
• File transfer (disturbance files)
• Time synchronization
For detailed information about IEC 60870-5-103, refer to the IEC60870 standard part
5: Transmission protocols, and to the section 103: Companion standard for the
informative interface of protection equipment.
IEC 60870-5-103
The tables in the following sections specify the information types supported by the
IED 670 products with the communication protocol IEC 60870-5-103 implemented.
To support the information, corresponding functions must be included in the

protection and control IED.
Commands in control direction

Terminal commands in control direction, I103IEDCMD
Command block in control direction with defined terminal signals.
Number of instances: 1
Command block use PARAMETER as FUNCTION TYPE.
INFORMATION NUMBER is defined for each output signals.

Info. no Message Supported
19 LED Reset Yes
23 Activate setting group 1 Yes
Function commands in control direction, pre-defined I103CMD

Section 16
Function command block in control direction with defined output signals.
FUNCTION TYPE parameter for each block.
INFORMATION NUMBER is defined for each output signals.

Info. no. Message Supported
16 Auto-recloser on/off Yes
17 Teleprotection on/off Yes
18 Protection on/off Yes
Function commands in control direction, user-defined, I103UserCMD

Function command blocks in control direction with user-defined output signals.
FUNCTION TYPE parameter for each block in private range. Default values are
defined in private range 1 - 4. One for each instance.
INFORMATION NUMBER is required for each output signal. Default values are 1
- 8.
1 Output signal 01 Yes
Status
Terminal status indications in monitor direction, I103IED
Indication block for status in monitor direction with defined terminal functions.
Indication block use PARAMETER as FUNCTION TYPE.
INFORMATION NUMBER is defined for each input signals.

Section 16

19 LED reset Yes
23 Setting group 1 active Yes
21 Test mode active Yes
Function status indications in monitor direction, user-defined, I103UserDef

Function indication blocks in monitor direction with user-defined input signals.
defined in private range 5 - 24. One for each instance.
INFORMATION NUMBER is required for each input signal. Default values are
defined in range 1 - 8
1 Input signal 01 Yes
Supervision indications in monitor direction, I103Superv

Indication block for supervision in monitor direction with defined functions.
INFORMATION NUMBER is defined for output signals.

32 Measurand supervision I Yes
33 Measurand supervision U Yes
37 I>>back-up operation Yes
38 VT fuse failure Yes
46 Group warning Yes
47 Group alarm Yes

Section 16
Earth fault indications in monitor direction, I103EF

Indication block for earth fault in monitor direction with defined functions.
INFORMATION NUMBER is defined for each output signal.

51 Earth fault forward Yes
52 Earth fault reverse Yes
Fault indications in monitor direction, type 1, I103FltDis

Fault indication block for faults in monitor direction with defined functions.
The instance type is suitable for distance protection function.
INFORMATION NUMBER is defined for each input signal.
64 Start L1 Yes
65 Start L2 Yes
66 Start L3 Yes
67 Start IN Yes
84 General start Yes
69 Trip L1 Yes
70 Trip L2 Yes
71 Trip L3 Yes
68 General trip Yes
74 Fault forward/line Yes
75 Fault reverse/busbar Yes
78 Zone 1 Yes
79 Zone 2 Yes
80 Zone 3 Yes
81 Zone 4 Yes
82 Zone 5 Yes
76 Signal transmitted Yes
77 Signal received Yes
73 SCL, Fault location in ohm Yes

Section 16
Fault indications in monitor direction, type 2, I103FltStd

Fault indication block for faults in monitor direction with defined functions.
The instance type is suitable for linediff, transformerdiff, overcurrent and earthfault
protection functions.
FUNCTION TYPE setting for each block.
INFORMATION NUMBER is defined for each input signal.
64 Start L1 Yes
65 Start L2 Yes
66 Start L3 Yes
67 Start IN Yes
84 General start Yes
69 Trip L1 Yes
70 Trip L2 Yes
71 Trip L3 Yes
68 General trip Yes
74 Fault forward/line Yes
75 Fault reverse/busbar Yes
85 Breaker failure Yes
86 Trip measuring system L1 Yes
89 Trip measuring system N Yes
90 Over current trip I> Yes
91 Over current trip I>> Yes
92 Earth fault trip IN> Yes
93 Earth fault trip IN>> Yes
Autorecloser indications in monitor direction, I103AR

Indication block for autorecloser in monitor direction with defined functions.
INFORMATION NUMBER is defined for each output signal.

Section 16

16 Autorecloser active Yes
128 CB on by Autorecloser Yes
130 Autorecloser blocked Yes
Measurands
Function blocks in monitor direction for input measurands. Typically connected to
monitoring function, for example to power measurement CVMMXU.
Measurands in public range, I103Meas

The IED will report all valid measuring types depending on connected signals.
Upper limit for measured currents, active/reactive-power is 2.4 times rated value.
Upper limit for measured voltages and frequency is 1.2 times rated value.
148 IL1 Yes
144, 145, IL2 Yes
148
148 IL3 Yes
147 IN, Neutral current Yes
148 UL1 Yes
148 UL2 Yes
148 UL3 Yes
145, 146 UL1-UL2 Yes
147 UN, Neutral voltage Yes
146, 148 P, active power Yes
146, 148 Q, reactive power Yes
148 f, frequency Yes
Measurands in private range, I103MeasUsr

defined in private range 25 – 27. One for each instance.
INFORMATION NUMBER parameter for each block. Default value 1.

- Meas1 Yes
- Meas2 Yes
- Meas3 Yes

Section 16

- Meas4 Yes
- Meas5 Yes
- Meas6 Yes
- Meas7 Yes
- Meas8 Yes
- Meas9 Yes
Disturbance recordings
The following elements are used in the ASDUs (Application Service Data Units)
defined in the standard.
Analog signals, 40-channels: the channel number for each channel has to be specified.
Channels used in the public range are 1 to 8 and with:
• IL1 connected to channel 1 on disturbance function block DRA1

• IN connected to channel 4 on disturbance function block DRA1
• VL1E connected to channel 5 on disturbance function block DRA1
• VEN connected to channel 8 on disturbance function block DRA1
Channel number used for the remaining 32 analog signals are numbers in the private
range 64 to 95.
Binary signals, 96-channels: for each channel the user can specify a FUNCTION
TYPE and an INFORMATION NUMBER.
Disturbance Upload
All analog and binary signals that are recorded with disturbance recorder will be
reported to the master. The last eight disturbances that are recorded are available for
transfer to the master. A successfully transferred disturbance (acknowledged by the
master) will not be reported to the master again.
When a new disturbance is recorded by the IED a list of available recorded

disturbances will be sent to the master, an updated list of available disturbances will
be sent whenever something has happened to disturbances in this list. I.e. when a
disturbance is deleted (by other client e.g. SPA) or when a new disturbance has been
recorded or when the master has uploaded a disturbance.
Deviations from the standard

Section 16
Information sent in the disturbance upload is specified by the standard; however,

some of the information are adapted to information available in disturbance recorder
in Rex67x.
This section describes all data that is not exactly as specified in the standard.
ASDU23
In ‘list of recorded disturbances’ (ASDU23) an information element named SOF

(status of fault) exists. This information element consists of 4 bits and indicates
whether:
• Bit TP: the protection equipment has tripped during the fault
• Bit TM: the disturbance data are currently being transmitted
• Bit TEST: the disturbance data have been recorded during normal operation or
test mode.
• Bit OTEV: the disturbance data recording has been initiated by another event
than start/pick-up
The only information that is easily available is test-mode status. The other information
is always set (hard coded) to:
TP Recorded fault with trip. [1]

TM Disturbance data waiting for transmission [0]
OTEV Disturbance data initiated by other events [1]
Another information element in ASDU23 is the FAN (fault number). According to

the standard this is a number that is incremented when a protection function takes
action. In Rex67x FAN is equal to disturbance number, which is incremented for each
disturbance.
ASDU26
When a disturbance has been selected by the master; (by sending ASDU24), the
protection equipment answers by sending ASDU26, which contains an information
element named NOF (number of grid faults). This number should indicate fault
number in the power system, i.e. a fault in the power system with several trip and
auto-reclosing has the same NOF (while the FAN should be incremented). NOF is in
Rex67x, just as FAN, equal to disturbance number.
To get INF and FUN for the recorded binary signals there are parameters on the
disturbance recorder for each input. The user must set these parameters to whatever
he connects to the corresponding input.

Section 16
Interoperability, physical layer

Supported
Electrical Interface
EIA RS-485 No
number of loads No
Optical interface
glass fibre Yes
plastic fibre Yes
Transmission speed
96000 bit/s Yes
19200 bit/s Yes
Link Layer
DFC-bit used Yes
Connectors
connector F-SMA No
connector BFOC/2.5 Yes
Interoperability, application layer

Supported
Selection of standard ASDUs in monitoring direction
ASDU Yes
1 Time-tagged message Yes
2 Time-tagged message with rel. time Yes
3 Measurands I Yes
4 Time-tagged message with rel. time Yes
5 Identification Yes
6 Time synchronization Yes
8 End of general interrogation Yes
9 Measurands II Yes
10 Generic data No
11 Generic identification No
23 List of recorded disturbances Yes
26 Ready for transm. of disturbance data Yes
27 Ready for transm. of a channel Yes
28 Ready for transm of tags Yes
29 Transmission of tags Yes
30 Transmission fo disturbance data Yes
31 End of transmission Yes
Selection of standard ASDUs in control direction

Section 16
Supported
ASDU Yes
6 Time synchronization Yes
7 General interrogation Yes
10 Generic data No
20 General command Yes
21 Generic command No
24 Order for disturbance data transmission Yes
25 Acknowledgement for distance data transmission Yes
Selection of basic application functions
Test mode No
Blocking of monitoring direction Yes
Disturbance data Yes
Private data Yes
Generic services No
16.5.2.2 Communication ports
Analog/Digital conversion module (ADM). The serial communication module can
have connectors for two plastic fiber cables (snap-in) or two glass fiber cables (ST,
depending on type of fiber.
The incoming optical fiber is connected to the RX receiver input, and the outgoing
optical fiber to the TX transmitter output. When the fiber optic cables are laid out,
pay special attention to the instructions concerning the handling, connection, etc. of
the optical fibers. The module is identified with a number on the label on the module.

ICMA-
I103IEDCMD
BLOCK 19-LEDRS
23-GRP1
24-GRP2
25-GRP3
26-GRP4
en05000689.vsd
ICMD-
I103CMD
BLOCK 16-AR
17-DIFF
18-PROT
en05000684.vsd

Section 16
ICM1-
I103UserCMD
BLOCK OUTPUT1
OUTPUT2
OUTPUT3
OUTPUT4
OUTPUT5
OUTPUT6
OUTPUT7
OUTPUT8
en05000693.vsd
IEV1-
I103IED
BLOCK
19_LEDRS
23_GRP1
24_GRP2
25_GRP3
26_GRP4
21_TESTM
en05000688.vsd
IS01-
I103UsrDef
BLOCK
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
en05000694.vsd
ISU1-
I103Superv
BLOCK
32_MEASI
33_MEASU
37_IBKUP
38_VTFF
46_GRWA
47_GRAL
en05000692.vsd
ISEF-
I103EF
BLOCK
51_EFFW
52_EFREV
en05000685.vsd

Section 16
IZ01-
I103FltDis
BLOCK
64_STL1
65_STL2
66_STL3
67_STIN
84_STGEN
69_TRL1
70_TRL2
71_TRL3
68_TRGEN
74_FW
75_REV
78_ZONE1
79_ZONE2
80_ZONE3
81_ZONE4
82_ZONE5
76_TRANS
77_RECEV
73_SCL
FLTLOC
ARINPROG
en05000686.vsd
IFL1-
I103FltStd
BLOCK
64_STL1
65_STL2
66_STL3
67_STIN
84_STGEN
69_TRL1
70_TRL2
71_TRL3
68_TRGEN
74_FW
75_REV
85_BFP
86_MTRL1
87_MTRL2
88_MTRL3
89_MTRN
90_IOC
91_IOC
92_IEF
93_IEF
ARINPROG
en05000687.vsd
IAR1-
I103AR
BLOCK
16_ARACT
128_CBON
130_UNSU
en05000683.vsd

Section 16
IMM1-
I103Meas
BLOCK
IL1
IL2
IL3
IN
UL1
UL2
UL3
UL1L2
UN
P
Q
F
en05000690.vsd
IMU1-
I103MeasUsr
BLOCK
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
en05000691.vsd
Table 356: General settings for the I103StatFltStd (IFL1-) function

FUNTYPE 1 - 255 1 1 FunT Function type
(1-255)
Table 357: Input signals for the I103IEDCMD (ICMA-) function block
Signal Description
BLOCK Block of commands
Table 358: Input signals for the I103FuncCMD (ICMD-) function block
Signal Description
Table 359: Input signals for the I103IED (IEV1-) function block
Signal Description
BLOCK Block of status reporting
19_LEDRS Information number 19, reset LEDs
23_GRP1 Information number 23, setting group 1 is active

Section 16
Signal Description
21_TESTM Information number 21, test mode is active
Table 360: Input signals for the I103FuncUserCM (ICM1-) function block
Signal Description
Table 361: Input signals for the I103UsrDef (IS01-) function block
Signal Description
INPUT1 Binary signal Input 1
INPUT2 Binary signal input 2
Table 362: Input signals for the I103Superv (ISU1-) function block
Signal Description
32_MEASI Information number 32, measurand supervision of I
33_MEASU Information number 33, measurand supervision of U
37_IBKUP Information number 37, I high-high back-up protection
38_VTFF Information number 38, fuse failure VT
46_GRWA Information number 46, group warning
47_GRAL Information number 47, group alarm
Table 363: Input signals for the I103StatEF (ISEF-) function block
Signal Description
51_EFFW Information number 51, earth-fault forward
52_EFREV Information number 52, earth-fault reverse

Section 16
Table 364: Input signals for the I103StatFltDis (IZ01-) function block
Signal Description
64_STL1 Information number 64, start phase L1
67_STIN Information number 67, start residual current IN
84_STGEN Information number 84, start general
69_TRL1 Information number 69, trip phase L1
68_TRGEN Information number 68, trip general
74_FW Information number 74, forward/line
75_REV Information number 75, reverse/bus
78_ZONE1 Information number 78, zone 1
76_TRANS Information number 76, signal transmitted
77_RECEV Information number 77, signal recevied
73_SCL Information number 73, fault location in ohm
FLTLOC Faultlocator faultlocation valid (LMBRFLO-CALCMADE)
ARINPROG Autorecloser in progress (SMBRREC- INPROGR)
Table 365: Input signals for the I103StatFltStd (IFL1-) function block
Signal Description
67_STIN Information number 67, start residual curent IN
84_STGEN Information number 84, start general
68_TRGEN Information number 68, trip general
74_FW Information number 74, forward/line
75_REV Information number 75, reverse/bus
85_BFP Information number 85, breaker failure

Section 16
Signal Description
86_MTRL1 Information number 86, trip measuring system phase L1
89_MTRN Information number 89, trip measuring system neutral N
90_IOC Information number 90, over current trip, stage low
91_IOC Information number 91, over current trip, stage high
92_IEF Information number 92, earth-fault trip, stage low
93_IEF Information number 93, earth-fault trip, stage high
ARINPROG Autorecloser in progress (SMBRREC- INPROGR)
Table 366: Input signals for the I103MeasUsr (IMU1-) function block
Signal Description
BLOCK Block of service value reporting
INPUT1 Service value for measurement on input 1
Table 367: Input signals for the I103Meas (IMM1-) function block
Signal Description
BLOCK Block of service value reporting
IL1 Service value for current phase L1
IN Service value for residual current IN
UL1 Service value for voltage phase L1
UL1L2 Service value for voltage phase-phase L1-L2
UN Service value for residual voltage UN
P Service value for active power
Q Service value for reactive power
F Service value for system frequency

Section 16
Table 368: Output signals for the I103FuncCMD (ICMD-) function block
Signal Description
16-AR Information number 16, block of autorecloser
17-DIFF Information number 17, block of differential protection
18-PROT Information number 18, block of protection
Table 369: Output signals for the I103IEDCMD (ICMA-) function block
Signal Description
19-LEDRS Information number 19, reset LEDs
23-GRP1 Information number 23, activate setting group 1
Table 370: Output signals for the I103FuncUserCM (ICM1-) function block
Signal Description
OUTPUT1 Command output 1
Table 371: General settings for the I103viaSLM (IOW1-) function

19200 Bd serial line
RevPolarity Off - On - Invert polarity
On
CycMeasRepTim 1.0 - 3600.0 0.1 5.0 - Cyclic reporting
e time of
measurments

Section 16
Table 372: General settings for the I103_SLM_ABS (IECC-) function

19200 Bd serial line
RevPolarity Off - On - Invert polarity
On
CycMeasRepTim 1.0 - 3600.0 0.1 5.0 - Cyclic reporting
e time of
measurments
Table 373: General settings for the I103FuncCMD (ICMD-) function

(1-255)
Table 374: General settings for the I103IEDCMD (ICMA-) function

(1-255)
Table 375: General settings for the I103FuncUserCM (ICM1-) function

PULSEMOD 0-1 1 1 Mode Pulse mode
0=Steady,
1=Pulsed
T 0.200 - 60.000 0.001 0.400 s Pulse length
(1-255)
INFNO_1 1 - 255 1 1 InfNo Information
number for
output 1 (1-255)
number for
output 2 (1-255)
number for
output 3 (1-255)
number for
output 4 (1-255)
number for
output 5 (1-255)

Section 16

number for
output 6 (1-255)
number for
output 7 (1-255)
number for
output 8 (1-255)
Table 376: General settings for the I103Meas (IMM1-) function

RatedIL1 1 - 99999 1 3000 A Rated current
phase L1
phase L2
phase L3
RatedIN 1 - 99999 1 3000 A Rated residual
current IN
RatedUL1 0.05 - 2000.00 0.05 230.00 kV Rated voltage for
phase L1
phase L2
phase L3
RatedUL1-UL2 0.05 - 2000.00 0.05 400.00 kV Rated voltage for
phase-phase L1-
L2
RatedUN 0.05 - 2000.00 0.05 230.00 kV Rated residual
voltage UN
RatedP 0.00 - 2000.00 0.05 1200.00 MW Rated value for
active power
RatedQ 0.00 - 2000.00 0.05 1200.00 MVA Rated value for
reactive power
RatedF 50.0 - 60.0 10.0 50.0 Hz Rated system
frequency
(1-255)

Section 16
Table 377: General settings for the I103MeasUsr (IMU1-) function

(1-255)
INFNO 1 - 255 1 1 InfNo Information
number for
measurands
(1-255)
RatedMeasur1 0.05 - 0.05 1000.00 - Rated value for
10000000000.00 measurement on
input 1
input 2
input 3
input 4
input 5
input 6
input 7
input 8
input 9
Table 378: General settings for the I103StatEF (ISEF-) function

(1-255)
Table 379: General settings for the I103StatFltDis (IZ01-) function

(1-255)

Section 16
Table 380: General settings for the I103IED (IEV1-) function

(1-255)
Table 381: General settings for the I103Superv (ISU1-) function

(1-255)
Table 382: General settings for the I103UsrDef (IS01-) function

(1-255)
number for
binary input 1
(1-255)
number for
binary input 2
(1-255)
number for
binary input 3
(1-255)
number for
binary input 4
(1-255)
number for
binary input 5
(1-255)
number for
binary input 6
(1-255)
number for
binary input 7
(1-255)
number for
binary input 8
(1-255)

Section 16
Table 383: IEC 60870-5-103 communication protocol

Function Value
Protocol IEC 60870-5-103
Communication speed 9600, 19200 Bd
16.6 Single command, 16 signals (CD)
16.6.1 Introduction
The IEDs can receive commands either from a substation automation system or from
the local human-machine interface, LHMI. The command function block has outputs
that can be used, for example, to control high voltage apparatuses or for other user
defined functionality.

The single command function consists of a function block CD for 16 binary output
signals. The outputs can be individually controlled from a substation automation
system or from the local HMI. Each output signal can be given a name with a
maximum of 13 characters from the CAP configuration tool.
The output signals can be of the types Off, Steady, or Pulse. This configuration setting
is done via the LHMI or PCM 600 and is common for the whole function block. The
length of the output pulses are 100 ms. In steady mode the function block has a
memory to remember the output values at power interruption of the IED. Also a
BLOCK input is available used to block the updating of the outputs.
The output signals, here OUT1 to OUT16, are then available for configuration to
built-in functions or via the configuration logic circuits to the binary outputs of the
IED.

Section 16

CD01-
SingleCmd
BLOCK OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
OUT16
NAME1
NAME2
NAME3
NAME4
NAME5
NAME6
NAME7
NAME8
NAME9
NAME10
NAME11
NAME12
NAME13
NAME14
NAME15
NAME16
en05000698.vsd
Table 384: Output signals for the SingleCmd (CD01-) function block
Signal Description
OUT1 Single command output 1

Section 16
Signal Description
NAME1 User defined string for single command output 1
Table 385: Input signals for the SingleCmd (CD01-) function block
Signal Description
BLOCK Block single command function
Table 386: General settings for the SingleCmd (CD01-) function

Mode Off - Off - Operation mode
Steady
Pulsed

Section 16
16.7 Multiple command (CM) and Multiple transmit

(MT)
16.7.1 Introduction
The IED may be provided with a function to send and receive signals to and from
other IEDs via the interbay bus. The send and receive function blocks has 16 outputs/
inputs that can be used, together with the configuration logic circuits, for control
purposes within the IED or via binary outputs. When it is used to communicate with
other IEDs, these IEDs have a corresponding Multiple transmit function block with
16 outputs to send the information received by the command block.

Two multiple transmit function blocks MT01-MT02 and 8 slow multiple transmit
function blocks MT03-MT10 are available in IED 670.
Sixteen signals can be connected and they will then be sent to the multiple command
block in the other IED. The connections are set with the LON Network Tool (LNT).
Twelve multiple command function block CM12 with fast execution time and 48
multiple command function blocks CM13-CM60 with slower execution time are
available in the IED 670s.
The multiple command function block has 16 outputs combined in one block, which
can be controlled from other IEDs.
The output signals, here OUT1 to OUT16, are then available for configuration to
built-in functions or via the configuration logic circuits to the binary outputs of the
terminal.
The command function also has a supervision function, which sets the output VALID
to 0 if the block did not receive data within set maximum time.
16.7.3 Design
16.7.3.1 General
The output signals can be of the types Off, Steady, or Pulse. The setting is done on
the MODE settings, common for the whole block, from the PCM 600 setting tool.
• 0 = Off sets all outputs to 0, independent of the values sent from the station level,
that is, the operator station or remote-control gateway.
• 1 = Steady sets the outputs to a steady signal 0 or 1, depending on the values sent
from the station level.
• 2 = Pulse gives a pulse with one execution cycle duration, if a value sent from
the station level is changed from 0 to 1. That means that the configured logic

Section 16
connected to the command function blocks may not have a cycle time longer
than the execution cycle time for the command function block.
CM01-
MultiCmd
BLOCK ERROR
NEWDATA
OUTPUT1
OUTPUT2
OUTPUT3
OUTPUT4
OUTPUT5
OUTPUT6
OUTPUT7
OUTPUT8
OUTPUT9
OUTPUT10
OUTPUT11
OUTPUT12
OUTPUT13
OUTPUT14
OUTPUT15
OUTPUT16
VALID
en06000007.vsd
Figure 309: CM function block
MT01-
MultiTransm
BLOCK ERROR
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
en06000008.vsd
Figure 310: MT function block
Table 387: Input signals for the MultiCmd (CM01-) function block
Signal Description

Section 16
Table 388: Input signals for the MultiTransm (MT01-) function block
Signal Description
INPUT1 Input 1
INPUT2 Input 2
INPUT3 Input 3
INPUT4 Input 4
INPUT5 Input 5
INPUT6 Input 6
INPUT7 Input 7
INPUT8 Input 8
INPUT9 Input 9
INPUT10 Input 10
INPUT11 Input 11
INPUT12 Input 12
INPUT13 Input 13
INPUT14 Input 14
INPUT15 Input 15
INPUT16 Input 16
Table 389: Output signals for the MultiCmd (CM01-) function block
Signal Description
ERROR MultiReceive error
NEWDATA New data is received
OUTPUT1 Output 1
OUTPUT2 Output 2
OUTPUT3 Output 3
OUTPUT4 Output 4
OUTPUT5 Output 5
OUTPUT6 Output 6
OUTPUT7 Output 7
OUTPUT8 Output 8
OUTPUT9 Output 9
OUTPUT10 Output 10
OUTPUT11 Output 11
OUTPUT12 Output 12
OUTPUT13 Output 13
OUTPUT14 Output 14

Section 16
Signal Description
OUTPUT15 Output 15
OUTPUT16 Output 16
VALID Output data is valid
Table 390: Output signals for the MultiTransm (MT01-) function block
Signal Description
ERROR MultiSend error
Table 391: General settings for the MultiCmd (CM01-) function

tMaxCycleTime 0.050 - 200.000 0.001 11.000 s Maximum cycle time
between receptions of
input data
tMinCycleTime 0.000 - 200.000 0.001 0.000 s Minimum cycle time
between receptions of
input data
Mode Steady - Steady - Mode for output
Pulsed signals
tPulseTime 0.000 - 60.000 0.001 0.200 s Pulse length for multi
command outputs
Table 392: General settings for the MultiTransm (MT01-) function

tMaxCycleTime 0.000 - 200.000 0.001 5.000 s Maximum time
interval between
transmission of output
data
tMinCycleTime 0.000 - 200.000 0.001 0.000 s Minimum time interval
between transmission
of output data

666
Section 17
Remote communication
Section 17 Remote communication
About this chapter

This chapter describes the Binary signal transfer function and associated hardware
functionality. The way the functions work, their setting parameters, function blocks,
input and output signals, and technical data are included for each function.
17.1 Binary signal transfer to remote end
Function block name: BSR--, BST-- IEC 60617 graphical symbol:

ANSI number:
BSDGGIO
17.1.1 Introduction
The remote end data communication is used either for the transmission of current
values together with maximum 8 binary signals in the line differential protection in
RED670, or for transmission of only binary signals, up to 192 signals, in the other
600 series IEDs. The binary signals are freely configurable and can thus be used for
any purpose e.g. communication scheme related signals, transfer trip and/or other
binary signals between IEDs.
Communication between two IEDs requires that each IED is equipped with an
LDCMs (Line Data Communication Module). The LDCMs are then interfaces to a
64 kbit/s communication channel for duplex communication between the IEDs.
Each IED can be equipped with up to four LDCMs, thus enabling communication
with four remote IEDs.

The communication is made on standard ITU (CCITT) PCM digital 64 kbit/s
channels. It is a two-way communication where telegrams are sent every 5 ms (same
in 50 Hz and 60 Hz), exchanging information between two IEDs. The format used is
C37.94 and one telegram consists of start and stop flags, address, data to be
transmitted, Cyclic Redundancy Check (CRC) and Yellow bit (which is associated
with C37.94).

Section 17
Start Stop
Information CRC
flag flag
8 bits n x 16 bits 16 bits 8 bits

en01000134.vsd
Figure 311: Data message structure
The start and stop flags are the 0111 1110 sequence (7E hexadecimal), defined in the
HDLC standard. The CRC is designed according to the standard CRC16 definition.
The optional address field in the HDLC frame is not used instead a separate addressing
is included in the data field.
The address field is used for checking that the received message originates from the
correct equipment. There is always a risk that multiplexers occasionally mixe the
messages up. Each terminal in the system is given a number. The terminal is then
programmed to accept messages from a specific terminal number. If the CRC function
detects a faulty message, the message is thrown away and not used in the evaluation.
When the communication is used for line differential purpose, the transmitted data
consists of three currents, clock information, trip-, block- and alarm-signals and eight
binary signals which can be used for any purpose. The three currents are represented
as sampled values.
When the communication is used exclusively for binary signals, the full data capacity
of the communication channel is used for the binary signal purpose which gives the
capacity of 192 signals.
The function blocks are not represented in CAP 531 configuration

tool. The signals appear only in the SMT tool when a LDCM is
included in the configuration with the function selector tool. In the
SMT tool they can be mapped to the desired virtual input (SMBI) of
the IED670 and used internally in the configuration.

Section 17
CRM1-
LDCMRecBinStat
COMFAIL
YBIT
NOCARR
NOMESS
ADDRERR
LNGTHERR
CRCERROR
TRDELERR
SYNCERR
REMCOMF
REMGPSER
SUBSTITU
LOWLEVEL
en07000043.vsd
CRM2-
LDCMRecBinStat
COMFAIL
YBIT
NOCARR
NOMESS
ADDRERR
LNGTHERR
CRCERROR
TRDELERR
SYNCERR
REMCOMF
REMGPSER
SUBSTITU
LOWLEVEL
en07000044.vsd
Figure 312: CRM function blocks
CRB1-
LDCMRecBinStat
COMFAIL
YBIT
NOCARR
NOMESS
ADDRERR
LNGT HERR
CRCERROR
REMCOMF
LOWLEVEL
en05000451.vsd
Figure 313: CRB function block
Table 393: Output signals for the LDCMRecBinStat (CRM1-) function block
Signal Description
COMFAIL Detected error in the differential communication
YBIT Detected error in remote end with incoming message
NOCARR No carrier is detected in the incoming message
NOMESS No start and stop flags identified for the incoming message
ADDRERR Incoming message from a wrong terminal

Section 17
Signal Description
LNGTHERR Wrong length of the incoming message
CRCERROR Identified error by CRC check in incoming message
TRDELERR Transmission time is longer than permitted
SYNCERR Indicates when echo synchronication is used
REMCOMF Remote terminal indicates problem with received message
REMGPSER Remote terminal indicates problem with GPS synchronization
SUBSTITU Link error, values are substituted
LOWLEVEL Low signal level on the receive link
Table 394: Output signals for the LDCMRecBinStat (CRM2-) function block
Signal Description
TRDELERR Transmission time is longer than permitted
SYNCERR Indicates when echo synchronication is used
REMGPSER Remote terminal indicates problem with GPS synchronization
SUBSTITU Link error, values are substituted
Table 395: Output signals for the LDCMRecBinStat (CRB1-) function block
Signal Description

Section 17
Table 396: Basic general settings for the LDCMRecBinStat (CRM1-) function
ChannelMode Off - On - Channel mode of
On LDCM, 0=OFF,
OutOfService 1=ON,
2=OutOfService
TerminalNo 0 1 0 - 255 - Terminal number
used for line
differential
communication
RemoteTermNo 0 1 0 - 255 - Terminal number on
remote terminal
DiffSync Echo - Echo - Diff Synchronization
GPS mode of LDCM,
0=ECHO, 1=GPS
GPSSyncErr Block - Block - Operation mode
Echo when GPS
synchroniation signal
is lost
CommSync Slave - Slave - Com Synchronization
Master mode of LDCM,
0=Slave, 1=Master
OptoPower LowPower - LowPower - Transmission power
HighPower for LDCM, 0=Low,
1=High
TransmCurr CT-GRP1 - CT-GRP1 - Summation mode for
CT-GRP2 transmitted current
CT-SUM values
CT-DIFF1
CT-DIFF2
ComFailAlrmDel 5 - 500 5 100 ms Time delay before
communication error
signal is activated
ComFailResDel 5 - 500 5 100 ms Reset delay before
communication error
signal is reset
RedChSwTime 5 - 500 5 5 ms Time delay before
switching in
redundant channel
RedChRturnTime 5 - 500 5 100 ms Time delay before
switching back from
redundant channel
AsymDelay -20.00 - 20.00 0.01 0.00 ms Asymmetric delay
when communication
use echo synch.
MaxTransmDelay 0 - 40 1 20 ms Max allowed
transmission delay
CompRange 0-10kA - 0-25kA - Compression range
0-25kA
0-50kA
0-150kA

Section 17

MaxtDiffLevel 200 - 2000 1 600 us Maximum time diff for
ECHO back-up
DeadbandtDiff 200 - 1000 1 300 us Deadband for t Diff
InvertPolX21 Off - Off - Invert polarization for
On X21 communication
Table 397: Basic general settings for the LDCMRecBinStat (CRM2-) function
On LDCM, 0=OFF,
OutOfService 1=ON,
2=OutOfService
used for line
differential
communication
remote terminal
DiffSync Echo - Echo - Diff Synchronization
GPS mode of LDCM,
0=ECHO, 1=GPS
GPSSyncErr Block - Block - Operation mode
Echo when GPS
synchroniation signal
is lost
0=Slave, 1=Master
1=High
TransmCurr CT-GRP1 - CT-GRP1 - Summation mode for
CT-GRP2 transmitted current
CT-SUM values
CT-DIFF1
CT-DIFF2
RedundantChann
el
communication error
signal is activated
communication error
signal is reset
RedChSwTime 5 - 500 5 5 ms Time delay before
switching in
redundant channel
RedChRturnTime 5 - 500 5 100 ms Time delay before
switching back from
redundant channel

Section 17

AsymDelay -20.00 - 20.00 0.01 0.00 ms Asymmetric delay
when communication
use echo synch.
MaxTransmDelay 0 - 40 1 20 ms Max allowed
transmission delay
CompRange 0-10kA - 0-25kA - Compression range
0-25kA
0-50kA
0-150kA
MaxtDiffLevel 200 - 2000 1 600 us Maximum time diff for
ECHO back-up
DeadbandtDiff 200 - 1000 1 300 us Deadband for t Diff
Table 398: Basic general settings for the LDCMRecBinStat (CRB1-) function
On LDCM, 0=OFF,
OutOfService 1=ON,
2=OutOfService
used for line
differential
communication
remote terminal
0=Slave, 1=Master
1=High
communication error
signal is activated
communication error
signal is reset

674
Section 18
Hardware
Section 18 Hardware
About this chapter

This chapter includes descriptions of the different hardware modules. It includes
diagrams from different elevations indicating the location of connection terminals
and modules.
18.1 Overview
18.1.1 Variants of case- and HMI display size
xx04000458.eps
Figure 314: 1/2 19” case with medium HMI display.

Section 18
Hardware
xx04000459.eps
Figure 315: 1/2 19” case with small HMI display.
xx05000763.eps

Section 18
Hardware
xx04000460.eps
xx04000461.eps
18.1.2 Case from the rear side

Section 18
Hardware
Table 399: Designations for 1/2 x 19” casing with 1 TRM slot
Module Rear Positions

PSM X11
BIM, BOM or X31 and X32 etc. to X51 and
IOM X52
GSM X51
SLM X301:A, B, C, D
LDCM X302:A, B
LDCM X303:A, B
OEM X311:A, B, C, D
LDCM X312:A, B
LDCM X313:A, B
TRM X401

PSM X11
BIM, BOM, IOM or MIM X31 and X32 etc. to
X101 and X102
GSM X101
SLM X301:A, B, C, D
LDCM X302:A, B
LDCM X303:A, B
OEM X311:A, B, C, D
LDCM X312:A, B
LDCM X313:A, B
TRM X401

Section 18
Hardware
Table 401: Designations for 3/4 x 19” casing with 2TRM slot

PSM X11
BIM, BOM, IOM or MIM X31 and X32 etc. to X71
and X72
GSM X71
SLM X301:A, B, C, D
LDCM X302:A, B
LDCM X303:A, B
OEM X311:A, B, C, D
LDCM X312:A, B
LDCM X313:A, B
TRM X401, 411

PSM X11
BIM, BOM or X31 and X32 etc. to
IOM X161 and X162
MIM X31, X41, etc. or
X161
GSM X161
SLM X301:A, B, C, D
LDCM X302:A, B
LDCM X303:A, B
OEM X311:A, B, C, D
LDCM X312:A, B
LDCM X313:A, B
TRM X401

Section 18
Hardware
Table 403: Designations for 1/1 x 19” casing with 2 TRM slots

PSM X11
BIM, BOM or X31 and X32 etc. to
IOM X131 and X132
MIM X31, X41, etc. or
X131
GSM X131
SLM X301:A, B, C, D
LDCM X302:A, B
LDCM X303:A, B
OEM X311:A, B, C, D
LDCM X312:A, B
LDCM X313:A, B
TRM 1 X401
TRM 2 X411
18.2 Hardware modules
18.2.1 Overview
Table 404: Basic modules, always included
Module Description
Combined backplane module (CBM) A backplane PCB that carries all internal signals
between modules in an IED. Only the TRM is not
connected directly to this board.
Universal backplane module (UBM) A backplane PCB that forms part of the IED
backplane with connectors for TRM, ADM etc.
Power supply module (PSM) Including a regulated DC/DC converter that
supplies auxiliary voltage to all static circuits.
• An internal fail alarm output is available.
Numerical module (NUM) Module for overall application control. All

information is processed or passed through this
module, such as configuration, settings and
communication.
Local Human machine interface (LHMI) The module consists of LED:s, an LCD, a push
button keyboard and an ethernet connector used to
connect a PC to the IED.
Transformer input module (TRM) Transformer module that galvanically separates the
internal circuits from the VT and CT circuits. It has
12 analog inputs.
Analog digital conversion module (ADM) Slot mounted PCB with A/D conversion.

Section 18
Hardware
Table 405: Application specific modules

Module Description
Binary input module (BIM) Module with 16 optically isolated binary inputs
Binary output module (BOM) Module with 24 single outputs or 12 double-pole
command outputs including supervision function
Binary I/O module (IOM) Module with 8 optically isolated binary inputs, 10
outputs and 2 fast signalling outputs.
Line data communication modules (LDCM), short Modules used for digital communication to remote
range, medium range, longrange, X21 terminal.
Serial SPA/LON/IEC 60870-5-103 Used for SPA/LON/IEC 60870–5–103
communication modules (SLM) communication
Optical ethernet module (OEM) PMC board for IEC 61850 based communication.
mA input module (MIM) Analog input module with 6 independent,
galvanically separated channels.
GPS time synchronization module (GSM) Used to provide the IED with GPS time
synchronization.
18.2.2 Combined backplane module (CBM)
The combined backplane module (CBM) carries signals between modules in an IED.
18.2.2.2 Functionality
The Compact PCI makes 3.3V or 5V signaling in the backplane possible. The CBM
backplane and connected modules are 5V PCI-compatible.
Some pins on the Compact PCI connector are connected to the CAN bus, to be able
to communicate with CAN based modules.
If a modules self test discovers an error it informs other modules using the Internal
Fail signal IRF.
18.2.2.3 Design
There are two basic versions of the CBM:
• with 3 Compact PCI connectors and a number of euro connectors depending on

the IED case size. One Compact PCI connector is used by NUM and two are

Section 18
Hardware
used by other PCI modules, for example two ADMs in IEDs with two TRMs.
See figure 321
• with 2 Compact PCI connectors and a number of euro connectors depending on
the IED case size. One Compact PCI connector is used by NUM and one is used
by for example an ADM in IEDs with one TRM. See figure 320
Each PCI connector consists of 2 compact PCI receptacles. The euro connectors are
connected to the CAN bus and used for I/O modules and power supply.
1 2
en05000516.vsd
Figure 320: CBM for 1 TRM.

Pos Description
1 CAN slots
2 CPCI slots
1 2
en05000755.vsd
Figure 321: CBM for 2 TRM.

Pos Description
1 CAN slots

Section 18
Hardware
2 CPCI slots
en05000756.vsd
Figure 322: CBM position, rear view.

Pos Description
1 CBM
18.2.3 Universal backplane module (UBM)
The Universal Backplane Module (UBM) is part of the IED backplane and is mounted
above the CBM. It connects the Transformer input module (TRM) to the Analog
digital conversion module (ADM) and the Numerical module (NUM).
The Universal Backplane Module connects the CT and VT analogue signals from the
transformer input module to the analogue digital converter module. The Numerical
processing module (NUM) is also connected to the UBM. The ethernet contact on
the front panel as well as the internal ethernet and D-sub contacts are connected to
the UBM which provides the signal path to the NUM board.
18.2.3.3 Design
It connects the Transformer input module (TRM) to the Analog digital conversion
module (ADM) and the Numerical module (NUM).

Section 18
Hardware
The UBM exists in 2 versions.
• for IEDs with two TRM and two ADM. It has four 48 pin euro connectors and
one 96 pin euro connector, see figure 324
• for IEDs with one TRM and one ADM. It has two 48 pin euro connectors and
one 96 pin euro connector, see figure 325.
The 96 pin euro connector is used to connect the NUM board to the backplane. The
48 pin connectors are used to connect the TRM and ADM.
TRM ADM
NUM
AD Data
X1 X2
X3 X4
RS485
X10 X10
Front Ethernet
LHMI connection
port
Ethernet X5
en05000489.vsd
Figure 323: UBM block diagram.
en05000757.vsd
Figure 324: UBM for 1 TRM.

Section 18
Hardware
en05000758.vsd
Figure 325: UBM for 2 TRM.
en05000759.vsd
Figure 326: UBM position, rear view.

Pos Description
1 UBM
18.2.4 Power supply module (PSM)
The power supply module is used to provide the correct internal voltages and full
isolation between the terminal and the battery system. An internal fail alarm output
is available.

Section 18
Hardware
18.2.4.2 Design
There are two types of the power supply module. They are designed for different DC
input voltage ranges see table 406. The power supply module contains a built-in, self-
regulated DC/DC converter that provides full isolation between the terminal and the
external battery system.
Block diagram
Input connector
Power
Filter supply
Backplane connector
Supervision
99000516.vsd
Figure 327: PSM Block diagram.
Table 406: PSM - Power supply module

Quantity Rated value Nominal range
Auxiliary dc voltage, EL (input) EL = (24 - 60) V EL ± 20%
EL = (90 - 250) V EL ± 20%
Power consumption 50 W typically -
Auxiliary DC power in-rush < 5 A during 0.1 s -
18.2.5 Numeric processing module (NUM)
The Numeric processing module (NUM), is a CPU-module that handles all protection
functions and logic.

Section 18
Hardware
For communication with high speed modules, e.g. analog input modules and high
speed serial interfaces, the NUM is equipped with a Compact PCI bus. The NUM is
the compact PCI system card i.e. it controls bus mastering, clock distribution and
receives interrupts.
The NUM, Numeric processing module is a high performance, standard off-the-shelf

compact-PCI CPU module. It is 6U high and occupies one slot. Contact with the
backplane is via two compact PCI connectors and an euro connector.
The NUM has one PMC slot (32-bit IEEE P1386.1 compliant) and two PCMIP slots
onto which mezzanine cards such as OEM or LDCM can be mounted.
To reduce bus loading of the compact PCI bus in the backplane the NUM has one
internal PCI bus for internal resources and the PMC slot and external PCI accesses
through the backplane are buffered in a PCI/PCI bridge.
The application code and configuration data are stored in flash memory using a flash
file system. During power up the application code is moved to and then executed from
the DRAM. The code is stored in the flash memory because it is nonvolatile and
executed in DRAM because of the higher performance of DRAM.
The NUM is equipped with a real time clock. It uses a capacitor for power backup of
the real time clock.
No forced cooling is used on this standard module because of the low power
dissipation.

Section 18
Hardware
18.2.5.3 Block diagram
Compact
Flash Logic
PMC
connector
PC-MIP
connector
UBM
Memory Ethernet
North
bridge
Backplane
PCI-PCI-
connector
bridge
CPU
en04000473.vsd
Figure 328: Numeric processing module block diagram
18.2.6 Local human-machine interface (LHMI)

Refer to Chapter "Local human-machine interface" for information.
18.2.7 Transformer input module (TRM)
The transformer input module is used to galvanically separate and transform the
secondary currents and voltages generated by the measuring transformers. The
module has twelve inputs in different combinations.

Section 18
Hardware
18.2.7.2 Design
The transformer module has 12 input transformers. There are several versions of the
module, each with a different combination of voltage and current input transformers.
Basic versions:
• 6 current channels and 6 voltage channels

• 9 current channels and 3 voltage channels
• 12 current channels
• 6 current channels
The rated values of the current inputs are selected at order.
The TRM is connected to the ADM and NUM via the UBM.
Configuration of the input and output signals, please refer to section "Signal matrix
for analog inputs (SMAI)".
Table 407: TRM - Energizing quantities, rated values and limits

Current Ir = 1 or 5 A (0.2-40) × Ir
Operative range (0-100) x Ir
Permissive overload 4 × Ir cont.

100 × Ir for 1 s *)
Burden < 150 mVA at Ir = 5 A

< 20 mVA at Ir = 1 A
Ac voltage Ur = 110 V 0.5–288 V
Operative range (0–340) V

Permissive overload 420 V cont.
450 V 10 s
Burden < 20 mVA at 110 V
Frequency fr = 50/60 Hz ± 5%
*) max. 350 A for 1 s when COMBITEST test switch is included.
18.2.8 Analog digital conversion module, with time synchronization

(ADM)
The Analog/Digital module has twelve analogue inputs, 2 PCMIP slots and 1 PMC
slot. The PCMIP slot is used for the LDCM card and the PMC slot for the SLM and

Section 18
Hardware
OEM modules. The OEM card should always be mounted on the NUM board if only
one card is needed. In cases where two cards are needed then the PCM slot on the
ADM may be used for the second OEM. The UBM connects the ADM to the
transformer input module (TRM).
18.2.8.2 Design
The Analog digital conversion module input signals are voltage and current from the
transformer module. Shunts are used to adapt the current signals to the electronic
voltage level. To gain dynamic range for the current inputs, two shunts with separate
A\D channels are used for each input current. In this way a 20 bit dynamic range is
obtained with a 16 bit A\D converter.
Input signals are sampled with a sampling freqency of 5 kHz at 50 Hz system

frequency and 6 kHz at 60 Hz system frequency.
The A\D converted signals go through a filter with a cut off frequency of 500 Hz and
are reported to the numerical module (NUM) with 1 kHz at 50 Hz system frequency
and 1,2 kHz at 60 Hz system frequency.

Section 18
Hardware
Channel 1
AD1 Channel 2
Channel 3
Channel 4
AD2
Channel 5
1.2v Channel 6
AD3 Channel 7
Channel 8
Channel 9
AD4 Channel 10
Channel 11
Channel 12
PMC
level shift
PC-MIP
2.5v
PCI to PCI
PC-MIP
en05000474.vsd
Figure 329: The ADM layout

Section 18
Hardware
18.2.9 Binary input module (BIM)
The binary input module has 16 optically isolated inputs and is available in two
versions, one standard and one with enhanced pulse counting capabilities on the inputs
to be used with the pulse counter function. The binary inputs are freely programmable
and can be used for the input of logical signals to any of the functions. They can also
be included in the disturbance recording and event-recording functions. This enables
extensive monitoring and evaluation of operation of the IED and for all associated
electrical circuits.
18.2.9.2 Design
The Binary input module contains 16 optical isolated binary inputs. The voltage level
of the binary input is selected at order.
For configuration of the input signals, please refer to section "Signal matrix for binary
inputs (SMBI)".
A signal discriminator detects and blocks oscillating signals. When blocked, a

hysteresis function may be set to release the input at a chosen frequency, making it
possible to use the input for pulse counting. The blocking frequency may also be set.
Figure 330 shows the operating characteristics of the binary inputs of the four voltage
levels.
The standard version of binary inputs gives an improved capability to withstand

disturbances and should generally be used when pulse counting is not required.

Section 18
Hardware
[V]
300
176
144
88
72
38
32
19
18
24/30V 48/60V 110/125V 220/250V

RL24 RL48 RL110 RL220
xx99000517.vsd
Figure 330: Voltage dependence for the binary inputs
Guaranteed operation
Operation uncertain
No operation
This binary input module communicates with the Numerical module (NUM) via the
CAN-bus on the backplane.
The design of all binary inputs enables the burn off of the oxide of the relay contact
connected to the input, despite the low, steady-state power consumption, which is
shown in figure 331 and 332.

Section 18
Hardware
[mA]
30
1
35 70 [ms]
en03000108.vsd
Figure 331: Approximate binary input inrush current for the standard version of
BIM.
[mA]
30
1
3.5 7.0 [ms]
en05000455.vsd
Figure 332: Approximate binary input inrush current for the BIM version with
enhanced pulse counting capabilities.

Section 18
Hardware
Opto isolated input
Opto isolated input
Process connector
Opto isolated input
Opto isolated input
Opto isolated input
Opto isolated input
Opto isolated input

Micro-
Opto isolated input controller
Opto isolated input
Opto isolated input

Memory
Opto isolated input
Backplane connector
Process connector
Opto isolated input
Opto isolated input
CAN
Opto isolated input
Opto isolated input
Opto isolated input
99000503.vsd
Figure 333: Block diagram of the Binary input module.
Table 408: BIM - Binary input module

Binary inputs 16 -
DC voltage, RL RL24 (24/40) V RL ± 20%
RL48 (48/60) V RL ± 20%
RL110 (110/125) V RL ± 20%
RL220 (220/250) V RL ± 20%
Power consumption
RL24 = (24/40) V max. 0.05 W/input -
RL48 = (48/60) V max. 0.1 W/input
RL110 = (110/125) V max. 0.2 W/input
RL220 = (220/250) V max. 0.4 W/input
Counter input frequency 10 pulses/s max -
Oscillating signal discriminator Blocking settable 1–40 Hz
Release settable 1–30 Hz

Section 18
Hardware
Table 409: BIM - Binary input module with enhanced pulse counting capabilities
Binary inputs 16 -
DC voltage, RL RL24 (24/40) V RL ± 20%
RL48 (48/60) V RL ± 20%
RL110 (110/125) V RL ± 20%
RL220 (220/250) V RL ± 20%
Power consumption
RL24 = (24/40) V max. 0.05 W/input -
RL48 = (48/60) V max. 0.1 W/input
RL110 = (110/125) V max. 0.2 W/input
RL220 = (220/250) V max. 0.4 W/input
Counter input frequency 10 pulses/s max -
Balanced counter input frequency 40 pulses/s max -
Oscillating signal discriminator Blocking settable 1–40 Hz
Release settable 1–30 Hz
18.2.10 Binary output modules (BOM)
The binary output module has 24 independent output relays and is used for trip output
or any signalling purpose.
18.2.10.2 Design
The binary output module (BOM) has 24 software supervised output relays. Each
pair of relays have a common power source input to the contacts, see figure 334. This
should be considered when connecting the wiring to the connection terminal on the
back of the IED.
The high closing and carrying current capability allows connection directly to breaker
trip and closing coils. If breaking capability is required to manage fail of the breaker
auxiliary contacts normally breaking the trip coil current, a parallel reinforcement is
required.
For configuration of the output signals, please refer to section "Signal matrix for
binary outputs (SMBO)".

Section 18
Hardware
Output module
xx00000299.vsd
Figure 334: Relay pair example
1 Output connection from relay 1

2 Output signal power source connection
3 Output connection from relay 2

Section 18
Hardware
Relay
Relay
Relay
Relay
Relay
Process connector
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Backplane connector
Process connector
Relay Micro-
controller
Relay
Relay
CAN
Relay
Relay Memory
Relay
Relay
99000505.vsd
Figure 335: Block diagram of the Binary Output Module
Table 410: BOM - Binary output module contact data (reference standard: IEC 61810-2)
Function or quantity Trip and Signal relays
Binary outputs 24
Max system voltage 250 V AC, DC
Test voltage across open contact, 1 min 1000 V rms
Current carrying capacity
Continuous 8A
1s 10 A

Section 18
Hardware
Function or quantity Trip and Signal relays

Making capacity at inductive load with L/R>10 ms
0.2 s 30 A
1.0 s 10 A
Breaking capacity for AC, cos j>0.4 250 V/8.0 A
Breaking capacity for DC with L/R < 40 ms 48 V/1 A
110 V/0.4 A
220 V/0.2 A
250 V/0.15 A
18.2.11 Binary input/output module (IOM)
The binary input/output module is used when only a few input and output channels
are needed. The ten standard output channels are used for trip output or any signalling
purpose. The two high speed signal output channels are used for applications where
short operating time is essential. Eight optically isolated binary inputs cater for
required binary input information.
18.2.11.2 Design
Inputs are designed to allow oxide burn-off from connected contacts, and increase
the disturbance immunity during normal protection operate times. This is achieved
with a high peak inrush current while having a low steady-state current, see figure
331. Inputs are debounced by software.
Well defined input high and input low voltages ensures normal operation at battery
supply earth faults, see figure 330.
The voltage level of the inputs is selected when ordering.
I/O events are time stamped locally on each module for minimum time deviance and
stored by the event recorder if present.
The binary I/O module, IOM, has eight optically isolated inputs and ten output relays.
One of the outputs has a change-over contact. The nine remaining output contacts are
connected in two groups. One group has five contacts with a common and the other
group has four contacts with a common, to be used as single-output channels, see
figure 336.
The binary I/O module also has two high speed output channels where a reed relay
is connected in parallel to the standard output relay.
For configuration of the input and output signals, please refer to sections "Signal
matrix for binary inputs (SMBI)" and "Signal matrix for binary outputs (SMBO)".

Section 18
Hardware
The making capacity of the reed relays are limited.
Figure 336: Binary in/out module (IOM), input contacts named XA corresponds
to rear position X31, X41, etc. and output contacts named XB to rear
position X32, X42, etc.

Section 18
Hardware
Table 411: IOM - Binary input/output module

Binary inputs 8 -
DC voltage, RL RL24 = (24/40) V RL ± 20%
RL48 = (48/60) V RL ± 20%
RL110 = (110/125) V RL ± 20%
RL220 = (220/250) V RL ± 20%
Power consumption -
RL24 = (24/40) V max. 0.05 W/input
RL48 = (48/60) V max. 0.1 W/input
RL110 = (110/125) V max. 0.2 W/input
RL220 = (220/250) V max. 0.4 W/input
Table 412: IOM - Binary input/output module contact data (reference standard: IEC 61810-2)
Function or quantity Trip and signal relays Fast signal relays (parallel reed
relay)
Binary outputs 10 2
Max system voltage 250 V AC, DC 250 V AC, DC
Test voltage across open contact, 1000 V rms 800 V DC
1 min
Current carrying capacity
Continuous 8A 8A
1s 10 A 10 A
Making capacity at inductive load
with L/R>10 ms
0.2 s 30 A 0.4 A
1.0 s 10 A 0.4 A
Breaking capacity for AC, cos φ > 250 V/8.0 A 250 V/8.0 A
0.4
Breaking capacity for DC with L/R 48 V/1 A 48 V/1 A
< 40 ms 110 V/0.4 A 110 V/0.4 A
220 V/0.2 A 220 V/0.2 A
250 V/0.15 A 250 V/0.15 A
Maximum capacitive load - 10 nF
18.2.12 Line data communication module (LDCM)
The line data communication module (LDCM) is used for communication between
the IEDs or from the IED to optical to electrical converter with G.703 interface located
on a distances <3 km away. The LDCM module sends and receives data, to and from
another LDCM module. The IEEE/ANSI C37.94 standard format is used.
The line data communication module is used for binary signal transfer. Each module
has one optical port, one for each remote end to which the IED communicates.

Section 18
Hardware
Alternative cards for Long range (1550 nm single mode), Medium range (1310 nm
single mode) and Short range (900 nm multi mode) are available.
Class 1 laser product. Take adequate measures to protect the eyes.

Never look into the laser beam.
18.2.12.2 Design
The LDCM is a PCMIP type II single width format module. The LDCM can be
mounted on:
• the ADM
• the NUM
ID
ST
16.000
IO-connector
MHz
32,768
MHz
ST
en05000473.vsd
Figure 337: The SR-LDCM layout. PCMIP type II single width format with two PCI
connectors and one I/O ST type connector
X1
C
ADN 2.5V
ID
2841
PCI9054
FPGA TQ176
DS DS
256 FBGA
3904 3904
MAX
3645
3
2
en06000393.vsd
Figure 338: The MR-LDCM and LR-LDCM layout. PCMIP type II single width
format with two PCI connectors and one I/O FC/PC type connector

Section 18
Hardware
Table 413: Line data communication modules (LDCM)

Characteristic Range or value
Type of LDCM Short range (SR) Medium range (MR) Long range (LR)
Type of fibre Graded-index Singlemode 8/125 Singlemode 8/125 mm
multimode mm
62.5/125 mm or
50/125 mm
Wave length 820 nm 1310 nm 1550 nm
Optical budget 20 dB (typical 26 dB (typical distance 75
Graded-index multimode 11 dB (typical distance 50 mile/ mile/120 km *)
62.5/125 mm, distance about 2 80 km *)
mile/3 km *)
7 dB (typical
Graded-index multimode distance about 1
50/125 mm mile/2 km *)
Optical connector Type ST Type FC/PC Type FC/PC

Protocol C37.94 C37.94 C37.94 implementation **)
implementation **)
Data transmission Synchronous Synchronous Synchronous
Transmission rate 64 kbit/s 64 kbit/s 64 kbit/s
Clock source Internal or derived Internal or derived Internal or derived from
from received from received received signal
signal signal
*) depending on optical budget calculation
**) C37.94 originally defined just for multimode; using same header, configuration and data format as
C37.94
18.2.13 Serial SPA/IEC 60870-5-103 and LON communication

module (SLM)
LON communication. The module has two communication ports, one for serial
communication and one dedicated for LON communication.
18.2.13.2 Design
The SLM is a PMC card and it is factory mounted as a mezzanine card on the NUM
module. Three variants of the SLM is available with different combinations of optical
fibre connectors, see figure 339. The plastic fibre connectors are of snap-in type and
the glass fibre connectors are of ST type.

Section 18
Hardware
Figure 339: The SLM variants
A Snap in connector for plastic fibre

B ST connector for glass fibre
1 LON port
2 SPA/IEC 60870-5-103 port
Figure 340: The SLM layout overview
1 Receiver, LON
2 Transmitter, LON
3 Receiver, SPA/IEC 60870-5-103
4 Transmitter, SPA/IEC 60870-5-103

Section 18
Hardware
Table 414: SLM – LON port

Quantity Range or value
Optical connector Glass fibre: type ST
Plastic fibre: type HFBR snap-in
Fibre, optical budget Glass fibre: 11 dB (1000 m typically *)
Plastic fibre: 7 dB (10 m typically *)
Fibre diameter Glass fibre: 62.5/125 mm
Plastic fibre: 1 mm
Table 415: SLM – SPA/IEC 60870-5-103 port

Quantity Range or value
Optical connector Glass fibre: type ST
Plastic fibre: type HFBR snap-in
Fibre, optical budget Glass fibre: 11 dB (1000 m typically *)
Plastic fibre: 7 dB (25 m typically *)
Fibre diameter Glass fibre: 62.5/125 mm
Plastic fibre: 1 mm
18.2.14 Optical ethernet module (OEM)
The optical fast-ethernet module is used to connect an IED to the communication

buses (like the station bus) that use the IEC 61850-8-1 protocol. The module has one
or two optical ports with ST connectors.
The Optical Ethernet module (OEM) is used when communication systems according
to IEC61850–8–1 have been implemented. Refer to section "Line data
communication module (LDCM)" for further information.
18.2.14.3 Design
The Optical Ethernet module (OEM) is a PCM card and mounted as a mezzanine card
on the NUM. If a second OEM is needed it is mounted on the NUM. The OEM is a
100base Fx module and available as a single channel or double channel unit.

Section 18
Hardware
PCI - bus Connector

100Base-FX
EEPROM
Transmitter ST fiber optic
Ethernet Controller connectors
100Base-FX
Receiver
PCI - PCI Bridge
100Base-FX
Transmitter
ID chip ST fiber optic
Ethernet Controller
connectors
100Base-FX
EEPROM
IO - bus Connector Receiver
en04000472.vsd
Figure 341: OEM block diagram.
ID chip
Receiver
IO bus
LED
Ethernet cont.
25MHz oscillator
Transmitter
Receiver
LED
PCI bus
Ethernet cont. PCI to PCI
bridge
25MHz oscillator
Transmitter
en05000472.vsd
Figure 342: OEM layout, standard PCM format
Quantity Rated value

Number of channels 1 or 2
Standard IEEE 802.3u 100BASE-FX
Type of fibre 62.5/125 mm multimode fibre
Wave length 1300 nm
Optical connector Type ST
Communication speed Fast Ethernet 100 MB

Section 18
Hardware
18.2.15 mA input module (MIM)
The milli-ampere input module is used to interface transducer signals in the –20 to
+20 mA range from for example OLTC position, temperature or pressure
transducers.The module has six independent, galvanically separated channels.
18.2.15.2 Design
The Milliampere Input Module has six independent analog channels with separated
protection, filtering, reference, A/D-conversion and optical isolation for each input
making them galvanically isolated from each other and from the rest of the module.
For configuration of the input signals, please refer to section "Signal matrix for mA
inputs (SMMI)".
The analog inputs measure DC and low frequency currents in the range of +/- 20mA.
The A/D converter has a digital filter with selectable filter frequency. All inputs are
calibrated separately The filter parameters and the calibration factors are stored in a
non-volatile memory on the module.
The calibration circuitry monitors the module temperature and starts an automatical
calibration procedure if the temperature drift is outside the allowed range. The module
communicates, like the other I/O-modules on the serial CAN-bus.

Section 18
Hardware
A/D Converter Opto-

Protection isolation
& filter
Volt-ref DC/DC
Process connector
A/D Converter Opto-
& filter
Volt-ref DC/DC
A/D Converter Opto-

& filter
Volt-ref DC/DC
A/D Converter Opto-

& filter
Volt-ref DC/DC
A/D Converter Opto-

& filter
Volt-ref DC/DC
Backplane connector
A/D Converter Opto-
& filter
Volt-ref DC/DC
CAN
Memory Micro-
controller
99000504.vsd
Figure 343: mA input module block diagram
Table 416: MIM - mA input module

Quantity: Rated value: Nominal range:
Input range ± 5, ± 10, ± 20mA -
0-5, 0-10, 0-20, 4-20mA
Input resistance Rin = 194 Ohm -
Power consumption -
each mA-board £4W
each mA input £ 0.1 W

Section 18
Hardware
18.2.16 GPS time synchronization module (GSM)
This module includes the GPS receiver used for time synchronization. The GPS has
one SMA contact for connection to an antenna.
18.2.16.2 Design
The GPS time synchronization module is 6U high and occupies one slot. The slot
closest to the NUM shall always be used.
The GSM consists of
• CAN carrier module (CCM)

• GPS clock module (GCM)
• GPS receiver unit
The CCM is a carrier board for the GCM mezzanine PCM card and GPS unit, see
figure 345. There is a cable between the external antenna input on the back of the
GCM and the GPS-receiver. This is a galvanic connection vulnerable to electro-
magnetic interference. The connector is shielded and directly attached to a grounded
plate to reduce the risk. The second cable is a flat cable that connects the GPS and
the GCM. It is used for communication between the GCM and the GPS-receiver. All
communication between the GCM and the NUM is via the CAN-bus.
The CMPPS signal is sent from the GCM to the rest of the time system to provide
1µs accuracy at sampling level.
PMC
GPS GPS clock
GPS antenna
receiver module
CMPPS
Backplane CAN
CAN
connector
controller CAN
en05000675.vsd
Figure 344: GSM block diagram

Section 18
Hardware
xx05000471.vsd
Figure 345: A CCM with the GCM and GPS mounted with cables
1 GPS receiver
2 GPS Clock module (GCM)
3 CAN carrier module (CCM)
4 Antenna connector
Table 417: GPS time synchronization module (GSM)

Receiver – ±1µs relative UTC
Time to reliable time reference with antenna in new <30 minutes –
position or after power loss longer than 1 month
Time to reliable time reference after a power loss longer <15 minutes –
than 48 hours
Time to reliable time reference after a power loss shorter <5 minutes –
than 48 hours

Section 18
Hardware
18.2.17 GPS antenna
In order to receive GPS signals from the satellites orbiting the earth a GPS antenna
with applicable cable must be used.
18.2.17.2 Design
The antenna with a console for mounting on a horizontal or vertical flat surface or on
an antenna mast. See figure 346
1 6
4 7
xx04000155.vsd
Figure 346: Antenna with console
where:
1 GPS antenna
2 TNC connector
3 Console, 78x150 mm
4 Mounting holes 5.5 mm
5 Tab for securing of antenna cable
6 Vertical mounting position
7 Horizontal mounting position
Always position the antenna and its console so that a continuous clear line-of-sight
visibility to all directions is obtained, preferably more than 75%. A minimum of 50%
clear line-of-sight visibility is required for un-interrupted operation.

Section 18
Hardware
99001046.vsd
Figure 347: Antenna line-of-sight
Antenna cable
Use a 50 ohm coaxial cable with a male TNC connector in the antenna end and a male
SMA connector in the receiver end to connect the antenna to GSM. Choose cable
type and length so that the total attenuation is max. 26 dB at 1.6 GHz.
Make sure that the antenna cable is not charged when connected to
the antenna or to the receiver. Short-circuit the end of the antenna
cable with some metal device, when first connected to the antenna.
When the antenna is connected to the cable, connect the cable to the
receiver. REx670 must be switched off when the antenna cable is
connected.
Table 418: GPS – Antenna and cable

Function Value
Max antenna cable attenuation 26 db @ 1.6 GHz
Antenna cable impedance 50 ohm
Lightning protection Must be provided externally
Antenna cable connector SMA in receiver end
TNC in antenna end

Section 18
Hardware
18.3 Case dimensions
18.3.1 Case without rear cover
E
K
D
A F
B C
G J
xx04000448.vsd H
Figure 348: Case without rear cover xx04000464.vsd
Figure 349: Case without rear cover

with 19” rack mounting
kit
Case size A B C D E F G H J K
6U, 1/2 x 19” 265.9 223.7 201.1 252.9 205.7 190.5 203.7 - 187.6 -
6U, 3/4 x 19” 265.9 336.0 201.1 252.9 318.0 190.5 316.0 - 187.6 -
6U, 1/1 x 19” 265.9 448.3 201.1 252.9 430.3 190.5 428.3 465.1 187.6 482.6
(mm)
The H and K dimensions are defined by the 19” rack mounting kit
18.3.2 Case with rear cover

Section 18
Hardware
D F
J
B G
C H xx05000502.vsd
xx05000501.vsd
Figure 350: Case with rear cover.

Figure 351: Case with rear cover
and 19” rack mounting
kit.
xx05000503.vsd
Figure 352: Rear cover case with

details.
Case size A B C D E F G H J K
6U, 1/2 x 19” 265.9 223.7 242.1 255.8 205.7 190.5 203.7 - 228.6 -
6U, 3/4 x 19” 265.9 336.0 242.1 255.8 318.0 190.5 316.0 - 228.6 -
6U, 1/1 x 19” 265.9 448.3 242.1 255.8 430.3 190.5 428.3 465.1 228.6 482.6
The H and K dimensions are defined by the 19” rack mounting kit. All dimensions are in millimeters.

Section 18
Hardware
18.3.3 Flush mounting dimensions
A C
E
D
xx04000465.vsd
Figure 353: Flush mounting
Cut-out
Case size dimensions (mm)
Tolerance
A B C D
+/-1 +/-1
6U, 1/2 x 19” 210.1 254.3 4.0-10.0 12.5
6U, 3/4 x 19” 322.4 254.3 4.0-10.0 12.5
6U, 1/1 x 19” 434.7 254.3 4.0-10.0 12.5
E = 188.6 mm without rear protection cover, 229.6 mm with rear protection cover

Section 18
Hardware
18.3.4 Side-by-side flush mounting dimensions
xx06000182.vsd
Figure 354: A 1/2 x 19” size IED 670 side-by-side with RHGS6.
G
D
B
E
F
C
xx05000505.vsd
Figure 355: Panel-cut out dimensions for side-by-side flush mounting

Section 18
Hardware
Case size A B C D E F G
(mm) ±1 ±1 ±1 ±1 ±1 ±1 ±1
Tolerance
6U, 1/2 x 214.0 259.3 240.4 190.5 34.4 13.2 6.4 diam
19”
6U, 3/4 x 326.4 259.3 352.8 190.5 34.4 13.2 6.4 diam
19”
6U, 1/1 x 438.7 259.3 465.1 190.5 34.4 13.2 6.4 diam
19”
18.3.5 Wall mounting dimensions
B
E
C
D
en04000471.vsd
Figure 356: Wall mounting
Case size (mm) A B C D E

6U, 1/2 x 19” 292.0 267.1 272.8 390.0 243.0
6U, 3/4 x 19” 404.3 379.4 272.8 390.0 243.0
6U, 1/1 x 19” 516.0 491.1 272.8 390.0 243.0

Section 18
Hardware
18.3.6 External resistor unit
WARNING! - USE EXTREME CAUTION! Dangerously high

voltages might be present on this equipment, especially on the plate
with resistors. Do any maintenance ONLY if the primary object
protected with this equipment is de-energized. If required by national
low/standard enclose the plate with resistors with a protective cover
or in a separate box!
[1.48]
[6.97]
[4.02]
[0.33] [18.31] [0.79] [7.68]

[18.98]
Dimension
mm [inches] xx06000232.eps
Figure 357: Dimension drawing of a one phase impedance resistor unit

[1.50]
[10.47]
[7.50]
[0.33] [18.31] [0.79] [7.68]

[18.98]
en06000234.eps
[inches]
Figure 358: Dimension drawing of a three phase high impedance resistor unit

Section 18
Hardware
18.4 Mounting alternatives
18.4.1 Flush mounting
18.4.1.1 Overview
All IED sizes, 1/2 x 19”, 3/4 x 19” and 1/1 x 19” and RHGS6 6U 1/4 x 19”, cases,
can be flush mounted. Only a single case can be mounted in each cut-out on the cubicle
panel, for class IP54 protection.
The flush mounting kit are utilized for IEDs of sizes: 1/2 x 19”, 3/4 x 19” and 1/1 x
19” and are also suitable for mounting of RHGS6, 6U 1/4 x 19” cases.
Flush mounting cannot be used for side-by-side mounted IEDs when

IP54 class must be fulfilled. Only IP20 class can be obtained when
mounting two cases side-by-side in one (1) cut-out.
To obtain IP54 class protection, an additional factory mounted sealing

must be ordered when ordering the IED.

Section 18
Hardware
18.4.1.2 Mounting procedure for flush mounting
1
7
2
6
5
3
xx06000246.vsd
Figure 359: Flush mounting details.
PosNo Description Quantity Type

1 Sealing strip, used to - -
obtain IP54 class. The
sealing strip is factory
mounted between the
case and front plate.
2 Fastener 4 -
3 Groove - -
4 Screw, self tapping 4 2,9x9,5 mm
5 Joining point of sealing - -
strip (rear view)
6 Panel - -
7 Screw 4 M5x25
18.4.2 19” panel rack mounting
18.4.2.1 Overview
All IED sizes can be mounted in a standard 19” cubicle rack by using the for each
size suited mounting kit which consists of two mounting angles and fastening screws

Section 18
Hardware
for the angles. The mounting angles are reversible which enables mounting of IED
size 1/2 x 19” or 3/4 x 19” either to the left or right side of the cubicle.
Please note that the separately ordered rack mounting kit for side-by-
side mounted IEDs, or IEDs together with RHGS cases, is to be
selected so that the total size equals 19”.
When mounting the mounting angles, be sure to use screws that

follows the recommended dimensions. Using screws with other
dimensions than the original may damage the PCBs inside the IED.
18.4.2.2 Mounting procedure for 19” panel rack mounting
1a
1b
xx04000452.vs d
Figure 360: 19” panel rack mounting details

1a, 1b Mounting angels, which can be mounted, either to the 2 -
left or right side of the case.
2 Screw 8 M4x6

Section 18
Hardware
18.4.3 Wall mounting
18.4.3.1 Overview
All case sizes, 1/2 x 19”, 3/4 x 19” and 1/1 x 19”, can be wall mounted. It is also
possible to mount the IED on a panel or in a cubicle.
When mounting the side plates, be sure to use screws that follows the
recommended dimensions. Using screws with other dimensions than
the original may damage the PCBs inside the IED.
If fiber cables are bent too much, the signal can be weakened. Wall
mounting is therefore not recommended for communication modules
with fiber connection; Serial SPA/IEC 60870-5-103 and LON
communication module (SLM), Optical Ethernet module (OEM) and
Line data communication module (LDCM).
18.4.3.2 Mounting procedure for wall mounting
3
4
2
6
xx04000453.vs d
Figure 361: Wall mounting details.

Section 18
Hardware

1 Bushing 4 -
2 Screw 8 M4x10
3 Screw 4 M6x12 or
corresponding
4 Mounting bar 2 -
5 Screw 6 M5x8
6 Side plate 2 -
18.4.3.3 How to reach the rear side of the IED
The IED can be equipped with a rear protection cover which is recommended to use
with this type of mounting. See figure 362.
To reach the rear side of the IED, a free space of 80 mm is required on the unhinged
side.
View from above
3
1
80 mm 2
en06000135.vsd
Figure 362: How to reach the connectors on the rear side of the IED.
PosNo Description Type

1 Screw M4x10
2 Screw M5x8
3 Rear protection cover -

Section 18
Hardware
18.4.4 Side-by-side 19” rack mounting
18.4.4.1 Overview
IED case sizes, 1/2 x 19” or 3/4 x 19” and RHGS cases, can be mounted side-by-side
up to a maximum size of 19”. For side-by-side rack mounting, the side-by-side
mounting kit together with the 19” rack panel mounting kit must be used. The
mounting kit has to be ordered separately.
When mounting the plates and the angles on the IED, be sure to use
screws that follows the recommended dimensions. Using screws with
other dimensions than the original may damage the PCBs inside the
IED.
18.4.4.2 Mounting procedure for side-by-side rack mounting
2
1
xx04000456.vsd
Figure 363: Side-by-side rack mounting details.

1 Mounting plate 2 -
2, 3 Screw 16 M4x6
4 Mounting angle 2 -
18.4.4.3 IED 670 mounted with a RHGS6 case
An 1/2 x 19” or 3/4 x 19” size IED can be mounted with a RHGS (6 or 12 depending
on IED size) case. The RHGS case can be used for mounting a test switch of type
RTXP 24. It also has enough space for a terminal base of RX 2 type for mounting of,
for example, a DC-switch or two trip relays.

Section 18
Hardware
1 2
1 2 1 2
1 1 1 1
2 2 2 2
3 3 3 3
4 4 4 4
5 5 5 5
6 6 6 6
7 7 7 7
8 8 8 8
xx06000180.vsd
Figure 364: IED 670 (1/2 x 19”) mounted with a RHGS6 case containing a test
switch module equipped with only a test switch and a RX2 terminal
base.
18.4.5 Side-by-side flush mounting
18.4.5.1 Overview
It is not recommended to flush mount side by side mounted cases if IP54 is required.
If your application demands side-by-side flush mounting, the side-by-side mounting
details kit and the 19” panel rack mounting kit must be used. The mounting kit has
to be ordered separately. The maximum size of the panel cut out is 19”.
With side-by-side flush mounting installation, only IP class 20 is

obtained. To reach IP class 54, it is recommended to mount the IEDs
separately. For cut out dimensions of separately mounted IEDs, see
section "Flush mounting".
When mounting the plates and the angles on the IED, be sure to use
screws that follows the recommended dimensions. Using screws with
other dimensions than the original may damage the PCBs inside the
IED.

Section 18
Hardware
18.4.5.2 Mounting procedure for side-by-side flush mounting
1 2
xx06000181.vsd
Figure 365: Side-by-side flush mounting details (RHGS6 side-by-side with 1/2 x
19” IED).

1 Mounting plate 2 -
2, 3 Screw 16 M4x6
4 Mounting angle 2 -
18.5 Technical data
18.5.1 Enclosure
Table 419: Case
Material Steel sheet

Front plate Steel sheet profile with cut-out for HMI
Surface treatment Aluzink preplated steel
Finish Light grey (RAL 7035)

Section 18
Hardware
Table 420: Water and dust protection level according to IEC 60529
Front IP40 (IP54 with sealing strip)

Rear, sides, top and IP20
bottom
Table 421: Weight

Case size Weight
6U, 1/2 x 19” £ 10 kg
6U, 3/4 x 19” £ 15 kg
6U, 1/1 x 19” £ 18 kg
18.5.2 Connection system
Table 422: CT and VT circuit connectors

Connector type Rated voltage and current Maximum conductor area
Terminal blocks of feed through 250 V AC, 20 A 4 mm2
type
Table 423: Binary I/O connection system

Connector type Rated voltage Maximum conductor area
Screw compression type 250 V AC 2.5 mm2
2 × 1 mm2
18.5.3 Influencing factors
Table 424: Temperature and humidity influence

Parameter Reference value Nominal range Influence
Ambient temperature, +20 °C -10 °C to +55 °C 0.02% /°C
operate value
Relative humidity 10%-90% 10%-90% -
Operative range 0%-95%
Storage temperature -40 °C to +70 °C - -

Section 18
Hardware
Table 425: Auxiliary DC supply voltage influence on functionality during operation

Dependence on Reference value Within nominal range Influence
Ripple, in DC auxiliary voltage max. 2% 12% of EL 0.01% /%
Operative range Full wave rectified
Auxiliary voltage dependence, operate ± 20% of EL 0.01% /%
value
Interrupted auxiliary DC voltage 24-60 V DC ± 20%
90-250 V DC ± 20%
Interruption interval
0–50 ms No restart
0–∞ s Correct
function
Restart time <140 s
Table 426: Frequency influence (reference standard: IEC 60255–6)

Dependence on Within nominal range Influence
Frequency dependence, operate fr ± 2.5 Hz for 50 Hz ± 1.0% / Hz
value fr ± 3.0 Hz for 60 Hz
Harmonic frequency dependence 2nd, 3rd and 5th harmonic of fr ± 1.0%

(20% content)
Harmonic frequency dependence 2nd, 3rd and 5th harmonic of fr ± 6.0%
for distance protection (10%
content)
18.5.4 Type tests according to standard
Table 427: Electromagnetic compatibility

Test Type test values Reference standards
1 MHz burst disturbance 2.5 kV IEC 60255-22-1, Class III
100 kHz disturbance 2.5 kV IEC 61000-4-12, Class III
Electrostatic discharge 15 kV air discharge IEC 60255-22-2, Class IV
Direct applicaton 8 kV contact discharge
Indirect application 8 kV contact discharge IEC 61000-4-2, Class IV
Fast transient disturbance 4 kV IEC 60255-22-4, Class A
Surge immunity test 1-2 kV, 1.2/50 ms IEC 60255-22-5
high energy
Power frequency immunity test 150-300 V, IEC 60255-22-7, Class A
50 Hz
Power frequency magnetic field test 1000 A/m, 3 s IEC 61000-4-8, Class V
Radiated electromagnetic field 20 V/m, 80-1000 MHz IEC 60255-22-3
disturbance
Radiated electromagnetic field 20 V/m, 80-2500 MHz EN 61000-4-3
disturbance
Radiated electromagnetic field 35 V/m IEEE/ANSI C37.90.2
disturbance 26-1000 MHz

Section 18
Hardware

Conducted electromagnetic field 10 V, 0.15-80 MHz IEC 60255-22-6
disturbance
Radiated emission 30-1000 MHz IEC 60255-25
Conducted emission 0.15-30 MHz IEC 60255-25
Table 428: Insulation

Test Type test values Reference standard
Dielectric test 2.0 kV AC, 1 min. IEC 60255-5
Impulse voltage test 5 kV, 1.2/50 ms, 0.5 J
Insulation resistance >100 MW at 500 VDC
Table 429: Environmental tests

Test Type test value Reference standard
Cold test Test Ad for 16 h at -25°C IEC 60068-2-1
Storage test Test Ad for 16 h at -40°C IEC 60068-2-1
Dry heat test Test Bd for 16 h at +70°C IEC 60068-2-2
Damp heat test, steady state Test Ca for 4 days at +40 °C and IEC 60068-2-3
humidity 93%
Damp heat test, cyclic Test Db for 6 cycles at +25 to +55 °C IEC 60068-2-30
and humidity 93 to 95% (1 cycle = 24
hours)
Table 430: CE compliance

Test According to
Immunity EN 61000-6-2
Emissivity EN 61000-6-4
Low voltage directive EN 50178
Table 431: Mechanical tests

Vibration Class I IEC 60255-21-1
Shock and bump Class I IEC 60255-21-2
Seismic Class I IEC 60255-21-3

730
Section 19
Labels
Section 19 Labels
About this chapter

This chapter includes descriptions of the different labels and where to find them on
the IED.
19.1 Different labels
2
3
6
6 5
7
xx06000574.eps

Section 19
Labels
1 Product type, description and serial number

2 Order number, dc supply voltage and rated
frequency
3 Optional, customer specific information
4 Manufacturer
5 Transformer input module, rated currents
and voltages
6 Transformer designations
7 Ordering and serial number

Section 19
Labels
4
en06000573.eps
1 Warning label
2 Caution label
3 Class 1 laser product label
4 Warning label

734
Section 20
Connection diagrams
Section 20 Connection diagrams
This chapter includes diagrams of the IED with all slot, terminal block and optical
connector designations. It is a necessary guide when making electrical and optical
connections to the IED.

Section 20
Connection diagrams

Section 20
Connection diagrams

Section 20
Connection diagrams

Section 20
Connection diagrams

Section 20
Connection diagrams

Section 20
Connection diagrams

Section 20
Connection diagrams

Section 20
Connection diagrams

Section 20
Connection diagrams

Section 20
Connection diagrams

Section 20
Connection diagrams

Section 20
Connection diagrams

Section 20
Connection diagrams

Section 21
Time inverse characteristics
Section 21 Time inverse characteristics
About this chapter

This chapter describes current dependant time delay functionality. Both ANSI and
IEC Inverse time curves and tables are included.
21.1 Application
In order to assure time selectivity between different overcurrent protections in

different points in the network different time delays for the different relays are
normally used. The simplest way to do this is to use definite time delay. In more
sophisticated applications current dependent time characteristics are used. Both
alternatives are shown in a simple application with three overcurrent protections
connected in series.
I> I> I>

xx05000129.vsd
Figure 366: Three overcurrent protections connected in series
Stage 3
Time
Stage 2 Stage 2
Stage 1 Stage 1 Stage 1
Fault point
position
en05000130.vsd
Figure 367: Definite time overcurrent characteristics

Section 21
Time
Fault point
position
en05000131.vsd
Figure 368: Inverse time overcurrent characteristics with inst. function
The inverse time characteristic makes it possible to minimize the fault clearance time
and still assure the selectivity between protections.
To assure selectivity between protections there must be a time margin between the
operation time of the protections. This required time margin is dependent of following
factors, in a simple case with two protections in series:
• Difference between pick-up time of the protections to be co-ordinated

• Opening time of the breaker closest to the studied fault
• Reset time of the protection
• Margin dependent of the time-delay inaccuracy of the protections
Assume we have the following network case.
A1 B1
Feeder
I> I>
Time axis
t=0 t=t1 t=t2 t=t3
en05000132.vsd
Figure 369: Selectivity steps for a fault on feeder B1
where:
t=0 is The fault occurs
t=t1 is Protection B1 trips
t=t2 is Breaker at B1 opens

Section 21
t=t3 is Protection A1 resets
In the case protection B1 shall operate without any intentional delay (instantaneous).
When the fault occurs the protections start to detect the fault current. After the time
t1 the protection B1 send a trip signal to the circuit breaker. The protection A1 starts
its delay timer at the same time, with some deviation in time due to differences
between the two protections. There is a possibility that A1 will start before the trip is
sent to the B1 circuit breaker.
At the time t2 the circuit breaker B1 has opened its primary contacts and thus the fault
current is interrupted. The breaker time (t2 - t1) can differ between different faults.
The maximum opening time can be given from manuals and test protocols. Still at
t2 the timer of protection A1 is active.
At time t3 the protection A1 is reset, i.e. the timer is stopped.
In most applications it is required that the delay times shall reset as fast as possible
when the current fed to the protection drops below the set current level, the reset time
shall be minimized. In some applications it is however beneficial to have some type
of delayed reset time of the overcurrent function. This can be the case in the following
applications:
• If there is a risk of intermittent faults. If the current relay, close to the faults, starts
and resets there is a risk of unselective trip from other protections in the system.
• Delayed resetting could give accelerated fault clearance in case of automatic
reclosing to a permanent fault.
• Overcurrent protection functions are sometimes used as release criterion for other
protection functions. It can often be valuable to have a reset delay to assure the
release function.
21.2 Principle of operation
21.2.1 Mode of operation

The function can operate in a definite time delay mode or in a current dependent
inverse time delay mode. For the inverse time characteristic both ANSI and IEC based
standard curves are available. Also programmable curve types are supported via the
component inputs: p, A, B, C pr, tr, and cr.
Different characteristics for reset delay can also be chosen.
If current in any phase exceeds the set start current value (here internal signal
startValue), a timer, according to the selected operate mode, is started. The component

Section 21
always uses the maximum of the three phase current values as the current level used
in timing calculations.
In case of definite time the timer will run constantly until the trip time is reached or
until the current drops below the reset value (start value minus the hysteresis) and the
reset time has elapsed.
For definite time delay curve index no 5 (ANSI/IEEE Definite time) or 15 (IEC
Definite time) are chosen.
The general expression for inverse time curves is according to equation 109.
æ ö
ç A
÷
t[ s ] = ç + B÷×k
ç æ i öp ÷
çç ÷ -C ÷
è è in > ø ø (Equation 109)
where:
p, A, B, C are constants defined for each curve type,
in> is the set start current for step n,
k is set time multiplier for step n and
i is the measured current.
For inverse time characteristics a time will be initiated when the current reaches the
set start level. From the general expression of the characteristic the following can be
seen:
ææ i öp ö
(top - B × k ) × ç ç ÷ - C ÷ = A×k
where:
top is the operation time of the protection
The time elapsed to the moment of trip is reached when the integral fulfils according
to equation 111, in addition to the constant time delay:
t
ææ i öp ö
ò ç çè in > ÷ø - C ÷ × dt ³ A × k
0 è ø (Equation 111)
For the numerical protection the sum below must fulfil the equation for trip.

Section 21
n æ æ i( j ) ö p ö
Dt × å ç ç ÷ - C ÷ ³ A× k
j =1 è è in > ø ø (Equation 112)
where:
j=1 is the first protection execution cycle when a fault has been detected, i.e. when
i
>1
in >
Dt is the time interval between two consecutive executions of the protection algorithm,
n is the number of the execution of the algorithm when the trip time equation is fulfilled, i.e. when
a trip is given and
i (j) is the fault current at time j
For inverse time operation, the inverse-time characteristic is selectable. Both the IEC
and ANSI/IEEE standardized inverse-time characteristics are supported. The list of
characteristics in table 432 matches the list in the IEC 61850-7-4 spec.
Table 432: Curve name and index no.

Curve name Curve index no.
Curve name 1
ANSI Extremely Inverse 2
ANSI Very Inverse 3
ANSI Normal Inverse 4
ANSI Moderately Inverse 6
ANSI Long Time Extremely Inverse 7
ANSI Long Time Very Inverse 8
IEC Normal Inverse 9
IEC Very Inverse 10
IEC Inverse 11
IEC Extremely. Inverse 12
IEC Short Time Inverse 13
IEC Long Time Inverse 14
For the ANSI/IEEE characteristics the inverse time curves are defined according to
table 433:

Section 21
Table 433: Inverse time curves for ANSI/IEEE characteristics

Parameter/operationMode A B C p
1 = ANSI Extremely inverse 28.2 0.1217 1 2.0
2 = ANSI Very inverse 19.61 0.491 1 2.0
3 = ANSI Inverse 0.0086 0.0185 1 0.02
4 = ANSI Moderately inverse 0.0515 0.1140 1 0.02
6 = ANSI Long-time extremely inverse 64.07 0.250 1 2.0
7 = ANSI Long-time very inverse 28.55 0.712 1 2.0
8 = ANSI Long-time inverse 0.086 0.185 1 0.02
For the IEC characteristics the inverse time curves are defined according to
table 434:
Table 434: Inverse time curves for IEC characteristics

Parameter/operationMode A(b) B C p (a)
9 = IEC Normal inverse 0.14 0 1 0.02
10 = IEC Very inverse 13.5 0 1 1.0
11 = IEC Inverse 0.14 0 1 0.02
12 = IEC Extremely inverse 80.0 0 1 2.0
13 = IEC Short-time inverse 0.05 0 1 0.04
14 = IEC Long-time inverse 120 0 1 1.0
For the IEC curves there is also a setting of the minimum time delay of operation, see
figure 370.

Section 21
Operate
time
tnMin
Current
en05000133.vsd
Figure 370: Minimum time delay operation for the IEC curves
In addition to the ANSI and IEC standardized characteristics, there are also two
additional curves available; the 18 = RI time inverse and the 19 = RD time inverse.
The 18 = RI time inverse curve emulates the characteristic of the electromechanical

ASEA relay RI. The curve is described by equation 114:
æ ö
ç k ÷
t[ s ] = ç
in > ÷
ç 0.339 - 0.235 × ÷
è i ø (Equation 114)
where:
i is the measured current.
The 19 = RD time inverse curve gives a logarithmic delay, as used in the Combiflex
protection RXIDG. The curve enables a high degree of selectivity required for
sensitive residual earth fault current protection, with ability to detect high resistive
earth faults. The curve is described by equation 115:

Section 21
æ i ö
t[ s ] = 5.8 - 1.35 × ln ç ÷
è k × in > ø (Equation 115)
where:
i is the measured current
If the curve type is chosen as 17 the user can make a tailor made inverse time curve
according to the general equation 116.
æ ö
ç A
÷
t[ s ] = ç + B÷×k
çæ i ö p
÷
çç ÷ -C ÷
Also the reset time of the delayed function can be controlled. We have the possibility
to choose between three different reset type delays. Available alternatives are listed
in table 435.
Table 435: Reset type delays

Curve name Curve index no.
Instantaneous 1
IEC Reset 2
ANSI Reset 3
If instantaneous reset is chosen the timer will be reset directly when the current drops
below the set start current level minus the hysteresis.
If IEC reset is chosen the timer is reset the timer will be reset after a set constant time
when the current drops below the set start current level minus the hysteresis.
If ANSI reset time is chosen the reset time will be dependent of the current after fault
clearance (when the current drops below the start current level minus the hysteresis).
The timer will reset according to equation 117.

Section 21
æ ö
ç tr
÷
t[ s ] = ç ÷
ç æ i ö2 ÷
çç ÷ -1 ÷
where:
The set value tr is the reset time in case of zero current after fault clearance.
The possibility of choice of reset characteristics is to some extent dependent of the

choice of time delay characteristic.
For the independent time delay characteristics (type 5 and 15) the possible delay time
settings are instantaneous (1) and IEC (2 = set constant time reset).
For ANSI inverse time delay characteristics (type 1 - 4 and 6 - 8) all three types of
reset time characteristics are available; instantaneous (1), IEC (2 = set constant time
reset) and ANSI (3 = current dependent reset time).
For IEC inverse time delay characteristics (type 9 - 14) the possible delay time settings
are instantaneous (1) and IEC (2 = set constant time reset).
For the customer tailor made inverse time delay characteristics (type 17) all three
types of reset time characteristics are available; instantaneous (1), IEC (2 = set
constant time reset) and ANSI (3 = current dependent reset time). If the current
dependent type is used settings pr, tr and cr must be given, see equation 118:
æ ö
ç tr
÷
t[ s ] = ç ÷
ç æ i ö pr ÷
çç ÷ - cr ÷
For RI and RD inverse time delay characteristics (type 18 and 19) the possible delay
time settings are instantaneous (1) and IEC (2 = set constant time reset).
21.3 Inverse characteristics

Section 21
Table 436: Inverse time characteristics ANSI

Operate characteristic: k = 0.05-999 in steps of -
0.01 unless otherwise
æ A ö stated
t = ç P + B÷ × k
ç ( I - 1) ÷
è ø
Reset characteristic:
tr
t = ×k
(I 2
)
-1
I = Imeasured/Iset
ANSI Extremely Inverse no 1 A=28.2, B=0.1217, P=2.0, ANSI/IEEE C37.112, class 5

tr=29.1 + 30 ms
ANSI Very inverse no 2 A=19.61, B=0.491, P=2.0,
tr=21.6
ANSI Normal Inverse no 3 A=0.0086, B=0.0185,
P=0.02, tr=0.46
ANSI Moderately Inverse no 4 A=0.0515, B=0.1140,
P=0.02, tr=4.85
ANSI Long Time Extremely Inverse no 6 A=64.07, B=0.250, P=2.0,
tr=30
ANSI Long Time Very Inverse no 7 A=28.55, B=0.712, P=2.0,
tr=13.46
ANSI Long Time Inverse no 8 k=(0.01-1.20) in steps of
0.01
A=0.086, B=0.185,
P=0.02, tr=4.6
Table 437: Inverse time characteristics IEC

Operate characteristic: k = (0.05-1.10) in steps of -
0.01
æ A ö
t = ç P ÷×k
ç ( I - 1) ÷
è ø
I = Imeasured/Iset
Time delay to reset, IEC inverse time (0.000-60.000) s ± 0.5% of set time ± 10 ms
IEC Normal Inverse no 9 A=0.14, P=0.02 IEC 60255-3, class 5 + 40 ms
IEC Very inverse no 10 A=13.5, P=1.0
IEC Inverse no 11 A=0.14, P=0.02
IEC Extremely inverse no 12 A=80.0, P=2.0
IEC Short-time inverse no 13 A=0.05, P=0.04
IEC Long-time inverse no 14 A=120, P=1.0

Section 21

Customer defined characteristic no 17 k=0.5-999 in steps of 0.1 IEC 60255, class 5 + 40 ms
Operate characteristic: A=(0.005-200.000) in
steps of 0.001
æ A ö B=(0.00-20.00) in steps of
t = ç P + B÷ × k 0.01
ç (I - C ) ÷ C=(0.1-10.0) in steps of
è ø
0.1
P=(0.005-3.000) in steps
Reset characteristic: of 0.001
TR=(0.005-100.000) in
TR steps of 0.001
t = ×k
(I PR
- CR ) CR=(0.1-10.0) in steps of
0.1
PR=(0.005-3.000) in steps
I = Imeasured/Iset of 0.001
RI inverse characteristic no 18 k=(0.05-999) in steps of IEC 60255-3, class 5 + 40 ms

0.01
1
t = ×k
0.236
0.339 -
I
I = Imeasured/Iset
Logarithmic inverse characteristic no 19 k=(0.05-1.10) in steps of IEC 60255-3, class 5 + 40 ms

0.01
æ Iö
t = 5.8 - ç 1.35 × In ÷
è kø
I = Imeasured/Iset

Section 21
Table 438: Inverse time characteristics for Two step undervoltage protection (PUVM, 27)
Type A curve: k = (0.05-1.10) in steps of Class 5 +40 ms
0.01
k
t =
æ U < -U
ö
ç ÷
è U< ø
U< = Uset
U = Umeasured
Type B curve: k = (0.05-1.10) in steps of

0.01
k × 480
t = + 0.055
2.0
æ 32 × U < -U - 0.5 ö
ç ÷
è U < ø
U< = Uset
U = Umeasured
Programmable curve: k = (0.05-1.10) in steps of

0.01
é ù A = (0.005-200.000) in
ê ú steps of 0.001
k×A B = (0.50-100.00) in steps
t =ê ú+D
ê æ U < -U P
ú of 0.01
ö
êçB × -C÷ ú C = (0.0-1.0) in steps of 0.1
ëè U < ø û D = (0.000-60.000) in
steps of 0.001
U< = Uset P = (0.000-3.000) in steps
U = Umeasured of 0.001

Section 21
Table 439: Inverse time characteristics for Two step overvoltage protection (POVM, 59)
0.01
k
t =
æU -U >ö
ç ÷
è U> ø
U> = Uset
U = Umeasured

0.01
k × 480
t =
2.0
æ 32 × U - U > - 0.5 ö
ç ÷ - 0.035
è U > ø
Type C curve: k = (0.05-1.10) in steps of
0.01
k × 480
t =
3.0
æ 32 × U - U > - 0.5 ö
ç ÷ - 0.035
è U > ø
0.01
k×A A = (0.005-200.000) in
t = +D steps of 0.001
P
æB × U - U > ö B = (0.50-100.00) in steps
ç -C÷
of 0.01
è U > ø
C = (0.0-1.0) in steps of 0.1
D = (0.000-60.000) in
steps of 0.001
P = (0.000-3.000) in steps
of 0.001

Section 21
Table 440: Inverse time characteristics for Two step residual overvoltage protection (POVM, 59N)
0.01
k
t =
æU -U >ö
ç ÷
è U> ø
U> = Uset
U = Umeasured

0.01
k × 480
t =
2.0
æ 32 × U - U > - 0.5 ö
ç ÷ - 0.035
è U > ø
Type C curve: k = (0.05-1.10) in steps of
0.01
k × 480
t =
3.0
æ 32 × U - U > - 0.5 ö
ç ÷ - 0.035
è U > ø
0.01
k×A A = (0.005-200.000) in
t = +D steps of 0.001
P
æB × U - U > ö B = (0.50-100.00) in steps
ç -C÷
of 0.01
è U > ø
C = (0.0-1.0) in steps of 0.1
D = (0.000-60.000) in
steps of 0.001
P = (0.000-3.000) in steps
of 0.001

Section 21
100
10
k=
15
10
7
1
5
3
2
1
0.1
0.5
0.01
1 10 100 I/I>
xx05000764.vsd
Figure 371: ANSI – Extremely inverse

Section 21
100
10
k=
15
10
1 7
5
3
2
1
0.1
0.5
0.01
1 10 100 I/I>
xx05000765.vsd
Figure 372: ANSI – Very inverse

Section 21
100
10
k=
15
10
1 7
5
3
2
1
0.1
0.5
0.01
1 10 100 I/I>
xx05000766.vsd
Figure 373: ANSI – Inverse

Section 21
100
k=
15
10
10
7
5
1
1
0.5
0.1
0.01
1 10 100 I/I>
xx05000767.vsd
Figure 374: Moderately inverse

Section 21
100
10
k=
1.1
0.9
0.7
1 0.5
0.3
0.2
0.1
0.1 0.05
0.01
1 10 100 I/I>
xx05000768.vsd
Figure 375: IEC – Normal inverse

Section 21
100
10
1
k=
1.1
0.9
0.7
0.5
0.3
0.1 0.2
0.1
0.05
0.01
1 10 100 I/I>
xx05000769.vsd
Figure 376: Very inverse

Section 21
100
10
k=
0.1 1.1
0.9
0.7
0.5
0.3
0.2
0.01 0.1
1 10 100 I/I>
0.05 xx05000770.vsd
Figure 377: Extremely inverse

770
Section 22
Glossary
Section 22 Glossary
About this chapter

This chapter contains a glossary with terms, acronyms and abbreviations used in ABB
technical documentation.
22.1 Glossary
AC Alternating current
A/D converter Analog to digital converter
ADBS Amplitude dead -band supervision
ADM Analog digital conversion module, with time synchronization
ANSI American National Standards Institute
AR Autoreclosing
ArgNegRes Setting parameter/ZD/
ArgDir Setting parameter/ZD/
ASCT Auxiliary summation current transformer
ASD Adaptive signal detection
AWG American Wire Gauge standard
BBP Busbar protection
BFP Breaker failure protection
BIM Binary input module
BOM Binary output module
BR External bi-stable relay
BS British standard
BSR Binary signal transfer function, receiver blocks
BST Binary signal transfer function, transmit blocks
C37.94 IEEE/ANSI protocol used when sending binary signals
between IEDs
CAN Controller Area Network. ISO standard (ISO 11898) for serial
communication
CAP 531 Configuration and programming tool

Section 22
Glossary
CB Circuit breaker
CBM Combined backplane module
CCITT Consultative Committee for International Telegraph and
Telephony. A United Nations sponsored standards body
within the International Telecommunications Union.
CCM CAN carrier module
CCVT Capacitive Coupled Voltage Transformer
Class C Protection Current Transformer class as per IEEE/ ANSI
CMPPS Combined mega pulses per second
CO cycle Close-open cycle
Co-directional Way of transmitting G.703 over a balanced line. Involves two
twisted pairs making it possible to transmit information in both
directions
COMTRADE Standard format according to IEC 60255-24
Contra-directional Way of transmitting G.703 over a balanced line. Involves four
twisted pairs of with two are used for transmitting data in both
directions, and two pairs for transmitting clock signals
CPU Central processor unit
CR Carrier receive
CRC Cyclic redundancy check
CS Carrier send
CT Current transformer
CVT Capacitive voltage transformer
DAR Delayed auto-reclosing
DARPA Defense Advanced Research Projects Agency (The US
developer of the TCP/IP protocol etc.)
DBDL Dead bus dead line
DBLL Dead bus live line
DC Direct current
DFT Discrete Fourier transform
DIP-switch Small switch mounted on a printed circuit board
DLLB Dead line live bus
DNP Distributed Network Protocol as per IEEE/ANSI Std.
1379-2000
DR Disturbance recorder
DRAM Dynamic random access memory
DRH Disturbance report handler

Section 22
Glossary
DSP Digital signal processor

DTT Direct transfer trip scheme
EHV network Extra high voltage network
EIA Electronic Industries Association
EMC Electro magnetic compatibility
EMF Electro motive force
EMI Electro magnetic interference
EnFP End fault protection
ESD Electrostatic discharge
FOX 20 Modular 20 channel telecommunication system for speech,
data and protection signals
FOX 512/515 Access multiplexer
FOX 6Plus Compact, time-division multiplexer for the transmission of up
to seven duplex channels of digital data over optical fibers
G.703 Electrical and functional description for digital lines used by
local telephone companies. Can be transported over balanced
and unbalanced lines
GCM Communication interface module with carrier of GPS receiver
module
GI General interrogation command
GIS Gas insulated switchgear
GOOSE Generic object oriented substation event
GPS Global positioning system
GSM GPS time synchronization module
HDLC protocol High level data link control, protocol based on the HDLC
standard
HFBR connector Plastic fiber connector
type
HMI Human machine interface
HSAR High speed auto reclosing
HV High voltage
HVDC High voltage direct current
IDBS Integrating dead band supervision
IEC International Electrical Committee
IEC 60044-6 IEC Standard, Instrument transformers – Part 6: Requirements
for protective current transformers for transient performance

Section 22
Glossary
IEC 60870-5-103 Communication standard for protective equipment. A serial

master/slave protocol for point-to-point communication
IEC 61850 Substation Automation communication standard
IEEE Institute of Electrical and Electronics Engineers
IEEE 802.12 A network technology standard that provides 100 Mbits/s on
twisted-pair or optical fiber cable
IEEE P1386.1 PCI Mezzanine card (PMC) standard for local bus modules.
References the CMC (IEEE P1386, also known as Common
mezzanine card) standard for the mechanics and the PCI
specifications from the PCI SIG (Special Interest Group) for
the electrical EMF Electro Motive Force.
IED Intelligent electronic device
I-GIS Intelligent gas insulated switchgear
IOM Binary input/output module
Instance When several occurrences of the same function are available
in the IED they are referred to as instances of that function.
One instance of a function is identical to another of the same
kind but will have a different number in the IED user
interfaces. The word instance is sometimes defined as an item
of information that is representative of a type. In the same way
an instance of a function in the IED is representative of a type
of function.
IP 1. Internet protocol. The network layer for the TCP/IP protocol
suite widely used on Ethernet networks. IP is a connectionless,
best-effort packet switching protocol. It provides packet
routing, fragmentation and re-assembly through the data link
layer.
2. Ingression protection according to IEC standard
IP 20 Ingression protection, according to IEC standard, level 20
IRF Internal fail signal
IRIG-B: InterRange Instrumentation Group Time code format B,
standard 200
ITU International Telecommunications Union
LAN Local area network
LIB 520 High voltage software module
LCD Liquid crystal display
LDCM Line differential communication module
LDD Local detection device

Section 22
Glossary
LED Light emitting diode

LNT LON network tool
LON Local operating network
MCB Miniature circuit breaker
MCM Mezzanine carrier module
MIM Milli-ampere module
MPM Main processing module
MVB Multifunction vehicle bus. Standardized serial bus originally
developed for use in trains.
NCC National Control Centre
NUM Numerical module
OCO cycle Open-close-open cycle
OCP Overcurrent protection
OEM Optical ethernet module
OLTC On load tap changer
OV Over voltage
Overreach A term used to describe how the relay behaves during a fault
condition. For example a distance relay is over-reaching when
the impedance presented to it is smaller than the apparent
impedance to the fault applied to the balance point, i.e. the set
reach. The relay “sees” the fault but perhaps it should not have
seen it.
PCI Peripheral component interconnect, a local data bus
PCM Pulse code modulation
PCM 600 Protection and control IED manager
PC-MIP Mezzanine card standard
PISA Process interface for sensors & actuators
PMC PCI Mezzanine card
POTT Permissive overreach transfer trip
Process bus Bus or LAN used at the process level, that is, in near proximity
to the measured and/or controlled components
PSM Power supply module
PST Parameter setting tool
PT ratio Potential transformer or voltage transformer ratio
PUTT Permissive underreach transfer trip
RASC Synchrocheck relay, COMBIFLEX

Section 22
Glossary
RCA Relay characteristic angle

REVAL Evaluation software
RFPP Resistance for phase-to-phase faults
RFPE Resistance for phase-to-earth faults
RISC Reduced instruction set computer
RMS value Root mean square value
RS422 A balanced serial interface for the transmission of digital data
in point-to-point connections
RS485 Serial link according to EIA standard RS485
RTC Real time clock
RTU Remote terminal unit
SA Substation Automation
SC Switch or push-button to close
SCS Station control system
SCT System configuration tool according to standard IEC 61850
SLM Serial communication module. Used for SPA/LON/IEC
communication.
SMA connector Subminiature version A, A threaded connector with constant
impedance.
SMS Station monitoring system
SNTP Simple network time protocol – is used to synchronize
computer clocks on local area networks. This reduces the
requirement to have accurate hardware clocks in every
embedded system in a network. Each embedded node can
instead synchronize with a remote clock, providing the
required accuracy.
SPA Strömberg protection acquisition, a serial master/slave
protocol for point-to-point communication
SRY Switch for CB ready condition
ST Switch or push-button to trip
Starpoint Neutral point of transformer or generator
SVC Static VAr compensation
TC Trip coil
TCS Trip circuit supervision
TCP Transmission control protocol. The most common transport
layer protocol used on Ethernet and the Internet.
TCP/IP Transmission control protocol over Internet Protocol. The de
facto standard Ethernet protocols incorporated into 4.2BSD

Section 22
Glossary
Unix. TCP/IP was developed by DARPA for internet working

and encompasses both network layer and transport layer
protocols. While TCP and IP specify two protocols at specific
protocol layers, TCP/IP is often used to refer to the entire US
Department of Defense protocol suite based upon these,
including Telnet, FTP, UDP and RDP.
TEF Time delayed earth-fault protection function
TNC connector Threaded Neill Concelman, A threaded constant impedance
version of a BNC connector
TPZ, TPY, TPX, Current transformer class according to IEC
TPS
Underreach A term used to describe how the relay behaves during a fault
condition. For example a distance relay is under-reaching
when the impedance presented to it is greater than the apparent
impedance to the fault applied to the balance point, i.e. the set
reach. The relay does not “see” the fault but perhaps it should
have seen it. See also Overreach.
U/I-PISA Process interface components that deliver measured voltage
and current values
UTC Coordinated universal time. A coordinated time scale,
maintained by the Bureau International des Poids et Mesures
(BIPM), which forms the basis of a coordinated dissemination
of standard frequencies and time signals. UTC is derived from
International Atomic Time (TAI) by the addition of a whole
number of "leap seconds" to synchronize it with Universal
Time 1 (UT1), thus allowing for the eccentricity of the Earth"s
orbit, the rotational axis tilt (23.5 degrees), but still showing
the Earth"s irregular rotation, on which UT1 is based. The
Coordinated Universal Time is expressed using a 24-hour
clock and uses the Gregorian calendar. It is used for aeroplane
and ship navigation, where it also sometimes known by the
military name, "Zulu time". "Zulu" in the phonetic alphabet
stands for "Z" which stands for longitude zero.
UV Undervoltage
WEI Weak end infeed logic
VT Voltage transformer
X.21 A digital signalling interface primarily used for telecom
equipment
3IO Three times zero-sequence current. Often referred to as the
residual or the earth-fault current
3UO Three times the zero sequence voltage. Often referred to as the
residual voltage or the neutral point voltage

778

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Technical reference manual

Line differential protection IED

Innovation from ABB

© Copyright 2007 ABB. All rights reserved

THIS DOCUMENT HAS BEEN CAREFULLY CHECKED. HOWEVER, IN

THE DATA CONTAINED IN THIS MANUAL IS INTENDED SOLELY FOR

Section 2 Local human-machine interface.....................................29

RED 670 Technical reference manual 1

Input and output signals.........................................................45

Section 3 Basic IED functions........................................................49

2 Technical reference manual RED 670

Section 4 Differential protection.....................................................89

RED 670 Technical reference manual 3

Section 5 Distance protection ......................................................129

4 Technical reference manual RED 670

Operating and inhibit conditions...........................................167

Section 6 Current protection.........................................................175

RED 670 Technical reference manual 5

Section 7 Voltage protection........................................................227

6 Technical reference manual RED 670

Section 8 Frequency protection....................................................271

RED 670 Technical reference manual 7

Input and output signals............................................................277

Section 9 Multipurpose protection................................................293

Section 10 Secondary system supervision.....................................321

8 Technical reference manual RED 670

RED 670 Technical reference manual 9

Bay control (QCBAY).................................................................361

10 Technical reference manual RED 670

RED 670 Technical reference manual 11

Section 12 Scheme communication...............................................465

12 Technical reference manual RED 670

RED 670 Technical reference manual 13

14 Technical reference manual RED 670

RED 670 Technical reference manual 15

Section 16 Station communication.................................................603

16 Technical reference manual RED 670

LON communication protocol.........................................................607

Section 17 Remote communication................................................667

RED 670 Technical reference manual 17

18 Technical reference manual RED 670

Line data communication module (LDCM)................................701

RED 670 Technical reference manual 19

How to reach the rear side of the IED..................................723

Section 20 Connection diagrams...................................................735

Section 21 Time inverse characteristics.........................................749

20 Technical reference manual RED 670

About this chapter

1.1 Introduction to the technical reference manual

1.1.1 About the complete set of manuals for an IED

Application Technical Installation and Operator´s Engineering

The Application Manual (AM) contains application descriptions, setting guidelines

The Technical Reference Manual (TRM) contains application and functionality

The Installation and Commissioning Manual (ICM) contains instructions on how

RED 670 Technical reference manual 21

1.1.2 About the technical reference manual

• The chapter “Local human-machine interface” describes the control panel on

22 Technical reference manual RED 670

• The chapter “Remote communication” describes binary and analog signal

1.1.3 Design of the Technical reference manual (TRM)

Outlines the implementation of a particular protection function.

1.1.3.2 Principle of operation

Input and output signals