ZXG10 iBSC (V6.20) Base Station Controller Hardware Manual PDF

ZXG10 iBSC
Base Station Controller

Hardware Manual
Version 6.20
ZTE CORPORATION
ZTE Plaza, Keji Road South,
Hi-Tech Industrial Park,
Nanshan District, Shenzhen,
P. R. China
518057
Tel: (86) 755 26771900 800-9830-9830
Fax: (86) 755 26772236
URL: http://support.zte.com.cn
E-mail: doc@zte.com.cn
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Copyright © 2006 ZTE CORPORATION.
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The ultimate right to interpret this product resides in ZTE CORPORATION.
Revision History
Date Revision No. Serial No. Reason for Issue

Aug. 30, 2008 R1.0 sjzl20083205 First edition
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Document
ZXG10 iBSC (V6.20) Base Station Controller Hardware Manual
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Contents
About this Manual ............................................................. i

Purpose ................................................................................ i
Intended Audience ................................................................. i
Prerequisite Skill and Knowledge .............................................. i
What is in This Manual ............................................................ i
Related Documentation.......................................................... ii
Conventions ........................................................................ iii
How to Get in Touch............................................................. iv
Declaration of RoHS Compliance..................................... v
Chapter 1.......................................................................... 1
Cabinet ............................................................................. 1
Cabinet Structure.................................................................. 1
Cabinet Composition ........................................................... 10
External Connection ............................................................ 11
Cabinet Cabling .................................................................. 14
Chapter 2........................................................................ 17
Plug-in Boxes ................................................................. 17

Power Distribution Plug-in Box .............................................. 17
Fan Plug-in box .................................................................. 20
Dust-Proof Plug-in Box (Air Filter) ......................................... 22
Chapter 3........................................................................ 23
Shelves ........................................................................... 23
Overview ..................................................................... 23
Shelf Functions ................................................................... 23
Shelf Positions .................................................................... 24
Backplane.......................................................................... 25
Shelf Configurations (Using BUSN) .................................. 26
Control Shelf (BCTC) ........................................................... 26
Packet Switching Shelf (BPSN) .............................................. 31
Resource Shelf (BUSN).........................................................34
Shelf Configurations (Using BGSN) .................................. 38
Control Shelf (BCTC)............................................................38
Packet Switching Shelf (BPSN) .............................................. 44
Gigabit Resource Shelf (BGSN).............................................. 48
Inter-Shelf Connections ................................................. 52
Internal Connections (Using BUSN) ........................................ 53
Internal Connections (Using BGSN)........................................59
Chapter 4........................................................................ 67
Boards ............................................................................ 67
Overview ...........................................................................67
Control Plane HUB (CHUB).................................................... 68
BSC IP Interface Board (BIPI) ............................................... 73
GSM Universal Processing Board (GUP)................................... 78
GSM Universal Processing Board (GUP2) ................................. 82
Clock Generator Board CLKG (CLKG) ...................................... 87
Clock Generator Board CLKG (ICM) ........................................95
Integrated Clock Module (ICM) ............................................ 100
Control Main Processing Board (CMP) ................................... 109
Digital Trunk Board (DTB) .................................................. 113
Gigabit Line Interface Board (GLI) ....................................... 120
E1 IP Interface Board (EIPI) ............................................... 124
GE IP Interface Board (GIPI)............................................... 127
Gigabit Universal Interface Module (GUIM)............................ 131
Operation and Maintenance Processing Board (OMP) .............. 137
Packet Switching Network (PSN) Board................................. 141
Power Distribution Board (PWRD) ........................................ 143
Server Board (SBCX) ......................................................... 146
SONET Digital Trunk Board (SDTB) ...................................... 151
SONET Digital Trunk Board (SDTB2) .................................... 155
Signaling Processing Board (SPB) ........................................ 159
Signaling Processing Board (SPB2)....................................... 165
Universal Interface Module for Control Plane (UIMC)............... 169
Universal Interface Module for User Plane (UIMU) .................. 174
User Plane Processing Board (UPPB)..................................... 180
Chapter 5......................................................................185
Other Hardware Equipments.......................................185
Alarm Box........................................................................ 185
GPS-Related Equipments.............................................. 192
GPS Active Antenna and Lightning Protector/Frequency Divider 192
GPS L1 Signal Transponder and GPS Antenna Feeder Lightning
Protector ......................................................................... 195
Chapter 6...................................................................... 199
System Configuration Specifications...........................199

Configurations when BUSN Is Used ................................ 199
Abis Interface and A-Interface Adopting E1........................... 199
Abis Interface Adopting IP+E1 and A-Interface Adopting E1 .... 200
Abis Interface Adopting IP+E1 and A-Interface Adopting STM-1201
Abis Interface Adopting IPoE and A-Interface Adopting E1 ...... 202
Abis Interface Adopting E1 and A-Interface Adopting STM-1 .... 203
Abis Interface Adopting E1 and Ater Interface Adopting E1 (TC Is
External) ......................................................................... 204
Abis Interface Adopting E1 and Ater Interface Adopting STM-1 (TC
Is External)...................................................................... 205
Abis Interface Adopting E1 and Ater Interface Adopting IP (TC Is
External) ......................................................................... 206
Configurations when BGSN Is Used................................ 207
Abis Interface and A-Interface Adopting E1(T1) ..................... 207
Abis Interface Adopting E1 and A-Interface Adopting STM-1 .... 208
Abis Interface Adopting E1 and A-Interface Adopting IP .......... 209
Abis Interface and A-Interface Adopting IP ........................... 210
Abis Interface Adopting IP and A-Interface Adopting E1(T1) .... 211
Abis Interface Adopting IP and A-Interface Adopting STM-1 .... 212
Abis Interface Adopting IPoE and A-Interface Adopting E1(T1). 213
Abis Interface Adopting IPoE and A-Interface Adopting STM-1 . 214
Abis Interface Adopting IPoE and A-Interface Adopting IP ....... 215
Abis Interface and Ater Interface Adopting E1(T1) ................. 216
Abis Interface Adopting IP and Ater Interface Adopting E1(T1) 217
Appendix A ................................................................... 219
Device Specifications ...................................................219
Appendix B ................................................................... 221
Abbreviations ............................................................... 221

Appendix C ...................................................................227
Figures..........................................................................227
Tables ...........................................................................233
Index ............................................................................237
About this Manual
Purpose
This manual describes the hardware structure and functions of
cabinet, plug-in box, shelves and boards of ZXG10 iBSC (V6.20)
base station controller.
Intended Audience
This document is intended for engineers and technicians who
perform operation activities on the ZXG10 iBSC (V6.20) base
station controller.
Prerequisite Skill and Knowledge

To use this document effectively, users should have a general
understanding of wireless telecommunications technology.
Familiarity with the following is helpful:
ZXG10 BSS system and its various components
Local operating procedures
What is in This Manual

This manual contains the following sections:
TABLE 1 – M ANUAL SUMMARY
Section Summary
Chapter 1, Cabinet Introduces the structure and composition
of ZXG10 iBSC (V6.20) cabinet.
Chapter 2, Plug-in Explains the structure, function and panel
Boxes descriptions of the plug-in boxes used in
ZXG10 iBSC (V6.20).
Chapter 3, Shelves Explains the configuration and backplane
descriptions of shelves used in ZXG10
Confidential and Proprietary Information of ZTE CORPORATION i

Section Summary
iBSC (V6.20).
Chapter 4, Boards Provides the functions and descriptions of
boards used in ZXG10 iBSC (V6.20).
Chapter 5, Other Describes the alarm box and GPS-related
Hardware Equipments equipments.
Chapter 6, System Introduces hardware configurations of
Configuration ZXG10 iBSC (V6.20) in the following two
Specifications cases respectively: when the resource
shelf (BUSN) is used; when the gigabit
resource shelf (BGSN) is used.
Appendix A, Device Illustrates devices appeared in ZXG10
Specifications iBSC (V6.20) board descriptions.
Appendix B,
List of abbreviations used in this manual.
Abbreviations
Appendix C, Figures List of figures and tables included in this
and Tables manual.
Index Index of important terms and definition in
this manual.
Related Documentation
The following documents are related to this manual:
ZXG10 iBSC (V6.20) Base Station Controller Documentation
Guide
ZXG10 iBSC (V6.20) Base Station Controller Technical
Manual
ZXG10 iBSC (V6.20) Base Station Controller Installation
Manual
ZXG10 iBSC (V6.20) Base Station Controller Performance
Counters Manual – Volume I
Counters Manual – Volume II
Counters Manual – Volume III
ZXG10 iBSC (V6.20) Base Station Controller KPI Reference
Manual
ZXG10 iBSC (V6.20) Base Station Controller Maintenance
Manual (Routine Maintenance)
Manual (Troubleshooting)
Manual (Emergency Maintenance)
ii Confidential and Proprietary Information of ZTE CORPORATION

About this Manual
ZXG10 BSS (V6.20) Base Station Subsystem Alarm Handling

Manual
ZXG10 BSS (V6.20) Base Station Subsystem Notification
Handling Manual
ZXG10 BSS (V6.20) Base Station Subsystem OMM Software
Installation Manual
ZXG10 BSS (V6.20) Base Station Subsystem Configuration
Manual (Initial Configuration Guide)
ZXG10 BSS (V6.20) Base Station Subsystem Configuration
Manual (Feature Configuration Guide)
ZXG10 BSS (V6.20) Base Station Subsystem MML Command
Manual
ZXG10 BSS (V6.20) Base Station Subsystem Radio
Parameters Manual
ZXG10 BSS (V6.20) Base Station Subsystem Operation
Manual (Diagnosis and Test)
ZXG10 BSS (V6.20) Base Station Subsystem Operation
Manual (Signaling Tracing)
Conventions
Typographical ZTE documents employ the following typographical conventions.
Conventions
TABLE 2 - TYPOGRAPHIC AL CONVENTIONS
Typeface Meaning
Italics References to other Manuals and documents.
“Quotes” Links on screens.
Bold Menus, menu options, function names, input
fields, radio button names, check boxes, drop-
down lists, dialog box names, window names.
CAPS Keys on the keyboard and buttons on screens
and company name.
Constant width Text that you type, program code, files and
directory names, and function names.
[] Optional parameters.
{} Mandatory parameters.
| Select one of the parameters that are delimited
by it.
Note: Provides additional information about a
certain topic.
Checkpoint: Indicates that a particular step needs
to be checked before proceeding further.
Confidential and Proprietary Information of ZTE CORPORATION iii

Typeface Meaning
Tip: Indicates a suggestion or hint to make things
easier or more productive for the reader.
Mouse TABLE 3 - MOUSE OPERATION CONVENTIONS

Operation
Conventions Typeface Meaning
Click Refers to clicking the primary mouse button (usually
the left mouse button) once.
Double-click Refers to quickly clicking the primary mouse button
(usually the left mouse button) twice.
Right-click Refers to clicking the secondary mouse button
(usually the right mouse button) once.
Drag Refers to pressing and holding a mouse button and
moving the mouse.
How to Get in Touch

The following sections provide information on how to obtain
support for the documentation and the software.
Customer If you have problems, questions, comments, or suggestions
Support regarding your product, contact us by e-mail at
support@zte.com.cn. You can also call our customer support
center at (86) 755 26771900 and (86) 800-9830-9830.
Documentation ZTE welcomes your comments and suggestions on the quality
Support and usefulness of this document. For further questions,
comments, or suggestions on the documentation, you can
contact us by e-mail at doc@zte.com.cn; or you can fax your
comments and suggestions to (86) 755 26772236. You can also
browse our website at http://support.zte.com.cn, which contains
various interesting subjects like documentation, knowledge base,
forum and service request.
iv Confidential and Proprietary Information of ZTE CORPORATION

Declaration of RoHS
Compliance
To minimize the environmental impact and take more

responsibility to the earth we live, this document shall serve as
formal declaration that the ZXG10 iBSC (V6.20) Base Station
Controller manufactured by ZTE CORPORATION is in compliance
with the Directive 2002/95/EC of the European Parliament -
RoHS (Restriction of Hazardous Substances) with respect to the
following substances:
Lead (Pb)
Mercury (Hg)
Cadmium (Cd)
Hexavalent Chromium (Cr(VI))
PolyBrominated Biphenyls (PBB’s)
PolyBrominated Diphenyl Ethers (PBDE’s)
The usage of the above substances in ZXG10 iBSC (V6.20) is
explained in Table 4.
TABLE 4 – USAGE EXPLANATION OF THE HAZ ARDOUS SUBSTANCES IN ZXG10

IBSC (V6.20)
Hazardous substances
Names of Parts
Pb Hg Cd Cr(VI) PBB’s PBDE’s
System × 0 0 0 0 0
Cables and Assembly 0 0 0 0 0 0
Auxiliary Equipment × × × × × ×
Table Explanation:
0: The usage of the substance in all of the components is less
than the allowed values given by 2002/95/EC standard.
×: The usage of the substance in at least one of the components
is beyond the allowed values given by 2002/95/EC standard.
Confidential and Proprietary Information of ZTE CORPORATION v

The ZXG10 iBSC (V6.20) Base Station Controller manufactured

by ZTE CORPORATION meet the requirements of EU
2002/95/EC; however, some assemblies are customized to client
specifications. Addition of specialized, customer-specified
materials or processes which do not meet the requirements of
EU 2002/95/EC may negate RoHS compliance of the assembly.
To guarantee compliance of the assembly, the need for
compliant product must be communicated to ZTE CORPORATION
in written form.
This declaration is issued based on our current level of
knowledge. Since conditions of use are outside our control, ZTE
CORPORATION makes no warranties, express or implied, and
assumes no liability in connection with the use of this
information.
vi Confidential and Proprietary Information of ZTE CORPORATION

Chapter 1
Cabinet
This chapter describes the structure and composition of ZXG10

iBSC cabinet.
Cabinet Structure
ZXG10 iBSC (V6.20) has a standard 19-inch cabinet, with
maximum internal capacity of 42U. The front door of the cabinet
has tiny holes and is black in color. The main body of the cabinet
is dark blue in color.
Dimensions Excluding left side door and right side door: H × W × D = 2000
mm × 600 mm × 800 mm
Including left side door and right side door: H × W × D = 2000
mm × 650 mm × 800 mm
Note:
Outline dimension for whole cabinet: 2000 mm × 600 mm × 800
mm (H × W × D), width for single side door is 25 mm.
Weight Maximum weight of a single cabinet: ≤ 350 kg.
Power Supply Rated input voltage: -48 V DC

Requirement
Voltage fluctuation range: -57 V DC ~ -40 V DC
Operation Ambient temperature range (long-term working condition /

Environment short-term working condition): 0 ºC ~ +40 ºC / -5 ºC ~ +45 ºC
Relative humidity range (long-term relative working humidity /
short-term relative working humidity): 20% ~ 90%/5% ~ 95%
Figure 1 shows the standard 19-inch cabinet.
Confidential and Proprietary Information of ZTE CORPORATION 1

FIGURE 1 - STAND ARD 19-INCH CABINET
Figure 2 shows the cabinet structure. Shelves and boards are

discussed in detail in the following chapters.
2 Confidential and Proprietary Information of ZTE CORPORATION

Chapter 1 - Cabinet
FIGURE 2 – CABINET STRUCTURE
2
3
4
8
7
1. Back Door 6. Service Plug-in Box

2. Busbar 7. Front Door
3. Cover Plate 8. Rack
4. Filter 9. Installation Base
5. Fiber Wrap Tray
Cabinet Top Figure 3 shows the top view of cabinet.
FIGURE 3 – CABINET TOP VIEW

The cabinet top consists of top frame component, power input

port, cable outlet module, top fan, top filter and fiber wrap tray.
Figure 4 shows the cabinet top structure.
FIGURE 4 – CABINET TOP STRUCTURE
1 4
5
2 6
1．Fiber Wrap Tray 5．Cable Outlet Module
2．Top Fan Cover Board 6．Top Filter
3．Top Fan 7．Top Frame Component
4．Filter Cover Board
Top Frame Top frame component is the installation base for each functional
Component unit on the cabinet top. The grounding screw with a grounding
sign beside it is used for equipment grounding.
Figure 5 shows the top frame component structure.

Chapter 1 - Cabinet
FIGURE 5 – TOP FRAME COMPONENT STRUCTURE
1 2
1．Cable Outlet Module Installation Board 4．Grounding Screw
2．Top Filter Installation Board 5．Top Fan Installation Board
3．Grounding Sign
Cable Outlet Cable outlet module serves as the path for the cables that enter
Module or leave the cabinet. It consists of cable outlet frame and cable
outlet bar. Figure 6 shows the structure of cable outlet module.
FIGURE 6 – CABLE OUTLET MODULE STRUCTURE
1 2
1．Cable Outlet Frame 2．Cable Outlet Bar

Top Fan Top fan provides ventilation and heat dissipation. It consists of
installation bottom plate, six fans and monitor circuit board.
Figure 7 shows the structure of top fan.
FIGURE 7 – TOP FAN STRUCTURE
1．Monitor Circuit Board 3．Installation Bottom Plate
2．Fan
Top Filter Top filter is the cabinet power input interface. -48 V power cable
from equipment room is connected to the input end of top filter.
The power is transferred to the power distribution plug-in box
inside the cabinet after being filtered.
Figure 8 shows the structure of top filter.
FIGURE 8 – TOP FILTER STRUCTURE
1 2
1．Power Input End 2．Power Output End
Fiber Wrap Fiber wrap tray is used to wrap the excess optical fiber cables. It
Tray consists of bottom plate, fiber wrap pole, and cover plate.
Figure 9 shows the structure of fiber wrap tray.

Chapter 1 - Cabinet
FIGURE 9 – FIBER WRAP TRAY STRUCTURE
1．Cover Plate 3．Bottom Plate
2．Fiber Wrap Pole
Front/Back The structure of front and back door are similar to each other.
Door Tiny ventilation holes on the doors helps to cool the cabinet.
Office information label and serial No. label are affixed on the
top right corner of front door.
Figure 10 shows the label position (if there is only one label, it
should be affixed 120 mm away from the edge).
FIGURE 10 – FRONT DOOR LABELS
120
1 2
56
ZXG10
iBSC
1．Office Information Label 2．Serial No. Label
Office information label

Office information label contains the cabinet consignment
information for unpacking check, such as product name,
consignment number and recipients address.
Serial No. label

Serial No. label contains the cabinet serial number.

Rack Rack consists of top frame, bottom frame, column, adjustment
rail, and side door. Figure 11 shows the rack structure.
FIGURE 11 - RACK STRUCTURE
1．Top Frame 4．Side Door
2．Column 5．Bottom Frame
3．Adjustment Rail
Bus Bar Bus bar is used for providing power supply and grounding of
ZXG10 iBSC system.
Figure 12 shows the schematic diagram of bus bar.

Chapter 1 - Cabinet
FIGURE 12 – BUS BAR
-48V
-48V
GND
PE
PE
-48V
-48V
GND
-48V
-48V
GND
PE
PE
-48V
-48V
GND
-48V PE
-48V
GND
-48V
-48V
PE
GND
PE
PE
-48V
-48V
GND
-48V
-48V
-48V
GND
-48V
GND
-48V
-48V
GND
PE
PE PE
PE
-48V
-48V
GND
-48V
-48V
GND
PE
PE
-48V
-48V
GND
PE
PE
Bus bars are located on the right of cabinet back. There are six
sets of terminals. Sets 1 and 6 have four connection terminals:
–48 V
–48 V GND
PE
PE
Set 1 connects the power distribution plug-in box and provides
power supply input for bus bars. Set 6 provides power supply for
the third fan plug-in box. Sets 2 ~ 5 provide six connection
terminals. They are as follows (from top to bottom):
–48 V
–48 V GND
–48 V
–48 V GND
PE
PE

Cabinet Composition
ZXG10 iBSC is composed of power distribution plug-in box, fan
plug-in box, cabling plug-in box, air filter, switching shelf,
control shelf, and resource shelf. Figure 13 shows the structural
layout of ZXG10 iBSC cabinet.
FIGURE 13 - STRUCTURAL LAYOUT OF CABINET
1
2
3

Chapter 1 - Cabinet
1. Power Distribution Plug-in Box 4. Shelf

2. Fan Plug-in Box 5. Dust-proof Plug-in Box
3. Blank Panel (1 U)
External Connection
External equipments connected with iBSC include BTS,
MSC/MGW, SGSN, NetNumen M31, and iTC.
External connections differ in the following two cases:
When the gigabit resource shelf (BGSN) is used
When the resource shelf (BUSN) is used
External Connections when Gigabit Resource

Shelf (BGSN) Is Used
In this case, the external connections of iBSC are shown in

Figure 14.
FIGURE 14 – IBSC EXTERNAL CONNECTIONS (USING GIGABIT RESOURCE

SHELF)
MSC/MGW SGSN MR OMCB
A- Gb
Interface Interface
GIPI/SPB
DTB/SPB2/SDTB2/GIPI GIPI
2
iBSC
DTB/SPB2/SDTB2/GI OMP/SBC
DTB/SPB2/SDTB2
PI X
Abis Ater
Interface Interface
NetNumen
BTS iTC
M31
Note:
In Figure 14, the blue line represents the E1 connection, the red
line represents the fiber connection, and the azury broken line
represents the Ethernet connection.
A-Interface A-interface is the interface between iBSC and MSC/MGW.

The boards and connecting cables used in A-interface are as
follows:

The SDTB2 board supports STM-1 cables with the optical

interface.
The rear board (RDTB) of DTB supports E1 cables with its E1
interface, the rear board (RSPB) of SPB2 supports E1 cables
with its E1 interface.
The GIPI board supports Ethernet cables with its GE optical
interface, the rear board RGER supports the Ethernet cables
with its GE electrical interface.
Gb Interface Gb interface is the interface between iBSC and SGSN.

The boards and connecting cables used in Gb interface are as
follows:
The rear board (RSPB) of SPB2 supports E1 cables with its
E1 interface.
interface, the rear board RGER supports the Ethernet cables
with its GE electrical interface.
Abis Interface Abis interface is the interface between iBSC and BTS.
The boards and connecting cables used in Abis interface are as
follows:
interface.
interface, the rear board (RSPB) of SPB2 supports E1 cables
with its E1 interface.
interface, the rear board RGER supports Ethernet cables with
its GE electrical interface.
Ater Interface Ater interface is the interface between iBSC and iTC.
The boards and connecting cables used in Ater interface are as
follows:
interface.
The rear board (RSPB) of SPB2 and the rear board (RDTB) of
DTB support E1 cables with their E1 interfaces.
OMM It is realized by the FE interface on the rear board (RMPB) of

OMP and the FE interface on the rear board (RSVB) of SBCX. The
OMM (O&M module) performs data interaction with NetNumen
M31.

Chapter 1 - Cabinet
OMCB The OMCB (i.e. OMC of SDR) connection is realized by the FE

interface on the rear boar RMNIC of GIPI.
MR The Measurement Report (MR) server connection is realized by

the FE interface on the rear board RMNIC of GIPI.
External Connections when Resource Shelf

(BUSN) Is Used
In this case, the external connections of iBSC are shown in

Figure 15.
FIGURE 15 – IBSC EXTERNAL CONNECTIONS (USING RESOURCE SHELF)
Note:
In Figure 15, the blue line represents the E1 connection, the red
line represents the fiber connection, and the azury broken line
represents the FE connection.
A-Interface A-interface is the interface between iBSC and MSC/MGW.

The boards and connecting cables used in A-interface are as
follows:
SDTB supports STM-1 cables. It is realized by the optical
interface on SDTB front panel.
interface.
Gb Interface Gb interface is the interface between iBSC and SGSN.

The boards and connecting cables used in Gb interface are as

follows:
The rear board (RSPB) of SPB supports E1 cables with its E1
interface.
The rear board (RMNIC) of BIPI supports FE cables with its
FE interface.
Abis Interface Abis interface is the interface between iBSC and BTS.
The boards and connecting cables used in Abis interface are as
follows:
interface.
The rear board (RMNIC) of BIPI supports FE cables with its
FE interface.
Ater Interface Ater interface is the interface between iBSC and iTC.
The boards and connecting cables used in Ater interface are as
follows:
SDTB supports STM-1 cables. It is realized by the optical
interface on SDTB front panel.
The rear board (RSPB) of SPB and the rear board (RDTB) of
DTB support E1 cables with their E1 interfaces.
OMM It is realized by the FE interface on the rear board (RMPB) of

OMP and the FE interface on the rear board (RSVB) of SBCX. The
OMM (O&M module) performs data interaction with NetNumen
M31.
OMCB The OMCB (i.e. OMC of SDR) connection is realized by the FE

interface on the rear boar RMNIC of BIPI.
MR The Measurement Report (MR) server connection is realized by

the FE interface on the rear board RMNIC of BIPI.
Cabinet Cabling
Figure 16 shows the diagram of cabinet cabling.

Chapter 1 - Cabinet
FIGURE 16 – CABINET CABLING (LEFT VIEW)
2
5
1. Leading out cables from cabinet

2. Leading out cables from rear board
3. Rear transverse cable rack
4. Vertical cable trough 5. Leading out optical fibers from front
In ZXG10 iBSC cabinet, the optical fiber is led out from the front
board panel, while other cables are led out from the rear board
panel.


Chapter 2
Plug-in Boxes
This chapter describes the structure, functions, and panel

descriptions of ZXG10 iBSC plug-in boxes.
Power Distribution Plug-in Box

Power distribution plug-in box is located in the upper part of the
cabinet. It provides power to all components of the cabinet.
Functions Functions of power distribution plug-in box are as follows:
Provides power to all shelves within a cabinet
Implements power backup by automatically switching over
two external power supplies
Implements power indication, environment monitoring, and
internal fan plug-in box monitoring through PWRD and
PWRDB
Structure Figure 17 shows the structure of power distribution plug-in box.
FIGURE 17 – POWER DISTRIBUTION PLUG-IN BOX STRUCTURE
1 2 3
1．Line Connection Terminal 5．Heat sink for the isolating diode
2．Lightning Arrester 6．Isolating diode
3．PWRDB 7．PWRD
4．External Frame 8．Switch

The line connection terminal of power distribution plug-in box is

installed on the back plane. The front panel of the plug-in box is
fixed with PWRD (Power Distribution Board). The front panel can
be turned 90º outward, which facilitates maintenance.
When the equipment is running, the front panel can be fixed in
the plug-in box using captive fastener.
Panel Front Panel
Figure 18 shows the front panel of power distribution plug-in box.
FIGURE 18 – FRONT P ANEL OF POWER DISTRIBUTION PLUG-IN BOX
POWER JUNCTION BOX
ON
OFF
RUN -48V(I) -48V(II) FAN HOT SMOKE DOOR ARRESTER
-48V(I) -48V(II)
Rear Panel
Figure 19 shows the rear panel of power distribution plug-in box.
FIGURE 19 – REAR PANEL OF POWER DISTRIBUTION PLUG-IN BOX
RS485 FAN FAN

BOX1 BOX3
DOOR
ARRESTER
RS485 SENSORS FAN FAN
BOX2 BOX4 INPUT(I) INPUT(II) OUTPUT
-48V -48VGND -48V-48VGND-48V -48VGND
Indicator Specifications
There are eight indicators on the front panel of the power
distribution plug-in box. Table 5 explains the panel indicators.
TABLE 5 – P ANEL INDICATORS OF POWER DISTRIBUTION PLUG-IN BOX
Indicator
Color Meaning State
Name
Running 1 Hz flash：Running normal

RUN Green
indication OFF：Running abnormal
ON： Under-voltage or over-

voltage in the first external -
First -48 V 48 V input.
-48 V(I) Red
power alarm
OFF：Voltage in the first
external -48 V input is normal

Chapter 2 - Plug-in Boxes
Indicator
Color Meaning State
Name
ON：Under-voltage or over-
voltage in the second external
Second -48 V -48 V input
-48 V(II) Red
power alarm
OFF：Voltage in the second
external -48 V input is normal
ON： Fan running abnormal
FAN Red Fan alarm
OFF：Fan running normal
Temperature ON：Temperature abnormal

HOT Red
alarm OFF：Temperature normal
ON：Smoke parameter
exceeds the rated value, and
SMOKE Red Smoke alarm an alarm exists
OFF：Smoke parameter is
normal
ON：A door under supervision
Entrance is open
DOOR Red
control Alarm OFF：All the doors under
supervision are close
ON：Lightning arrester
Lightning running abnormal
ARRESTER Red arrester
alarm OFF：Lightning arrester
running normal
Switch Specifications
There are two switches on the panel. They are:
-48 V（I）power input switch
-48 V（II）power input switch
Table 6 explains the panel switches.
TABLE 6 – PANEL SWITCHES POWER DISTRIBUTION PLUG-IN BOX
Switch Name Switch Position

Down：Disconnect the -48 V
-48 V(I) power input input
Up：Connect to the -48 V input
Down：Disconnect the -48 V

-48 V(II) power input input
Up：Connect to the -48 V input
Interface specifications
Input/Output cables of power distribution and monitoring are
connected to the power distribution plug-in box through the
interfaces.
Table 7 explains the interfaces of the power distribution plug-in
box.

TABLE 7 - POWER DISTRIBUTION PLUG-IN BOX INTERFACES
Interface Name Description

Connected to the RS485 (up)
RS485(Down)
interface of the adjacent rack
Connected to PD485 interface of
RS485(Up)
the OMP rear board
SENSORS Connected by sensor cable
DOOR Connected by door access cable
FANBOX1 Connected to the top fan group
Connected to the first layer fan
FANBOX2
plug-in box
Connected to the second layer
FANBOX3
fan plug-in box
Connected to the third layer fan
FANBOX4
plug-in box
Connected to the lightning
ARRESTER
arrester
INPUT(I) Power input
INPUT(II) Power input
OUTPUT Power output
Fan Plug-in box

Fan plug-in box is a common plug-in box, performing monitoring
and automatic speed regulation functions.
Structure Figure 20 shows the structure of fan plug-in box.
FIGURE 20 – FAN PLUG-IN BOX STRUCTURE
Each fan plug-in box consists of three units. Each unit contains
two fans. This structure facilitates the operations such as onsite
maintenance and hot swapping.
Panel Front Panel
Figure 21 shows the front panel of fan plug-in box.

Chapter 2 - Plug-in Boxes
FIGURE 21 - FRONT P ANEL OF FAN PLUG-IN BOX
Rear Panel
Figure 22 shows the rear panel of fan plug-in box.
FIGURE 22 – REAR P ANEL OF FAN PLUG-IN BOX
1 2
Monitor POWER
1. Monitor socket 2.Power socket

Indicator Specifications
A fan plug-in box consists of three fan units. Each fan unit has
two indicators. Totally, there are six indicators on the front panel
of fan plug-in box. Table 8 explains the panel indicators.
TABLE 8 – P ANEL INDICATORS OF FAN PLUG-IN BOX
Indicator
Color Meaning State
Name
Running ON：Fan running normal

RUN Green
indicator OFF：Fan running abnormal
Alarm ON：Alarm in fan unit

ALM Red
indicator OFF：No alarm in fan unit
Button Specifications
Each of the three fan units in the fan plug-in box has one button
on the front panel. Press the button to pull out the fan unit.
Interface specifications
Table 9 explains the interfaces of the fan plug-in box.
TABLE 9 – FAN PLUG-IN BOX INTERFACES
Interface Name Description

Connected to FANBOX2~FANBOX4
Monitor
in power distribution plug-in box
POWR Power socket

Dust-Proof Plug-in Box (Air Filter)

The dust-proof plug-in box is fixed on the bottom of the cabinet.
Each dust-proof plug-in box deploys the dust-proof meshwork
inside, which can be easily disassembled for cleaning and
maintenance.

Chapter 3
Shelves
This chapter describes the configuration and backplane

descriptions of ZXG10 iBSC shelves.
Overview
The shelf combines various boards through the backplane to
form an independent unit, and provides good running
environment for the boards.
ZXG10 iBSC system has four types of shelves:
Control shelf (BCTC)
Resource shelf (BUSN)
Packet switching shelf (BPSN)
Gigabit resource shelf (BGSN)
Shelf Functions
Table 10 explains the types and functions of these shelves:
TABLE 10 – TYPES AND FUNCTIONS OF SHELVES
Shelf type Shelf Function

Control Implements global operation and maintenance
shelf functions, global clock function, control plane
(BCTC) processing, and control plane switching and Ethernet
Resource Implements system access, and forms all general
shelf service subsystems (in this shelf, the user plane data
(BUSN) uses megabit switching)
Packet
switching Provides an IP switch platform of large capacity with
shelf no congestion
(BPSN)

Shelf type Shelf Function

Gigabit
Implements system access, and forms all general
resource
service subsystems (in this shelf, the user plane data
shelf
uses gigabit switching)
(BGSN)
Shelf Positions
Figure 23 shows positions of different shelves in ZXG10 iBSC
when the gigabit resource shelf (BGSN) is used.
FIGURE 23 – SHELF POSITIONS (WHEN BGSN IS USED)
Figure 24 shows positions of different shelves in ZXG10 iBSC

when the resource shelf (BUSN) is used.
FIGURE 24 – SHELF POSITIONS (WHEN BUSN IS USED)

Chapter 3 - Shelves
When performing capacity expansion for ZXG10 iBSC that uses

BUSN, BGSN can only be added as an entire one. It should be
noticed that BUSN’s boards and BGSN’s boards can not be
inserted in one shelf.
The shelf configuration, principle, and backplane of ZXG10 iBSC
differ in the case of using BUSN and the case of using BGSN.
This chapter explains these shelves respectively according to the
above two cases.
Backplane
Backplane is an important part of a shelf. Circuit boards in a
shelf connect through printed lines on the backplane. It reduces
the cable routing on the back of backplane and improves
reliability of the whole system.
Figure 25 shows the backplane structure.
FIGURE 25 – BACKPLANE STRUCTURE
1．Backplane fastening bolt 3．Board locating hole
2．Backplane connector 4．Backplane connector
ZXG10 iBSC (V6.20) shelf comprises of different backplanes.

Table 11 explains the relationship between a shelf and a
backplane.

TABLE 11 - RELATIONSHIP BETWEEN A SHELF AND A BACKPLANE
Shelf Backplane
Backplane of packet switching
Packet switching shelf
network (BPSN)
Backplane of control center
Control shelf
(BCTC)
Backplane of universal service
Resource shelf
network (BUSN)
Backplane of gigabit universal
Gigabit resource shelf
service network (BGSN)
Shelf Configurations (Using

BUSN)
This section explains the shelf configurations when the resource
shelf (BUSN) is used.
Control Shelf (BCTC)

Control shelf is the control core of ZXG10 iBSC system, which
manages and controls the whole system, processes control plane
signaling, performs operation and maintenance, and provides a
global clock and external synchronization function. It is used to
form the system’s distributed processing platform.
Each iBSC must be configured with one control shelf, and the
control shelf must be configured in the second layer of cabinet 1.
Configuration Table 12 explains the boards that can be configured in control
shelf.
TABLE 12 – BOARDS IN CONTROL SHELF
Board Rear Board Backplane

OMP MPB rear board (RMPB)
CMP -
UIMC UIM rear board 2 (RUIM2)
UIM rear board 3 (RUIM3)
CHUB CHUB rear board 1 (RCHB1) BCTC
CHUB rear board 2 (RCHB2)
CLKG CLKG rear board 1 (RCKG1)
CLKG rear board 2 (RCKG2)
SBCX SBCX rear board (RSVB)

Chapter 3 - Shelves
Figure 26 shows the full configuration of control shelf.
FIGURE 26 – FULL CONFIGURATION OF CONTROL SHELF
Control Shelf
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
R R R R R R R
R R
S U U C C C C
M M
I I K K H H
V P P
M M G G B B
B B B
2 3 1 2 1 2
BCTC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
C C U U O O C C C C
I I L L H H
SBCX M M M M
M M K K U U
P P C C P P G G B B
Configuration of boards in the control shelf is as follows:

f OMP boards (2, active and standby) are inserted in slots
11 and 12, which are mandatory.
f CMP boards (2 ~ 6) can be inserted in slots 3 ~ 8. The
number of CMP boards to be configured depends on the
configuration capacity.
Note:
If capacity expansion is required for the processing performance,
the CMP board can also be inserted in other shelves. It is
recommended to insert the CMP board in BPSN shelf.
f CLKG boards (2, active and standby) are inserted in slots

Note:
In Figure 26, CLKG can be either CLKG (CLKG) or CLKG (ICM).
Boards of the same type are used in pairs, and boards of
different types can not be inserted in the same shelf.
f CHUB boards (2, active and standby) are inserted in slots

f UIMC boards (2, active and standby) are inserted in slots

f It is necessary to configure one SBCX board. The SBCX

board is fixedly inserted in slot 1, and the rear board
RSVB is inserted in slot 1.
Principle Figure 27 shows the principle of the control shelf.
FIGURE 27 - PRINCIPLE OF CONTROL SHELF
Inter-shelf communication function

f iBSC supports to configure a pair of CLKG boards. Usually,
CLKG is configured on the control shelf. The system clock
is distributed to switching shelves and resource shelves
via the cable.
f OMP and SBCX are connected through HUB. SBCX is
connected with the external public network through the
network interface on its rear board, isolating the internal
and external network segment. OMM is installed on the
SBCX board.
f CHUB is the center where the control flows of the
switching shelf, the resource shelf, and the control shelf
gather.
Intra-shelf communication function
f BCTC backplane bears signaling processing board and MS
modules. It gathers and processes the control plane data

Chapter 3 - Shelves
forming a distributed processing platform in the multi-

shelf system.
f UIMC is the signaling switching center of the control shelf,
implementing the information switching between modules.
f OMP board is responsible for the global processing and
controls O&M of the whole system (including O&M agent).
OMP board is the core of ZXG10 iBSC OMC. It directly or
indirectly monitors and manages the boards. OMP board
uses Ethernet and RS485 to configure and manage the
boards.
f SBCX not only functions as OMM server but also saves
some files needed by OMP, and it organizes these files
according to the form required by OMM.
f CMP board is connected with the switching unit of control
plane, implementing all the protocol processing on control
plane.
Backplane The backplane of control shelf is BCTC. Figure 28 shows the rear
view of BCTC backplane.
FIGURE 28 – REAR VIEW OF BCTC BACKPLANE
X1 X2
ON
OFF
S1 S2 S3
ON 0
OFF 1
Interfaces
Table 13 explains the power interface of control shelf.

TABLE 13 – POWER INTERFACE OF CONTROL SHELF
Interface ID Usage Connection

Through the filter of plug-in box
power, X1 and X2 connect –48
X1, X2 Power socket
V, –48 V GND, and PE connector
posts of rack busbars in parallel.
DIP Switches
Table 14 describes DIP switches on the backplane of control
shelf.
TABLE 14 – DIP SWITCHES ON BACKPL ANE OF CONTROL SHELF
DIP
Function Example
Switch
Configures office Four-digit switch
S1 information for S1 only uses the left three digits
the shelf
S2 uses all four digits
Configures rack S3 only uses the left two digits
S2 information for
If all digits of S1 are ‘ON’ : the binary
the shelf
output is ‘000’;
If all digits of S2 are ‘ON’: the binary
If the left two digits of S3 are ‘OFF’
and the rest are ‘ON’: the binary
Configures shelf output is ‘11’.
S3 information for Therefore, S1 output is 0, S2 output is
the shelf 0, and S3 output is 3. The actual rack
number and shelf number are 1 plus
the output. Thus the above
configuration indicates that the BCTC
shelf is in: Shelf 4, Rack 1, Office 0.
Note:
Backplanes BPSN, BCTC and BUSN all have DIP switches. The
ON/OFF setting method is similar in all the backplanes.
OFF: Indicates ‘1’ if DIP switch is down
ON: Indicates ‘0’ if DIP switch is up
The shelf information can also be configured through jumpers.
One jumper represents a digit. There are three four-way jumper
block, corresponding to information of the office, rack, and shelf,
refer to Table 14 for detailed description.
OFF: Indicates ‘1’ if the short-circuit block is pulled out
ON: Indicates ‘0’ if the short-circuit is plugged in

Chapter 3 - Shelves
Note:
If the rear board RBID is used, then all DIP switches are
arranged on the RBID board.
Packet Switching Shelf (BPSN)

Packet switching shelf provides the IP switching function for user
plane data of all functional entities inside the ZXG10 iBSC
system. It also provides corresponding QoS functions for
different users.
Configuration Table 15 explains the boards that can be configured in packet

switching shelf.
TABLE 15 – BOARDS IN P ACKET SWITCHING SHELF
Board Rear board Backplane

PSN -
GLI -
BPSN
UIMC
Figure 29 shows the full configuration of packet switching shelf.
FIGURE 29 – FULL CONFIGURATION OF PACKET SWITCHING SHELF
Packet Switching Shelf
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
R R
U U
I I
M M
2 3
BPSN
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
U U
G G G G P P
I I
L L L L S S
M M
I I I I N N
C C
Packet switching shelf provides Level-1 IP switching platform

for the ZXG iBSC system. It can either expand the user plane

for multiple resource shelves or provide external high-speed

interfaces directly.
Configuration of boards in the packet switching shelf is as
follows:
f UIMC boards (2) implement Level-1 switching. They are
inserted in slots 15 and 16, which are mandatory.
f PSN boards (2) implement data switching between line
cards. They are inserted in slots 7 and 8, which are
mandatory.
f GLI boards (2 ~ 4) implement GE line interface function.
They can be inserted in slots 1 ~ 4. The number of GLI
boards to be configured depends on the configuration
capacity. GLI boards must be configured in pairs, and are
added from the left to the right.
f RUIM2 board (1) is inserted in slot 15, which are
mandatory.
mandatory.
Principle Figure 30 shows principle of the packet switching shelf.
FIGURE 30 - PRINCIPLE OF PACKET SWITCHING SHELF
Packet Swithcing
分组交换框
Shelf Control Shelf
控制框
FE
PSN UIMC CHUB
LVDS
GLI 厖
... .... GLI CLKG
Optical
光纤
Fiber
UIMU UIMU
Resource Shelf
资源框 Resource
资源框 Shelf
Inter-shelf communication functions

f All resource shelves connect with GLI on the switching
shelf via the optical interface on the front panel of UIMU.
f The control shelf connects with UIMC on the switching
shelf via RCHB1 and RCHB2 (rear board of CHUB).
f Clock signals connect with UIMC on the switching shelf
via RCKG1 and RCKG2 (rear board of CLKG).
Intra-shelf communication functions
i. User plane data

Chapter 3 - Shelves
f The packet switching shelf accesses the user plane data

through GLI and performs relevant processing.
f The data is sent to PSN through the high-speed signal
cable of the backplane for switching.
f GLI receives the switched data from PSN for processing.
f At last, the data is sent to the destination interface.
ii. Control plane data
UIMC switching uses the Ethernet bus as the internal
control bus of the subsystem, connecting all modules in
the subsystem, distributing and collecting route
information, maintaining and managing system
configurations, and realizing high-layer protocol and
signaling data transmission.
Backplane The backplane of packet switching shelf is BPSN. Figure 31

shows the rear view of BPSN.
FIGURE 31 – REAR VIEW OF BPSN BACKPLANE
X1 X2 X3
ON
OFF
S1 S2 S3
ON 0
OFF 1
Interfaces
Table 16 explains the power interfaces of packet switching shelf.
TABLE 16 – POWER INTERFACE OF SWITCHING SHELF
X1, X2, X3 Power socket Through the secondary filter of

plug-in box power X1, X2, and


X3, connect –48 V, –48 V GND,
and PE of rack busbars in parallel.
DIP Switches
DIP switches (S1, S2, and S3) on the BPSN backplane are used
to configure information about the office, rack, and shelf.
Configuration method is the same as that of DIP switches on the
BCTC backplane. For more information, refer to Table 14.
Note:
If the rear board RBID is used, then all DIP switches are
arranged on the RBID board.
Resource Shelf (BUSN)

Resource shelf holds different types of service processing boards
and forms various general service processing subsystems. It can
be configured with Abis interface unit, A-interface unit, PCU, TC
unit, and Ater interface unit.
The resource shelf is usually configured in the first layer and the
third layer of cabinet 1, and any layer of cabinet 2.
Configuration Table 17 explains the boards that can be configured in resource

shelf.
TABLE 17 – BOARDS IN RESOURCE SHELF

DTB RDTB
SDTB RGIM1
UIMU RUIM1
GUP -
BIPI RMNIC
BUSN
SPB RSPB
UPPB -
OMP RMPB
CMP -
EIPI -

Chapter 3 - Shelves
Resource shelf can be configured in many ways. The following is

an example of resource shelf configuration, in which Abis
interface adopts FE+E1, A-interface adopts E1, and Ater
interface adopts E1, as shown in Figure 32.
FIGURE 32 – AN EXAMPLE OF RESOURCE SHELF CONFIGURATION
Configuration of boards in the resource shelf is described as

follows:
UIMU boards (2) are inserted in slots 9 and 10, which are
mandatory.
DTB boards can be configured in any slot except the slots 9,
10, 15 and 16.
SDTB boards can be configured in any slot except the slots 9
and 10. For non-active-standby configuration, it is better to
configure SDTB board in slot 17, if SDTB board is configured
in other slot, the adjacent active and standby slots must not
be configured with boards that use HW cables, such as DTB
and GUP.
GUP, when used as BIPB/TIPB, can be configured in slots 5 ~
8 or 11 ~ 14. If GUP is configured in slots 1 ~ 4, 15 ~ 16,
the adjacent slots of active and standby GUP boards can be
configured with boards not using user plane network ports,
such as DTB and SDTB. When GUP is used as DRTB, it can be
configured in any slot except the slots 9 and 10.
SPB can be configured in any slot except slots 9 and 10. Slot
15 and slot 16 can not be configured with SPB at the same
time.
It is recommended to configure UPPB in slots 5 ~ 8 and 11 ~
14. If UPPB is configured in slots 1 ~ 4, 15 ~ 16, the
adjacent slots of active and standby UPPB boards can be
configured with boards not using user plane network ports,
such as DTB and SDTB.

BIPI board can be configured in slots 5 ~ 8 or 11 ~ 14.

It is better to configure EIPI in slot 5 ~ 8 and 11 ~ 14. If
EIPI is configured in active and standby slots, the adjacent
slots can not be configured with boards using HW cables,
such as DTB, SPB, and SDTB. If EIPI is configured in slots 1
~ 4 and 15 ~ 16, the adjacent slots can not be configured
with boards.
When realizing all iBSC functions only through the resource
shelf, OMP board must be configured and can be inserted in
slots 11 and 12. In this case, CMP board is configured based
on actual requirements and can be inserted in slots 13 and
14.
Principle Figure 33 shows the principle of the resource shelf.
FIGURE 33 - PRINCIPLE OF RESOURCE SHELF
分组交换框控制框
GLI CHUB CLKG
资源框 UIMU
UPPB GUP
SDTB DTB SPB BIPI
STM-1 E1 E1 FE

f UIMU provides the control Ethernet channel to connect
external resource shelves. UIMU connects with CHUB (the
gathering center of the control flows from the control
shelves).
UIMU interconnects with GLI of the packet switching shelf,
implementing Level-1 switching between different
resource boards.
f DTB and SPB provide the interface for E1 line.
f SDTB provides STM-1 access.
f BIPI provides FE access.
f The resource shelf gets system clock from CLKG of the
control shelf through cables.

Chapter 3 - Shelves

f BUSN is the backplane of the resource shelf. Multiple
service processing modules can be inserted, forming the
common service processing subsystem.
f UIMU is the gathering and switching center of various
data of resource shelf, implementing the information
exchange between modules.
f UPPB implements the processing of radio protocol related
to user plane.
f GUP implements code transformation, rate adaptation
and the conversion from TDM to IP packets.
Backplane The backplane of resource shelf is BUSN. Figure 34 shows the

rear view of BUSN backplane.
FIGURE 34 - REAR VIEW OF BUSN BACKPLANE
X1 X2
ON
OFF
S1 S2 S3
ON 0
OFF 1
Interfaces
Table 18 explains the power interface of resource shelf.
TABLE 18 - POWER INTERFACE OF RESOURCE SHELF

X1, X2 Power socket power, X1 and X2 connect –48 V, –
48 V GND, and PE of rack busbars


in parallel.
DIP Switches
DIP switches (S1, S2, and S3) on the BUSN backplane are used
to configure information about the office, rack, and shelf.
Configuration method is the same as that of DIP switches on the
BCTC backplane. For more information, refer to Table 14.
Shelf Configurations (Using

BGSN)
This section explains the shelf configurations when the gigabit
resource shelf (BGSN) is used.
Control Shelf (BCTC)

Configuration Table 19 explains the boards that can be configured in control
shelf when BGSN is used.
TABLE 19 – BOARDS IN CONTROL SHELF (WHEN BGSN IS USED)

OMP MPB rear board (RMPB)
CMP -
UIMC UIM rear board 2 (RUIM2)
CHUB CHUB rear board 1 (RCHB1)
CHUB rear board 2 (RCHB2) BCTC
CLKG CLKG rear board 1 (RCKG1)
CLKG rear board 2 (RCKG2)
ICM CLKG rear board 1 (RCKG1)
CLKG rear board 2 (RCKG2
SBCX SBCX rear board (RSVB)
Figure 35 shows the full configuration of control shelf.

Chapter 3 - Shelves
FIGURE 35 – FULL CONFIGURATION OF CONTROL SHELF (WHEN BGSN IS

USED)
Control Shelf
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
R R R R R R
R R R R
M M C C C C
S S U U
P P K K H H
V V IM IM
B B G G B B
B B 2 3
1 2 1 2
BCTC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
/ / C C
C C C C S S U U O O C CI
B B L I L H H
M M M M IM IM M M
C C U U
P P P P C C C C P P K KM
X X GM G B B
Configuration of boards in the control shelf is as follows:

f OMP boards (2, active and standby) are inserted in slots
f CMP boards (2 ~ 4, active and standby) can be inserted
in slots 1 ~ 4. The number of CMP boards to be
configured depends on the configuration capacity.
Note:
If capacity expansion is required for the processing performance,
the CMP board can also be inserted in other shelves. It is
recommended to insert the CMP board in BPSN shelf.
f SBCX boards (2, active and standby) are inserted in slots

5 and 7.
f CLKG/ICM boards (2, active and standby) are inserted in
slots 13 and 14, which are mandatory.
Note:
Either CLKG (ICM) or ICM must be used. Boards of the same
type are used in pairs, and boards of different types can not be
inserted in the same shelf.
f CHUB boards (2, active and standby) are inserted in slots

f UIMC boards (2, active and standby) are inserted in slots
f RUIM2 board (1) is inserted in slot 9 fixedly, which is
mandatory.

f RUIM3 board (1) is inserted in slot 10 fixedly, which is

mandatory.
f RMPB boards (2) are inserted in slots 11 and 12 fixedly,
which are mandatory.
f RCKG1 board (1) is inserted in slot 13 fixedly.
f RCKG2 board (1) is inserted in slot 14 fixedly.
f RCHB1 board (1) is inserted in slot 15 fixedly.
f RCHB2 board (1) is inserted in slot 16 fixedly.
f RSVB boards (2) are inserted in slots 5 and 7 fixedly.
f RBID board (1) is configured in BCTC shelf.
Principle Figure 36 shows the principle of the control shelf when BGSN is
used.
FIGURE 36 - PRINCIPLE OF CONTROL SHELF (WHEN BGSN IS USED)
Packet Gigabit resource

switching shelf shelf
UIMC GUIM DTB/SDTB

/SDTB2
8K/16M/PP2S 8 K reference
CHUB UIMC CLKG/ICM
Ethernet bus
CMP OMP SBCX

Control shelf
HUB
External public
network

f iBSC supports to configure a pair of CLKG/ICM boards.
Usually, CLKG/ICM is configured on the control shelf. The
system clock is distributed to switching shelves and
gigabit resource shelves via the cable.
f OMP and SBCX are connected through HUB. SBCX is
connected with the external public network through the
network interface on its rear board, isolating the internal

Chapter 3 - Shelves
and external network segment. OMM is installed on the

SBCX board.
f CHUB is the center where the control flows of the
switching shelf, the gigabit resource shelf, and the control
shelf gather.
f BCTC backplane bears signaling processing board and MS
modules. It gathers and processes the control plane data
forming a distributed processing platform in the multi-
shelf system.
f UIMC is the signaling switching center of the control shelf,
implementing the information switching between modules.
f OMP board is responsible for the global processing and
controls O&M of the whole system (including O&M agent).
OMP board is the core of ZXG10 iBSC OMC. It directly or
indirectly monitors and manages the boards. OMP board
uses Ethernet and RS485 to configure and manage the
boards.
f SBCX not only functions as OMM server but also saves
some files needed by OMP, and it organizes these files
according to the form required by OMM.
f CMP board is connected with the switching unit of control
plane, implementing all the protocol processing on control
plane.
Backplane The backplane of control shelf is BCTC. Figure 37 shows the rear
view of BCTC backplane.

FIGURE 37 – REAR VIEW OF BCTC BACKPLANE (WHEN BGSN IS USED)
RBID
X1 X2
ON 0
OFF 1
Interfaces
Table 20 explains the power interface of control shelf.
TABLE 20 – POWER INTERFACE OF CONTROL SHELF (WHEN BGSN IS USED)

power, X1 and X2 connect –48
X1, X2 Power socket
V, –48 V GND, and PE connector
posts of rack busbars in parallel.
DIP Switches
DIP switches are arranged on the RBID board, as shown in
Figure 38.

Chapter 3 - Shelves
FIGURE 38 – DIP SWITCHES ON RBID BOARD
X2
X3
X4
Table 21 describes DIP switches on the backplane of control

shelf.
TABLE 21 – DIP SWITCHES ON BACKPL ANE (WHEN BGSN IS USED)
DIP
Function Example
Switch
Configures office Four-digit switch
S1 information for S1 only uses the left three digits
the shelf
S2 uses all four digits
Configures rack S3 only uses the left two digits
S2 information for
If all digits of S1 are ‘ON’ : the binary
the shelf
If all digits of S2 are ‘ON’: the binary
If the left two digits of S3 are ‘OFF’
and the rest are ‘ON’: the binary
Configures shelf output is ‘11’.
S3 information for Therefore, S1 output is 0, S2 output is
the shelf 0, and S3 output is 3. The actual rack
number and shelf number are 1 plus
the output. Thus the above
configuration indicates that the BCTC
shelf is in: Shelf 4, Rack 1, Office 0.

Note:
Backplanes BPSN, BCTC and BGSN all have DIP switches. The
ON/OFF setting method is similar in all the backplanes.
OFF: Indicates ‘1’ if DIP switch is down
ON: Indicates ‘0’ if DIP switch is up
The shelf information can also be configured through jumpers.
One jumper represents a digit. There are three four-way jumper
block, corresponding to information of the office, rack, and shelf,
refer to Table 21 for detailed description.
OFF: Indicates ‘1’ if the short-circuit block is pulled out
ON: Indicates ‘0’ if the short-circuit is plugged in
Packet Switching Shelf (BPSN)

Configuration Table 22 explains the boards that can be configured in packet
switching shelf when BGSN is used.
TABLE 22 – BOARDS IN P ACKET SWITCHING SHELF (WHEN BGSN IS USED)
Board Rear board Backplane

PSN -
GLI -
CMP - BPSN
UIMC
Figure 39 shows the full configuration of packet switching shelf.

Chapter 3 - Shelves
FIGURE 39 – FULL CONFIGURATION OF PACKET SWITCHING SHELF (WHEN

BGSN IS USED)
Packet Switching
Shelf
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
R R
U U
I I
M M
2 3
BPSN
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
U U
G G G G G G P P C C C C
I I
L L L L L L S S M M M M
M M
I I I I I I N N P P P P
C C
Packet switching shelf provides Level-1 IP switching platform

for the ZXG iBSC system. It can either expand the user plane
for multiple resource shelves or provide external high-speed
interfaces directly. Each pair of GLIs provides eight pairs of
active/standby optical interfaces. Thus three pairs of GLIs
provide 24 pairs of optical interfaces to interconnect with the
24 pairs of active/standby optical interfaces of GUIMs of the
six gigabit resource shelves. Each GUIM board fixedly uses
two pairs of optical interfaces.
Configuration of boards in the packet switching shelf is as
follows:
f UIMC (2, active and standby) boards implement Level-1
switching. They are inserted in slots 15 and 16, which are
mandatory.
f PSN boards (2, load sharing) implement data switching
between line cards. They are inserted in slots 7 and 8,
which are mandatory.
f GLI boards (2 ~ 6, load sharing) implement GE line
interface function. They can be inserted in slots 1 ~ 6.
The number of GLI boards to be configured depends on
the configuration capacity. GLI boards must be
configured in pairs, and are added from the left to the
right.
f CMP board (0 ~ 2, active and standby) can be inserted in
slots 11 ~ 14. One pair of CMP boards is configured for
every 1024 carriers.
mandatory.
mandatory.

f RBID board (1) is configured in BPSN shelf.
Principle Figure 40 shows principle of the packet switching shelf when

BGSN is used.
FIGURE 40 - PRINCIPLE OF P ACKET SWITCHING SHELF (WHEN BGSN IS USED)
Inter-shelf communication functions

f All resource shelves connect with GLI on the switching
shelf via the optical interface on the front panel of GUIM.
f The control shelf connects with UIMC on the switching
shelf via RCHB1 and RCHB2 (rear board of CHUB).
f Clock signals connect with UIMC on the switching shelf
via RCKG1 and RCKG2 (rear board of CLKG/ICM).
Intra-shelf communication functions
i. User plane data
f The packet switching shelf accesses the user plane data
through GLI and performs relevant processing.
f The data is sent to PSN through the high-speed signal
cable of the backplane for switching.
f GLI receives the switched data from PSN for processing.
f At last, the data is sent to the destination interface.
ii. Control plane data
UIMC switching uses the Ethernet bus as the internal
control bus of the subsystem, connecting all modules in
the subsystem, distributing and collecting route
information, maintaining and managing system
configurations, and realizing upper-level protocol and
signaling data transmission.

Chapter 3 - Shelves
Backplane The backplane of packet switching shelf is BPSN. Figure 41

shows the rear view of BPSN.
FIGURE 41 – REAR VIEW OF BPSN BACKPLANE
X1 X2 X3
RBID
ON 0
OFF 1
Interfaces
Table 23 explains the power interfaces of packet switching shelf.
TABLE 23 – POWER INTERFACE OF SWITCHING SHELF

Through the secondary filter of
plug-in box power X1, X2, and
X1, X2, X3 Power socket
X3, connect –48 V, –48 V GND,
and PE of rack busbars in parallel.
DIP Switches
DIP switches on the BPSN backplane are arranged on RBID
board (X2, X3, and X4). They are used to configure information
about the office, rack, and shelf. Configuration method is the
same as that of DIP switches on the BCTC backplane. For more
information, refer to Table 21.

Gigabit Resource Shelf (BGSN)

Gigabit resource shelf holds different types of service processing
boards and forms various general service processing subsystems.
It can be configured with Abis interface unit, A-interface unit,
PCU (i.e. GIU), TC unit, and Ater interface unit.
There is no specific requirement for the gigabit resource shelf
position. It is usually configured in the first layer and the third
layer of cabinet 1, and any layer of cabinet 2.
Configuration Table 24 explains the boards that can be configured in gigabit

resource shelf.
TABLE 24 – BOARDS IN GIGABIT RESOURCE SHELF

DTB RDTB
SDTB2 RGIM1
GUIM rear board 1 (RGUM1)
GUIM
GUIM rear board 2 (RGUM2)
GUP2 -
BGSN
GIPI RGER
SPB2 RSPB
EIPI -
OMP RMPB
CMP -
Gigabit resource shelf can be configured in many ways. The

following is an example of gigabit resource shelf configuration, in
which Abis interface adopts E1 or IPOE, A-interface adopts E1,
and Gb interface adopts E1, as shown in Figure 42.

Chapter 3 - Shelves
FIGURE 42 – AN EXAMPLE OF GIGABIT RESOURCE SHELF CONFIGURATION
Gigabit Resource Shelf
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
R R R R R R R R R R
G S D S G G M M D S
IM P T P U U P P T P
1 B B B M M B B B B
1 2
BGSN
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
S S G G
G S G O O D E G S
D D
U P P U U U M M T I U P
T T
P B B P I I P P B P P B
B B
2 2 2 2 M M I 2 2
2
Configuration of boards in the gigabit resource shelf is described

as follows:
GUIM boards (2, active and standby) are inserted in slots 9
and 10, which are mandatory. They lead out multi-mode
fiber connecting level-1 switching.
DTB boards can be configured in any slot except the slots 9,
10, 15 and 16. DTB boards can not be configured in more
than 3 consecutive slots. It is advised not to configure DTB in
slots 1 and 17. It is recommended to configure six DTBs in
each shelf, and the maximum number of DTBs configured in
each shelf is not more than eight.
SDTB2 boards (active-standby configuration) can be
configured in any slot except slots 9, 10, and 17. The SDTB2
panel leads out two pairs of single-mode fiber. If the SDTB2
board is of non-active-standby configuration, when SDTB2
board is configured in active or standby slot, the adjacent
active and standby slots must not be configured with boards
that use HW cables, such as DTB, GUP2, SPB2, and EIPI.
GUP2 can be configured in any slot except slots 9, 10, 1, and
17.
SPB2 can be configured in any slot except slots 9 and 10.
Slot 15 and slot 16 can not be configured with SPB2 at the
same time.
GIPI can be configured in any slot except slots 9 and 10. Slot
15 and slot 16 can not be configured with GIPI at the same
time. The panel has a gigabit optical interface; when
configured with RGER, the panel has a gigabit electrical
interface; when configured with RMNIC, the panel has four
megabit electrical interfaces (active-standby configuration).

GIPI board is used to provide OMCB channel. It can be

configured in slots 5 ~ 8, 13, and 14 when being used to
connect MR server (GIPI is of active-standby configuration).
In such cases, the GIPI board provides four FEs both
internally and externally, the corresponding rear board is
RMNIC.
EIPI board can be configured in any slot except slots 9 and
10. Slot 15 and slot 16 can not be configured with EIPI at the
same time.
When realizing all iBSC functions through one gigabit
resource shelf or through two gigabit resource shelves, OMP
board must be configured and can be inserted in slots 11 and
12. In this case, CMP board is configured based on actual
requirements and can be inserted in slots 11 ~ 14.
For SDTB2, SPB2, GIPI, EIPI, and GUP2 board, if the board is
configured in slot 15 or 16, the TDM board can not extract
the line 8 K clock reference, and the serial port of slot 16 can
not be used.
RGUM1 board (1) and RGUM2 board (1) are inserted in slots
RDTB, RSPB, and RGER/RMNIC board are configured
corresponding to each front board.
The SDTB2 rear board (RGIM1) is used to extract STM-1 line
8 K clock. Thus when it is not required to extract the line
clock, SDTB2 is not configured. Usually, when the number of
configured SDTB2 is more than one, two RGIM1s should be
configured, and two clock extracting cables are also required.
RBID board (1) is configured in BGSN shelf.
Principle Figure 43 shows the principle of the gigabit resource shelf.
FIGURE 43 - PRINCIPLE OF GIGABIT RESOURCE SHELF

Chapter 3 - Shelves

f GUIM provides the control Ethernet channel to connect
external gigabit resource shelves. GUIM connects with
CHUB (the gathering center of the control flows from the
control shelves).
GUIM interconnects with GLI of the packet switching shelf,
implementing Level-1 switching between different
resource boards.
f DTB and SPB2 provide the interface for E1 line.
f SDTB2 provides STM-1 access.
f GIPI provides GE access.
f EIPI provides E1/T1-based IP access, and works with DTB
or SDTB2.
f The gigabit resource shelf gets system clock from
CLKG/ICM of the control shelf through cables.
f BGSN is the backplane of the gigabit resource shelf.
Multiple service processing modules can be inserted,
forming the common service processing subsystem.
f GUIM is the gathering and switching center of various
data of gigabit resource shelf, implementing the
information exchange between modules.
f GUP2 implements user-plane-related radio protocol
processing, TC code transformation, rate adaptation and
conversion from TDM to IP packet.
f GIPI provides one gigabit electrical interface or four
megabit interfaces through the backplane for the internal
user plane.
Backplane The backplane of gigabit resource shelf is BGSN. Figure 44

shows the rear view of BGSN backplane.

FIGURE 44 - REAR VIEW OF BGSN BACKPLANE
X1 X2 X3
RBID
ON 0
OFF 1
Interfaces
Table 25 explains the power interface of gigabit resource shelf.
TABLE 25 - POWER INTERFACE OF GIGABIT RESOURCE SHELF

power, X1, X2, and X3 connect –48
X1, X2, X3 Power socket
V, –48 V GND, and PE of rack
busbars in parallel.
DIP Switches
DIP switches (X2, X3, and X4) on the BGSN backplane are
arranged on RBID board. They are used to configure information
about the office, rack, and shelf. Configuration method is the
same as that of DIP switches on the BCTC backplane. For more
information, refer to Table 21.
Inter-Shelf Connections
Internal connections of ZXG10 iBSC system are used for signal
interconnection between boards.

Chapter 3 - Shelves
The internal connections of ZXG10 iBSC differ in the case of

using BUSN and the case of using BGSN. This section explains
these respectively according to the above two cases.
Internal Connections (Using BUSN)

In ZXG10 iBSC, when the resource shelf (BUSN) is used, internal
connections involve the following types of cables:
Clock distribution cable and line clock extracting cable
Control plane Ethernet cable
User plane fiber
Monitoring cable
Clock Figure 45 shows the clock extracting and distribution inside a

Extracting and single cabinet.
Distribution
FIGURE 45 – SINGLE CABINET CLOCK EXTRACTING AND DISTRIBUTION
(USING BUSN)
Note:
In Figure 45, CLKG can be either CLKG (CLKG) or CLKG (ICM),
both providing clock for the system. DTB, SDTB, and SPB can
extract clock signal for CLKG, and DTB is taken for example in
Figure 45.

Figure 46 shows the clock extracting and distribution inside dual

cabinets.
FIGURE 46 – DUAL-CABINET CLOCK EXTRACTING AND DISTRIBUTION (USING

BUSN)
Clock reference
The line clock from CN is extracted from the interface board
and sent to CLKG board.
The CLKG board can also get the BITS clock reference.
Clock distribution
The rear boards (RCKG1, RCKG2) of CLKG board are
connected with UIMU/UIMC board of each shelf through the
clock cable, and UIMU/UIMC distributes the clock signals to
slots of each shelf.
Control Plane Figure 47 shows the control plane connections inside a single
Ethernet cabinet.
Connections

Chapter 3 - Shelves
FIGURE 47 – SINGLE CABINET CONTROL PLANE ETHERNET CONNECTIONS

(USING BUSN)
In Figure 47, the real line represents the cable connection while
the broken line represents the backplane printed cable
connection.
The iBSC system control plane Ethernet interconnection is
realized through CHUB board.
UIMU in the resource shelf or UIMC in the packet switching
shelf is connected with CHUB board through Ethernet cable.
UIMC in the control shelf is connected CHUB board through
the backplane printed cable.
Figure 48 shows the control plane connections inside dual

cabinets.

FIGURE 48 – DUAL-CABINET CONTROL PLANE ETHERNET CONNECTIONS

(USING BUSN)
connection.
The iBSC dual-cabinet control plane Ethernet interconnection is
realized as follows:
Connect UIMC/UIMU boards in all shelves except the control
shelf in cabinet 1 with CHUB boards through the cables.
Connect UIMC board in the control shelf in cabinet 1 with
CHUB board through the backplane printed cable.
User Plane Figure 49 shows the user plane connections inside a single
Connections cabinet.

Chapter 3 - Shelves
FIGURE 49 – SINGLE CABINET USER PLANE CONNECTIONS (USING BUSN)
Fiber optic cables are used for the connections between GLI and
UIMU.
Figure 50 shows the user plane connections inside dual cabinets.
FIGURE 50 – DUAL-CABINET USER PLANE CONNECTIONS (USING BUSN)
Monitoring Figure 51 shows the monitoring cable connections inside a single

Circuit cabinet.
Connections

FIGURE 51 – SINGLE CABINET MONITORING CABLE CONNECTIONS (USING

BUSN)
The fan plug-in box is connected with the power distribution

plug-in box through cables, realizing the monitoring of fan plug-
in box.
The OMP board is connected with the PWRD board in power
plug-in box, realizing the monitoring of PWRD board.
Sensors are connected with the power distribution plug-in box,
realizing the monitoring of the external environment.
Figure 52 shows the monitoring cable connections inside dual

cabinets.

Chapter 3 - Shelves
FIGURE 52 – DUAL-CABINET MONITORING CABLE CONNECTIONS (USING

BUSN)
Sensor
Cabinet 1 Cabinet 2
Cabinet-top fan Cabinet-top fan
Power distribution plug-in Power distribution plug-in
box box
Fan plug-in box Fan plug-in box
U U
D D
Resource I
T
I
T
M Resource shelf M
shelf U
B U
B
U C C U
O D
I L H I
Control shelf M
M
K U
Resource shelf M
T
C
P G B U
B

U U
Resource D D
I I
T Resource shelf T
shelf M
B
M
B
U U
U U
G D
I I
Packet switching shelf L
M Resource shelf M
T
I B
C U

plug-in box in the same cabinet through cables, realizing the
monitoring of fan plug-in box.
The OMP board in cabinet 1 is connected with the PWRD board in
the same cabinet while the PWRD board in cabinet 2 is
connected with the PWRD board in cabinet 1, realizing the
monitoring of PWRD boards in cabinet 1 and 2.
Sensors are connected with the power distribution plug-in box in
cabinet 1, realizing the monitoring of the external environment.
Internal Connections (Using BGSN)

In ZXG10 iBSC, when the gigabit resource shelf (BGSN) is used,
internal connections involve the following types of cables:
Clock distribution cable and line clock extracting cable
Control plane Ethernet cable
User plane fiber
Monitoring cable
Clock Figure 53 shows the clock extracting and distribution inside a

Extracting and single cabinet.
Distribution

FIGURE 53 – SINGLE CABINET CLOCK EXTRACTING AND DISTRIBUTION

(USING BGSN)
Note:
In Figure 53, CLKG can be either CLKG (ICM) or ICM, both
providing clock for the system. DTB, SDTB2, and SPB2 can
extract clock signal for CLKG (ICM)/ICM, and DTB is taken for
example in Figure 53.
Figure 54 shows the clock extracting and distribution inside dual

cabinets.
FIGURE 54 – DUAL-CABINET CLOCK EXTRACTING AND DISTRIBUTION (USING

BGSN)

box box
G G
D Gigabit
Gigabit U
T
U
resource shelf I
B resource shelf I
M M
U C C G
Control I
O
L H
Gigabit U
M
shelf M
P
K U resource shelf I
C G B M
G G
D Gigabit
Gigabit U
T
U
resource shelf I
B resource shelf I
M M
U G
Packet switching I Gigabit U
shelf M I
C
resource shelf M

Chapter 3 - Shelves
Clock reference
The line clock from CN is extracted from the interface board
and sent to CLKG (ICM)/ICM board.
The CLKG (ICM)/ICM board can also get the BITS clock
reference or obtain the clock reference from GPS module.
Clock distribution
The rear boards (RCKG1, RCKG2) of CLKG (ICM)/ICM board
are connected with GUIM/UIMC board of each shelf through
the clock cable, and GUIM/UIMC distributes the clock signals
to slots of each shelf.
Control Plane Figure 55 shows the control plane connections inside a single
Ethernet cabinet.
Connections
FIGURE 55 – SINGLE CABINET CONTROL PLANE ETHERNET CONNECTIONS
(USING BGSN)
connection.
The iBSC system control plane Ethernet interconnection is
realized through CHUB board.
GUIM in the gigabit resource shelf or UIMC in the packet
switching shelf is connected with CHUB board through
Ethernet cable.
UIMC in the control shelf is connected CHUB board through
the backplane printed cable.

Figure 56 shows the control plane connections inside dual

cabinets.
FIGURE 56 – DUAL-CABINET CONTROL PLANE ETHERNET CONNECTIONS

(USING BGSN)

box box
G G
Gigabit U
D Gigabit U
T resource shelf
resource shelf I
B
I
M M
U C C G
I
O
L H
Gigabit U
Control shelf M
M
C P G B M
G G
Gigabit D Gigabit
U U
T
resource shelf I
B resource shelf I
M M
U G
Packet switching I Gigabit U
shelf M resource shelf I
C M
connection.
The iBSC dual-cabinet control plane Ethernet interconnection is
realized as follows:
Connect UIMC/GUIM boards in all shelves except the control
shelf in cabinet 1 with CHUB boards through the cables.
Connect UIMC board in the control shelf in cabinet 1 with
CHUB board through the backplane printed cable.
User Plane Figure 57 shows the user plane connections inside a single
Connections cabinet.

Chapter 3 - Shelves
FIGURE 57 – SINGLE CABINET USER PLANE CONNECTIONS (USING BGSN)
Fiber optic cables are used for the connections between GLI and
GUIMs in the gigabit resource shelf.
Figure 58 shows the user plane connections inside dual cabinets.
FIGURE 58 – DUAL-CABINET USER PLANE CONNECTIONS (USING BGSN)

box box
G G
D D
Gigabit U
T
Gigabit U
T
I I
resource shelf B resource shelf B
M M
U C C G
I
O
L H Gigabit U
D
Control shelf M
M
T
C
P G B M B
G G
D D
Gigabit U Gigabit U
T T
resource shelf I resource shelf I
M
B M
B
Packet U G
G
I Gigabit U
D
switching L
M resource shelf I
T
I B
shelf C M
Monitoring Figure 59 shows the monitoring cable connections inside a single

Circuit cabinet.
Connections

FIGURE 59 – SINGLE CABINET MONITORING CABLE CONNECTIONS (USING

BGSN)

plug-in box through cables, realizing the monitoring of fan plug-
in box.
The OMP board is connected with the PWRD board in power
plug-in box, realizing the monitoring of PWRD board.
Sensors are connected with the power distribution plug-in box,
realizing the monitoring of the external environment.
Figure 60 shows the monitoring cable connections inside dual

cabinets.

Chapter 3 - Shelves
FIGURE 60 – DUAL-CABINET MONITORING CABLE CONNECTIONS (USING

BGSN)

plug-in box in the same cabinet through cables, realizing the
monitoring of fan plug-in box.
The OMP board in cabinet 1 is connected with the PWRD board in
the same cabinet while the PWRD board in cabinet 2 is
connected with the PWRD board in cabinet 1, realizing the
monitoring of PWRD boards in cabinet 1 and 2.
Sensors are connected with the power distribution plug-in box in
cabinet 1, realizing the monitoring of the external environment.


Chapter 4
Boards
This chapter describes the functions and descriptions of ZXG10

iBSC boards.
Overview
According to the hardware assembly relation, boards can be
classified as front board and rear board.
Front board has a front panel. Indicators on the front panel
indicate the board status. Front board can be inserted in the
slots.
Rear board consists of the external interfaces and debugging
interfaces. These interfaces are used to interconnect shelves
of same cabinet or different cabinets. The rear board and the
front board work together. For some active/standby front
board, it is necessary to configure two kinds of rear boards.
Front board and rear board are installed in the slots on the
backplane.
Front board and rear board form a complete metal shield
inside the shelf, reducing the external electromagnetic
radiation of the system and enhancing the anti-interference
capability.
Figure 61 shows the board assembly relation.

FIGURE 61 – BOARD ASSEMBLY RELATION
1 2 3 4 5 6
1. Front board panel 4. Slot

2. Front board 5. Rear board
3. Backplane 6. Rear board Panel
Control Plane HUB (CHUB)

Function CHUB along with UIMC/UIMU/GUIM is used to extend the data
flow of system control plane in the ZXG10 iBSC system.
Principle Figure 62 shows the working principles of CHUB.
FIGURE 62 - WORKING PRINCIPLE OF CHUB
RS485
Logic unit CPU unit RS232
PCI Bus
Ethernet Ethernet
sw itching unit
switching switching
Ethernet
GE
FE
CHUB consists of the following three units.

f CPU unit

Chapter 4 - Boards
It connects the logic unit and Ethernet switching unit via

the control bus, to configure the switching chipset. It
provides external RS323 and RS485 serial ports for
debugging.
f Logic unit
It implements all logic processing functions of the boards.
f Ethernet switching unit
It performs Ethernet switching, implementing the
gathering on the control plane.
Board data flow direction
f The data of the control plane from all shelves is sent to
Ethernet switching unit on CHUB.
f The data is sent to UIMC on the control shelf via Interface
GE, and then is distributed to RCB for processing and vice
versa.
Board Panel
Description
Figure 63 shows the panel diagrams of CHUB board and its rear
board (RCHB1 and RCHB2).

FIGURE 63 – CHUB, RCHB1, RCHB2 PANELS
CHUB
ENUM RUN
ACT ALM
EXCH
RST
L1 L2
L3 L4
L5 L6
RCHB1 RCHB2 RCHB1 RCHB2
L7 L8
L9 L10
Even FE2-16
Odd FE1-15
L11 L12
FE25-32
L13 L14
FE1-8
L15 L16
L17 L18
L19 L20
L21 L22
L23 L24
Even FE18-32
Odd FE17-31
FE33-40
FE9-16
L25 L26
L27 L28
L29 L30
L31 L32
L33 L34
L35 L36
Even FE34-46
Odd FE33-45
L37 L38
FE17-24
FE41-46
L39 L40
L41 L42
L43 L44
L45 L46
DEBUG-FE/232
DEBUG-FE/232
DEBUG-FE/232
DEBUG-FE/232
1 2 3 4 5
1. CHUB Panel 4. RCHB1 Panel (version 040502)
2. RCHB1 Panel (version 040501) 5. RCHB2 Panel (version 040502)

3. RCHB2 Panel (version 040501)
Indicators
There are 50 indicators on CHUB board panel. Table 26 explains
the CHUB board panel indicators.
TABLE 26 – CHUB BOARD P ANEL INDICATORS
Indicators Color Meaning Description

Run
RUN Green Refer to Table 30
indicator
ON: indicates the board is
Active/Stan active
ACT Green dby
indicator OFF: indicates the board is
standby

Chapter 4 - Boards
Indicators Color Meaning Description

Alarm
ALM Red Refer to Table 30
indicator
Always ON: indicates that
tack switch has been
opened; the board has not
been inserted properly; the
version has not been
downloaded
Flashing at 5 Hz (fast):
indicates that there is an
alarm for tack switch; tack
Board switch has been opened while
ENUM Yellow extraction the board is running
indicator
Flashing at 1 Hz (slow):
indicates that the board can
be pulled out; tack switch has
been opened while the board
is running; the board can be
pulled out when in standby
status
Always OFF: indicates that
tack switch is normal
Status
indicator ON: Related control plane
for 46- cascade 100 Mbps interface is
channel connected
L1-L46 Green control
plane OFF: Related control plane
cascade cascade 100 Mbps interface is
network not connected
interface
Buttons
Table 27 explains the CHUB board panel buttons.
TABLE 27 – CHUB P ANEL BUTTONS
Button Description
RST Reset switch
Active/Standby switchover
EXCH
switch
External Interfaces
CHUB provides 46 external 100 Mbps Ethernet interfaces and
one Gigabit interface.
Table 28 explains the CHUB external interfaces.

TABLE 28 – CHUB EXTERNAL INTERFACES
Interface
Location Direction Description
Name
Bi-
FE1-8
directional
RCHB1 Bi- Connecting the control

FE9-16
panel directional plane port of UIM
(version Bi-
040501) FE17-24
directional
DEBUG- Bi- CPU system debugging
FE/232 directional interface/serial port
Bi-
FE25-32
directional

FE33-40
(version Bi-
040501) FE41-46
directional
Bi-
Odd FE1-15
directional

Odd FE17-31
(version Bi-
040502) Odd FE33-45
directional
Bi-
Even FE2-16
directional

Even FE18-32
(version Bi-
040502) Even FE34-46
directional
Note:
The rear board RCHB1 (version 040501) works with the rear
board RCHB2 (version 040501), while the rear board RCHB1
(version 040502) works with the rear board RCHB2 (version
040502).

Chapter 4 - Boards
BSC IP Interface Board (BIPI)

BIPI is the IP interface board of BSC. Each BIPI board provides
four external interfaces.
Functions BIPI board provides IP interface between ZXG10 iBSC and BTS,
SGSN, and MSC/MGW.
According to functions, the BIPI board is divided into the
following three types of functional boards:
Abis Interface IP Interface Board (IPBB)
A-Interface IP Interface Board (IPAB)
Gb Interface IP Interface Board (IPGB)
Principle Panel
Figure 64 shows the working principles of BIPI.
FIGURE 64 - WORKING PRINCIPLE OF BIPI
FE1
FE2
FE3 )
背
DEBUGRS232
FE4 板
接
Control
前口控制面FE
Plane
面单 User
P CI 总线
板元用户面FE
Plane
内部总线
Logic
逻辑单元
Unit
Service Processing
业务处理单元Unit
BIPI board consists of three units:

f Service Processing Unit
It processes related protocol and implements the isolation
of user plane and control plane.
f Logic Unit

It implements all logical processing function of the board.

f Interface Unit
It provides four FE interfaces and RS232 serial interface
for debugging. The relevant interfaces on BIPI board are
as shown in Table 32.
Data flow direction
Data access the interface unit, are sent to service processing
unit and separated to be user plane data and control plane
data. The user plane data are sent to GUP or UPPB for
processing via user plane switching network and the control
plane data are sent to CMP for processing via control plane
network switching network.
Board Panel
Description
RMNIC is the rear board of BIPI. Figure 65 shows the panel
diagram of BIPI and RMNIC.

Chapter 4 - Boards
FIGURE 65 – BIPI AND RMNIC P ANELS
BIPI
ENUM RUN
ACT ALM
EXCH
RST
LINK1 LINK2
LINK3 LINK4
RMNIC
FE1
FE2
FE3
FE4
DEBUG-FE
8KOUT/ARM232 PrPMC232
1 2
1. BIPI Panel 2. RMNIC Panel
Indicators
Table 29 explains the BIPI panel indicators.
TABLE 29 – BIPI P ANEL INDICATORS
Indicator Color Meaning Description

Run
indicator
Alarm
indicator
ENUM Yellow Board Always ON: indicates that tack


extraction switch has been opened; the
indicator board has not been inserted
properly; the version has not
been downloaded
indicates that there is an alarm
for tack switch; tack switch has
been opened while the board is
running
indicates that the board can be
pulled out; tack switch has
running; the board can be
status
Always OFF: indicates that tack
switch is normal
ON: Indicates the board is
Active/ active
ACT Green Standby
indicator OFF: Indicates the board is
standby
ON: FE1 ~ FE4 interface ports
FE1 ~ FE4 are connected
Link 1 ~ 4 Green status
indicator OFF: FE1 ~ FE4 interface ports
are not connected
Combination of indicators RUN and ALM indicate the board

status. For more information refer to Table 30.
TABLE 30 – RUN/ ALM COMBINATION DESCRIPTION
RUN
Status ALM Status Meaning
Status
Flashing at
Normal
1 Hz Always OFF Normal running
running
periodically
Flashing at
Version
5 Hz Always OFF Version download
download
periodically
Version download fails
Flashing at Flashing at 5
because the board is
1 Hz Hz
inconsistent with
periodically periodically
configuration

Chapter 4 - Boards
RUN
Status ALM Status Meaning
Status
DEBUG version indicates
that VxWorks download
has succeeded, waiting
for the version download
Always ON Always OFF
RELEASE version
indicates that version
download has succeeded,
starting the version
Flashing at 5
Always OFF Hz Board self-test failure
Self-test periodically
failure Flashing at 2
Startup failure of
Always OFF Hz
operation support system
periodically
Failed to get logical
5 Hz Hz
addresses
Basic process power-on
5 Hz Hz
failure or timeout
5 Hz Hz Core data area initiation
Flashing at Flashing at Alarm due to the
5 Hz 0.5 Hz mismatch of version and
periodically periodically hardware or configuration
Running Flashing at Flashing at 5
Media panel
failure 2 Hz Hz
communication is broken
alarm periodically periodically
2 Hz Hz Broken HW
1 Hz Hz OMP Link is broken
Active/standby switchover
1 Hz Hz
is being implemented
Flashing at
1 Hz Always ON Hardware clock is lost
periodically
Buttons
Table 31 explains the BIPI panel buttons.

TABLE 31 – BIPI P ANEL BUTTONS
Indicator Description
RST Board reset
EXCH Active/Standby switchover
External Interfaces
RMNIC provides four external 100 Mbps Ethernet interfaces.
Table 32 explains the interfaces on RMNIC panel.
TABLE 32 – RMNIC P ANEL INTERFACES
Location Interface Direction Description

Bi-
FE1
directional
Bi-
FE2
directional Connected to BTS,
Bi- SGSN, MSC/MGW
FE3
directional
Bi-
FE4
directional
RMNIC Ethernet network

Bi- interface for debugging;
DEBUG-FE
directional connected to the debug
machine (unused).
3 × 232 serial port,
Bi-
PrPMC232 connected with the
directional
external PC (unused).
Connected with CLKG
8KOUT/ARM23 Output/Bi- and provides the
2 directional debugging serial port of
8 kHz clock reference
GSM Universal Processing Board

(GUP)
Functions According to functions, the GUP board is divided into the
Ater Interface Processing Board (TIPB)
The TIPB board realizes TDM/IP conversion at Ater interface.
In other words, finding out 20 ms TRAU frames according to
channel and making them into IP packet.
Abis Interface Processing Board (BIPB)

Chapter 4 - Boards
The CS service and PS service from BTS are switched to the

BIPB board through the circuit switching network of the UIM
board. The 20 ms TRU frames (or PCU frames) are found out
according to channel on BIPB, then the TRU frames (or PCU
frames) are made into IP packet and sent to TCU (or UPU)
for processing.
Dual Rate Transcoder Board (DRTB)
The DRTB board realizes TRAU frame transcoding and rate
adaptation, and provides FR/EFR/HR/AMR/TFO functions.
Principle Figure 66 shows the working principle of GUP.
FIGURE 66 – WORKING PRINCIPLE OF GUP
HW
Circuit switching
unit
DSP unit
Host
interface
DSP User
P FE
plane
Ethernet
switching
unit
CPU unit Control bus DSP
P
Clock unit Logic unit
Control plane FE
GUP board consists of six units:

f CPU
Implements the management functions of board,
processes the Abis interface signaling and provide
external control plane FE interface.
f Logic Unit
Implements all the logic processing functions of the board.
f DSP Unit

Include multiple DSP chips, implementing code

transformation, rate adaptation, and data package
conversion.
f Ethernet Switching Unit
Implements the Ethernet connection of multiple DSPs,
and provides external user plane FE interface.
f Clock Unit
Provides necessary clock signal for each external unit on
the board.
f Circuit Switching Unit
Connects the serial interface of the DSP with circuit
switching unit.
Flow direction of board data
The uplink data flow direction is the opposite of the downlink
data flow direction. The following takes the uplink data flow
for example.
f When it is used as BIPB, the TDM data accesses Abis
interface, then it is distributed to DSP unit for processing
via circuit switching unit, converted to IP data packet and
sent to the other board via Ethernet switching unit.
f When it is used as DRTB, the voice data IP package from
user plane Ethernet received by interface unit is
distributed to DSP for code transformation and rate
adaptation, converted to PCM code flow and switched to
trunk board by UIMU.
f When it is used as TIPB, the user plane data from UIM
board is distributed to DSP through the Ethernet
switching unit, converted to TDM data, and then sent to
other board through the circuit switching unit for
processing.
Board Panel
Description
GUP board does not have corresponding rear board. Figure 67
shows the panel diagram of GUP.

Chapter 4 - Boards
FIGURE 67 – GUP P ANEL
GUP
ENUM RUN
ACT ALM
RST
Indicators
There are four indicators on GUP panel.
Table 33 explains the GUP panel indicators.
TABLE 33 – GUP P ANEL INDICATORS

RUN Green Run indicator Refer to Table 30
ALM Red Alarm indicator Refer to Table 30
Board extraction Always ON: indicates

ENUM Yellow that tack switch has
indicator
been opened; the


board has not been
inserted properly; the
downloaded
indicates that there is
an alarm for tack
switch; tack switch has
been opened while the
board is running
Flashing at 1 Hz
(slow): indicates that
the board can be pulled
out; tack switch has
board is running; the
board can be pulled
out when in standby
status
Always OFF: indicates
that tack switch is
normal
ON: Indicates the
Active/Standby board is active
ACT Green
indicator OFF: Indicates the
board is standby
Buttons
Table 34 explains the GUP panel buttons.
TABLE 34 – GUP P ANEL BUTTONS
Button Description
RST Board reset
GSM Universal Processing Board

(GUP2)
Functions According to functions, the GUP2 board is divided into the
following five types of functional boards:
Ater Interface Processing Board (TIPB)
The TIPB board realizes TDM/IP conversion at Ater interface.
In other words, finding out 20 ms TRAU frames according to
channel and making them into IP packet.
Abis Interface Processing Board (BIPB)

Chapter 4 - Boards
At STM-1 interface or E1 Abis interface, the CS service and

PS service from BTS are switched to the BIPB board through
the circuit switching network of the UIM board or through the
circuit switching network of the GUIM board. The 20 ms TRU
frames (or PCU frames) are found out according to channel
on BIPB, then the TRU frames (or PCU frames) are made into
IP packet and sent to TCU (or UPU) for processing.
At IP Abis interface, in addition to the above functions, the
BIPB board is also used for RTP protocol processing.
A-Interface Processing Board (AIPB)
The AIPB board is used for RTP protocol processing at A-
interface and making data into IP packet.
User Plane Processing Board (UPPB2)
The UPPB2 board is used for user plane protocol processing
under A/Gb mode, including BSSGP, PDCP, and GTP_U
protocol.
Dual Rate Transcoder Board (DRTB)
The DRTB board realizes TRAU frame transcoding and rate
adaptation, and provides FR/EFR/HR/AMR/TFO functions.
Principle Figure 68 shows the working principle of GUP2.
FIGURE 68 – WORKING PRINCIPLE OF GUP2
HW
Circuit switching
unit
DSP unit
Host
interface
DSP User
P GE
plane
Ethernet
switching
unit
CPU unit Control bus DSP
P
Clock unit Logic unit
Control plane FE

GUP2 board consists of six units:

f CPU
Implements the management functions of board,
processes the Abis interface signaling and provide
external control plane FE interface.
f Logic Unit
Implements all the logic processing functions of the board.
f DSP Unit
Include multiple DSP chips, implementing code
transformation, rate adaptation, and data package
conversion.
Implements the Ethernet connection of multiple DSPs,
and provides external user plane GE interface.
f Clock Unit
Provides necessary clock signal for each external unit on
the board.
f Circuit Switching Unit
Connects the serial interface of the DSP with circuit
switching unit.
Flow direction of board data
The uplink data flow direction is the opposite of the downlink
data flow direction. The following takes the uplink data flow
for example.
f When it is used as BIPB, the TDM data accesses Abis
interface, then it is distributed to DSP for processing
through circuit switching unit, converted to IP data
packet and sent to other board through Ethernet
switching unit for processing.
f When it is used as DRTB, the voice data IP package from
user plane Ethernet received by the interface unit is
distributed to DSP for code transformation and rate
adaptation, converted to PCM code flow and switched to
trunk board by GUIM.
f When it is used as TIPB, the user plane data from UIM
switching unit, converted to TDM data, and then sent to
other board through the circuit switching unit for
processing.
f When it is used as AIPB, the user plane data from GUIM
switching unit for RTP protocol processing, , and then
sent to other board through the Ethernet switching unit
for processing.

Chapter 4 - Boards
f When it is used as UPPB2, the user plane data from GUIM

board accesses the user plane FE/GE interface, then it is
distributed to DSP through the Ethernet switching unit.
DSP performs relevant user plane protocol processing,
and then switches the data to SPB2 board through the
user plane GE interface.
Board Panel
Description
GUP2 board does not have corresponding rear board. Figure 69
shows the panel diagram of GUP2.
FIGURE 69 – GUP2 P ANEL
GUP2
ENUM RUN
ACT ALM
RST

Indicators
There are four indicators on GUP2 panel.
Table 35 explains the GUP2 panel indicators.
TABLE 35 – GUP2 P ANEL INDICATORS

Always ON: indicates
that tack switch has
been opened; the
board has not been
downloaded
an alarm for tack
Board extraction board is running
ENUM Yellow
indicator
Flashing at 1 Hz
board can be pulled
out when in standby
status
that tack switch is
normal
ON: Indicates the
ACT Green
board is standby
Buttons
Table 36 explains the GUP panel buttons.
TABLE 36 – GUP2 P ANEL BUTTONS
Button Description
RST Board reset

Chapter 4 - Boards
Clock Generator Board CLKG

(CLKG)
ZXG10 iBSC has three types of clock generator boards:
CLKG (CLKG)
CLKG (ICM)
ICM
Functions Functions of CLKG (CLKG) board are as follows:
Provides system clock and external synchronization. It
extracts clock reference through A-interface and gives
multiple timing reference signals to the interface units.
Supports background or manual selection of reference
sources, including BITS, network (8 kHz), GPS, and local
(level 2 or level 3). Manual switchover can be screened by
software.
Adopts loose-coupling phase-locked system, working in four
modes: CATCH, TRACE, HOLD, and FREE.
Outputs level-3 clock.
Performs clock loss alarming and deterioration judgment for
inputted reference.
Supports active/standby switchover.
Principle Figure 70 shows the working principle of CLKG (CLKG).
FIGURE 70 - WORKING PRINCIPLE OF CLKG (CLKG)
GPS, DT8K
2MHz, MBits Reference

selection unit
16CHIP, PP2S Phase detection 8 K, 16 M, 32 M, 64
and phase lock M
unit Clock output
Voltage
controlled
oscillator unit
RS485
Main control unit communication
interface
Changeover
command Active/Standby Active/Standby
changeover unit control signal
CLKG (CLKG) consists of the following five units:

f Main control unit

It manages the board, communicates with the system
control unit, implements the core clock control algorithm,
outputs the clock signals, and selects the reference
according to the data that the phase detection and phase
locking unit provide.
f Reference selection unit
It selects the suitable reference clock from several input
clock under the control of the main processing unit. The
clock reference can be from 8 KHz frame synchronization
signal of DTB or SDTB clock reference, 2 MHz/2 Mbits of
Building Integrated Timing System (BITS).
f Voltage controlled oscillator unit
The constant temperature crystal oscillator that meets
level-3 clock standard provides the clock source with high
precision.
f Phase detection and phase lock unit
It compares the adjustment clock signal and input
reference phase and provides the quantized data for the
main processing unit, to control the voltage controlled
oscillator unit. The phase lock system adopts the loose
coupler phase lock principle.
f Active/Standby changeover unit
It implements the active/standby changeover (the
compact of the switching on the clock should be within
the allowed range). The active/standby CLKG (CLKG) is
locked in the same reference, for the smooth switchover.
f Select one channel of input reference clock to lock the
phase and output 16 M and frame header signals that
meets the requirements of scheduling. After being
balanced-driven, the data is distributed to UIMU.
f Perform the pulse expansion on the received PP2S and 16
CHIP signal, and then distribute the new PP2S to shelves.
Board Panel
Description
The rear board of CLKG (CLKG) is RCKG1 and RCKG2. Figure 71
shows the diagrams of CLKG (CLKG) panel, CLKG (CLKG) board
layout, RCKG1 panel, and RCKG2 panel.

Chapter 4 - Boards
FIGURE 71 – CLKG (CLKG), RCKG1, RCKG2 P ANELS
CLKG X60
X50 RCKG1 RCKG2 RCKG1 RCKG2
X48
CLKOUT
CLKOUT
CLKOUT
CLKOUT
8KIN 1
8KIN 2
X46
RS232
RS232
X47
X40 X43 X44 X54 X56
BITS REF
BITS REF
X41 X42
X45
X53 X55
1 2 3 4 5 6
1. CLKG (CLKG) panel 4. RCKG2 panel (version 04502)

2. CLKG (CLKG) board layout 5. RCKG1 panel (version 071200)
3. RCKG1 panel (version 040503) 6. RCKG2 panel (version 071200)
Indicators
There are 18 indicators on CLKG (CLKG) board panel.
Table 37 explains the CLKG (CLKG) board panel indicators.
TABLE 37 – CLKG (CLKG) BOARD P ANEL INDICATORS
Indicator
Color Meaning Description
Name
Alarm
indicator
Always ON: indicates that tack
switch has been opened; the
board has not been inserted
been downloaded
Board Flashing at 5 Hz (fast):
ENUM Yellow extraction indicates that there is an
Indicator alarm for tack switch; tack
switch has been opened while
the board is running
indicates that the board can
be pulled out; tack switch has
been opened while the board

Indicator
Name
is running; the board can be
status
Active/ active
ACT Green standby
standby
ON: Indicates that the board
is currently in catch status,
Catch
CATCH Green that is, a reference has been
indicator
found but has not been locked
onto
Trace is currently in trace status,
TRACE Green
indicator that is, a reference has been
found and locked onto
ON: Indicates that the
Hold
KEEP Green reference has been lost after
indicator
being locked onto
Free
FREE Green has no reference, and is in
indicator
free running status
ON: Indicates that the first
clock is a 2 Mbps clock
Reference
2Mbps1 Green reference provided by BITS
indicator
equipment transferred in
HDB3 coding format
ON: Indicates that the second
clock is a 2 Mbps clock
Reference
2Mbps2 Green reference provided by BITS
indicator
equipment, transferred in
HDB3 coding format
ON: Indicates that the first
clock is a 2 MHz clock
Reference
2MHz1 Green reference provided by BITS
indicator
equipment, transferred in TTL
differential form
ON: Indicates that second
clock is a 2 MHz clock
Reference
2MHz2 Green reference provided by BITS
indicator
equipment, transferred in TTL
differential form
Reference reference is a network 8 kHz
8K1 Green
indicator reference provided by boards
such as DTB and APBESPB
Reference ON: Indicates that the
8K2 Green
indicator reference is a 8 kHz clock

Chapter 4 - Boards
Indicator
Name
reference provided by GPS
Reference reference is a 8 kHz clock
8K3 Green
indicator reference sent by UIMU or
UIMC
ON: Indicates that no external
Reference reference is available and
NULL Green
indicator system is in free oscillating
status
Reference
ON: Indicates the selected
QUTD Red deterioration
reference has deteriorated
indicator
reference can be selected
Manual manually
MANI Green selection
indicator OFF: Indicates that the
reference cannot be selected
manually
Buttons
Table 38 explains the CLKG (CLKG) board panel buttons.
TABLE 38 – CLKG (CLKG) BOARD PANEL BUTTONS
Name Description
RST Reset switch
EXCH Active/Standby changeover switch
After MANEN is pressed, the manual clock
MANEN reference selection is enabled, the MANI indicator
is ON.
Before selecting the clock reference, press MANEN.
After MANI is ON, press this button to select the
MANSL
clock reference (corresponding indicators such as
8K1, 8K2, 8K3, or NULL will be ON).
Interfaces
Table 39 explains the interfaces on CLKG (CLKG) board.
TABLE 39 – CLKG (CLKG) BOARD INTERFACES

6 × clock output; connected
with resource shelves/gigabit
RCKG1
resource shelves and control
panel
CLKOUT Output shelves.
(version
040503) One CLKOUT outputs 1-to-6
cable. One shelf has two
UIM/GUIM boards, and uses


a group of active/standby
clocks (a group of
active/standby clocks include
two 16 M, two 8 K, and two
PP2S signals). Therefore,
CLKOUT Output one CLKOUT can connect 3
shelves, i.e. 3 groups of
clock outputs. RCKG1 has 2
CLKOUTs and provides 6
clock outputs, i.e. connecting
6 shelves.
2 × 8 K reference input.
If SDTB/SDTB2 provides the
clock reference, this port is
connected with
8KOUT/DEBUG-232 on
RGIM1.
If DTB provides the clock
8 KIN1 Input reference, this port is
connected with
8KOUT/DEBUG-232 on
RDTB.
If SPB/SPB2 provides the
connected with
8KOUT/CPU1-RS232 on
RSPB.
2 × 8 K reference input,
connecting GPS clock
reference source.
8 KIN2 Input To guarantee the reference
redundancy, 8KIN2 can input
link 8 K clock reference as
the standby clock.
1 × 2 Mbps and 2 MHz input;
2 Mbps/2
Input connected with external
MHz
BITS clock reference source.
9 × clock output interface;
CLKOUT Output connected with resource
shelves/gigabit resource
shelves and control shelves.
RCKG2 has 3 CLKOUTs,
CLKOUT Output providing 9 groups of clock
RCKG2
panel outputs, i.e. connecting with
(version 9 shelves.
040502) RCKG1 and RCKG2 working
CLKOUT Output together can connect 15
shelves.
1 × GPS reference input,
PP2S/16CH
Input connecting the external GPS
IP
clock reference source.

Chapter 4 - Boards

CLKOUT Output
shelves.
One CLKOUT outputs 1-to-6
2 clock sockets. Therefore,
one CLKOUT can connect 3
CLKOUT Output shelves, i.e. 3 clock outputs.
RCKG1 has 2 CLKOUTs and
provides 6 clock outputs, i.e.
connecting 6 shelves.
8 K reference input.
RCKG1 connected with
panel 8KOUT/DEBUG-232 on
(version RGIM1.
071200) If DTB provides the clock
connected with
8KOUT/DEBUG-232 on
RDTB.
connected with
8KOUT/CPU1-RS232 on
RSPB.
The system debugging serial
Bi-
RS232 port, connecting the
directional
debugger.
1 × 2 Mbps and 2 MHz
reference clock input;
BITS REF Input
connected with external
RCKG2 with resource shelves/gigabit
panel resource shelves and control
(version
8 KIN2 Input 8 K reference input.

connected with


8KOUT/DEBUG-232 on
RGIM1.
reference, this port is
connected with
8KOUT/DEBUG-232 on
RDTB.
connected with
8KOUT/CPU1-RS232 on
RSPB.
Bi-
directional
debugger.
BITS REF Input
Note:
The rear board RCKG1 (version 040503) works with the rear
board RCKG2 (version 040502), and the two 8 K reference are
introduced from RCKG1.
board RCKG2 (version 071200), and each board has a line 8 K
clock reference and a BITS clock reference.
DIP Switches CLKG (CLKG) board has the following jumpers:

and Jumpers
X40-41, X44-45: selection of first 2 Mbps and 2 MHz matching
impedance of BITS:
It indicates that matching impedance is 75 Ω, when pins 1
and 2 are connected.
X42-43, X46-47: selection of second 2 Mbps and 2 MHz
matching impedance of BITS:
X53-X56: grounding protection jumper of coaxial cable sleeve
for inputting two 2 Mbps and 2 MHz clocks:
Coaxial cable jacket is connected to protection ground, when
pins 1 and 2 are connected.

Chapter 4 - Boards
X48, X50: used in debug mode; disconnected in normal

operation mode.
X60: jumper of RS485 connection relation
Pins 3 and 5 must be connected and pins 4 and 6 must also be
connected during debugging, when data is downloaded through
serial port of a computer.
Pins 1 and 3 and pins 2 and 4 must be connected respectively
during normal communication with the background through an
RS485 bus.
Clock Generator Board CLKG (ICM)

CLKG (CLKG)
CLKG (ICM)
ICM
Functions Functions of CLKG (ICM) board are the same as CLKG (CLKG)
board. For details, refer to Clock Generator Board CLKG (CLKG).
Principle The working principle of CLKG (ICM) is similar to that of CLKG

(CLKG). The difference between them is that the main control
unit of CLKG (ICM) uses FE interface, not RS485 communication
interface, as shown in Figure 72.
FIGURE 72 - WORKING PRINCIPLE OF CLKG (ICM)
GPS, DT8K

selection unit
16CHIP,PP2S
Phase detection 8 K, 16M, 32M, 64M
and phase lock
unit Clock output
Voltage
controlled
oscillator unit
Main FE interface
control unit
Changeover Active/
Standby Active/standby control signal
command
changeover
unit
CLKG (ICM) consists of the following five units:

f Main control unit


signal of DTB or SDTB/SDTB2 clock reference, 2 MHz/2
Mbits of Building Integrated Timing System (BITS).
precision.
the allowed range). The active/standby CLKG (ICM) is
locked in the same reference, for the smooth switchover.
balanced-driven, the data is distributed to UIMU/GUIM.
Board The rear board of CLKG (ICM) is RCKG1 and RCKG2. Figure 73
Description shows the diagrams of CLKG (ICM) panel, CLKG (ICM) board
layout, RCKG1 panel, and RCKG2 panel.

Chapter 4 - Boards
FIGURE 73 – CLKG (ICM), RCKG1, RCKG2 P ANELS
CLKG
ENUM RUN
ACT ALM
EXCH
RST
BITS
Bps1 Bps2
Hz1 Hz2
8K1 8K2
RCKG1 RCKG2 RCKG1 RCKG2
8K3 8K4
NULL QUTD
CATCH KEEP
CLKOUT
CLKOUT
CLKOUT
CLKOUT
TRACE FREE
MANI
MANSL
MANEN
CLKOUT
CLKOUT
CLKOUT
CLKOUT
8KIN 1
8KIN 1
8KIN 2
CLKOUT
8KIN 2
RS232
RS232
S1
ON
2Mbps/2MHz
BITS REF
BITS REF
PP2S/16CHIP
ON
S5
1 2 3 4 5 6
1. CLKG (ICM) panel 4. RCKG2 panel (version 040502)

2. CLKG (ICM) board layout 5. RCKG1 panel (version 071200)
Indicators
There are 19 indicators on CLKG (ICM) board panel.
Table 40 explains the CLKG (ICM) board panel indicators.
TABLE 40 – CLKG (ICM) BOARD P ANEL INDICATORS
Indicator
Name
Run
indicator
Alarm
indicator
been downloaded
ENUM Yellow extraction indicates that there is an alarm
Indicator for tack switch; tack switch has
running

Indicator
Name
status
switch is normal
Active/ active
ACT Green standby
standby
Indicates the clock reference
CLKG (ICM) board selects
ON: Indicates CLKG (ICM)
Reference selects the first 2 Mbps clock
Bps1 Green
indicator reference provided by BITS
equipment, which is
transmitted in HDB3 coding
form
Reference selects the second 2 Mbps clock
Bps2 Green
equipment, which is
transmitted in HDB3 coding
form
Reference selects the first 2 MHz clock
Hz1 Green
equipment, which is
transmitted in TTL differential
form
Reference selects the second 2 MHz clock
Hz2 Green
equipment, which is
transmitted in TTL differential
form
ON: Indicates that the clock
Reference
8K1 Green reference is a 8 kHz clock
indicator
reference extracted from line
8K2 Green
indicator reference provided by external
GPS
Reference ON: Indicates that the clock
8K3 Green
indicator reference is a 8 kHz clock

Chapter 4 - Boards
Indicator
Name
reference sent by UIMU/GUIM
or UIMC
8K4 Green
indicator reference provided by the
board’s GPS
NULL Green
status
Reference
indicator
ON: Indicates that the board is
Catch currently in catch status, that
CATCH Green
indicator is, a reference has been found
but has not been locked onto
Trace currently in trace status, that
TRACE Green
and locked onto
Hold
indicator
being locked onto
Free
FREE Green has no reference, and is in free
indicator
running status
Manual manually
reference can not be selected
manually
Buttons
The CLKG (ICM) board panel buttons are the same as that of
CLKG (CLKG) board. For details, refer to Table 38.
Interfaces
The CLKG (ICM) board panel interfaces are the same as that of
CLKG (CLKG) board. For details, refer to Table 39.
DIP Switches CLKG (ICM) board has the following jumpers:

and Jumpers
The DIP switch S1 and S5 of CLKG (ICM) board are combined for
selecting the impedance matching resistance of the input BITS
clock line. The default resistance value is 75 Ω.

Table 41 describes DIP switch settings of CLKG (ICM).
TABLE 41 – CLKG (ICM) JUMPERS
DIP Switching Settings Default

Mode
Name 1 2 3 4 Mode
S1 ON ON ON ON
75 Ω
S5 ON ON ON ON
S1 ON ON ON ON
100 Ω 75 Ω
S5 OFF OFF OFF OFF
S1 OFF OFF OFF OFF
120 Ω
S5 OFF OFF OFF OFF
Integrated Clock Module (ICM)

CLKG (CLKG)
CLKG (ICM)
ICM
Functions Functions of ICM are as follows:
Provides system clock and external synchronization. It
extracts clock reference through A-interface and gives
multiple timing reference signals to the interface units.
Receives GPS satellite system signals, extracts and
generates 1PPS signal and corresponding navigation
message (TOD message), and generates PP2S, 19.6608MHz,
and system 8 K clock reference required by the system.
Supports BITS, one line (8 K), and two GPS8K (from the
local board and external GPS) as the reference for local clock.
Supports background or manual selection of reference
sources, including BITS, network (8 kHz), GPS, and local
(level 2 or level 3). Manual switchover can be screened by
software.
Adopts loose-coupling phase-locked system, working in four
modes: CATCH, TRACE, HOLD, and FREE.
Outputs level-3 clock.
Performs clock loss alarming and deterioration judgment for
inputted reference.
Supports active/standby switchover.

Chapter 4 - Boards
Principle Figure 74 shows the working principle of ICM.
FIGURE 74 - WORKING PRINCIPLE OF ICM
GPS,DT8K
GPS unit
selection unit
16CHIP,PP2 S
Phase detection 8K , 16M,32 M , 64M
and phase lock Clock
unit output
Voltage
controlled
oscillator unit
Main FE interface
control unit
Changeover
Active/Standby Active/standby control signal
command
changeover unit
ICM consists of the following five units:

f Main control unit
signal of DTB or SDTB2 clock reference, 2 MHz/2 Mbits of
Building Integrated Timing System (BITS), and GPS
signal.
precision.
the allowed range). The active/standby ICM is locked in
the same reference, for the smooth switchover.


balanced-driven, the data is distributed to GUIM.
f Extract and generate 1PPS signal for the received GPS
signal, take the generate PP2S, 19.6608MHz, and
system 8 K clock reference required by the system, and
distribute them to shelves.
Board Panel
Description
The rear board of ICM is RCKG1 and RCKG2. Figure 75 shows
the diagrams of ICM panel, ICM board layout, RCKG1 panel, and
RCKG2 panel.
FIGURE 75 – ICM, RCKG1, RCKG2 P ANELS
ICM
ENUM RUN
ACT ALM
EXCH
RST
BITS
Bps1 Bps2
Hz1 Hz2
8K1 8K2
RCKG1 RCKG2 RCKG1 RCKG2
8K3 8K4
NULL QUTD
CATCH KEEP
CLKOUT
CLKOUT
CLKOUT
CLKOUT
TRACE FREE
MANI
MANSL
MANEN
CLKOUT
CLKOUT
CLKOUT
SCS CCS
CLKOUT
ANT TYP
GPS
PP2S
8KIN 1
10M
8KIN 1
8KIN 2
CLKOUT
8KIN 2
RS232
RS232
S1
ON
2Mbps/2MHz
MON
BITS REF
BITS REF
PP2S/16CHIP
ON
S5
1 2 3 4 5 6
1. ICM panel 4. RCKG2 panel (version 04502)

2. ICM board layout 5. RCKG1 panel (version 071200)
Indicators
There are 23 indicators on ICM board panel.
Table 42 explains the ICM board panel indicators.

Chapter 4 - Boards
TABLE 42 – ICM BOARD PANEL INDICATORS
Indicator
Name
Run
indicator
Alarm
indicator
been downloaded
Board been opened while the board is
ENUM Yellow extraction running
Indicator Flashing at 1 Hz (slow):
status
switch is normal
Active/ active
ACT Green standby
standby
ICM board selects
Reference ON: Indicates ICM selects the
Bps1 Green first 2 Mbps clock reference
indicator
provided by BITS equipment,
which is transmitted in HDB3
coding form
ICM board selects
Bps2 Green second 2 Mbps clock reference
indicator
which is transmitted in HDB3
coding form
ICM board selects
Hz1 Green first 2 MHz clock reference
indicator
which is transmitted in TTL
differential form
Hz2 Green Reference Indicates the clock reference

Indicator
Name
indicator ICM board selects
ON: Indicates ICM selects the
second 2 MHz clock reference
which is transmitted in TTL
differential form
Reference
8K1 Green reference is a 8 kHz clock
indicator
reference extracted from line
8K2 Green
indicator reference provided by external
GPS
8K3 Green
indicator reference sent by GUIM or
UIMC
ON: indicates that the clock
8K4 Green
indicator reference provided by the
board’s GPS
NULL Green
status
Reference
indicator
Catch currently in catch status, that
CATCH Green
but has not been locked onto
Trace currently in trace status, that
TRACE Green
and locked onto
Hold
indicator
being locked onto
Free
FREE Green has no reference, and is in free
indicator
running status
Manual manually
reference can not be selected
manually
SCS Green System clock

Always ON: Indicates that the
reference

Chapter 4 - Boards
Indicator
Name
indicator system clock is normal
Always OFF: Indicates that the
16CHIP Phase Locked Loop
(PLL) loses lock
Flashing very quickly: Indicates
that the output 16CHIP signal
is abnormal
Flashing very slowly: Indicates
that the output PP2S signal is
abnormal
Always ON: Indicates that the
circuit clock 12.8 M PLL is
Circuit clock locked normally
CCS Green reference
indicator Always OFF: Indicates that the
circuit clock 12.8 M PLL loses
lock
Always ON: Indicates that
antenna feeder is normal
Always OFF: Indicates that
antenna feeder and satellite are
normal and being initialized
Indicates that antenna feeder is
broken
Antenna
ANT Green status Flashing at 2 Hz (fast):
indicator Indicates that antenna feeder is
normal but can not receive
satellite signal
Flashing at 0.5 Hz (very slow):
Indicates that antenna is short-
circuited
Flashing at 5 Hz (very fast):
Indicates that no message is
received during initialization
Always OFF (black): GPS
single-mode receiver
Always ON (green):
Green/ Mode GPS/GONOLASS dual-mode
TYP
Yellow indicator receiver
Always ON (yellow):
GPS/GONOLASS/Triones timed
three-mode receiver
Buttons
Table 43 explains the ICM board panel buttons.

TABLE 43 – ICM BOARD PANEL BUTTONS
Name Description
RST Reset switch
EXCH Active/Standby changeover switch
After MANEN is pressed, the manual clock
MANEN reference selection is enabled, the MANI indicator
is ON.
Before selecting the clock reference, press MANEN.
After MANI is ON, press this button to select the
MANSL
clock reference (corresponding indicators such as
8K1, 8K2, 8K3, or NULL will be ON).
Interfaces
Table 44 explains the interfaces on ICM board.
TABLE 44 – ICM BOARD INTERFACES

Cable is connected to GPS
GPS Input antenna, receiving GPS
satellite signal
From GPS module to the
PP2S Output
ICM front panel PP2S
panel From GPS module to the
10M Output
front panel 10M
From GPS module to the
Bi-
MON front panel debugging serial
directional
port
RCKG1
panel
(version
a group of active/standby
clocks (a group of
active/standby clocks include
two 16 M, two 8 K, and two
PP2S signals). Therefore,
CLKOUT Output one CLKOUT can connect 3
shelves, i.e. 3 groups of
clock outputs. RCKG1 has 2
CLKOUTs and provides 6
clock outputs, i.e. connecting
6 shelves.
8 KIN1 Input 2 × 8 K reference input.

connected with

Chapter 4 - Boards

8KOUT/DEBUG-232 on
RGIM1.
connected with
8KOUT/DEBUG-232 on
RDTB.
connected with
8KOUT/CPU1-RS232 on
RSPB.
2 × 8 K reference input,
connecting GPS clock
reference source.
8 KIN2 Input To guarantee the reference
redundancy, 8KIN2 can input
link 8 K clock reference as
the standby clock.
1 × 2 Mbps and 2 MHz input;
2 Mbps/2
Input connected with external
MHz
9 × clock output interface;
CLKOUT Output connected with resource
shelves/gigabit resource
shelves and control shelves.
RCKG2 has 3 CLKOUTs,
CLKOUT Output providing 9 groups of clock
RCKG2
panel outputs, i.e. connecting with
(version 9 shelves.
040502) RCKG1 and RCKG2 working
CLKOUT Output together can connect 15
shelves.
1 × GPS reference input,
PP2S/16CH
Input connecting the external GPS
IP
clock reference source.
RCKG1 with resource shelves/gigabit
panel resource shelves and control
CLKOUT Output
(version shelves.
8 KIN1 Input 8 K reference input.

connected with


8KOUT/DEBUG-232 on
RGIM1.
connected with
8KOUT/DEBUG-232 on
RDTB.
connected with
8KOUT/CPU1-RS232 on
RSPB.
Bi-
directional
debugger.
BITS REF Input
One CLKOUT outputs 1-to-6
8 K reference input.
RCKG2 clock reference, this port is
panel connected with
(version 8KOUT/DEBUG-232 on
071200) RGIM1.
connected with
8KOUT/DEBUG-232 on
RDTB.
connected with
8KOUT/CPU1-RS232 on
RSPB.
Bi-
directional
debugger.
BITS REF Input 1 × 2 Mbps and 2 MHz


Chapter 4 - Boards

Note:
board RCKG2 (version 040502), and the two 8 K reference are
introduced from RCKG1.
board RCKG2 (version 071200), and each board has a line 8 K
clock reference and a BITS clock reference.
DIP Switches ICM board has the following jumpers:

and Jumpers
The DIP switch S1 and S5 of ICM board are combined for
selecting the impedance matching resistance of the input BITS
clock line. The default resistance value is 75 Ω.
Table 45 describes DIP switch settings of ICM.
TABLE 45 – ICM JUMPERS
DIP Switching Settings Default

Mode
Name 1 2 3 4 Mode
S1 ON ON ON ON
75 Ω
S5 ON ON ON ON
S1 ON ON ON ON
100 Ω 75 Ω
S5 OFF OFF OFF OFF
S1 OFF OFF OFF OFF
120 Ω
S5 OFF OFF OFF OFF
Control Main Processing Board

(CMP)
Functions Functions of CMP board are as follows:
Implements PS/CS domain service control management
Implements resource management of BSSAP and BSSGP
Principle Figure 76 shows the principle of CMP.

FIGURE 76 – WORKING PRINCIPLE OF CMP
CPU单元B
OMC2
以太网控制面/FE
接口主备FE
232/ 485串口
CPU小系统 232/485
串口 DEBUG2-232
逻辑单元电源管理单元
GPS485
PD485
232/485 1×485
CPU小系统串口 RS232
DEBUG1-232
OMC1
以太网控制面/FE
接口主备FE
CPU单元A
CMP board consists of three units:

f CPU
There are two independent CPUs on the board, CPU_A
and CPU_B. Each CPU provides control plane FE interface,
the FE interface for communication of active/standby
board, and RS232 and RS485 interfaces for
communication with other units. CPU A is on the lower
part of the board, which implements the main control
function of the board.
f Logic Unit
Implements all the logical processing functions of the
board.
f Power Management Unit
Implements the power management distribution of the
board.
Board Panel
Description
CMP board does not require rear board, and a dummy panel is
inserted in the corresponding position. The two CPUs of CMP do
not have a hard disk.

Chapter 4 - Boards
Figure 77 shows the diagram of CMP board panel and CMP board
layout.
FIGURE 77 – CMP P ANEL
1. CMP Panel 2. CMP Board Layout
Indicators
Table 46 explains the CMP board panel indicators.
TABLE 46 – CMP BOARD PANEL INDICATORS
Indicator Color Full Name Description

CPU_A
ALM1 Red alarm Refer to Table 30
indicator
CPU_A
RUN1 Green running Refer to Table 30
indicator
CPU_A ON: Indicates the board is

active/ active
ACT1 Green
Standby OFF: Indicates the board is
indicator standby
CPU_A Always ON: indicates that tack
ENUM1 Yellow board switch has been opened; the
extraction board has not been inserted


indicator properly; the version has not
been downloaded
running
status
switch is normal
CPU_B
indicator
CPU_B
indicator
CPU_B ON: Indicates the board is
active/ active
ACT2 Green
Standby OFF: Indicates the board is
indicator standby
been downloaded
CPU_B been opened while the board is
board running
ENUM2 Yellow
extraction
indicator Flashing at 1 Hz (slow):
status
switch is normal
Buttons
Table 47 explains the CMP board panel buttons.

Chapter 4 - Boards
TABLE 47 – CMP BOARD PANEL BUTTONS
Name Description
RST Board reset
Active/Standby switchover for

EXCH1
CPU_B
EXCH2
CPU_A
Interfaces
There are two external interfaces on the CMP board:
USB1: CPU_B USB interface, not used, bi-directional
USB2: CPU_A USB interface, not used, bi-directional
Digital Trunk Board (DTB)

Functions Functions of DTB are as follows:
Provides 32 E1/T1 physical interfaces.
Supports 120 Ω/75 Ω resistance selection, and supports
coaxial cable and twisted pair.
Extracts 8 kHz synchronization clock from a line and transfer
it through a cable to CLKG as a reference clock.
Principle Figure 78 shows the working principle of DTB.
FIGURE 78 - WORKING PRINCIPLE OF DTB
DTB consists of the following five units.

f Main control unit

It manages the boards and controls the internal
connection.
f Interface unit
It connects with the circuit switching unit, providing
Interface E1/T1 and HW.
f Circuit switching unit
It switches over the circuit HW of the interface unit.
f Logic processing unit
It implements the logic switchover inside the board and
the adaptation function.
f Clock processing unit
It receives the clock sent from backplane and provides it
to the board after frequency division and time scheduling.
E1/T1 data from the line side passes the interface unit
processing link layer and is sent to the circuit switching unit
for the switching. And then, via the interface unit, the data is
sent to UIMU/GUIM board, vice versa.
Board Panel
Description
RDTB is the rear board of DTB.
Figure 79 shows the diagrams of DTB panel, board layout and
RDTB panel.

Chapter 4 - Boards
FIGURE 79 – DTB (VERSION 040501) AND RDTB P ANEL
DTB
ENUM RUN
S1
ACT ALM
ON
S2
62 6 95 2 00 27 00
RST
E1 ON
L1
L3
L2
L4
S3 RDTB
L5 L6
ON
L7 L8
L9 L10
S4
L11 L12
L13 L14 ON
L15 L16
S5
ON T1/E1 1-16
E1
ON S6
L17 L18
S7
L19 L20
ON ON
L21 L22
S8
L23 L24
ON S9
L25 L26
S10
L27 L28
ON
L29 L30
S11 ON
L31 L32 S12
T1/E1 17-32
ON
8KOUT/DEBUG-232
X23
1 2 3
1. DTB Panel 3. RDTB Panel

2. DTB Board Layout (version 040501)
The DTB board has two versions: version 040501 and version
060201. The difference between them is that the DTB board
(version 060201) does not has DIP switches, Figure 80 shows
the jumper layout on DTB board (version 060201).

FIGURE 80 – DTB (VERSION 060201) PANEL
X18
X19
Indicators
There are 36 indicators on DTB panel.
Table 48 explains the DTB panel indicators.
TABLE 48 – DTB P ANEL INDICATORS

Run
indicator
Alarm
indicator
been downloaded
ENUM Yellow extraction indicates that there is an alarm
indicator for tack switch; tack switch has
running

Chapter 4 - Boards

status
switch is normal
Active/ active
ACT Green Standby
standby
OFF: indicates that this E1 is
not configured in the database
Always ON: indicates that this
E1 is configured in the
database, but this E1 can not
L1 ~ L32 Green E1 indicator
be connected
Indicator 1 Hz flashing
(slowly): indicates that this E1
is configured in the database,
and this E1 can be connected
Buttons
Table 49 explains the DTB panel buttons.
TABLE 49 – DTB P ANEL BUTTONS
Button Description
RST Reset switch
Interfaces
Table 50 explains the DTB panel interfaces.
TABLE 50 – DTB P ANEL INTERFACES
T1/E1 1 ~ 16 32 × E1 Interface to
Bi-
connect the external
T1/E1 17 ~ 32 directional
system
RDTB
panel Leads out 8 K
8KOUT/DEGUG- Bi- reference clock signal
232 directional and RS232 serial port
debugging signal
Jumpers and Jumpers on DTB

DIP Switches
DTB board (version 040501) has a jumper (X23) for board
debugging, and its position is shown in Figure 79. X23 must be
disconnected when the board is working normally.

DTB board (version 060201) has two jumpers (X18 and X19) for
board debugging, and their positions are shown in Figure 80.
The board enters debugging mode if any one of X18 and X19 is
short circuited. X18 and X19 must be disconnected when the
board is working normally.
Jumpers on RDTB
Figure 81 shows the jumpers on RDTB panel.
FIGURE 81 – JUMPERS ON RDTB P ANEL
1 2
3 4
5 6
X9
7 8
9 10
11 12
13 14
15 16
1 2 1
3
2
5 6
7 8
X10 9
11
13
10
12
14
3 4
15 16
1 2
3 4
5 6
7 8
5 6
X11 9
11
13
10
12
14
15 16
1 2
3 4
5 6
7 8 X12
7 8
9 10
11 12
13 14
15 16
1 2
3 4
9 10 5
7
6
X13 9
11
13
10
12
14
15 16
11 12 1
3
2
5 6
X14
7 8
9 10
11 12
13 14
13 14 15 16
1 2
3 4
5 6
X15
7 8
9 10
15 16
11 12
13 14
15 16
1 2
3 4
5 6
X16
7 8
9 10
11 12
13 14
15 16
E1 line on RDTB adopts the 75 Ω unbalanced coaxial

transmission mode by default. The originating end connects the
protection ground through jumpers and receiving end connects
to a capacitor and then protection ground through jumpers.
Specific implementation is selected through jumpers of X9 to
X16 on RDTB. Table 51 explains the selection of X9 to X16.
TABLE 51 – CONNECTION MODES OF X9 TO X16
Connection
Description
Mode
Connecting E1_TX (N) –R to protection ground (Nth
1-2
line)
Connecting E1_RX (N) –R to protection ground (Nth
3-4
line)
Connecting E1_TX (N+1) –R to protection ground
5-6
(Nth+1 line)
Connecting E1_RX (N+1) –R to protection ground
7-8
(Nth+1 line)

Chapter 4 - Boards
Connection
Description
Mode
9-10
(Nth+2 line)
11-12
(Nth+2 line)
13-14
(Nth+3 line)
15-16
(Nth+3 line)
Note: Connecting blocks of jumpers X9 to X16 on RDTB

must be removed if E1 adopts 120 Ω PCM balanced transmission
mode.
DIP Switches
There are 12 4-digit DIP switches on DTB.
Eight 4-digit DIP switches (S1-S6, S9 and S12) are to select
impedance matching resistance for each E1: 75 W or 120 W.
Line impedance is 75 Ω if DIP switch is set to ON.
Line impedance is 120 Ω if DIP switch is set to OFF.
Two 4-digit DIP switches (S7 and S8) are to indicate receiving
matching impedance of each E1 chip for CPU.
Matching impedance of corresponding E1 is 75 Ω if DIP
switch is set to ON.
Matching impedance of corresponding E1 is 120 Ω if DIP
switch is set to OFF.
Each DIP switch corresponds to one E1 chip:
S7 corresponds to E1 chips 1 to 4 (E1 channels 1 to 16)
CPU reads this status during power-on and initiates each E1 chip
according to this status.
Two 4-digit DIP switches (S10 and S11) are to indicate
long/short line status of each E1 chip for CPU.
Corresponding E1 chip (four E1 channels in total) is in
SHORT HAUL mode if DIP switch is set to ON.
Corresponding E1 chip is in LONG HAUL mode if DIP switch is
set to OFF.
Each DIP switch corresponds to one E1 chip:

CPU reads this status during power-on and initiates each E1 chip
according to this status.
Gigabit Line Interface Board (GLI)

GLI is a GE interface board, providing internal interfaces to
switching shelves, resource shelves/gigabit resource shelves,
and external interfaces.
Functions Functions of GLI board are as follows:

Implements functions such as physical layer adaptation, IP
packet check, fragmentation, transfer management, and
traffic management.
GLI has processing capability orientation such as 2.5 Gbps
line-speed processing and transfer, and 1 kbps stream traffic
management.
Principle Figure 82 shows the working principle of GLI.
FIGURE 82 - WORKING PRINCIPLE OF GLI
GE
光口光接口以太网接业务处对列高速串行链路
单元口单元理单元管理单元
逻辑单元
GLI consists of the following five units.

f Optical interface unit
It provides GE optical interface and supports physical
backup.
f Logic unit
It implements all logic processing functions of the boards.
f Ethernet interface unit
It implements GE PHY and MAC functions.
f Service processing unit
Implement the query, fragmentation, forwarding, and
traffic management of bi-directional IP packet.
f Queue management unit
It manages the queue bi-directionally.

Chapter 4 - Boards
f GLI receives the media plane data from the resource

shelf/gigabit resource shelf via the optical interface.
f The data in the direction from GE optical port to the
board is sent to the switching interface after being
processed by service processing unit, and then sent to
the PSN switching network board via high speed link.
In the direction from PSN board to GLI, the data is
transmitted by corresponding optical port after being
processed and framed by the service processing unit.
Board Panel
Description
Figure 83 shows the GLI board panel diagram.

FIGURE 83 – GLI P ANEL
GLI
Indicators
There are 20 indicators on GLI board panel. Table 52 explains
the GLI board panel indicators.

Chapter 4 - Boards
TABLE 52 – GLI BOARD P ANEL INDICATORS
Indicator
Name
Run
indicator
Alarm
indicator
been downloaded
Flashing at 5 Hz (fast): indicates
that there is an alarm for tack
switch; tack switch has been
Board opened while the board is
indicator
pulled out; tack switch has been
opened while the board is
running; the board can be pulled
out when in standby status
switch is normal
Active/ ON: indicates the board is active

ACT Green standby OFF: indicates the board is
indicator standby
Optical ON: indicates that the logic is

interface still abnormal
ACT1-8 Green
activation Flashing: sending or receiving
indicator data
ON: indicates optical interface
Optical has received optical signals
SD1-8 Green signal
indicator OFF: indicates optical interface
has not received optical signals
Buttons
Table 53 explains the GLI board panel buttons.
TABLE 53 – GLI BOARD P ANEL BUTTONS
RST Reset switch

Interfaces
Table 54 explains the GLI board interfaces.
TABLE 54 – GLI BOARD INTERFACES

8 × STM-1 optical interface;
connected with UIMU on
8 pairs of Bi-
GLI panel each resource shelf or GUIM
TX-RX directional
on each gigabit resource
shelf
E1 IP Interface Board (EIPI)

Functions EIPI board provides E1/T1-based IP access, which is realized by
EIPI working together with DTB. The EIPI board does not have
external interface and rear board. One EIPI combines with two
DTBs to provide at most 64 E1/T1 interfaces.
Principle Figure 84 shows the working principle of EIPI.
FIGURE 84 – WORKING PRINCIPLE OF EIPI
HPS DEBUGRS232
HW
subcard
Control plane
FE
User plane FE
User plane GE
Logic unit
Service
processing
unit
EIPI consists of three units:


Chapter 4 - Boards

f Logic unit
f Interface unit
EIPI does not provide external interface.
Data flow direction
The interface unit accesses HW data, and sends the data to
HPS subcard. After being processed by HDLC protocol, the
data is sent to the service processing unit and separated to
be user plane data and control plane data. The user plane
data is sent to GUP2 for processing via user plane switching
network and the control plane data is sent to CMP for
processing via control plane switching network.
Board Panel
Description
EIPI board does not have corresponding rear board. Figure 85
shows the panel diagram of EIPI.

FIGURE 85 – EIPI P ANEL
EIPI
ENUM RUN
ACT ALM
EXCH
RST
Indicators
There are 4 indicators on the EIPI panel. Table 55 explains the
EIPI board panel indicators.
TABLE 55 – EIPI P ANEL INDICATORS

Run
indicator
Alarm
indicator
Board Always ON: indicates that tack

ENUM Yellow extraction switch has been opened; the
indicator board has not been inserted

Chapter 4 - Boards

been downloaded
running
status
switch is normal
Active/ active
ACT Green Standby
standby
Buttons
Table 56 explains the EIPI panel buttons.
TABLE 56 – EIPI P ANEL BUTTONS
RST Board reset
Interfaces
The EIPI board does not provide external interface.
GE IP Interface Board (GIPI)

Functions GIPI board provides IP interface between ZXG10 iBSC and BTS,
SGSN, and MSC/MGW. Each GIPI board provides one external
GE interface.
According to functions, the GIPI board is divided into the
Abis Interface Gigabit IP Interface Board (IPBB)
A-Interface Gigabit IP Interface Board (IPAB)
Gb Interface Gigabit IP Interface Board (IPGB)
Principle Figure 86 shows the working principles of GIPI.

FIGURE 86 – WORKING PRINCIPLE OF GIPI
GIPI consists of three units:

f Logic unit
f Interface unit
GIPI provides one external GE interface.
Data flow direction
The interface unit accesses data. The data is sent to the
service processing unit and separated to be user plane data
and control plane data. The user plane data is sent to GUP2
for processing via user plane switching network and the
control plane data is sent to CMP for processing via control
plane switching network.
Board Panel
Description
The rear board of GIPI is RGER and RMNIC. Usually, GIPI uses
RGER as the rear board; when iBSC needs to connect with OMCB
or MR, GIPI uses RMNIC as the rear board.
Figure 87 shows the panel diagram of GIPI.

Chapter 4 - Boards
FIGURE 87 – GIPI, RGER, RMNIC P ANELS
GIPI
ENUM RUN
ACT ALM
EXCH
RST
RGER RMNIC
FE1
TX
ACT
RX
SD
FE2
FE3
FE4
GE1
GE2
DEBUG-FE
DEBUG1-232
8KOUT/ARM232 PrPMC232
CLASS 1
DEBUG2-232
1. GIPI Panel 2. RGER Panel 3. RMNIC Panel
Indicators
There are 6 indicators on the GIPI panel. Table 57 explains the
SDTB panel indicators.
TABLE 57 – GIPI P ANEL INDICATORS
Indicator Color Indication Description

Running
Indicator
Board
ENUM Yellow Extraction
Indicator
downloaded


switch has been opened
while the board is running
indicates that the board
can be pulled out; tack
while the board is running;
the board can be pulled out
when in standby status
Active/Standby ON: board is active

ACT Green
indicator OFF: board is standby
ON: indicates that the
optical interface has
Optical signal received optical signals.
SD Green
indicator OFF: indicates that the
optical interface has not
received optical signals.
ON: indicates that the logic
Optical interface is still abnormal
ACT Green activation
indicator Flashing: sending or
receiving data
Buttons
Table 58 explains the GIPI panel buttons.
TABLE 58 – GIPI P ANEL BUTTONS
RST Board reset
Interfaces
The rear board RGER provides one gigabit Ethernet interface for
the external network.
Table 59 explains the GIPI board interfaces.
TABLE 59 – GIPI BOARD INTERFACES

GIPI TX-RX Bi- Gigabit Ethernet optical
panel directional interface, connected with
BTS, SGSN, MSC/MGW.

Chapter 4 - Boards

TX-RX and GE1 can not be
enabled at the same time.
GE1 Bi- Gigabit Ethernet electrical
directional interface, connected with
BTS, SGSN, MSC/MGW.
GE1 and TX-RX can not be
enabled at the same time.
GE2 Bi- Gigabit Ethernet interface,
directional not used.
RGER
panel DEBUG1- Bi- Debugging Ethernet
232 directional interface, connected with
the debugging computer,
not used.
DEBUG2- Bi- Debugging Ethernet
232 directional interface, connected with
the debugging computer,
not used.
Gigabit Universal Interface Module

(GUIM)
Functions Implements control-plane/user-plane Ethernet level-2
switching in the gigabit resource shelf, circuit-domain
timeslot multiplexing switching, and gigabit resource shelf
management, and provides external interface for the gigabit
resource shelf.
Provides the clock-driven function inside the gigabit resource
shelf. The input PP2S, 8 kHz and 16 MHz signals are
distributed to various slots after phase lock and drive, to
provide 16 MHz, 8 kHz and PP2S clocks to boards in the
gigabit resource shelf.
Provides RS-485 management interface to reset boards of
the gigabit resource shelf.
Principle Figure 88 shows the working principles for GUIM.

FIGURE 88 – WORKING PRINCIPLE OF GUIM
Timeslot
switching
unit
Internal
bus
HW
RS232
RS485
Logic unit Debugging
CPU
Ethernet
Active/standby
Ethernet
PCI bus
Control
User plane
plane
Ethernet
Ethernet
User
User Control
plane
plane FE plane
GE
FE
GUIM consists of the following four units:

f CPU
It connects with TS switching unit, logic unit, and
Ethernet switching unit via the control bus. It configures
the switching unit and manages the gigabit resource shelf.
It provides debugging and active/standby external
Ethernet interface, RS232 and RS485 serial port.
f Logic unit
It implements all logic processing of the board.
f Timeslot (TS) switching unit
It implements 16 K circuit switching and provides an
internal circuit switching net for the gigabit resource shelf.
It implements the user-plane/control-plane Ethernet
switching function on the gigabit resource shelf.
The external data is from boards on the shelf where UIMU
locates. It enters Ethernet switching unit or TS switching unit
for switching, and then is sent to the target board or level-1
switching interface board.

Chapter 4 - Boards
Board Panel
Description
The rear board of GUIM is RGUM1 and RGUM2.
Figure 89 shows the panel diagrams of GUIM, RGUM1, and
RGUM2.
FIGURE 89 – GUIM, RGUM1, RGUM2 PANELS
G U IM
ENUM RUN
ACT ALM
EXCH
RST
A C T -P
TX1
RX1
RGUM1 RGUM2
TX2
RX2
TX3
RX3
FE2
FE1
TX4
RX4
FE4
FE3
A C T -T
FE6
FE5
CLKIN
CLKIN
L1 L2 L3
L4 L5 L6
DEBUG-232
DEBUG-232
1. GUIM panel 2. RGUM1 panel 3. RGUM2 panel
Indicators
Table 60 explains the GUIM panel indicators.

TABLE 60 – GUIM P ANEL INDICATORS

Run
indicator
Active/ active
ACT Green standby
standby
Alarm
indicator
been downloaded
status
switch is normal
ON: indicates that GUIM packet
Packet domain is active
ACT-P Green domain
indicator OFF: indicates that GUIM
packet domain is standby
GE ON: indicates that the current

interface 1 optical interface is activated
ACT Green
status OFF: indicates that the current
indicator optical interface is not activated
ON: indicates that the optical
GE module has received the optical
interface 1 signal
SD Green optical
signal OFF: indicates that the optical
indicator module has not received the
optical signal

ACT Green

Chapter 4 - Boards

interface 2 signal
SD Green optical
optical signal

ACT Green
interface 3 signal
SD Green optical
optical signal

ACT Green
interface 4 signal
SD Green optical
optical signal
ON: indicates that the GUIM
Circuit circuit domain is active
ACT-T Green domain
indicator OFF: indicates that the GUIM
circuit domain is standby
Status ON: Control plane cascade 100
indicator of Mbps interface 1 ~ 6 is
control connected
L1 ~ L6 Green plane
cascade OFF: Control plane cascade 100
interface 1 Mbps interface 1 ~ 6 is not
~6 connected
Buttons
Table 61 explains the GUIM panel buttons.
TABLE 61 – GUIM P ANEL BUTTONS
Button Description
RST Board reset

Interfaces
Table 62 explains the GUIM board interfaces.
TABLE 62 – GUIM BOARD INTERFACES

GUIM Optical fiber connection
panel between the front board and
4 pairs of Bi-
GLI of the switching unit,
RX-TX directional
the user plane used 4×1
Gbps optical interface.
Provides one cascading
network port (through the
Bi- two rear boards in active
FE1
directional and standby slots),
connected to CHUB on the
control shelf or UIMC.
Provides external network
ports (the two rear boards in
Bi- active and standby slots
FE3
directional each provides one), and can
be used as DEBUG network
RGUM1 port.
panel
Bi- ports (the two rear boards in
FE5
directional active and standby slots
each provides one).
Connected with the clock
board and transmits 8
CLKIN Input
Kbps/16 Mbps/PP2S clock
signals.
Debugging serial port for
DEBUG- Bi-
CPU system; connected to
232 directional
the debug machine.
Provides one cascading
network port (through the
two rear boards in active
RGUM2 Bi- and standby slots),
FE2
panel directional connected to CHUB on the
control shelf or UIMC, and
can be used as DEBUG
network port.
FE4
each provides one).
FE6 Bi- Provides external network

Chapter 4 - Boards

directional ports (the two rear boards in
active and standby slots
each provides one).
CLKIN Input
signals.
DEBUG- Bi-
232 directional
the debug machine.
Operation and Maintenance

Processing Board (OMP)
Functions Implements all the operation and maintenance processes and
related controls, and connects with OMM through 100 Mbps
Ethernet.
Monitors and manages the boards, and manages board
configuration through Ethernet and RS485 links.
Principle Refer to the principle of Control Main Processing Board (CMP),

the difference is that CPU_A provides hard disk.
Board Panel
Description
In OMP board, CPU_A provides hard disk, while CPU_B does not.
RMPB is the rear board of OMP.
Figure 90 shows the diagram of OMP board panel, board layout,
and RMPB panel.

FIGURE 90 – OMP AND RM PB P ANELS
1. OMP panel 2. OMP board layout 3. RMPB panel
Indicators
Table 63 explains the OMP board panel indicators.
TABLE 63 – OMP BOARD PANEL INDICATORS

CPU_A
indicator
CPU_A
indicator
CPU_A active
ACT1 Green active/stand
by indicator OFF: Indicates the board is
standby
CPU_A board has not been inserted
board properly; the version has not
ENUM1 Yellow
extraction been downloaded
indicator Flashing at 5 Hz (fast):

Chapter 4 - Boards

running
status
switch is normal
Hard disk Flashing at 5 Hz (fast):
HD1 Red
indicator 1 indicates CPU_B is working
CPU_B
indicator
CPU_B
indicator
CPU_B active
ACT2 Green active/stand
by indicator OFF: Indicates the board is
standby
been downloaded
CPU_B been opened while the board is
board running
ENUM2 Yellow
extraction
status
switch is normal
Hard disk Flashing at 5 Hz (fast):
HD2 Red
indicator 2 indicates CPU_A is working
OMC
ON: indicates that OMC
network
OMC1 Green network port 1 has been
port
connected
indicator 1
OMC
ON: indicates that OMC
network
OMC2 Green network port 2 has been
port
connected
indicator 2

Buttons
Table 64 explains the OMP board panel buttons.
TABLE 64 – OMP P ANEL BUTTONS
Name Description
RST Board reset

EXCH1
CPU_B
EXCH2
CPU_A
Interfaces
Table 65 explains the OMP and RMPB panel interfaces.
TABLE 65 – OMP BOARD INTERFACES

Bi-
USB1 -
OMP directional
Panel Bi-
USB2 -
directional
Bi- External Ethernet network
OMC1
directional interface for CPU_A, not used.
Bi- 1 × 100 Mbps Ethernet
OMC2
directional interface, connected to OMM.
Connected to GPS function
Bi-
GPS485 module (unavailable at the
directional
moment).
Bi- Connected to RS485 interface
RMPB PD485
directional on PDM (Up).
panel
Bi- Out-of-band management
RS232
directional serial port.
DEBUG1- Bi-
CPU_A, connected to the
232 directional
debug machine.
DEBUG2- Bi-
CPU_B, connected to the
232 directional
debug machine.

Chapter 4 - Boards
Packet Switching Network (PSN)

Board
Functions Supports bi-directional user data switching at the rate of 40
Gbps in each direction.
Implements 1+1 load sharing.
Principle Figure 91 shows the working principle of PSN.
FIGURE 91 - WORKING PRINCIPLE OF PSN
PSN consists of the following three units:

f CPU
It connects with UIMC via one FE for operation and
maintenance and with the matrix switching unit via the
control bus for basic configuration and management.
f Logic unit
It implements the required logical functions inside the
boards.
f Matrix switching unit
It provides external high-speed serial link, connecting
with GLI and realizing the data switching path.

The data from GLI is sent to the matrix switching unit via the
high-speed serial link on the backplane. After the switching,
the data is sent to the target GLI.
Board Panel
Description
Figure 92 shows the diagram of PSN board panel.
FIGURE 92 – PSN BOARD PANEL
PSN
Indicators
There are four indicators on the PSN board panel.
Table 66 explains the PSN board panel indicators.
TABLE 66 – PSN BOARD P ANEL INDICATORS
Indicator
Name

Chapter 4 - Boards
Indicator
Name
Running
indicator
Alarm
indicator
properly; the version has not been
downloaded
Flashing at 5 Hz (fast): indicates
that there is an alarm for tack
Board switch; tack switch has been
ENUM Yellow extraction opened while the board is running
indicator Flashing at 1 Hz (slow): indicates
that the board can be pulled out;
tack switch has been opened while
the board is running; the board
can be pulled out when in standby
status
switch is normal
Active/sta ON: indicates the board is active

ACT Green ndby OFF: indicates the board is
indicator standby
Buttons
Table 67 explains the buttons on the PSN board panel.
TABLE 67 – PSN BOARD P ANEL BUTTONS
RST Board reset
Power Distribution Board (PWRD)

Functions Provides -48 V power to shelves and fans inside the cabinet.
Detects rack power and the environment, and generates
alarms accordingly.
Detects and control the fans.
PWRD is monitored and managed by OMP through RS485
interface. It reports the detected information to OMP and

indicates through indicators on the power distribution plug-in

box panel.
Principle Figure 93 shows the working principle of PWRD.
FIGURE 93 – WORKING PRINCIPLE OF PWRD
By structure, PWRD falls into the following parts: one PDM, one
PWRD, one PWRDB and four fan group control modules.
PDM implements filter, lightning protection and isolation on

2-channel -48 V, sends it to the busbar to supply shelves,
samples and sends the samples to PWRD for over-/under-
voltage monitoring before the 2-channel power supply
convergence.
PWRD detects the 2-channel -48 V over-/under-voltage,
speed of 24 fans, ambient temperature, ambient humidity,
smoke alarm, infrared alarm, cabinet, and equipment room
door control.
PDM and PWRD form a power distribution plug-in box.
2 × 3 fan group and the fan group control module form a fan
plug-in box.
Fan plug-in box takes -48 V from the busbar and sends fan
monitoring signals to PWRD.
PWRDB provides external monitoring signal interface for
PWRD, accessing the system monitoring signals.
Board Panel
Description
Figure 94 shows the diagram of PWRD board panel.

Chapter 4 - Boards
FIGURE 94 – PWRD BOARD P ANEL
Reset
switch
S2
BOOT C51
FLASH S3
DIP Switches and Jumpers

PWRD has two DIP switches:
S2
S3
S2 configuration switch is used to set working mode (normal or
debugging), with ON being 0 and OFF being 1. ON is labeled on
the switch. The default value of the configuration switch is 0100.
Users need not set this DIP switch.
S3 switch is used to set the communication address for 485 and
OMP, with ON being 0 and OFF being 1. The default value of the
switch is 0000. The 4-digit switch is used to set the 16
addresses (0-15), corresponding to the rack number where the
board is.
There is a 2 × 5 feet pin on PWRD, serving as a connection

jumper X8 for 485 signals.
When ZXG10 iBSC system uses multiple cabinets, it is necessary
to set the working mode for 485 bus of PWRD according to rack
positions. Resistance terminals are necessary if PWRD is at the
end of the 485 bus. 485 signals need to be transmitted to output
if PWRD is at the middle of the bus.
Figure 95 shows the default jumper settings.

FIGURE 95 – JUMPER SETTINGS
Specific jumper connections are as follows:

For 485 bus end node: connect pins 1 to 2 and 9 to 10.
For 485 bus middle node, 485 single transmission: connect pins
3 to 4 and 7 to 8.
Note: After changing the DIP switch setting and the

jumper setting, press the reset switch to reset the board.
Server Board (SBCX)

Functions Provides interfaces for keyboard, mouse, and VGA.
CPU is Sossaman dual-channel dual-core processor, with a
main frequency of 2 GHz.
Supports multiple operating systems, including Windows
XP/2000/2003/Linux and Soloris operating system.
Provides 3 FE interfaces, 2 GE interfaces, and 1 RS232 serial
port.
Provides 4 universal USB interfaces.
Supports booting from hard disk and USB.
Principle Figure 96 shows the working principle of SBCX.

Chapter 4 - Boards
FIGURE 96 – WORKING PRINCIPLE OF SBCX BOARD
keyboardPS/2
Peripheral mous
CPU dual- PS/2
device e USB
core interface
system VGA
unit
FE1-3
External
interface GE1-2
unit RS232
SAS hard
SAS disk 1
controller SAS hard
disk 2
SBCX consists of the following five units.

f CPU dual-core system
It is the core processing module of the board, including
CPU, memory controller, and main storage.
f Peripheral device interface unit
It provides various external interfaces, including PS/2
interface, USB interface, and VGA interface.
f External interface unit
It provides 3 FE interfaces, 2 GE interfaces, and 1 RS232
serial port.
f SAS controller
It provides SAS hard disk interface, realizes the SAS hard
disk RAID 0/1.
f SAS hard disk
It saves service data.
Board Panel
Description
RSVB is the rear board of SBCX.
Figure 97 shows the SBCX and RSVB panels.

FIGURE 97 – SBCX AND RSVB P ANELS
SBCX
ENUM RUN
ACT ALM
EXCH
RST
HD PWR
PWB
RSVB
SAS1 ALM1
OMC1
ENUM1
OMC2
RX1
ACT
OMP1
TX1
SD
RX2
HEART1
ACT
TX2
SD
HEART2
RS232
KB
MS SAS2 ALM2
ENUM2 USB1 USB2
VGA
CLASS 1
USB1 USB2
1 2
1. SBCX panel 2. RSVB panel
Indicators
Table 68explains the SVR panel indicators.
TABLE 68 – SBCX P ANEL INDICATORS
Indicator
Name
Refer to Table 30, not
RUN Green Run indicator
used
Refer to Table 30, not
ALM Red Alarm indicator
used

Chapter 4 - Boards
Indicator
Name
opened; the board has
not been inserted
properly; the version has
not been downloaded
alarm for tack switch;
Board extraction opened while the board is
ENUM Yellow running
Indicator
while the board is
pulled out when in
standby status
that tack switch is normal
ON: indicates the board is
active
Active/ Standby
ACT Green OFF: indicates the board
indicator
is standby
Not used
ON: IDE hard disk is
being accessed
IDE hard disk
HD Green OFF: IDE hard disk is idle
indicator
It is prohibited to unplug
the board when HD is ON.
Board power ON: board is power-on

PWR Green
indicator OFF: board is power-off
ON: SAS hard disk 1 is
SAS hard disk 1 being accessed
SAS1 Green read/write
indicator OFF: SAS hard disk 1 is
idle
ON: SAS hard disk1 is not
SAS hard disk 1 in position or is faulty
ALM1 Yellow
fault indicator OFF: SAS hard disk 1 is
normal
ON: SAS hard disk 2 is
SAS hard disk 2 being accessed
SAS2 Green read/write
indicator OFF: SAS hard disk 2 is
idle

Indicator
Name
ON: SAS hard disk2 is not
SAS hard disk 2 in position or is faulty
ALM2 Yellow
fault indicator OFF: SAS hard disk 2 is
normal
FC interface 1
ACT Green Not used
running indicator
FC interface 1
SD Yellow Not used
rate indicator
FC interface 2
ACT Green Not used
running indicator
FC interface 2
SD Yellow Not used
rate indicator
Buttons
Table 69 explains the SBCX panel buttons.
TABLE 69 – SBCX P ANEL BUTTONS
Name Instruction
RST Reset switch
EXCH Active/standby changeover switch
PWB Board power Switch
Board-unplugging switch of SAS hard
ENUM1
disk 1
Board-unplugging switch of SAS hard
ENUM2
disk 2
Interfaces
Table 70 explains the SBCX board interfaces.
TABLE 70 – SBCX INTERFACES
Interface
Position Direction Instructions
Name
USB1 Bidirectional USB Interface
USB2 bidirectional USB Interface
KB Input PS/2 Keyboard Interface
SBCX
panel MS Input PS/2 Mouse Interface
VGA Output Analog Monitor Interface
Two pairs
- Not used
of TX-RX
RSVB OMC1 Bidirectional External Network Port1

Chapter 4 - Boards
Interface
Position Direction Instructions
Name
panel OMC2 Bidirectional External Network Port2
OMP1 Bidirectional External Network Port3
HEART1 Bidirectional External Network Port4
HEART2 Bidirectional External Network Port5
RS232 Bidirectional RS232 serial port
USB1 Bidirectional USB interface
USB2 Bidirectional USB interface
SONET Digital Trunk Board (SDTB)

Functions Provides one 155 Mbps STM-1 interface.
Processes Channel Associated Signal (CAS) and Common
Channel Signaling (CCS).
Provides two channels of differential 8 kHz synchronization
clock signal as the reference clock of the clock board.
Principle Figure 98 shows the working principle of SDTB.
FIGURE 98 – WORKING PRINCIPLE OF SDTB
控制面 FE，RS232，RS485
主控单元
时钟处理时钟
逻辑处理单元单元
背
板
STM-1 电路交换
接口单元
单元
SDTB consists of the following five units.

f Main control unit
It manages the board and controls the internal
connections.

f Interface unit
It is connected with circuit switching unit, and provides
STM-1 interface.
The circuit switching unit realizes switching function.
It implements the logical conversion and adaptation
inside the board.
It receives the clock from system clock board, and
provides the reference clock signal extracted from STM-1.
From the receiving direction, the STM-1 optical data from the
line side is processed by the interface unit, sent to the circuit
switching unit for switching, and then sent to the UIMU/GUIM
board, vice versa.
Board Panel
Description
The rear board of SDTB is RGIM1.
Figure 99 shows the SDTB and RGIM1 panels.

Chapter 4 - Boards
FIGURE 99 – SDTB AND RGIM1 P ANELS
SDTB
ENUM RUN
ACT ALM
EXCH
RST
RGIM1
TX
ACT
RX
SD
8KOUT/DEBUG-232
CLASS 1
1 2
1. SDTB panel 2. RGIM1 panel
Note: If it does not require to extract the 8 K clock

reference from SDTB, then RGIM1 is not be used. If it requires
to extract the 8 K clock reference from SDTB, then RGIM1 is
used.
Indicators
There are 6 indicators on the SDTB panel. Table 71 explains the
SDTB panel indicators.
TABLE 71 – SDTB P ANEL INDICATORS

RUN Green Running Refer to Table 30


Indicator
downloaded
Board switch has been opened
ENUM Yellow Extraction while the board is running
Indicator
Board On: board is active
ACT Green Active/Standby
indicator Off: board is standby
On: optical interface is

Optical module active
indicator Off: optical interface is
standby
ON: indicates optical board
has received optical signals
Optical signal
SD Green OFF: indicates optical
indicator
board has not received
optical signals
Buttons
Table 72 shows the SDTB panel buttons.
TABLE 72 – SDTB P ANEL BUTTONS
Button Name Description

RST Board reset
Interfaces
Table 73 explains the SDTB interfaces.

Chapter 4 - Boards
TABLE 73 – SDTB INTERFACES
Interface
Position Direction Instruction
Name
SDTB 155 Mbps STM-1
TR-TX Bidirectional
panel standard interface
Leads out the 8 K
RGIM1 8KOUT/DEBUG- reference clock signal
Bidirectional
panel 232 and RS232 serial port
debugging signal
SONET Digital Trunk Board (SDTB2)

Functions Provides two 155 Mbps STM-1 interface.
Processes Channel Associated Signal (CAS) and Common
Channel Signaling (CCS), provides an access processing
capability of 126 E1s or 168 T1s.
Provides two channels of differential 8 kHz synchronization
clock signal as the reference clock of the clock board.
Principle Figure 100 shows the working principle of SDTB2.
FIGURE 100 – WORKING PRINCIPLE OF SDTB2
Control plane FE, RS232,

Main RS485
control unit
Clock Cloc
Logic processing k
processing unit unit
HW
HW
STM-1 Circuit HW
STM-1 Interface unit switching
unit
SDTB2 consists of the following five units.

f Main control unit
It manages the board and controls the internal
connections.
f Interface unit


STM-1 interface.
The circuit switching unit realizes switching function.
It implements the logical conversion and adaptation
inside the board.
It receives the clock from system clock board, and
provides the reference clock signal extracted from STM-1.
From the receiving direction, the STM-1 optical data from the
line side is processed by the interface unit, sent to the circuit
switching unit for switching, and then sent to the GUIM
board, vice versa.
Board Panel
Description
The rear board of SDTB2 is RGIM1.
Figure 101 shows the SDTB2 and RGIM1 panels.

Chapter 4 - Boards
FIGURE 101 – SDTB2 AND RGIM1 P ANEL
SDTB2
ENUM RUN
ACT ALM
EXCH
RST
RGIM1
TX1
ACT
RX1
SD
TX2
ACT
RX2
SD
8KOUT/DEBUG-232
CLASS 1
1 2
1. SDTB2 panel 2. RGIM1 panel
Note: If it does not require to extract the 8 K clock

reference from SDTB2, then RGIM1 is not be used. If it requires
to extract the 8 K clock reference from SDTB2, then RGIM1 is
used.

Indicators
There are 8 indicators on the SDTB2 panel. Table 74 explains
the SDTB panel indicators.
TABLE 74 – SDTB2 P ANEL INDICATORS

Running
Indicator
downloaded
Indicator
Board On: board is active
indicator Off: board is standby
Optical module On: optical interface is

1 active
ACT Green
Active/Standby Off: optical interface is
indicator standby
has received optical signals
Optical signal 1
SD Green OFF: indicates optical
indicator
optical signals
Optical module On: optical interface is

2 active
ACT Green
Active/Standby Off: optical interface is
indicator standby
Optical signal 2 has received optical signals
SD Green
indicator OFF: indicates optical

Chapter 4 - Boards

optical signals
Buttons
Table 72 shows the SDTB2 panel buttons.
TABLE 75 – SDTB2 P ANEL BUTTONS

RST Board reset
Interfaces
Table 73 explains the SDTB2 interfaces.
TABLE 76 – SDTB2 INTERFACES
Interface
Position Direction Instruction
Name
SDTB2 TR1-TX1 Bidirectional 155 Mbps STM-1

panel TR2-TX2 Bidirectional standard interface
Leads out the 8 K

RGIM1 8KOUT/DEBUG- clock reference signal
Bidirectional
panel 232 and RS232 serial port
debugging signal
Signaling Processing Board (SPB)

Functions According to functions realized, SPB can be used as LAPD
processing board (LAPD), signaling processing board (SPB), and
Gb interface processing board (GIPB).
When SPB is used as LAPD processing board, the LAPD
signaling from BTS is accessed by DTB/SPB board, and
switched to LAPD board through the circuit switching network
on UIMU/UIMC board in the resource shelf. The LAPD board
implements the LAPD processing.
When SPB is used as signaling processing board, it processes
MTP2 and X.25 protocol, and extracts 8 kHz synchronization
clock from the line and transmits it through cables to CLKG
as clock reference.
When SPB is used as Gb interface processing board, it
performs Gb interface function and implements GPRS FR and
NS processing and part of BSSGP processing.

Principle Figure 102 shows the working principle of SPB.
FIGURE 102 - WORKING PRINCIPLE OF SPB
HW
Control plane FE
E1 switching
interfac Circuit unit
e Interfac CPU
switching User plane
e unit
unit switching
unit FE
SPB consists of the following five units:

f Interface Unit
E1 interface.
The circuit of the interface unit and backplane realize the
switching function.
f CPU
It implements the function of signaling, board
management and internal connection control.
f Control plane switching unit
It implements the control plane data switching and
provides the control plane FE interface.
f User plane switching unit
It performs the user plane data switching and provides
the user plane FE interface.
Board Data Flow Direction
The data from E1 interface or backplane is sent to the circuit
switching unit for switching after being processed by the
interface unit, then sent to CPU, and at last sent to other
board by switching unit for processing.
Board Panel
Description
The rear board of SPB is RSPB.
Figure 103 shows the diagrams of SPB panel, board layout and
RSPB panel.

Chapter 4 - Boards
FIGURE 103 – SPB P ANELS
SPB
ENUM RUN
ACT ALM
RST
E1
L1 L2
RSPB
S3 ON S4 ON S5 ON S6 ON
L3 L4
L5 L6
L7 L8
L9 L10
L11 L12
L13 L14
L15 L16
T1/E1 1-16
2
3
2
S
R
-
4
U
P
C
2
3
2
S
R
-
3
U
P
C
S1 S2 2
3
2
S
R
-
ON ON 2
U
P
C
2
3
2
S
R
-
1
U
P
C
/
T
U
O
K
8
1 2 3
1. SPB Panel 2. SPB Board Layout 3. RSPB Panel
Indicators
There are 20 indicators on the SPB panel.
Table 77 explains the SPB panel indicators.
TABLE 77 – SPB P ANEL INDICATORS

Running
Indicator
downloaded
ENUM Yellow Extraction indicates that there is an
Indicator alarm for tack switch; tack
while the board is running



ACT Green
OFF: indicates that this
E1/T1 is not configured in
the database
this E1/T1 is configured in
the database, but this
E1/T1 can not be
connected
(slow): indicates that this
E1/T1 is configured in the
database, and this E1/T1
can be connected
(fast): indicates that this
E1/T1 is used as link
Buttons
Table 78 explains the SPB panel buttons.
TABLE 78 – SPB P ANEL BUTTONS

RST Board reset
Interfaces
Table 79 explains the SPB panel interfaces.
TABLE 79 - SPB P ANEL INTERFACES

16 × E1 Interface to
RSPB Bi-
T1/E1 1 ~ 16 connect the external
panel directional
system
Lead out 8K reference
8KOUT/CPU1- Bi- clock signal and RS232
RS232 directional serial port debugging
signal.
Bi- Lead out RS232 serial
CPU2-RS232
directional port debugging signal.

Chapter 4 - Boards

CPU3-RS232
CPU4-RS232
DIP Switches DIP Switches

and Jumpers
There are six 4-digit DIP switches on the SPB board.
Four digits of S3 respectively represent E1s 1–4 on the SPB
board.
board.
board.
Four digits of S6 respectively represent E1s 13–16 on the
SPB board.
S1 and S2 indicate the receiving matching impedance and
long/short haul state of each E1 chip respectively. The CPU
retrieves the state and initializes the E1 chip according to the
state.
If S1 is OFF (1 is retrieved), it indicates long haul.
If S1 is ON (0 is retrieved), it indicates short haul.
If S2 is OFF (1 is retrieved), it indicates that the matching
impedance is 120 Ω.
If S2 is ON (0 is retrieved), it indicates that the matching
impedance is 75 Ω.
Channels 1–4 of S1/S2 respectively represent the E1 Chips 1–4
(namely, E1 channels 1–4, 5–8, 9–12, and 13–16).
Jumpers on RSPB
SPB supports two types of external trunk cables: 75 Ω co-axial
cables and 120 Ω balanced symmetric cables. There are four
jumpers on the RSPB panel, as shown in Figure 104.

FIGURE 104 – JUMPERS ON RSPB P ANEL
1 2
3 4
5 6
7 8
11
13
10
12
14
X11
15 16
1 2
3 4
5 6
X12
7 8
9 10
11 12
13 14
15 16
1 2
3 4
5 6
7 8
11
13
10
12
14
X13
15 16
1 2
3 4
5 6
X14
7 8
9 10
11 12
13 14
15 16
If co-axial cables are used, short-circuit blocks should be added

to the 32 jumpers of X11, X12, X13 and X14. In other words,
the negative end of E1 transmitting differential cable is grounded
directly, and the negative end of E1 receiving differential cable is
grounded through the capacitor.
On RSPB, the E1 line is configured as 75 Ω co-axial transmission
mode by default.
Table 80 explains the settings of X11 ~ X14.
TABLE 80 – RSPB JUMPER SETTINGS
Connections for
Definitions
X11 ~ X14
Connecting E1_TX (N) –R to protection
1－2
ground (Nth line)
Connecting E1_RX (N) –R to protection
3－4
ground (Nth line)
Connecting E1_TX (N+1) –R to protection
5－6
ground (Nth+1 line)
Connecting E1_RX (N+1) –R to protection
7－8
ground (Nth+1 line)
9－10
ground (Nth+2 line)
11－12 Connecting E1_RX (N+2) –R to protection

Chapter 4 - Boards
Connections for
Definitions
X11 ~ X14
ground (Nth+2 line)
13－14
ground (Nth+3 line)
Connecting E1_RX (N+3) –R to protection
15－16
ground (Nth+3 line)
Note: Short-circuit blocks of jumpers X11 ~ X14 on RSPB

must be removed if E1 adopts 120 Ω balanced symmetric cables.
Signaling Processing Board (SPB2)

Functions According to functions realized, SPB2 can be used as LAPD
processing board (LAPD), signaling processing board (SPB2),
and Gb interface processing board (GIPB).
When SPB2 is used as LAPD processing board, the LAPD
signaling from BTS is accessed by DTB/SPB board, and
switched to LAPD board through the circuit switching network
on UIMU/UIMC board in the resource shelf or the GUIM board
in the gigabit resource shelf. The LAPD board implements the
LAPD processing.
When SPB2 is used as signaling processing board, it
processes MTP2 and X.25 protocol, and extracts 8 kHz
synchronization clock from the line and transmits it through
cables to CLKG as clock reference.
When SPB is used as Gb interface processing board, it
performs Gb interface function and implements GPRS FR and
NS processing and part of BSSGP processing.
Principle Figure 105 shows the working principle of SPB2.
FIGURE 105 - WORKING PRINCIPLE OF SPB2
HW
Control plane FE
E1 switching
interfac Circuit unit
e Interfac CPU
switching User plane FE
e unit
unit switching GE
unit
SPB2 consists of the following five units:

f Interface Unit


E1 interface.
The circuit of the interface unit and backplane realize the
switching function.
f CPU
It implements the function of signaling, board
management and internal connection control.
f Control plane switching unit
It implements the control plane data switching and
provides the control plane FE interface.
f User plane switching unit
It performs the user plane data switching and provides
the user plane FE interface and GE interface.
Board Data Flow Direction
The data from E1 interface or backplane is sent to the circuit
switching unit for switching after being processed by the
interface unit, then sent to CPU, and at last sent to other
board by switching unit for processing.
Board Panel
Description
The rear board of SPB2 is RSPB.
Figure 106 shows the diagrams of SPB2 panel, board layout and
RSPB panel.

Chapter 4 - Boards
FIGURE 106 – SPB2 P ANELS
SPB
ENUM RUN
ACT ALM
RST
E1
L1 L2
RSPB
L3 L4
L5 L6
L7 L8
L9 L10
L11 L12
L13 L14
L15 L16
T1/E1 1-16
2
3
2
S
R
-
4
U
P
C
2
3
2
S
R
-
3
U
P
C
2
3
2
S
R
-
2
U
P
C
2
3
2
S
R
-
1
U
P
C
/
T
U
O
K
8
1 2
1. SPB2 Panel 2. RSPB Panel
Indicators
There are 20 indicators on the SPB2 panel.
Table 81 explains the SPB2 panel indicators.

TABLE 81 – SPB2 P ANEL INDICATORS

Running
Indicator
downloaded
Indicator

ACT Green
OFF: indicates that this
E1/T1 is not configured in
the database
this E1/T1 is configured in
the database, but this
E1/T1 can not be
connected
(slowly): indicates that this
E1/T1 is configured in the
database, and this E1/T1
can be connected
(fast): indicates that this
E1/T1 is used as link
Buttons
Table 82 explains the SPB2 panel buttons.

Chapter 4 - Boards
TABLE 82 – SPB2 P ANEL BUTTONS

RST Board reset
Interfaces
Table 83 explains the SPB2 panel interfaces.
TABLE 83 – SPB2 P ANEL INTERFACES

16 × E1 Interface to
Bi-
T1/E1 1 ~ 16 connect the external
directional
system
Lead out 8K reference
8KOUT/CPU1- Bi- clock signal and RS232
RS232 directional serial port debugging
RSPB signal.
panel
CPU2-RS232
CPU3-RS232
CPU4-RS232
Universal Interface Module for

Control Plane (UIMC)
Functions Implements Ethernet level-2 switching in control shelf, and
manages the control shelf.
Provides an internal user plane GE interface to cascade UIMC
with CHUB in the control shelf.
Provides the clock-driven function inside the control shelf.
Input PP2S, 8 kHz and 16 MHz signals are distributed to
various slots after phase lock and drive, to provide 16 MHz, 8
kHz and PP2S clocks to the boards.
Principles Figure 107 shows the working principle for UIMC.

FIGURE 107 - WORKING PRINCIPLE OF UIMC
Internal Bus
内部总线
RS232
RS485
Debugging
逻辑单元
Logic Unit CPU
CPU单元调试以太网
Ethernet
主备以太网
Active/Standby Ethernet
PCI Bus
PCI总线
媒体面
Media plane
以 Control Plane
User plane
用户面控制面
interconnecti Control
控制面 plane
太
Ethernet
以太网互连on Ethernet
以太网
网 GCS Sub-
交 GCS子卡
card
换
单 User plane
用户面FE Control plane
元 FE 控制面FE
FE
UIMC consists of the following three units.

f CPU
It connects with TS switching unit, logic unit and Ethernet
switching unit via the control bus. It configures the
switching chipset, configures and manages FPGA, and
manages the resource shelf/gigabit resource shelf.
It provides external Ethernet interface, RS232 and RS
485 serial port for debugging and active/standby.
f Logic unit
It implements the control plane Ethernet switching
function on the control shelf or switching shelf.
The external data is from boards on the shelf where UIMC
locates. It enters UIMC Ethernet switching unit for the
switching, and then is sent to the target board.
Board Panel
Description
The rear boards of UIMC are RUIM2 and RUIM3.
Figure 108 shows the panel diagrams of UIMC, RUIM2 and
RUIM3.

Chapter 4 - Boards
FIGURE 108 – UIMC, RUIM2, RUIM3 PANELS
U IM C
E N U M R U N
A C T A LM
E X C H
R S T
L IN K 1 L IN K 2
L IN K 3 L IN K 4
R U IM 2 R U IM 3
FE10
FE9
FE7
FE8
FE5
FE6
FE3
FE4
FE2
FE1
CLKIN
CLKIN
L IN K 5 L IN K 6
DEBUG-232 DEBUG-FE
DEBUG-232 DEBUG-FE
L IN K 7 L IN K 8
L IN K 9 L IN K 1 0
1 2 3
1. UIMC Panel 2. RUIM2 Panel 3. RUIM3 Panel
Indicators
Table 84 explains the UIMC panel indicators.
TABLE 84 – UIMC BOARD INDICATORS

Running
indicator
Active/ active
ACT Green standby
standby
Alarm
indicator


been downloaded
status
switch is normal
indicator of Mbps interface 1 is connected
control
LINK1 Green OFF: Control plane cascade 100
plane
cascade Mbps interface 1 is not
interface 1 connected

control
plane

control
plane

control
plane

control
plane

Chapter 4 - Boards

control
plane

control
plane

control
plane

control
plane

control
plane
Buttons
Table 85 explains the UIMC panel buttons.
TABLE 85 – UIMC P ANEL BUTTONS
Button Description
RST Board reset
Interfaces
Table 86 explains the UIMC board interfaces.
TABLE 86 – UIMC BOARD INTERFACES

RUIM2 Bi- Provides 10 cascading
FE1
panel directional network ports through the


Bi- two rear boards in the active
FE3 and standby slots.
directional
Bi-
FE5
directional
Bi-
FE7
directional
Bi-
FE9
directional
board, and transmits 8
CLKIN Input
signals.
Debugging network port for
DEBUG- Bi-
CPU; connected to the debug
FE directional
machine.
DEBUG- Bi-
CPU; connected to the debug
232 directional
machine.
Bi-
FE2
directional
Bi-
FE4
directional
Provides 10 cascading
Bi- network ports through the
FE6
directional two rear boards in the active
and standby slots.
Bi-
FE8
directional
Bi-
RUIM3 FE10
directional
panel
board, and transmits 8
CLKIN Input
signals.
Ethernet debugging interface
DEBUG- Bi-
of CPU; connected to the
FE directional
debug machine.
Serial port debugging
DEBUG- Bi-
interface of CPU; connected
232 directional
to the debug machine.
Universal Interface Module for User

Plane (UIMU)
Functions Implements 16 Kbps Circuit Switching (CS) in resource shelf.
Provides one external user plane GE optical interface to
interconnect resource shelf and core switching unit.

Chapter 4 - Boards
Provides the clock-driven function inside the resource shelf.

Input PP2S, 8 kHz and 16 MHz signals are distributed to
various slots after phase lock and drive, to provide 16 MHz, 8
kHz and PP2S clocks to the boards.
Provides RS485 management interface to reset the boards of
resource shelf.
Principle Figure 109 show the working principles for UIMU.
FIGURE 109 - WORKING PRINCIPLE FOR UIMU
Timeslot
时隙交换
switching
单元unit
Internal
内部总线 Busbar
RS232
RS485
Debugging
Logic
逻辑单元 Unit CPU
CPU单元调试以太网
Ethernet
Active/standby
主备以太网
Ethernet
PCI Bus bar

PCI总线
GXS/2
以 GXS/2
Sub-
太 User
用户面plane 子卡 Control
控制面 plane
card
网 Ethernet
以太网 Ethernet
以太网
交
换
单 User plane GE Control
用户面FE 控制面FE
元 FE plane FE
UIMU consists of the following four units:

f CPU
It connects with TS switching unit, logic unit, and
Ethernet switching unit via the control bus. It configures
the switching chipset, configures and manages FPGA, and
manages the resource shelf.
It provides external Ethernet interface, RS232 and RS485
serial port for debugging and active/standby.
f Logic unit
f Timeslot (TS) switching unit

It implements 16 K circuit switching and provides an

internal circuit switching net for the resource shelf.
It implements the user plane and control plane Ethernet
switching function on the resource shelf.
The external data is from boards on the shelf where UIMU
locates. It enters Ethernet switching unit or TS switching unit
for switching, and then is sent to the target board.
Board Panel
Description
The rear board of UIMU is RUIM1.
Figure 110 shows the panel diagrams of UIMU and RUIM1.

Chapter 4 - Boards
FIGURE 110 – UIMU AND RUIM1 PANELS
UIMU
ENUM RUN
ACT ALM
EXCH
RST
ACT-P ACT-T
LINK1 LINK2
LINK3 LINK4
RUIM1
ACT1 ACT2
RX
1
TX
RX
2
TX
FE-U
SD1
SD2
FE-C3/4
FE-C1/2
CLKIN
DEBUG-232 DEBUG-FE
1 2
1. UIMU panel 2. RUIM1 panel
Indicators
Table 87 explains the UIMU panel indicators.
TABLE 87 – UIMU P ANEL INDICATORS

Run
indicator


Active/ active
ACT Green standby
standby
Alarm
indicator
been downloaded
status
switch is normal
Packet ON: UIMU packet switching

switching domain is active
ACT-P Green
domain OFF: UIMU packet switching
indicator domain is standby
Circuit ON: UIMU CS domain is active
switching
ACT-T Green OFF: UIMU CS domain is
domain
indicator standby

control
plane

control
plane

control
plane

Chapter 4 - Boards
Status ON: The control plane cascade

indicator of 100 Mbps interface 4 is
control connected
LINK4 Green
plane OFF: The control plane cascade
cascade 100 Mbps interface 4 is not
Status ON: Current optical interface is

indicator of activated
ACT1 Green
GE OFF: Current optical interface is
interface 1 not activated
Status ON: Current optical interface is

indicator of activated
ACT2 Green
GE OFF: Current optical interface is
interface 2 not activated
Optical ON: Optical module has
signal received optical signals
SD1 Green indicator of
GE OFF: Optical module has not
interface 1 received optical signals
Optical ON: Optical module has

signal received optical signals
SD2 Green indicator of
GE OFF: Optical module has not
interface 2 received optical signals
Buttons
Table 88 explains the UIMU panel buttons.
TABLE 88 – UIMU P ANEL BUTTONS
Button Description
RST Board reset
Interfaces
Table 89 explains the UIMU board interfaces.
TABLE 89 – UIMU BOARD INTERFACES

UIMU Optical fiber connection
panel between the front board and
2 pairs of Bi-
GLI of the switching unit,
RX-TX directional
the user plane used 2×1
Gbps optical interface.
RUIM1 Bi- Provides four cascading
FE C1/2
panel directional network ports (through the


two rear boards in active
Bi- and standby slots),
FE C3/4 connected to CHUB on the
directional
control shelf or UIMC.
FE-U
each provides one).
CLKIN Input
signals.
Debugging network port for
Bi-
DEBUG-FE CPU system; connected to
directional
the debug machine.
DEBUG- Bi-
232 directional
the debug machine.
User Plane Processing Board

(UPPB)
Function UPPB implements PS service processing in A/Gb mode and user
plane service processing in Iu mode.
Principle Figure 111 shows the working principles of UPPB.
FIGURE 111 - WORKING PRINCIPLE OF UPPB
DSP Unit
DSP单元
Contorl
控制总线
Bus
DSP User
P Ethernet 用户面FE
plane FE
以太网交
Host switching
…
换单元
Interface Unit
主机接口
CPU
CPU单元
DSP
P
Logic
Clock
时钟单元 Unit 逻辑单元
Unit
Control
控制面FE plane FE
UPPB consists of five units:

Chapter 4 - Boards
f CPU
It manages the board, and process the Gb interface
signaling. It also provides the external control plane FE
interface.
f Logic Unit
It realizes all the logic processing function of the board.
f DSP unit
It includes multiple DSP chips, and implements the
processing of user plane core protocols.
It implements the Ethernet connection of multiple DSP,
and provides external user plane FE interface.
f Clock Unit
It provides the necessary clock signal for each unit inside
the board.
f The user plane data from UIMU board enters the board
via user plane FE interface, pass the Ethernet switching
unit, and is distributed to the DSP unit.
f After the DSP unit processes relative user plane protocols,
the data is switched to SPB via user plane FE interface.
Board Panel
Description
The UPPB board has no corresponding rear board.
Figure 112 shows the panel diagram of UPPB.

FIGURE 112 – UPPB P ANEL
RUB
Indicators
There are four indicators on UPPB panel.
Table 90 explains the UPPB panel indicators.
TABLE 90 – UPPB P ANEL INDICATORS

Board extraction Always ON: indicates

ENUM Yellow that tack switch has
indicator
been opened; the

Chapter 4 - Boards

board has not been
downloaded
an alarm for tack
board is running
Flashing at 1 Hz
board can be pulled
out when in standby
status
that tack switch is
normal
ON: Indicates the
ACT Green
board is standby
Buttons
Table 91 explains the UPPB panel buttons.
TABLE 91 – UPPB P ANEL BUTTONS
Button Description
RST Board reset


Chapter 5
Other Hardware
Equipments
This chapter describes the alarm box and GPS-related

equipments.
Alarm Box
Functions
Functions of Alarm Box (ALB) are as follows:

Receives alarm messages from NetNumen M31 server and
transmits the messages to BTS through modem
ALB panel indicators display the alarm messages sent by the
background server
Transmits the data by dialing
Supports voice alarm
Supports GPRS message forwarding
Principles
Figure 113 shows the principle of ALB.

FIGURE 113 - WORKING PRINCIPLE OF ALB
Ethernet Ethernet
以太网收发器 Driver
驱动
Transceiver
Level RS232 Serial Port

RS232串口
电平转换
Convertor
RS485 bus
RS485总线
RS232/RS485
Wireless
Wireless
无线无线传输
Transmission
MODEM
MODEM
主 Wired
Bus
总线bar Built-in 有线传输
控内置MODEM Transmission
单 MODEM
元 BOOT FLASH SDRAM LED
液晶显示
（512KB）（16MB）（16MB） Keyboard
键盘
GPS
Alarm indicator
告警指示灯（红蓝黄绿）
(red/blue/yellow/green
-48VDC +5VDC
Power
电源单元 Unit
Coding +3.3VDC
编解码
/decoding
Alarm box hardware includes five units.

Main Control Unit
It is the core of alarm box, which is used to save OS, startup
code and voice data. The work library space is 8 MB, and
data saving space is 16 MB.
Interface Unit
The external interface of alarm box is as follows:
f Ethernet interface
f RS232 serial interface
f RS485 interface
f Wireless Modem interface
f Wired Modem interface
f GPS interface
Man-machine Unit
It provides hearable and visible alarm information and also
provides the operation and maintenance interface.
f Alarm Indicator
There are four alarm indicators. Colored red, blue, yellow
and green in order of severity. When alarm occurs, the
corresponding indicator will flash or be ON for a long time.
There is no individual alarm indicator for environment
alarm, but it is handled as a certain level alarm.
f Voice Announcement

Chapter 5 - Other Hardware Equipments
The main control unit works in transparent HDLC mode, it

sends the PCM voice saved in FLASH to the PCM
coder/decoder chip (CODEC) for coding, and the data is
converted to linear signal. Then the power amplifier
drives the speaker, and the hearable alarm is realized.
The voice management at background realizes the voice
recording, edit and pre-play, and downloads the voice file
into the FLASH of the alarm box.
f LCD
LCM is employed to display the alarm.
LCD is hung on the parallel bus of the main control unit.
LCM size is proper and it is all-dots graphic display.
Characters font size is controlled by software to display
different type of information.
LED has back facet power, which is generally OFF
resulting in increased life of the LED. When pressing the
function button or displaying information, the back facet
power turns ON to display.
There are some function buttons on the alarm box, which
realize the operation and maintenance functions together
with LCM.
Logic Unit
Employ EPLD to realize required combinational and
sequential logic.
Power Unit
The input voltage of the alarm box is -48 V DC from the
equipment room, and is converted to +5 V, +3.3 V and other
voltages for each unit by DC-DC power converter.
When the alarm box is in the duty room outside the equipment
room, there may not be -48 V DC power, in this case, a external
AC/DC power adapter is required to convert 110/220 V AC to 48
V DC, providing -48 V DC power to the alarm box. AC/DC power
adaptor is an optional accessory of the alarm box.
Connection Mode
ALB includes the following connection modes:

Basic connection mode
Expansion connection mode
Basic Figure 114 shows the basic connection mode of ALB.

Connection
Mode

FIGURE 114 – BASIC CONNECTION MODE OF ALB
ZTE
iBSC NetNumen M31 ALB
HUB
Expansion If the server’s IP address and ALB’s IP address are in the same
Connection network segment, the server is called near-end server. If the
Mode server’s IP address and ALB’s IP address are in different network
segments, the server is called remote server. ALB can be
connected with the near-end server as well as the remote server.
When ALB is connected with the remote server, relevant route
must be added in ALB, and on-site alarms are received through
the data network. This connection mode is called expansion
connection mode.
Figure 115 shows the expansion connection mode of ALB when
NetNumen M31 server is located at iBSC.
FIGURE 115 – EXPANSION CONNECTION MODE OF ALB
ALB
iBSC ALB
DDN
HUB HUB
Router Router
NetNumen M31
Server

ALB expansion function enables ALB to be installed in remote

areas and connected to the remote server, and receives on-site
alarms through the data network. One ALB can simultaneously
connect five background servers at most.
Board Description
Appearance Figure 116 shows the appearance of ALB.
FIGURE 116 – APPEAR ANCE OF ALB
Panel Figure 117 shows the ALB panel diagram.
FIGURE 117 – ALB P ANEL
EMERGENCY
IMPORTANT
RST
RUN
LINK
MUTE
Figure 118 shows the interfaces of ALB.

FIGURE 118 – INTERFACES OF ALB
1 2 3 4 5 6 7
O FF ON
M O D E M 10T
1. Cable MODEM interface 5. MS antenna location (connected with the

built-in wireless MODEM)
2. Ethernet interface 6. Power supply interface
3. RS485 interface 7. Power supply switch
4. RS232 serial port
ALB includes cover components, body components, PCB board,

apparatus, and assembly fasteners.
Cover components include LCD, button, indicator and panel.
Body components are used to install the main board and the
trumpet.
PCB board consists of the main board, panel board, keyboard,
and modem.
Apparatus include LCD, indicator, button, switch, RJ11, RJ45,
DB9, earphone jack, cell antenna, GPS interface, 48 V socket,
switch and trumpet.
ALB lock
ALB dimensions are 58 mm × 310 mm × 220 mm (L × W ×
H).
Indicators Table 92 explains the ALB panel indicators.
TABLE 92 – ALB P ANEL INDICATORS

Level-1 alarm ON: indicates that the
EMERGENCY Red
indicator level-1 alarm exists.
IMPORTANT Blue
COMMON Yellow
NOTIFICATION Green
Trumpet switch ON: indicates that the
MUTE Green
indicator trumpet is turned off.
Network ON: indicates that the

LINK Green
connection network is connected.


indicator Flashing: indicates that
the Ethernet link is
normal.
Flashing at 1 s:
Program running
RUN Green indicates that the ALB is
indicator
running normally.
Buttons Table 93 explains the ALB panel buttons.
TABLE 93 – ALB P ANEL BUTTONS
Button Description
M To select the menu
→ To move the cursor left when inputting the number.
To move the cursor right when inputting the
←
number.
↑ To select the menu, to page up
↓ To select the menu, to page down
C To return to the menu or to clear the input
OK To confirm the operation
RST To reset the ALB system
MUTE To mute/de-mute ALB
Interfaces Table 94 explains the ALB panel interfaces.
TABLE 94 – ALB P ANEL INTERFACES
Location Interface Description

Ethernet This interface connects the main processing
ALB
interface unit with the background.
External standard Interface EIA/TIA232-C,
RS232
used for the communication between
serial port
foreground and background.
External RS485 bus, used for the
communication between foreground and
RS485 background. It is also used to realize alarm
Interface box cascading.
(It is not used by iBSC for the time being.)
This interface is used for the
Radio communication between main control unit
modem and radio modem module, realizing radio
interface transmission of alarm information.
Cable The parallel bus of the main control unit

modem attaches cable MODEM chip, to provide the

Location Interface Description

interface external cable modem interface and to
implement the cable transmission of alarm
information.
This interface is used for the
GPS communication of main control unit with
interface GPS receiver module through RS232 serial
(RS232 port.
serial port)
GPS-Related Equipments
Global Position System (GPS) provides the clock and frequency
reference for ZXG10 iBSC system. It also provides GPS satellite
signal for the system to realize the Assisted Global Position
System (AGPS).
The GPS antenna feeder system can be realized by the following
two solutions:
Feeder cable direct-connection solution
Indoor forwarding solution
GPS Active Antenna and Lightning

Protector/Frequency Divider
In feeder cable direct-connection solution and indoor forwarding
solution, both the GPS active antenna and the lightning
protector/frequency divider are used.
In feeder cable direct-connection solution, the GPS active
antenna is used as outdoor receiving antenna; while in indoor
forwarding solution, the GPS active antenna is used as indoor
receiving antenna.
Functions
The GPS antenna receives GPS satellite navigation and

positioning signals, and demodulates the frequency, clock signal,
and AGPS information through GPS signal receiver. The clock
signal is sent to relevant units in ZXG10 iBSC system while the
AGPS information to the processing unit.
The GPS antenna lightning protector/frequency divider uses
dual-frequency-dividing coaxial cable protector, which is

installed at the connector between communication equipment

and coaxial cable, or at lightning protection devices between two
communication equipments. It effectively prevents damages due
to temporary over-voltage cause by lightning induction.
The GPS antenna lightning protector/frequency divider adopts
the high-frequency filter principle and performs three-level
protection for the DC feed channel. The RF insertion loss is small,
the discharge current is large, and the measured limiting voltage
is low. It is an ideal protection device for various public antenna
communication equipments.
Equipment Specifications
The GPS active antenna is shown in Figure 119.
FIGURE 119 – GPS ACTIVE ANTENNA
2
6
1. GPS antenna 2. Installation fixing board 3. Installation tube

4. Feeder cable 5. Pole 6. Fixing component 7. Binding tape
The GPS antenna lightning protector/frequency divider is shown

in Figure 120.

FIGURE 120 – GPS ANTENNA LIGHTNING PROTECTOR/FREQUENCY DIVIDER
Connections
Figure 121 shows connections between ICM, GPS active antenna,

and GPS antenna lightning protector/frequency divider (fixed on
the cabinet top).
FIGURE 121 – CONNECTIONS BETWEEN ICM, GPS ANTENNA LIGHTNING

PROTECTOR/FREQUENCY DIVIDER, AND GPS ACTIVE ANTENNA
1. GPS antenna 2. GPS antenna lightning protector/frequency divider
Technical Indices
Table 95 describes technical indices of the GPS active antenna.
TABLE 95 – GPS ACTIVE ANTENNA TECHNICAL INDICES
Technical Index Value

Frequency range 1575 ± 5 MHz
Gain 38 ± 2 dBi
DC power voltage 4.5 V ~ 6 V
DC power current < 35 mA


Antenna interface N (F) type
Table 96 describes technical indices of the GPS antenna lightning

protector/frequency divider.
TABLE 96 – TECHNICAL INDICES OF GPS ANTENNA LIGHTNING

PROTECTOR/FREQUENCY DIVIDER

Frequency range 1500 MHz ~ 1600 MHz
Characteristic impedance 50 Ω
Insertion loss ≤ 4 dB
VSWR ≤ 1.2
Rated discharge current 10 KA (8/20 μs)
Water-proof level IP65

The input is N-F while the two
Interface
outputs are SMA-F
Installation mode Installing through the hole
The cross-sectional area of the
Grounding cable specification grounding cable must be
larger than 6 mm2
GPS L1 Signal Transponder and

GPS Antenna Feeder Lightning
Protector
In indoor forwarding solution, the GPS L1 signal transponder and
the GPS antenna feeder lightning protector are used.
GPS L1 Signal Transponder
The GPS L1 signal transponder consists of three parts:

GPS L1 outdoor receiving antenna
GPS L1 indoor transmitting antenna
GPS L1 signal controller
Table 97 describes technical indices of the GPS L1 outdoor
receiving antenna.

TABLE 97 – TECHNICAL INDICES OF GPS L1 OUTDOOR RECEIVING ANTENNA

Frequency range 1575.42 MHz ± 10 MHz
VSWR ≤ 1.5
Gain 45 dB ± 2 dB
Polarization mode Clockwise circular polarization
Working temperature -45 °C ~ +65 °C
Storage temperature -55 °C ~ + 85 °C
Connector TNC
Cable length 100 m ± 0.2 m
Table 98 describes technical indices of the GPS L1 indoor

transmitting antenna.
TABLE 98 – TECHNICAL INDICES OF GPS L1 INDOOR TRANSMITTING

ANTENNA

Frequency range 1575 MHz ± 10 MHz
VSWR ≤ 1.5
Gain 26 dB ± 2 dB
Storage temperature -55 °C ~ + 85 °C
Connector TNC
Cable length 10 m
Signal coverage range ≥ 200 m2
Table 99 describes technical indices of the GPS L1 signal

controller.
TABLE 99 – TECHNICAL INDICES OF GPS L1 SIGNAL CONTROLLER

Frequency range 1575 MHz ± 10 MHz
VSWR ≤ 1.5
Noise coefficient ≤ 1.5 dB
2 dB ± 2 dB, 16 dB ± 2 dB,
Gain
26 dB ± 2 dB


Voltage 220 VAC
Current ≤ 80 mA
Storage temperature -55 °C ~ +85 °C
Connector TNC
GPS Antenna Feeder Lightning Protector
Table 100 describes technical indices of the GPS antenna feeder

lightning protector.
TABLE 100 – TECHNICAL INDICES OF GPS ANTENNA FEEDER LIGHTNING

PROTECTOR

Frequency range 1500 MHz ~ 1600 MHz
Insertion loss ≤ 0.2 dB
VSWR ≤ 1.2
Maximum transmission power ≤ 50 W
DC feed power ≤ 5.5 V
Rated discharge current 10 KA (8/20 μs)
Discharge voltage ≤ 20 V
Water-proof level IP65
Interface The input is N-F
Installing through the wall;
Installation mode
installing by the copper lug
The cross-sectional area of the
Grounding cable specification grounding cable must be
larger than 6 mm2


Chapter 6
System Configuration
Specifications
The ZXG10 iBSC system has various interfaces, each having

several connection modes. Users can select appropriate interface
connection modes according to actual requirements.
This chapter introduces hardware configurations of ZXG10 iBSC
(V6.20) in the following two cases respectively:
When the resource shelf (BUSN) is used
When the gigabit resource shelf (BGSN) is used
Configurations when BUSN

Is Used
This section introduces hardware configurations of ZXG10 iBSC
(V6.20) when the resource shelf (BUSN) is used.
Abis Interface and A-Interface

Adopting E1
Figure 122 shows the configuration when both Abis interface and
A-interface adopt E1 connection mode.

FIGURE 122 – CONFIGURATION WHEN BUSN IS USED (ABIS INTERFACE: E1,

A-INTERFACE: E1)
BIU AIU PCU TCU
PWRD PWRD
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
FAN FAN
U U U SB D G R R RR R
G D D S G D D D D S G R R R R R R U U R R
I I P PI T P U D D S D D D D SM D S
U T T P U T T T M M T U I I T PN
P P B P T T P T T T T P
P B B B P B B B B P
B U U B B I B B B B B B
M M
B
BI B B
/ 1 1 /C
S U O R R R R R R R R R
B
C C C C C C U O C C C C
S U U M C C C C
I I L L H H M
C M M M M M M M M M M K K U V I I P P K K H H
U
X P P P P P P C B M M G G B B
C P P G G B B 2 3 B B 1 2 1 2
FAN FAN
R R R R
G D D G G U U D G G S S G G R R R R R
G D D
D D D U U D
I I T U U D S S
U T T U U U T T P P U U I I T
M M T T T T P P
P B B P P P B B P P B B P P M M
B U U B B B B B B B
1 1
G G G G P P U U R R
I I U U
L L L L S S I
M M I
I I I I N N M M
C C 2 3
FAN FAN
PWRD PWRD
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
FAN FAN
U U U SB D G R R RR R
G D D S G D D D D S G R R R R R R U R R
I I P PI T U SM D
U P U D D S D D D D S
U T T P U T T T M M T P P B P T T P I I T PN T P
P B B B P B B B B P T T T
B U U B B I B B B
M M
B BI B B
/ B B B 1 1 /C
U U R R R
G D D G G G D D D G G D G G R R R R U U R
I I D D D D D D
T U U I I
U T T U U U T T M M T U U T T T T T T
P B B P P B B B P P M M
P U U B P P B B B B B B
1 1
FAN FAN
U U R R RR R
U SB D G R R
D D D S D G G G D S D R R R U U R SM D
R R
I I P PI T P T D D D S D D S D
T T T P T U U U M M T U T T T P T I I T PN T P T
P P B B
B B B B B P P P B B B P M M BI
U U B /I B B B B B B B B B
1 1 /C
R R R
U U R R R R
G D D G G G D D D G G D G G U U R D
I I D D D D D
T U U I I T
U T T U U U T T M M T U U T T T T T
P B B P P P B B B P P B P P M M B
U U B B B B B
1 1
FAN FAN
Abis Interface Adopting IP+E1 and

A-Interface Adopting E1
Figure 123 shows the configuration when Abis interface adopts
IP+E1 connection mode and A-interface adopt E1 connection
mode.

Chapter 6 - System Configuration Specifications
FIGURE 123 – CONFIGURATION WHEN BUSN IS USED (ABIS INTERFACE:

IP+E1, A-INTERFACE: E1)
Abis Interface Adopting IP+E1 and

A-Interface Adopting STM-1
IP+E1 connection mode and A-interface adopts STM-1
(active/standby) connection mode.


IP+E1, A-INTERFACE: STM -1)
BIU AIU PCU TCU
PWRD PWRD
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
FAN FAN
B B U U SB U R R R R RR
G D D D G G G G S R R R M M U U R
I I I I PI P D SM
U T T T U U P D D S
M M U U N N I I PN
P B B B P P
P P BP P
B T T T
BI P
I I U U P P I B B B B
I I M M
B
/ C C 1 1 /C
S R R R R R R R R R
C C C C C C U U O O C C C C
U U M C C C C
B I I L L H H S M
C M M M M M M M M M M K U V I I P P K K H H
K U
X P P P P P P C C P P G B M M G G B B
G B B 2 3 B B 1 2 1 2
FAN FAN
R R R R
S S S S G G G G U U G G S S S S G G
I I D D D D G U U
D D U U U
P P U U U U M M T T T T I I I I
T T P P P M M
B B P P P P U U B B B B M M
B B 1 1
1 1
G G G G P P U U R R
I I U U
L L L L S S I I
I M M
I I I N N M M
C C 2 3
FAN FAN
PWRD PWRD
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
FAN FAN
U U D U SB D R R RR
G D D S G D D G S G R R R R R R R R
I I P U U SM
PI T P U D D S D D D D S
U T T P U T T U M M T T T T I I PN
B P
P BP B B P
T P T T P
P B B B P B U U B B I B B B B B
M M
B
BI
/ 1 1 /C B B
U U R R
S S S S G G G G G G U S S S G U U R
D D D D I I P D D S
U U U U M M U U P U I I
T T T T P T T P
B P M M
B B B B
P P P P U U P P
B B B B
1 1
FAN FAN
R R R R RR
G G G G B B U U SB U G
G G M M U U SM
I I I I PI P U
U U U U N N I I PN
P P M M U U BP P M M
P P P P P I I BI
I I U U P P / I B 1 1 /C
C C
R R
S S S S U U G U S S R
G G G G G S G U U S
D D D D I I U P D D I I
U U U U M M U P U P
T T T T P T T M M
P P P P U U P P B P B
B B B B B B B 1 1
FAN FAN
Abis Interface Adopting IPoE and A-

Interface Adopting E1
IPoE connection mode and A-interface adopts E1 connection
mode.


IPOE, A-INTERFACE: E1)
Abis Interface Adopting E1 and A-

Interface Adopting STM-1
E1 connection mode and A-interface adopt STM-1
(active/standby) connection mode.


A-INTERFACE: STM-1)
Abis Interface Adopting E1 and Ater

Interface Adopting E1 (TC Is
External)
E1 connection mode and Ater interface adopts E1 (TC is external)
connection mode.


ATER INTERFACE: E1 (TC IS EXTERNAL))

Interface Adopting STM-1 (TC Is
External)
E1 connection mode and Ater interface adopts STM-1 (TC is
External) connection mode.


ATER INTERFACE: STM-1 (TC IS EXTERNAL))

Interface Adopting IP (TC Is External)
E1 connection mode and Ater interface adopts IP (TC is external)
connection mode.


ATER INTERFACE: IP (TC IS EXTERNAL))
Configurations when BGSN

Is Used
This section introduces hardware configurations of ZXG10 iBSC
(V6.20) when the gigabit resource shelf (BGSN) is used.

Adopting E1(T1)
A-interface adopt E1(T1) connection mode.

FIGURE 130 – CONFIGURATION WHEN BGSN IS USED (ABIS INTERFACE:

E1(T1), A-INTERFACE: E1(T1))

E1 connection mode and A-interface adopts STM-1 connection
mode.

FIGURE 131 – CONFIGURATION WHEN BGSN IS USED (ABIS INTERFACE: E1,

A-INTERFACE: STM-1)

Interface Adopting IP
E1 connection mode and A-interface adopts IP connection mode.

FIGURE 132 – CONFIGURATION WHEN BGSN IS USED (ABIS INTERFACE: E1,

A-INTERFACE: IP)

Adopting IP
A-interface adopt IP connection mode.

FIGURE 133 – CONFIGURATION WHEN BGSN IS USED (ABIS INTERFACE: IP,

A-INTERFACE: IP)
Abis Interface Adopting IP and A-

Interface Adopting E1(T1)
IP connection mode and A-interface adopts E1(T1) connection
mode.


A-INTERFACE: E1(T1))
Abis Interface Adopting IP and A-

IP connection mode and A-interface adopts STM-1 connection
mode.


A-INTERFACE: STM-1)

IPoE connection mode and A-interface adopts E1(T1) connection
mode.


IPOE, A-INTERFACE: E1(T1))

IPoE connection mode and A-interface adopts STM-1 connection
mode.


IPOE, A-INTERFACE: STM-1)

Interface Adopting IP
IPoE connection mode and A-interface adopts IP connection
mode.


IPOE, A-INTERFACE: IP)
Abis Interface and Ater Interface

Adopting E1(T1)
Ater interface adopt E1(T1) connection mode.


E1(T1), ATER INTERFACE: E1(T1))
Abis Interface Adopting IP and Ater

IP connection mode and Ater interface adopts E1(T1) connection
mode.


ATER INTERFACE: E1(T1))

Appendix A
Device Specifications
Table 101 illustrates devices appeared in board descriptions.
TABLE 101
Device Legend Description
From the front view of the

RJ45
board panel

DB9
board panel

DB44
board panel
Fiber From the front view of the

outlet board panel
USB From the front view of the

interface board panel

Device Legend Description
OFF ON The black block

represents the position
set for the DIP switch. If
OFF ON
DIP it is at OFF side, the
switch default DIP switch setting
is OFF; if it is at ON side,
the default DIP switch
setting is ON.
The left figure indicates
that the default setting is
short circuit, while the
Jumper
right figure indicates that
the default setting is
broken circuit.

Appendix B
Abbreviations
Abbreviation Full Name

A
AAL2 ATM Adaptation Layer 2
AAL5 ATM Adaptation Layer type 5
ATM Processing Board Enhanced
APBE
version
AIU A Interface Unit
ALB Alarm Box
AMR Adaptive Multi Rate
ATM Asynchronous Transfer Mode
B
BCSN Backplane of Circuit Switch Network
BCTC Backplane of Control Center
Backplane of Giga Universal Service
BGSN
Network
BIPB Abis Interface Processing board
BIPI BSC IP Interface Board
BIU aBis Interface Unit
Backplane of Packet Switching
BPSN
Network
BSC Base Station Controller
BSSAP Base Station System Application Part
Base Station System EDGE/GPRS
BSSGP
Protocol
BTS Base Transceiver Station
Backplane of Universal Service
BUSN
Network
C
CAS Channel Associated Signaling


CC Calling Control
CCS Common Channel Signaling
Common Channel Signaling System
CCS7
NO.7
CHUB Control Plane HUB
CLKG Clock Generator
CLKU Clock Unit
CM Communication Management
CMP Control Main Processor
CN Core Network
CS Circuit Switch
D
DBS Data Base Subsystem
DC Direct Current
DCE Data Circuit terminating Equipment
DDN Digital Data Network
DRTB Dual Rate Transcoder Board
DSP Digital Signal Processor
DTB Digital Trunk Board
DTE Data Terminal Equipment
DTU Digital Trunk Unit
E
EIPI E1 IP Interface
EIR Equipment Identification Register
EMC ElectroMagnetic Compatibility
EMI Electro Magnetic Interference
European Telecommunications
ETSI
Standards Institute
ETSN Enhanced TDM Switch Network Board
F
FE Fast Ethernet
FR Frame Relay
FPGA Field Programmable Gate Array
FR Frame Relay
FRS Full Rate Service
FSMU Far Sub Multiplexing Unit
G

Appendix B - Abbreviations

GE Gigabit Ethernet
GERAN GSM/EDGE Radio Access Network
GIPB Gb Interface Processing board
GIPI GE IP Interface
GIU Gb Interface Unit
GLI GE Line Interface
GPS Global Positioning System
GPRS General Packet Radio Service
Global System for Mobile
GSM
communications
GUIM Gigabit Universal Interface Module
GUP GSM Universal Processing Board
GUP2 GSM Universal Processing board
H
HDLC High-Level Data Link Control
HPI Host Port Interface
HSCSD High Speed Circuit Switched Data
HW High Way line
I
ICIU Iu-cs Interface Unit
ICM Integrated Clock Module
IMA Inverse Multiplexing for ATM
IMAB IMA/ATM Board
International Mobile Subscriber
IMSI
Identity
IP Internet Protocol
IPIU Iu-ps Interface Unit
IRIU Iur-g Interface Unit
L
LAPD Link Access Protocol - Channel D
LCM LCD Module
LLC Logical Link Control
LMT Local Management Terminal
LVDS Low Voltage Differential Signal
M
MAC Media Access Control
MNIC Multi-service Network Interface Card


MTP Message Transfer Part
N
NEF Network Element Function
NS Network Service
NSE Network Service Entity
NSMU Near Sub Multiplexing Unit
O
OAM Operation and Maintenance
Operating & Maintenance Processing
OMP
Board
OMS Operating Maintenance Subsystem
OSI Open System Interconnection
OSS Operating & Support Subsystem
P
PACCH Packet Associated Control Channel
PAGCH Packet Access granted Channel
PBCCH Packet Broadcast Control Channel
PCH Paging Channel
PCM Pulse Code Modulation
PCU Packet Control Unit
PDP Packet Date Protocol
PDTCH Packet Data Traffic Channel
PE Protective Earthing
PLMN Public Land Mobile Network
PPCH Packet Paging Channel
PS Packet Switch
PSN Packet Switch Network
PSPDN Packet Switched Public Data Network
PSTN Public Switching Telephone Network
PTP Point To Point
PWRD Power Distributor
PWRDB Power Distributor Backplane
Q
QoS Quality of Service
R
RACH Random Access Channel
RBID Rearboard of ID Interface

Appendix B - Abbreviations

RCBU Resources Board Configuration Basal Unit
RCHB1 Rear board 1 of CHUB
RCHB2 Rear board 2 of CHUB
RCKG1 Rear Board 1 of CLKG
RCKG2 Rear Board 2 of CLKG
RDTB Rear Board of DTB
RGIM1 General Rear Board 1
RGUM1 Rear board 1 of GUIM
RGUM2 Rear board 2 of GUIM
RLC Radio Link Control
RMNIC Rear Board of MNIC
RMPB Rear Board of OMP
RSPB Rear Board of SPB
RSVB Rear Board of Server
RUIM Rear Board of UIM
RUIM1 Rear board 1 of UIM
S
SACCH Slow Associated Control Channel
SAPI Service Access Point Indicator
SAR Segment And Reassemble
SBCX Single Board Computer of X86
SCCP Signaling Connection Control Part
SDTB SONET Digital Trunk Board
SDTB2 SONET Digital Trunk Board
SM SubMultiplexing
SMC Short Message Center
SMLC Serving Mobile Location Centre
SMS Short Message Service
SMTB Sub Multiplexing Transform Board
SMU Subchannel Multiplexing Unit
SONET Synchronous Optical Network
SPB Signaling Processing Board
SPB2 Signaling Processing Board
STM-1 Synchronous Transfer Mode 1


SSM Subjoin Service Management
SVR Server Board
T
TBF Temporary Block Flow
TC TransCoder
TCH Traffic Channel
TCP Transmission Control Protocol
TCU TransCoder Unit
TDM Time Division Multiplex
TEI Terminal Equipment Identification
TFI TDM Fiber Interface board
TFO Tandem Free operation
TRX Transmitter & Receiver
TS Time Slot
TSNB TDM Switch Network Board
TTL Transistor-Transistor Logic
U
UDP User Datagram Protocol
UIM Universal Interface Module
Universal Interface Module for Control
UIMC
Plane (BCTC or BPSN)
UIMU Universal Interface Module of BUSN
Um Um Interface
UPPB User Plane Processing Board
UPU User Plane Process Unit
Universal Terrestrial Radio Access
UTRAN
Network
V
VLR Visitor Location Register

Appendix C
Figures
Figure 1 - Standard 19-Inch Cabinet .....................................2

Figure 2 – Cabinet Structure ................................................3
Figure 3 – Cabinet top view .................................................3
Figure 4 – Cabinet Top Structure ..........................................4
Figure 5 – Top Frame Component Structure ...........................5
Figure 6 – Cable Outlet Module Structure ...............................5
Figure 7 – Top Fan Structure................................................6
Figure 8 – Top Filter Structure..............................................6
Figure 9 – Fiber Wrap Tray Structure.....................................7
Figure 10 – Front Door Labels ..............................................7
Figure 11 - Rack Structure...................................................8
Figure 12 – Bus Bar ............................................................9
Figure 13 - Structural Layout of Cabinet .............................. 10
Figure 14 – iBSC External Connections (Using Gigabit Resource
Shelf) ............................................................................. 11
Figure 15 – iBSC External Connections (Using Resource Shelf) 13
Figure 16 – Cabinet Cabling (Left View) ............................... 15
Figure 17 – Power Distribution Plug-in box Structure ............. 17
Figure 18 – Front Panel of Power Distribution Plug-in box ....... 18
Figure 19 – Rear Panel of Power Distribution Plug-in box........ 18
Figure 20 – Fan Plug-in box Structure ................................. 20
Figure 21 - Front Panel of Fan Plug-in box............................ 21
Figure 22 – Rear Panel of Fan plug-in box ............................ 21
Figure 23 – Shelf Positions (when BGSN Is Used) .................. 24
Figure 24 – Shelf Positions (when BUSN Is Used) .................. 24
Figure 25 – Backplane Structure ......................................... 25

Figure 26 – Full Configuration of Control Shelf ...................... 27

Figure 27 - Principle of Control Shelf ................................... 28
Figure 28 – Rear View of BCTC Backplane ............................ 29
Figure 29 – Full Configuration of Packet Switching Shelf......... 31
Figure 30 - Principle of Packet Switching Shelf ...................... 32
Figure 31 – Rear view of BPSN Backplane ............................ 33
Figure 32 – An Example of Resource Shelf Configuration ........ 35
Figure 33 - Principle of Resource Shelf................................. 36
Figure 34 - Rear view of BUSN Backplane ............................ 37
Figure 35 – Full Configuration of Control Shelf (when BGSN Is
Used) ............................................................................. 39
Figure 36 - Principle of Control Shelf (when BGSN Is Used) .... 40
Figure 37 – Rear View of BCTC Backplane (when BGSN Is Used)
..................................................................................... 42
Figure 38 – DIP Switches on RBID Board ............................. 43
Figure 39 – Full Configuration of Packet Switching Shelf (when
BGSN Is Used) ................................................................. 45
Figure 40 - Principle of Packet Switching Shelf (when BGSN Is
Used) ............................................................................. 46
Figure 41 – Rear view of BPSN Backplane ............................ 47
Figure 42 – An Example of Gigabit Resource Shelf Configuration
..................................................................................... 49
Figure 43 - Principle of Gigabit Resource Shelf ...................... 50
Figure 44 - Rear view of BGSN Backplane ............................ 52
Figure 45 – Single Cabinet Clock Extracting and Distribution
(Using BUSN) .................................................................. 53
Figure 46 – Dual-Cabinet Clock Extracting and Distribution
(Using BUSN) .................................................................. 54
Figure 47 – Single Cabinet Control Plane Ethernet Connections
(Using BUSN) .................................................................. 55
Figure 48 – Dual-Cabinet Control Plane Ethernet Connections
(Using BUSN) .................................................................. 56
Figure 49 – Single Cabinet User Plane Connections (Using BUSN)
..................................................................................... 57
Figure 50 – Dual-Cabinet User Plane Connections (Using BUSN)
..................................................................................... 57
Figure 51 – Single Cabinet Monitoring Cable Connections (Using
BUSN) ............................................................................ 58
Figure 52 – Dual-Cabinet Monitoring Cable Connections (Using
BUSN) ............................................................................ 59

Appendix C - Figures
Figure 53 – Single Cabinet Clock Extracting and Distribution

(Using BGSN) .................................................................. 60
Figure 54 – Dual-Cabinet Clock Extracting and Distribution
(Using BGSN) .................................................................. 60
Figure 55 – Single Cabinet Control Plane Ethernet Connections
(Using BGSN) .................................................................. 61
Figure 56 – Dual-Cabinet Control Plane Ethernet Connections
(Using BGSN) .................................................................. 62
Figure 57 – Single Cabinet User Plane Connections (Using BGSN)
..................................................................................... 63
Figure 58 – Dual-Cabinet User Plane Connections (Using BGSN)
..................................................................................... 63
Figure 59 – Single Cabinet Monitoring Cable Connections (Using
BGSN) ............................................................................ 64
Figure 60 – Dual-Cabinet Monitoring Cable Connections (Using
BGSN) ............................................................................ 65
Figure 61 – Board Assembly Relation................................... 68
Figure 62 - Working Principle of CHUB ................................. 68
Figure 63 – CHUB, RCHB1, RCHB2 Panels ............................ 70
Figure 64 - Working Principle of BIPI ................................... 73
Figure 65 – BIPI and RMNIC Panels ..................................... 75
Figure 66 – Working Principle of GUP................................... 79
Figure 67 – GUP Panel....................................................... 81
Figure 68 – Working Principle of GUP2 ................................. 83
Figure 69 – GUP2 Panel ..................................................... 85
Figure 70 - Working Principle of CLKG (CLKG) ...................... 87
Figure 71 – CLKG (CLKG), RCKG1, RCKG2 Panels.................. 89
Figure 72 - Working Principle of CLKG (ICM)......................... 95
Figure 73 – CLKG (ICM), RCKG1, RCKG2 Panels.................... 97
Figure 74 - Working Principle of ICM ................................. 101
Figure 75 – ICM, RCKG1, RCKG2 Panels............................. 102
Figure 76 – Working Principle of CMP ................................ 110
Figure 77 – CMP Panel .................................................... 111
Figure 78 - Working Principle of DTB ................................. 113
Figure 79 – DTB (Version 040501) and RDTB Panel ............. 115
Figure 80 – DTB (Version 060201) Panel............................ 116
Figure 81 – Jumpers on RDTB Panel .................................. 118
Figure 82 - Working Principle of GLI .................................. 120
Figure 83 – GLI Panel...................................................... 122

Figure 84 – Working Principle of EIPI................................. 124

Figure 85 – EIPI Panel..................................................... 126
Figure 86 – Working Principle of GIPI ................................ 128
Figure 87 – GIPI, RGER, RMNIC Panels .............................. 129
Figure 88 – Working Principle of GUIM............................... 132
Figure 89 – GUIM, RGUM1, RGUM2 Panels ......................... 133
Figure 90 – OMP and RMPB Panels .................................... 138
Figure 91 - Working Principle of PSN ................................. 141
Figure 92 – PSN Board Panel............................................ 142
Figure 93 – Working Principle of PWRD .............................. 144
Figure 94 – PWRD Board Panel ......................................... 145
Figure 95 – Jumper settings............................................. 146
Figure 96 – Working Principle of SBCX Board...................... 147
Figure 97 – SBCX and RSVB Panels ................................... 148
Figure 98 – Working Principle of SDTB............................... 151
Figure 99 – SDTB and RGIM1 Panels ................................. 153
Figure 100 – Working Principle of SDTB2 ........................... 155
Figure 101 – SDTB2 and RGIM1 Panel ............................... 157
Figure 102 - Working Principle of SPB................................ 160
Figure 103 – SPB Panels.................................................. 161
Figure 104 – Jumpers on RSPB Panel ................................ 164
Figure 105 - Working Principle of SPB2 .............................. 165
Figure 106 – SPB2 Panels ................................................ 167
Figure 107 - Working Principle of UIMC.............................. 170
Figure 108 – UIMC, RUIM2, RUIM3 Panels.......................... 171
Figure 109 - Working Principle for UIMU ............................ 175
Figure 110 – UIMU and RUIM1 Panels................................ 177
Figure 111 - Working Principle of UPPB .............................. 180
Figure 112 – UPPB Panel ................................................. 182
Figure 113 - Working Principle of ALB................................ 186
Figure 114 – Basic Connection Mode of ALB ....................... 188
Figure 115 – Expansion Connection Mode of ALB................. 188
Figure 116 – Appearance of ALB ....................................... 189
Figure 117 – ALB Panel ................................................... 189
Figure 118 – Interfaces of ALB ......................................... 190
Figure 119 – GPS Active Antenna...................................... 193

Appendix C - Figures
Figure 120 – GPS Antenna Lightning Protector/Frequency Divider

................................................................................... 194
Figure 121 – Connections between ICM, GPS antenna lightning
protector/frequency divider, and GPS active antenna ........... 194
Figure 122 – Configuration when BUSN Is Used (Abis Interface:
E1, A-Interface: E1)........................................................ 200
IP+E1, A-Interface: E1) .................................................. 201
IP+E1, A-Interface: STM-1) ............................................. 202
IPoE, A-Interface: E1)..................................................... 203
E1, A-Interface: STM-1) .................................................. 204
E1, Ater Interface: E1 (TC Is External)) ............................. 205
E1, Ater Interface: STM-1 (TC Is External))........................ 206
E1, Ater Interface: IP (TC Is External)).............................. 207
Figure 130 – Configuration when BGSN Is Used (Abis Interface:
E1(T1), A-Interface: E1(T1))............................................ 208
E1, A-Interface: STM-1) .................................................. 209
E1, A-Interface: IP) ........................................................ 210
IP, A-Interface: IP) ......................................................... 211
IP, A-Interface: E1(T1)) .................................................. 212
IP, A-Interface: STM-1) ................................................... 213
IPoE, A-Interface: E1(T1)) ............................................... 214
IPoE, A-Interface: STM-1) ............................................... 215
IPoE, A-Interface: IP) ..................................................... 216
E1(T1), Ater Interface: E1(T1)) ........................................ 217
IP, Ater Interface: E1(T1))............................................... 218


Tables
Table 1 – Manual Summary ..................................................i

Table 2 - Typographical Conventions .................................... iii
Table 3 - Mouse Operation Conventions ................................ iv
Table 4 – Usage Explanation of the Hazardous Substances in
ZXG10 iBSC (V6.20) ........................................................... v
Table 5 – Panel Indicators of Power Distribution Plug-in box ... 18
Table 6 – Panel Switches Power Distribution Plug-in box ........ 19
Table 7 - Power Distribution Plug-in box Interfaces................ 20
Table 8 – Panel Indicators of Fan plug-in box........................ 21
Table 9 – Fan Plug-in box Interfaces ................................... 21
Table 10 – Types and Functions of Shelves........................... 23
Table 11 - Relationship between a Shelf and a Backplane ....... 26
Table 12 – Boards in Control Shelf ...................................... 26
Table 13 – Power Interface of Control Shelf.......................... 30
Table 14 – DIP Switches on Backplane of Control Shelf .......... 30
Table 15 – Boards in Packet Switching Shelf ......................... 31
Table 16 – Power Interface of Switching Shelf ...................... 33
Table 17 – Boards in Resource Shelf.................................... 34
Table 18 - Power Interface of Resource Shelf........................ 37
Table 19 – Boards in Control Shelf (when BGSN Is Used) ....... 38
Table 20 – Power Interface of Control Shelf (when BGSN Is Used)
..................................................................................... 42
Table 21 – DIP Switches on Backplane (when BGSN Is Used).. 43
Table 22 – Boards in Packet Switching Shelf (when BGSN Is
Used) ............................................................................. 44
Table 23 – Power Interface of Switching Shelf ...................... 47
Table 24 – Boards in Gigabit Resource Shelf ......................... 48
Table 25 - Power Interface of Gigabit Resource Shelf ............. 52
Table 26 – CHUB Board Panel Indicators .............................. 70
Table 27 – CHUB Panel Buttons .......................................... 71
Table 28 – CHUB External Interfaces ................................... 72

Table 29 – BIPI Panel Indicators ......................................... 75

Table 30 – RUN/ALM Combination Description ...................... 76
Table 31 – BIPI Panel Buttons ............................................ 78
Table 32 – RMNIC Panel Interfaces ..................................... 78
Table 33 – GUP Panel Indicators ......................................... 81
Table 34 – GUP Panel Buttons ............................................ 82
Table 35 – GUP2 Panel Indicators ....................................... 86
Table 36 – GUP2 Panel Buttons .......................................... 86
Table 37 – CLKG (CLKG) Board Panel Indicators ................... 89
Table 38 – CLKG (CLKG) Board Panel Buttons....................... 91
Table 39 – CLKG (CLKG) Board Interfaces............................ 91
Table 40 – CLKG (ICM) Board Panel Indicators ..................... 97
Table 41 – CLKG (ICM) Jumpers ....................................... 100
Table 42 – ICM Board Panel Indicators .............................. 103
Table 43 – ICM Board Panel Buttons.................................. 106
Table 44 – ICM Board Interfaces....................................... 106
Table 45 – ICM Jumpers .................................................. 109
Table 46 – CMP Board Panel Indicators .............................. 111
Table 47 – CMP Board Panel Buttons ................................. 113
Table 48 – DTB Panel Indicators ....................................... 116
Table 49 – DTB Panel Buttons .......................................... 117
Table 50 – DTB Panel Interfaces ....................................... 117
Table 51 – Connection Modes of X9 to X16......................... 118
Table 52 – GLI Board Panel Indicators ............................... 123
Table 53 – GLI Board Panel Buttons .................................. 123
Table 54 – GLI Board Interfaces ....................................... 124
Table 55 – EIPI Panel Indicators ....................................... 126
Table 56 – EIPI Panel Buttons .......................................... 127
Table 57 – GIPI Panel Indicators....................................... 129
Table 58 – GIPI Panel Buttons .......................................... 130
Table 59 – GIPI Board Interfaces ...................................... 130
Table 60 – GUIM Panel Indicators ..................................... 134
Table 61 – GUIM Panel Buttons ........................................ 135
Table 62 – GUIM Board Interfaces .................................... 136
Table 63 – OMP Board Panel Indicators.............................. 138
Table 64 – OMP Panel Buttons.......................................... 140

Appendix C - Tables
Table 65 – OMP Board Interfaces ...................................... 140

Table 66 – PSN Board Panel Indicators .............................. 142
Table 67 – PSN Board Panel Buttons ................................. 143
Table 68 – SBCX Panel Indicators ..................................... 148
Table 69 – SBCX Panel Buttons ........................................ 150
Table 70 – SBCX Interfaces.............................................. 150
Table 71 – SDTB Panel Indicators ..................................... 153
Table 72 – SDTB Panel Buttons ........................................ 154
Table 73 – SDTB Interfaces.............................................. 155
Table 74 – SDTB2 Panel Indicators.................................... 158
Table 75 – SDTB2 Panel Buttons....................................... 159
Table 76 – SDTB2 Interfaces ............................................ 159
Table 77 – SPB Panel Indicators ....................................... 161
Table 78 – SPB Panel Buttons........................................... 162
Table 79 - SPB Panel Interfaces ........................................ 162
Table 80 – RSPB Jumper Settings ..................................... 164
Table 81 – SPB2 Panel Indicators...................................... 168
Table 82 – SPB2 Panel Buttons ......................................... 169
Table 83 – SPB2 Panel Interfaces...................................... 169
Table 84 – UIMC Board Indicators ..................................... 171
Table 85 – UIMC Panel Buttons......................................... 173
Table 86 – UIMC Board Interfaces..................................... 173
Table 87 – UIMU Panel Indicators ..................................... 177
Table 88 – UIMU Panel Buttons ........................................ 179
Table 89 – UIMU Board Interfaces..................................... 179
Table 90 – UPPB Panel Indicators...................................... 182
Table 91 – UPPB Panel Buttons......................................... 183
Table 92 – ALB Panel Indicators........................................ 190
Table 93 – ALB Panel Buttons........................................... 191
Table 94 – ALB Panel Interfaces ....................................... 191
Table 95 – GPS Active Antenna Technical Indices ................ 194
Table 96 – Technical Indices of GPS Antenna Lightning
Protector/Frequency Divider............................................. 195
Table 97 – Technical Indices of GPS L1 Outdoor Receiving
Antenna ........................................................................ 196
Table 98 – Technical Indices of GPS L1 Indoor Transmitting
Antenna ........................................................................ 196

Table 99 – Technical Indices of GPS L1 Signal Controller ...... 196

Table 100 – Technical Indices of GPS Antenna Feeder Lightning
Protector....................................................................... 197
Table 101...................................................................... 219

Index
Backplane .......................... 25 hot swapping ..................... 20

BCTC........................... 29, 41 Office information label.......... 7
BGSN ................................ 48 Packet Switching shelf ......... 31
BPSN........................... 33, 47 Power distribution plug-in box
Bus bar ...............................8 .................................... 17
BUSN ................................ 34 Rack ................................... 8
BUSN. ......................... 37, 51 RCHB1 .............................. 69
cabinet ................................1 RCHB2 .............................. 69
cabinet wire routing............. 14 RCKG1 ..................87, 95, 101
Cable Outlet Module ..............5 RCKG2 ..................87, 95, 101
captive fastener .................. 18 RDTB ................ 113, 159, 165
CHUB ................................ 68 Resource shelf.................... 34
Control shelf....................... 26 Serial No. label ..................... 7
DTB ................................ 112 SPB ......................... 158, 164
dust-proof plug-in box ......... 22 Top fan ............................... 6
E1 chip ............................ 118 Top filter ............................. 6
Fan plug-in box................... 20 Top frame component ........... 4
fiber wrap pole .....................6 UPPB .............................. 179
Fiber wrap tray .....................6 ventilation ........................... 7
Gigabit Resource shelf ......... 48 Voltage fluctuation ................ 1
grounding screw ...................4 ZXG10 iBSC .....................v, vi

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ZXG10 iBSC

Base Station Controller

Copyright © 2006 ZTE CORPORATION.

The ultimate right to interpret this product resides in ZTE CORPORATION.

Date Revision No. Serial No. Reason for Issue

Your evaluation Accessibility:

About this Manual ............................................................. i

Declaration of RoHS Compliance..................................... v

Plug-in Boxes ................................................................. 17

Chapter 6...................................................................... 199

System Configuration Specifications...........................199

Appendix A ................................................................... 219

Device Specifications ...................................................219

Appendix B ................................................................... 221

Abbreviations ............................................................... 221

Prerequisite Skill and Knowledge

What is in This Manual

TABLE 1 – M ANUAL SUMMARY

Confidential and Proprietary Information of ZTE CORPORATION i

ii Confidential and Proprietary Information of ZTE CORPORATION

 ZXG10 BSS (V6.20) Base Station Subsystem Alarm Handling

Confidential and Proprietary Information of ZTE CORPORATION iii

Mouse TABLE 3 - MOUSE OPERATION CONVENTIONS

How to Get in Touch

iv Confidential and Proprietary Information of ZTE CORPORATION

To minimize the environmental impact and take more

TABLE 4 – USAGE EXPLANATION OF THE HAZ ARDOUS SUBSTANCES IN ZXG10

Confidential and Proprietary Information of ZTE CORPORATION v

The ZXG10 iBSC (V6.20) Base Station Controller manufactured

vi Confidential and Proprietary Information of ZTE CORPORATION

This chapter describes the structure and composition of ZXG10

Weight Maximum weight of a single cabinet: ≤ 350 kg.

Power Supply Rated input voltage: -48 V DC

Operation Ambient temperature range (long-term working condition /

Confidential and Proprietary Information of ZTE CORPORATION 1

FIGURE 1 - STAND ARD 19-INCH CABINET

Figure 2 shows the cabinet structure. Shelves and boards are

2 Confidential and Proprietary Information of ZTE CORPORATION

FIGURE 2 – CABINET STRUCTURE

1. Back Door 6. Service Plug-in Box

Cabinet Top Figure 3 shows the top view of cabinet.

FIGURE 3 – CABINET TOP VIEW

Confidential and Proprietary Information of ZTE CORPORATION 3

The cabinet top consists of top frame component, power input

FIGURE 4 – CABINET TOP STRUCTURE

1．Fiber Wrap Tray 5．Cable Outlet Module

2．Top Fan Cover Board 6．Top Filter

3．Top Fan 7．Top Frame Component

4．Filter Cover Board

4 Confidential and Proprietary Information of ZTE CORPORATION

FIGURE 5 – TOP FRAME COMPONENT STRUCTURE

1．Cable Outlet Module Installation Board 4．Grounding Screw

2．Top Filter Installation Board 5．Top Fan Installation Board

FIGURE 6 – CABLE OUTLET MODULE STRUCTURE

1．Cable Outlet Frame 2．Cable Outlet Bar

Confidential and Proprietary Information of ZTE CORPORATION 5

FIGURE 7 – TOP FAN STRUCTURE

1．Monitor Circuit Board 3．Installation Bottom Plate

FIGURE 8 – TOP FILTER STRUCTURE

1．Power Input End 2．Power Output End

6 Confidential and Proprietary Information of ZTE CORPORATION

FIGURE 9 – FIBER WRAP TRAY STRUCTURE

1．Cover Plate 3．Bottom Plate

ZXG10 BSS (V6.20) Base Station Subsystem Alarm Handling

Office information label

The SDTB2 board supports STM-1 cables with the optical