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Wtflr
=
is inversely proportional to frequency, essentially the fundamental
"SCO m.(t) component will reconstitute the output signal at the demodulation In
order to limit the contribution of the harmonics (n>3) of the spikes to
the residual offset, selective amplification was chosen
Çjrçuit description
A 2nd order low-pass selective amplifier was realized using the CMOS
continuous-time filtering technique described in [5] A fully
differential structure offers an easy implementation of the multiplier,
an increase in common mode signals rejection and a residual offset that
depends only on the mismatch between the switches The selective
1 The chopper amplification principle
amplifier circuit principle is shown in Fig 3
Fig
Noise and DC offset is only modulated once and translated to the odd
harmonic frequencies of the output chopping square wave Since there
is no sampling, the equivalent input noise of the chopper amplifier is
approximately equal to the original noise spectrum around the chopper
frequency To make the 1/f noise contribution negligible, it is
important to choose the chopper frequency fchoplarger than the
amplifier corner frequency f^ In such condition, the equivalent low-
frequency input noise of the chopper amplifier is approximately equal
to the original white noise of the amplifier
Because of the finite bandwidth of the amplifier, the output signal
contains spectral components around the even harmonics of the
chopper frequency The high frequency components, which include
also the 1/f noise and the amplifier offset, can be removed by a simple
low-pass filter
The residual offset is essentialy caused by spikes appearing after the
first modulator due to charge mjecüon If care is taken to limit the time
constant of those spikes to a much smaller value than the half period of
the chopping square wave, most of the energy remains at frequencies
higher than fchop The spectrum of the spikes is represented in Fig 2 Fig 3 Schematic of the 2nd order selective amplifier
by impulses at the odd harmonics of the chopper frequency
77
Bl.2
Pair Tj-T'i form the input stage, pairs T2-T2 T3-T3 and capacitors
,
The first term in eqn. (7) comes from the mismatch of the charges
C form the resonator, while pair T4-T4 is the termination. The stored in the channel, whereas the second term results from mismatch
transfer function is given by of the overlap capacitance. As V0ff is proportionnai to L2,it is
A0w02 important to choose L minimum. Eqns. (6) and (7) show that there is a
tradeoff between the noise and the residual offset when choosing
A(s)=- (1) fchop-
s2 + w()/Q s + wrj2
Circuit implementation
where Aq= gml^girúl an<i Q= êm2/8m4- The resonance frequency and
the gain at wo are respectively given by To avoid saturation of the 2nd stage while keeping a sufficient gain at
fr> Afj=10 and Q=10 were chosen. The chopper amplifier DC gain isa
W0=gm2/2C gm3/2C (2) then equal to 38 dB. To maintain the theoretical offset below l|o.V,
of 4 kHz was chosen. To respect the condition
=
chopper frequency
Amax= A0 Q gml/gm4 (3) = fchop>fk. gml was set t0 15 nA/V. Capacitor C is then equal to 30
pF. The theoretical input noise was estimated to 47 nV/VH?with
This requires the matching of pairs Tj-T'j and T4-T4 as well as T2- fk=645 Hz and T=300 K. A photomicrograph of the chip is presented
in Fig. 4.
T'2 and T3-T3. To avoid a degradation of the chopper amplifier DC
gain, which is proportionnai to Amax it is important to lock fg to
,
where wc= wq/2Q. Since A()>1, the noise is essentially due to the presented in Fig. 5 for different bias currents.
input pair. The low-frequency noise at the chopper output is given by
SNout= 8/7C2 (AoQ)2 4kT RN1 ( 1 + fk/fchop ) (5)
where R¡\[ 1 n/gm j is the thermal noise of the input pair T j -T' j (n is
=
the weak inversion slope factor [6]). The equivalent input noise
becomes
CMRR and PSRR are 60 dB at 4kHz. Due to a mask error, only half
AWAV AL/L : relative geometric mismatch
,
of the input modulator was active in the first version. In spite of this
AVj : threshold voltage mismatch complete dissymmetry the residual offset is below 10 (iV. For the
same reason the overal DC gain is reduced to 32 dB. Fig. 6 shows the
measured low-frequency output noise wich corresponds to an
equivalent input of 63 nV/VHz! The power consumption is only
34 ixW.
73
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>
03
-90
lZj-100
</>
| -110
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3
O
3 "O 5 10
Frequency [Hz]
Fig. 6 Output noise of the chopper amplifier
Conclusion
A new CMOS chopper amplifier was presented that used a 2nd order
low-pass selective amplifier It was shown that if the chopper
frequency is larger then the amplifier corner frequency, the equivalent
low-frequency input noise of the chopper amplifier is free from 1/f
noise and only 2dB larger then the original amplifier white noise The
residual offset is due to charge injection mismatch and is proportional
to the chopper frequency and to the square of the channel length of the
switches Very low offset (<l|iV) can be obtained with this technique
In a future version, a complete chopper amplifier, including the
automatic tuning, will be integrated
References
[1] H W Klein, W L Engl "Design Techniques For Low-Noise
CMOS Operationnal Amplifiers", ESSCIRC 84, Digest of
Technical Paper
[2] C Enz "Analysis of Low-Frequency Noise Reduction By
Autozero Technique", Electron Lett, vol 20, 1984, pp 959-
960
[3] M Degrau we, E Vittoz, I Verbau whede MA Micropower CMOS
Instrumentation Amplifier", IEEE J Solid-State Circ SC-20, ,
1984, pp 708-715
[5] H Khorramabadi, P R Gray "High-Frequency CMOS
Continuous Time Filters ', IEEE J Solid-State Circ SC-19, Dec
,
1984, pp 939-948
[6] E A Vittoz "The Design of High-Performance Analog Circuits on
Digital CMOS Chips", IEEE J Solid-State Circ SC-20, June
,
1985, pp 657-665
This work was supported by the Fonds National Suisse pour la
recherche Scientifique, PN13