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JNTUA COLLEGE OF ENGINEERING (AUTONOMOUS) :: PULIVENDULA

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING


LECTURE SCHEDULE / PLAN FOR THE ACADEMIC YEAR 2017- 18

Branch: D.E.C.S Class & Semester: I Mtech. I Sem


Name of the Course: Structural Digital System Design Name of the Staff: M.SivaKumar
Course Objectives (COs):
CO1: To Provide an exposure to VHDL/ Verilog and different styles of modeling using VHDL/Verilog
CO2: To provide an exposure to ASM charts , their realizations and micro programming and its related issues.
CO3: To introduce concepts of FPGA , CPLD , Reduction of state table and Hazards.

Course Outcomes:
OC1: Understand structural functionality of different digital blocks.
OC2: Understand concept of Micro program and issues related to micro programming
OC3: Understand concept of FPGA, CPLD, Reduction of state table and Hazards
S.No Topic Name CO Materials/Books Outcomes No. of
Mapping Mapping Hours
1 Introduction to Digital systems CO1 4 and 5 OC1 04
2. Combinational circuit building CO1 4 and 5 OC1 10
blocks( Encoder, Decoder, Adders,
ALU, Carry look ahead adder,
Multiplexer and Demultiplexer,
Comparators)
3. Sequential circuit building CO1 4 and 5 OC1 08
blocks(FF’s, Registers, Memory
Elements, Shift Registers, Sequence
and Timing generators)
4. Introduction to VHDL and CO1 1 and 2 OC1 02
Verilog
5. Modeling Styles in VHDL and CO1 1 ,2 and 3 OC1 04
Verilog(Using Data Flow, Behavioral,
Structural and Mixed style modeling )
6. System design CO2 2 and 3 0C2 06
methodology(FSM, RTL Design, Dice
Game implementation, Micro
Programming, Linked State Machines)
7. Design of Combinational Logic CO1 3 and 4 OC1 10
( BCD to 7 segment display decoder,
BCD Adder, ALU, Array and Booth
Multiplier)
8. Design of Sequential C03 4 and 5 OC3 10
Logic(PROM, PLA,CPLD and FPGA)
9. Hardware Testing and Design CO3 4 and 5 OC3 06
For Testability(Scan Testing
Boundary Scan Testing and BIST)
Text Books:
1. Charles H,Roth Jr, Lizy Kurian John “Digital System Design Using VHDL”, 2nd Edition, Cengage Learning 2013.
2. Ming – Bio Lin , “ Digital System Design and Practices using Verilog HDL and FPGA “, Willey India Edition ,2012.
3. A Verilog HDL Primer By J . Bhasker Bs Publications.
4. Fundamentals Of logic design By Charles H.Roth
5. Switching and Finite Atomata Theroy By Z.Kohavi

Signature of the Faculty