International Journal of Electrical & Computer Sciences IJECS-IJENS Vol:09 No:09
CT Compensation of Numerical Distance Relaying
Algorithm
Abdullah Assuhaimi Mohd Zin , Nur ‘Ain Maiza Ismail , Zaniah Muda and Mohamad Jalalian
1,2,3,4
Faculty of Electrical Engineering Universiti Teknologi Malaysia from Johor, Malaysia
1
abdullah@fke.utm.my, 2 maiza@fke.utm.my, 3 zaniah@fke.utm.my
Abstract— In this paper a prototype algorithm for Numerical
Distance relay is developed in order to pre vent mal -operation
of relays when Current Transformer (CT) saturation occurs.
S aturation of CT causes errors in reproduction of the current
fundamental harmonic. The design of CT(s), which never
saturate would end in bulky and expensive units. Therefore
most of the protective CTs that are in service saturate during
severe transients. Distorted secondary current due to CT
saturation is detected and compensated by the algorithm in
order to obtain correct operation of Distance relay in
saturation area. Third-difference function and Auto Regressive
(AR) model are employed in developing the saturation
detection and compensation algorithm. The algorithm is
developed using C++ language. Then the performance of the
algorithm is evaluated through simulation of case studies in
Alternative Transient Program (ATP) simulator. Finally, the
Numerical Distance Relaying algorithm with CT saturation
compensation is successfully developed.
Index Term-- Numerical Distance Relay; CT saturation; CT
compensation; ATP
I. INT RODUCT ION
Nu merical t ransmission line d istance protection systems
have been widely applied in recent years. This is due to their
monitoring and commun ications capabilities as a protection
system. Typically, t ripping t imes for d igital d istance relays
range fro m one to three cycles. Meanwhile, relays using
analogue signal processing techniques offer tripping times
of one-quarter to one cycle [1]. Recent developments in
combination of adaptive algorith ms and higher sampling
rates have lead to the develop ment of secured high-speed
protection, which is not availab le in prev ious distance
protection systems [1, 2, 3]. Improvement of the distance
protection system is made both in the area o f phasor
calculation and the p rotective algorithm imp lementation [1].
Improvements are made due to the protective relays demand
on a reasonable accurate replica of the primary current and
voltage especially during fau lt event. Therefore, for this
reason current transformer (CT) is employed in the distance
protection system in order to perform primary current
reduction for the relays usage [2, 3].However, relay
performance is affected by CT installat ion. Rat io error
becomes severe during CT saturation condition which leads
to mal-operation of protective relay. The conventional way
emp loyed by earlier researchers is by over dimensioning the
core of CT. It is said that the CTs can carry up to 20 times
the rated current without exceeding 10% of rat io correction
[3]. On the other hand, the large cross-section area of CT
creates space and economic problems as it results in bulky
CTs.
As mention previously, the mal-operation of protection relay
is caused by ratio error wh ich occurs due to the CT
1917091-IJECS-IJENS © October 2009 IJENS
20
saturation condition. Therefore, the mal-operation of
distance protection relay can be avoided by preventing the
saturation of CT. Th is can be achieved by constructing
compro mise algorith ms for the distance protection system,
[4, 5].Th is paper describes a design of suitable CT
Co mpensation algorith m for Distance Relay, which is used
to overcome the saturation effects and prevents the mal-
operation of a Distance Relay. The design algorithms will
include current co mpensation, anti-aliasing filter, dc-
removal and digital filter. Besides that, this paper describes
the simu lation test conducted using ATP power simu lator in
order to evaluate the proposed designed algorithm
performance under various faults conditions.
II. M ET HODOLOGY
The proposed algorith ms start with the process of voltage
and current sampling. After samp ling process, inflection
points are detected by saturation detector. If saturation level
is sensed to be more than the threshold value and inflection
point detected is the first inflection po int, the current is
compensated by current compensation and return the values
to the main program. Ho wever, if second point of inflection
is sensed and confirmed by end of saturation detection then
the compensation algorith m would end and continue to the
main program. After that, anti-aliasing filter is implemented
to remove all harmon ics higher than sixth harmonic and,
Direct Current (DC) removal is applied to eliminate the DC
components in sampling data. The basic fundamentals of
current and voltage are extracted using DFT function.
Calculating the sine and cosine elements of current and
voltage performs DFT function. Finally, the developed
program ends with calcu lation of mon itoring point
impedance.
A. Sampling Rates
Generally, dig ital relays sample wavefo rms between 4 and
64 t imes per cycle. A high sampling rate will produce more
accurate result. However, there must be enough time
between samples to perform relay calculation. Normally, the
implementation of all steps in Distance Relay takes longer
time co mpared to the sampling period in order to let the
program to analyze all sampling data.
B. Current Saturation Detection and Compensation
Normally, when CT saturation occur the magnetizing
current increases and causes severe ratio error [4]. The
higher ratio error increases the probability of distance relay
to mal-operate. Therefore, the saturation current needs to be
compensated in order to obtain minimu m ratio error.
Besides that, compensation process is needed to provide
correct RMS current during saturation condition. The Auto
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 International Journal of Electrical & Computer Sciences IJECS-IJENS Vol:09 No:09 21

Regressive (AR) model is employed in this paper to 9𝐼𝑓𝑖−4+0.5582𝐼

compensate the saturation current. (3)
Unfortunately, the saturation area needs to be determined T ABLE I
before compensation process can be performed. The third - T HE ANTI-ALIASING BUTTERWORTH FILTER SP ECIFICATIONS
difference function is emp loyed in determin ing the Selectivity Low-pass
saturation area. The third-difference function converts the Approximation Butterworth
inflection points sensed at the waveform of secondary
current into pulses. The first inflection point indicates the Implementation IIR (digital)
start of saturation condition where co mpensation algorith m Pass band gain (dB) -0.01
will begin. Then, the second inflect ion point sensed by the
Stop band gain (dB) -40.0
compensation algorithm will end the compensation process.
In other words, the point of inflection determines the Pass band freq (Hz) 50.0
saturation area and also starting and ending of co mpensation Stop band freq (Hz) 300.0
algorithm.
Sampling freq (Hz) 3200.0
In this proposed algorithm, the saturation detection area is
identified using equation (1), mean while the RMS current
during saturation is determined fro m equation (2). Equation D. DC Removal
(1) is obtained from third-difference function and equation When faults or disturbances occur, a dc-offset is generated
(2) is computed fro m the simp lified equation of A R model. in an electrical power system. The generated dc-offset will
The last three samples of current are used to compute the affect the accuracy of the DFT algorith m results [8].
value of third differential of samp le (del3[i]) and current Therefore, the DC removal algorith m is designed in o rder to
during saturation condition (I[i]). eliminate the dc-offset. The dc-offset component is assumed
to be in exponential form when a fault occurs.
del3[i]= I[i]-3I[i-1]+3I[i-2]-I[i-3] (1) In this algorith m, the dc-offset is removed by co mputing the
I[i]=2.9683117.I[i-1]-2.94647423.I[i-2]+0.97794999.I[i-3] value of sampled current after anti-aliasing filtering and dc-
(2) removal; I fdc. Value of I fdc is calculated using equation (4)
with an assumption of sampling interval (∆t) of 0.00031 and
C. Anti Aliasing Filter
time constant (τ) of 0.04653.
The anti-aliasing filter of a dig ital relay removes the I fdc[i]  yk / an (4)
unwanted frequencies from a sampled waveform. Normally,
the anti-aliasing filter removes harmonics above ω 0 N/2 to Where;
prevent corruption of the desired phasor which is based on I f [i  1]
Nyquist frequency theorem [1, 7]. There are t wo issues that y k  I f [i ]  ( ), En  1  [1 / e ( t / ) ]. cos( 2n / N ),
need to be considered in selecting the anti-aliasing filter [1]. e ( t / )
The first issue is the frequency response of the filter, and the Fn  [1 / e ( t / ) ]. sin(2n / N ), an  ( En2  Fn2 ) ,
second issue is the time do main response of the filter. A
sharp frequency response of filter is desirable to completely  n  tan 1 ( Fn / En)
remove the unwanted harmonics. However, as the frequency
response of a filter beco mes sharper, the time domain 𝐼𝑓𝑑𝑐𝑖=𝑦𝑘𝑎Where, 𝑦𝑘=𝐼𝑓𝑖−𝐼𝑓𝑖−1𝑒E. Discrete
response becomes worse. Therefore a balance must be Fourier Transform (DFT)
achieved between the frequency and time do main response
In a distance relay system, the impedance value detected
of the filter.
will determine the distance relay operation. In this design,
In this proposed algorithm, a fifth order Butterworth filter is
the impedance value is computed fro m the magnitude of
designed as anti-aliasing filter using WFILTER-filter design
basic fundamental of current and voltage. The magnitude of
software. The o rder of the Butterworth filter is obtained
basic fundamental of current and voltage is extracted using
based on the distorted secondary current data. From the
DFT method.
data, the sixth harmonic is determined to be less than 5% of
The complete flow chart of the developed distance relay
the fundamental frequency, which results to 300 Hz of cut
algorith m is shown in Appendix 1. The constructed C++
off frequency. The system is assumed to be operated at 50
language of numerical distance relaying algorith m with
Hz. The other design specifications of Butterworth filter are
current compensation is based on the flow chart.
tabulated in Table I. Meanwh ile, the filtered current
produced by the Butterworth anti-aliasing filter is calculated
based on the last five samples of current as in equation (3).
III. CASE STUDY
In order to evaluate the performance of the developed
I f [i ]  0.000044529( I [i ]  5I [i  1]  10[i  2]  10 I [i  3] algorith m, t wo case studies have been setup. The case
studies are conducted during normal and saturation
 5I [i  4]  I [i  5])  4.41821I f [i  1]  7.8385I f [i  2] 
condition for all types of faults. Both of the case studies
6.9779 I f [i  3]  3.1159 I f [i  4]  0.5582 I f [[i  5] emp loyed ATP in generating the transients current and
𝐼𝑓𝑖=0.0000044529.𝐼𝑖+5𝐼𝑖−1+10𝑈𝑖−2+10𝑖−3+5𝐼𝑖−4+ voltage.
𝐼𝑖−5+4.4182𝐼𝑓𝑖−1− 7.8385𝐼𝑓𝑖−2+6.9779𝐼𝑓𝑖−3−3.115 Power system model in Fig. 1 is used to evaluate the
performance of developed algorithm during normal

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 International Journal of Electrical & Computer Sciences IJECS-IJENS Vol:09 No:09 22

condition. The sampling frequency emp loyed for the

simu lation is 3200 Hz or 64 samples per cycle in a 50 Hz
system with total length of 200 km. Besides that, the value
of positive and zero sequence of line impedance have been
fixed to Z0 = (30.34+j123.6) Ω and Z1 = (3.347+j56.15) Ω
respectively.

Fig. 3. Current before anti-aliasing and DC removal

Fig. 1. Power system configuration in normal condition

Fig. 4. Current After Anti-Aliasing and DC Removal

Fig. 2. Power system configurations for CT saturation simulation The voltage waveforms for the three phase faults before and
after the application of anti-aliasing low-pass filtering are
Fig. 2 is used in evaluating the proposed algo rithm shown in Fig. 5 and Fig. 6. The occurrence of h igh harmonic
performance under saturation condition. The saturation components in the voltage waveform can be seen clearly in
condition is created by adding a synchronous generator to an
Fig. 5. But, after the filter is applied, the harmon ics
existing bus to replace a weak source. This is because high components have been filtered out as shown in Fig. 6.
magnitude of fau lt current with DC co mponents is produced Therefore, Fig. 6 reveals the filter effect in removing the
during high X/R rat io, which leads to CT saturation.
high frequency components. The phase delay can be seen
Therefore, a 15750 V synchronous ALESTOM generator from the two figures (Fig. 5 and Fig. 6).
connected to Y-Y step-up transformer has been selected as a
power source. The output voltage subjected to the secondary T ABLE II
MEASURING I MP EDANCE IN NORMAL CONDITION
part of the Y-Y transformer is 132000 V.
Fault Current Voltage Measured Real Z Error
T ype RMS(A) RMS(V) Z(Ω) (Ω) (%)
IV. SIM ULATION RESULT AND DISCUSSIONS
A-B- 61953.8 1056.22 58.6561 56.4040 3.9928
All results obtained for the designed distance relaying C-G
algorithm with current compensation are presented here.
A-G 914.933 66726.3 51.000 56.4040 9.5808
A. During Normal Condition A-B 1889.78 105021 55.5731 56.4040 1.4731
Fig. 3 shows the fault current during the occurrence of
three-phase fault on the system. Meanwhile, the current after
filtering and dc-removal is shown in Fig. 4. Co mparing both
figures (Fig. 3 and Fig. 4), it can be seen that the current has
been smoothen and balanced after the application of an anti-
aliasing filter and dc removal. Therefore, the designed
algorith ms have removed the high frequency and DC-offset
components occurred in the system successfully.

Fig. 5. Voltages before filtering (symmetrical fault)

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The basic fundamental phasor of current and voltage is

shown in Fig. 9 and Fig. 10 respectively. The waveform is
obtained by DFT algorithm which has extracted the basic
fundamental phasor of current and voltage after the
compensation process has been completed.

Fig. 6. Voltages after filtering

Fig. 7 shows the measuring impedance according to the

previous voltage and current. Meanwhile, Table II indicates
the measured impedance and the error for symmetrical and
unsymmetrical fau lts in normal condition. As it can be seen, Fig. 9. Current phasor for single phase fault in saturation condition
the maximu m error is 9.58%, which occurred during the
single phase faults.

Fig. 10. Voltage phasor for single phase fault in saturation condition

The results for saturation condition including RMS

Fig. 7. Measuring impedance by algorithm for three phase fault values of compensated current and measured impedance are
displayed in Table III and Table IV. These tables display the
B. Saturation Condition results and verify the performance of Distance Relay
Fig. 8 depicts the results obtained after the implementation algorith m. Furthermo re, it shows the valid ity of the
of compensation algorithm with the signal which co mprises proposed algorithm in compensating the saturation current
of the dc-offset and power frequency component. The first for Distance Relay applicat ion. Based on both tables (Table
graph shows the scaled primary current (a) and the III and Table IV), it can be seen that the value of error is
measured secondary current (b). Meanwh ile, the second and very small (1.15% for co mpensated current and 1.1723% for
third graphs show the detection signal and the transient error measured impedance).
compensated secondary current and scaled primary current.
T ABLE III.
Based on the transient error graph, it can be stated that the T HE REAL AND MEASURED CURRENT RMS VALUES ONE AND HALF CYCLE
maximu m transient error is less than 0.2%. AFTER FAULT
Fault T ype Real Current Compensation Error
RMS Current RMS (%)
A-B-C-G 25.8916 25.5919 1.1575

T ABLE IV
T HE REAL AND MEASURED IMPEDANCE FOR THREE PHASE FAULT
ONE AND HALF CYCLE AFTER FAULT
Fault Type Real Z(Ω) Measured Z( Ω) Error (%)
A-B-C-G 39.0158 39.4727 1.1710

CONCLUSIONS
DIST ANCE RELAY OPERATION DEPENDS ON THE VALUE OF
Fig. 8. Compensated current and transient error FAULT CURRENT AND FAULT IMPEDANCE . THE SMALL VALUE

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OF IMPEDANCE ERROR SHOWS THE HIGH SENSIT IVITY OF THE
PROPOSED NUMERICAL DIST ANCE RELAY ALGORITHM IN
FAULT DETECT ION. M EANWHILE , SMALL CURRENT ERROR
INDICATES THE ABILITY OF THE PROPOSED ALGORITHM IN
PREVENTING T HE MAL -OPERATION OF DISTANCE RELAY
EVEN DURING SAT URATION CONDITION. THEREFORE , AS A
CONCLUSION, A C++ NUMERIC DISTANCE RELAY
ALGORIT HM WHICH IS IMMUNED FROM CT SATURATION
CONDIT ION HAS BEEN SUCCESSFULLY DEVELOPED.
[20] H. khorashadi-Zade and H. Daneshi, Evaluation and Performance
Comparisons of Digital Distance Protection Algorithms. IEEE.
2004: 2463-2468
[21] M. Khederzade, A. Safarnourollah, M. Mortajeee and M. E.
Hamedanigolshan, Fundamentals of Power System Protection, Iran.
Power Ministry .2005
[22] Adly. A. Girgis and Christopher. M. Fallon. Fault Location
Techniques For Radial And Loop Transmission Systems Using
Digital Fault Recorded Data. 1992.7(4):1936-1945

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DESIGN. Norwood,MA:Artech House, INC. 2005
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Using Digital Mimic Filtering. IEEE Transactions on power
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Testing of a Digital Distance Relay Using
MAT LAB/SIMULINK.IEEE.2005:253-259
[12] T Rasheek M. Rifaat. Considerations in Applying EMTP to Evaluate
Current Transformer Performance under Transient and High
Current Fault Conditions. International Conference on Power
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[13] Hector J Altuve,Ismael Diaz and Jose A .de la O. A New Digital
Filter for Phasor Computation .IEEE .1998. 13(3): 1032-1037
[14] R. K. Aggarwal, D. v Coury, A.T. Johns and A.Kalam. A Practical
Approach to Accurate Fault Location on Extra High Voltage T eed
Feeders. IEEE. 1993. 8(3): 874-883
[15] H. khorashadi-Zade and H. Daneshi, Evaluation and Performance
Comparisons of Digital Distance Protection Algorithms. IEEE.
2004: 2463-2468
[16] M. Khederzade, A. Safarnourollah, M. Mortajeee and M. E.
Hamedanigolshan, Fundamentals of Power System Protection, Iran.
Power Ministry .2005
[17] Adly. A. Girgis and Christopher. M. Fallon. Fault Location
Techniques For Radial And Loop Transmission Systems Using
Digital Fault Recorded Data. 1992.7(4):1936-1945
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Feeders. IEEE. 1993. 8(3): 874-883

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Sampling of voltage and current

Saturation Saturation Second

Current
detection level>TH Inflection
compensation
point

Anti aliasing filter

DC Removal
End of
saturatio
Enter new sample and remove the old one n
𝑉𝑛=𝑉𝑛+1
𝐼𝑛=𝐼(𝑛+1)

YES YES

Calculation of sine and cosine elements of

voltage and current
𝑉1𝑠=1𝑛Σ𝑤𝑛𝑠 𝑉1𝑐=1𝑛Σ𝑤𝑛𝑐
𝐼1𝑠=1𝑛Σ𝑤𝑛𝑠 YES 𝐼1𝑐=1𝑛Σ𝑤𝑛𝑐
NO

𝑉<𝜙𝑣=𝑉1𝑠2+𝑉1𝑐2∠𝛼 𝑡𝑎𝑛𝑉1𝑠𝑉1𝑐
𝐼<𝜙𝐼=𝐼1𝑠2+𝐼1𝑐2∠𝛼 𝑡𝑎𝑛𝐼1𝑠𝐼1𝑐

[23] ransformer Models For Protective Relay T ransient Study. IE

nded

𝑍=𝑉𝐼 ; ∅=∅𝑉−∅𝐼
𝑋= 𝑍𝑠𝑖𝑛∅ ; 𝑅=𝑍𝑐𝑜𝑠∅

INDEX 1

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