RF DESIGN WITH APLAC

Sakari Aaltonen (Circuit Theory Laboratory, Helsinki University of Technology)

APLAC is a circuit simulation and design tool, a simulator for short. In this paper, I try to show whe-
re APLAC fits in the large family of simulators. Also, I describe some of APLAC’s unique capabilities.

1. Types and levels of simulators

A fundamental feature of a simulator is whether it is meant for analog, digital, or mixed-mode, that
is, both analog and digital, design.

Another basic distinction is the level of a simulator. A block-level (system) simulator might contain
a component called Mixer. With a component-level simulator, a mixer would be built out of discrete,
interconnected components (diodes, microstrip structures, FET’s etc.) The simulator itself would not
”know” that the components are meant to implement a mixer, and could conceivably show that the
would-be mixer does not, in fact, implement that function.

EM (electromagnetic) simulators operate on yet another level, that of Maxwell’s equations. They
usually proceed by divide-and-conquer, such that a horn antenna, for instance, is divided into hundreds
or more of very small constituent parts. Such calculations tend to be extremely time-consuming, so
much so that these simulators cannot be used for analysing complete circuits.

Because the design of an R F system proceeds at several levels, more than one type and level of simu-
lation will usually be needed. It is, of course, advantageous if the same simulator or simulator family
can be used for all tasks.

2. Available simulators
A great many simulators with varying capabilities are available. Many are more or less direct descen-
dants of the first generally available (analog, component-level) simulator, SPICE. SPICE is still the de
facto standard, such that virtually every existing simulator is compatible with SPICE’S input syntax,
or includes a translator.

For RF work, standard SPICE, even in its last version 3f4,lacks important components, such as mic-
rostrips. Likely candidates for this kind of work include Hewlett-Packard’s MDS, Compact Software’s
SUPERCOMPACT, and APLAC from the Helsinki University of Technology (HUT) anid Nokia Re-
search Center.

APLAC, while not a mixed-mode simulator, does offer several levels of design: system, compo-
nent, and electromagnetic. It features a large collection of RF components, including microstrip,
and h a s a number of useful features, such as a programming language and an unlimited optimiza-
tion capability. Free demo versions for PC’s and several Unix workstations can be dowiiloaded from
ftp://ftp.funet.fi/pub/cae/aplac. HUT’S Circuit Theory laboratory has a WWW page at http://www.
aplac.hut.fi with more information on APLAC.

The development of APLAC started at about the same time as SPICE. In spite of this, the program
itself is independent of SPICE. It does, however, include most of the SPICE models and a SPICEto-
APLAC converter program, such that SPICE component models can be used.

0 1997 The Institution of Electrical Engineers.

12’’ Printed and published by the IEE, Savoy Place, London WC2R OBL, UK.
3. The netlist
The part of the simulator’s input file that describes the circuit, i.e., the components and the nodes, is
called the netlist. A line in an APLAC netlist might read
res RI n20 n21 lk
This line tells the simulator that there is a resistor (res) between nodes n20 and n21; its name is R1
and its resistance value is l k (ohm).

The ’res’ part, identifying a resistor, would not be needed in standard SPICE, because that program
uses the first letter of the component’s name, ’R’ in this case, to identify the type. While this may
have been a good idea in its time, standard SPICE has since run out of letters, and many components
currently have to be given less-than-intuitive names.

Generally, APLAC’s netlist syntax differs little, or not at all, from SPICE’S. One notable exception
arises from APLAC’s programming language. That is, any parameter can be a program variable, or
a function. The above resistor could be defined as
res RI n20 n21 r l o a d
’rload’ would in this case be a variable, set somewhere else in the input file. To express a phase-
modulated input voltage source, we can write
volt VIN nl 0 TRAN=O. 5+0.1*cos (2*PI*lSOOk*t+phi (t)) R=500
’phi()’is a user-defined function for the phase of transient (time-domain) signal VIN. ’t’equals time
and is supplied by APLAC.

Voltage-controlled current sources - VCCS’s - are often encountered in APLAC netlists. Here is an
example:
vccs VLINEAR 0 nl 1 nplus nminus gm
This is a current source with the current flowing from node 0 (ground) t o node n l . It has one control-
ling voltage, between nodes nplus and nminus. gm is the transconductance, that is, the current equals
gm” (v(np1us)- v(nminus)).

VLINEAR, above, is a linear source. A nonlinear VCCS, e.g., a diode, can be defined in the following
way (IO is the saturation current, a variable set by the user, while BOLTZMANN (constant), elemQ
(constant) and Temp (variable) are supplied by APLAC):
#define vT (BOLTZMANN*Temp/elemq)
vccs VDIODE n2 n3 1 n2 n3
+ [IO* (exp (CV(0) /vT)-l) , (IO/vT) *exp(CV(O> /vT)1
+ NONLINEAR
This current source from n2 to n3 is, like a resistor, controlled by one (1) voltage or potential diffe-
rence, the voltage across the source itself (CV(n) means the nth controlling voltage). Unlike a resistor,
however, it is nonlinear, so we include expressions both for the current and for the current’s derivative
with respect to the controlling voltage. Note that this is j u s t an example of what a user-defined
nonlinear VCCS could look like; APLAC does include a built-in Diode model.

4. The program
The netlist is only a part of an APLAC input file. The simulation proper is performed with a SWEEP
statement. It replaces the .AC, .TRAN, etc. lines of classic SPICE. It also includes the specification
of the o u t p u t , usually curves in graphics windows. This is also different from classic SPICE, becau-
se SPICE stores all results in a disk file and is not concerned with displaying them; the results are
displayed by another program (’nutmeg’ in the Unix environment.)

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 The structure, then, of a typical APLAC input file, or program, is as follows:

0 global parameters and options

0 variables and functions

0 netlist
0 sweep(s)

A simple example of a SWEEP (the netlist is omitted):

sweep "AC Analysis" loop 100 freq log 10 1OOMeg
show Y magdb (vac (n2) )
endsweep
APLAC performs 100 AC analyses varying the frequency from 10 t o lOOMHz logarithmically. It also
pops up a graphics window, in which it draws the magnitude in decibels of the AC voltage of node n2
at every frequency point.

If you wish, you can do this by hand, so t o speak. Just declare a variable and make a frequency loop
('ii' is not declared, because it is only used in this FOR loop):
aplacvar ff
for ii 0 99
c a l l ff = lO*pow( (100Meg/10), ii/99)
analyze AC freq=ff
print real magdb(vac(n2)) LF
endf o r
While this gives you the same results, it does not give you the graphical output.

5 . Analyses
APLAC includes the same DC, AC, and TRAN analyses as classic SPICE, meant to find the ope-
rating point, frequency response, and time-domain behaviour, respectively, of a circuit. Sensitivities
and noise powers/figures are available; it is t o be noted that APLAC calculates noise during transient
analysis, too.

One significant addition is SS (steady-state) analysis. It is based on harmonic balance (HB), which in
turn means an iterative technique whereby the circuit is internally divided into linear aind nonlinear
subcircuits, after which a balance between those subcircuits is sought using Fourier transforms t o get
from the time domain into the frequency domain and vice versa. This is necessary because nonlinear
components - diodes) transistors, etc. - do not have a frequency-domain representation, whereas linear
components - capacitors, inductors, etc. - are easily and rapidly handled in the frequency domain. On
the other hand, dispersive trahsmission lines - for example, microstrips - do not have a time-domain
representation at all.
.
The end result is a Fourier series, or spectrum, for each voltage and current in the ciircuit. These
spectra can then be transformed into the time domain, which gives the same waveforms as those given
- eventually, after the circuit has settled - by transient analysis. However, depending 011 the circuit,
the savings in calculation time can be significant. The drawback is that SS analysis can need large
amounts of memory. Also, it cannot be used t o analyze power-on transients, because it only gives the
steady-state solution. On the other hand, SS analysis readily supplies distortion and intermodulation
figures, because the spectra needed have been calculated.

An important prerequisite of SS analysis is that there must be at least one fundamental frequency in
the circuit. If there is only one, then the spectrum(s) will consist of its harmonics. In two-tone analysis,

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there are two fundamental frequencies, which is useful for analyzing mixers, for example. In the mixer
case, the spectrum is calculated for - a user-definable number of - the mixing products (frequencies),
that is, for sums and differences of integral multiples of the two fundamental frequencies (RF and LO).

SSSMALLSIGNAL is a rather recent additional SS analysis mode. It is especially useful for mixers,
that is, situations where one signal is much weaker than the other (RF vs. LO), because in such a
case, it can be quite a bit faster than normal SS analysis.

As noted above, SS analysis is suitable for circuits where at least one component is nonlinear. When
only linear phenomena are investigated, APLAC’s NPORT component allows N-ports - transistors, say
- t o be defined by means of their S parameters (these can be read from a disk file.) The DEFNPORT
statement is used t o define the complete N-port, which might include several transistors, microstrips,
etc. APLAC calculates the S parameters of the complete N-port by means of an AC analysis. This
analysis also makes several stability and gain figures available.

Two other analysis types are worth noting. SC analysis can be used with switched-capacitor circuits,
whereas oscillator analysis is applicable t o any (autonomous) circuit.

When real-world oscillators start up, they do so generally in response t o random pulses that occur
at power-up. As these do n o t occur in a circuit simulated on a computer, simulated oscillators are
notoriously hard t o start up. APLAC’s oscillator analysis is based on optimization (see below) linked
with SS analysis, and a dummy component that is inserted into the circuit. The dummy component
disappears - becomes a short circuit - when the oscillation conditions are met, i.e., when the optimiza-
tion succeeds in finding the oscillation frequency.

Finally, electrothermal analysis is not an analysis method in itself. Rather, many APLAC components
accept electrothermal parameters, which allows simulating self-heating effects along with analyses pro-
per.

6. Analyses upon analyses: Monte Carlo, yield, optimization

Monte Carlo is not another analysis method. Rather, it is a way of running ”real” analyses consecu-
tively such that one or more variables, e.g., model parameters, are varied in a random fashion. The
end result is often expressed as yield, that is, the percentage of ”good” circuits.

For the results t o be valid, the number of runs must be large, which makes Monte Carlo a computa-
tionally heavy method. If one analysis run takes 5 or 10 seconds, then thousands of them will take
hours. When APLAC is used in a Unix environment, the same Monte Carlo analysis can be run on
several machines at the same time. The results can then be combined, displayed, and histogrammed,
on one machine.

Optimization is similar t o Monte Carlo in that it is not really an analysis method in itself. The simu-
lator is given a netlist and a selection of analyses, as well as one or several goals. Also, one or several
variables are marked as optimization variables. An example of a component to be optimized is
aplacvar r l o p t OPT M I N I00
r e s R 3 1 114 120 r l o p t
R31 is a resistor between nodes 114 and 120; its resistance is the optimization (OPT) variable rlopt,
the minimum of which has been set t o 100. If a minimum is not set, the optimum solution might call
for a negative resistance, which is usually not wanted.

APLAC performs the optimization iteratively, running the analyses (SWEEP’S) specified by the user
at each iteration. After each round, the goals are checked. If they have been reached, the process
stops; else the optimization variables are changed according t o the rules of the optimization method

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selected and the analyses are run again. If the goals are not reached, the simulator quits after a
user-definable number of tries have been made.

There is no single best optimization method that is equally well suited to all problems and that always
finds the optimum solution in the shortest time. APLAC includes 8 optimization methods: Gradient,
Conjugate Gradient, MinMax, Nelder-Mead, Exhaustive, Random, Anneal (simulated annealing) , and
Genetic. Additionally, manual optimization is available such that the optimization variables can be
”tuned” by means of an on-screen dialog box.

There are many uses for optimization. Theoretically, an entire circuit’s component v<aluescan be
found by optimization - in practice, this would be a rather slow design method. A typical use is to
improve a first, quick, design by optimizing a few component values. The goals might be ,a filter’s 3dB
frequency, a circuit’s sensitivity to noise or temperature, or an amplifier’s stability.

Optimization is sometimes used for curve-fitting. A component’s characteristic curves are measu-
red, after which its parameter values can be found by fitting the theoretical expression to the curves
measured. In this case, the optimization variables are the parameter values - for example, the drain
resistance or gate-source capacitance of a FET - and the goal is that the theoretical curves (which
depend on the parameters) be as close as possible to the measured curves. The whole process is called
parameter extraction. In this application, especially, APLAC’s IEEE488 functions may prove useful,
as IEEE488 measurement apparatus can be controlled by statements in APLAC’s input file. However,
only a few P C IEEE-488 controllers are supported.

7. System simulations
In system simulation, the level of abstraction changes. Instead of physical components like resistors
or transistors, we have mixers, filters, and similar high-level components.

On one hand, this makes the simulations less accurate, as most device variables and nonidealities are
not taken into account. All components are inherently large-signal, i.e., there is no small-signal, linear
AC analysis.

On the other hand, system-level simulation might be the only realistic way of simulating a large -
complete - circuit. Even a smallish circuit with three or four of MOSFET’s, for instance, might take
a few seconds t o analyze thoroughly, at the component level, on a fast Unix workstation. A complete
circuit with, typically, hundreds or thousands of MOSFET’s and associated discrete components could
take days.

APLAC includes two types of system-level simulators.

Formula-based simulation is a way of calculating a number of interesting characteristics of a comple-

te circuit based on the parameters of the components making up the circuit. For a receiver chain
(antenna-filter-amplifier-mixer-filter etc.), for example, the figures of merit include the intercept points.
These are usually specified for each link of the chain. APLAC makes it easy t o calculate the intercepts
of the whole chain, which, of course, is what matters.

Discrete-time simulation resembles the transient analysis of low-level, non-system, APLAC. However,
only high-level components are allowed: Adder, Clock, Downconverter, Integrator, Oscillator, and so
on. Thus, a complete transceiver system can be defined and analyzed.

8. EM simulations
APLAC’s EM simulation module is based on the FDTD (Finite-Difference Time-Domain) method.
Fields, voltages, and currents are calculated in the time domain. The basic ”components” are rectan-

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gular boxes or cells in 3D space, the dimensions of which arc - typically - millimeters. Larger areas
or regions are built out of these cells. A number of ready-made components are available, say, Slab,
Patch, and ThinWire (a dipole antenna can be made out of two ThinWires.)

The FDTD method realizes Maxwell’s equations by interleaving electric and magnetic phenomena in
time and space. An EM circuit is excited by localized EM ports that are part of the 3D structure;
thus, plane waves incident on a structure, for example, are not available.

The excitation can be either pulsed or harmonic (sinusoidal). Output functions include electric and
magnetic fields at points inside the computation region, as well as point-to-point voltages and currents
through planes.

Typical uses are antenna, microstrip, and PCB design. One of the first applications was the calcula-
tion of the fields generated by a GSM mobile phone’s antenna in and around the user’s head.

9. RF components
The above discussion has been largely frequency-independent. APLAC’s RF option includes an exten-
sive collection of passive components - geometrical structures - that are commonly used only in high-
frequency circuits. The main groups are microstrip (23 components), stripline (ll),and suspended-
substrate microstrip (2). In addition, there are several general R F components, for example, an ideal
circulator. The following is an example of a microstrip quadrature hybrid:
#define DURT 18u
#define DURH 1.27m
#define DURER 10.5
#define DURCOVER 100m
msub DUROID ER=DURER H=DURH T=DURT COVER=DURCOVER
mlin M13 1 3 W=width2 L=wavelen2/4
mlin M12 1 2 W=width L=wavelen/4
mlin M34 3 4 W=width L=wavelen/4
mlin M24 2 4 W=width2 L=wavelen2/4
Here, the MSUB statement defines the global microstrip parameters, while M13 etc. are the compo-
nents proper, i.e. , microstrip lines. ’wavelen’ and ’width’ are variables that are calculated somewhere
in the input file. With impedance ZO and frequency FO, the calculation could proceed as follows:
declare aplacvar width wh epseff wavelen width2 wavelen2
cal c
wh = mlinx(Z0, DURER)
width = wh*DURH
epseff = mlin-epse(wh, DURT/DURH, DURCOVER/DURH, DURER)
wavelen = 3E8/(sqrt(epseff)*FO)
endcalc
(’wavelen2’ and ’width2’ for the low-impedance branches are calculated similarly.) ’mlin-u () ’ and
’mlin_epse()’ are user-callable APLAC functions.

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