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# PANACEA IES/GATE Institute (The best institute of

electronics&communication engineering)
28A/11 Jiasarai Ground floor Delhi Ph: 09811382221, 011-32662945
Under the guidance yogesh agrawal (IES Rank-03&GATE-99.9% with 7-8
yrs teaching exp)
Detailed solution of GATE-2010 in Electronics&Communication engineering

1 C 14 A 27 D 40 C 53 B
2 C 15 C 28 C 41 B 54 B
3 D 16 A 29 C 42 C 55 D
4 A 17 B 30 B 43 C 56 B
5 D 18 B 31 D 44 B 57 A
6 B 19 A 32 A 45 D 58 D
7 B 20 C 33 A 46 A 59 B
8 B 21 B 34 A 47 B 60 D
9 A 22 C 35 B 48 B 61 C
10 A 23 D 36 C 49 B 62 C
11 D 24 C 37 D 50 D 63 D
12 D 25 C 38 B 51 C 64 B
13 B 26 A 39 D 52 B 65 B

Solution
1. C. This is just by definition of skew symmetric matrix
2.C. It is an even function, so it will contain only cosine terms, and for DC value,
simply calculate.
T /2
1
T =T∫/2
C0 = x(t )dt

−T / 4 T /4 T /2
1 1 1
= ∫
T −T / 2
−2 A dt +
T ∫
−T / 4
A.dt +
T ∫ −2 A dt
T /4

1 1 T 1 T
= × ( −2 A)(T / 4) + . .A + . . − 2 A
T T 2 T 4
A A A  A
= − + − = − 
2 2 2  2
So DC value will be negative
d 2 n( x ) n ( x )
3. D − 2 =0
dx 2 L
PANACEA IES/GATE Institute (The best institute of
electronics&communication engineering)
28A/11 Jiasarai Ground floor Delhi Ph: 09811382221, 011-32662945
Under the guidance yogesh agrawal (IES Rank-03&GATE-99.9% with 7-8
yrs teaching exp)
 d2 1
 2 − 2  n( x ) = 0
 dx L 
 1 
or  D 2 − 2  n( x) = 0
 L 
1
Auxiliary eq D2 − 2 = 0
L
1
D=±
L
1 1
x − x
n( x) = C.F = Ae L + Be L

n(0) = k
n(0) = A + B = k
1 2
− x − x
or = A + Be L
n( x ) e L

n(∞) = 0 As x − 0∞
0 = A + B.0
A=0
B=k
x

n( x ) = K e L

 x
= K exp  − 
 L

1 1
4. A. Y11 = + =4
0.5 0.5
Y12 = Y21 = −2
1 1
Y22 = + =4
0.5 0.5
5. D. In parallel RLC, circuit
I, is minm, So Z, will have maximum value
In case of parallel RLC, value of B.W is given by (B.W = 1/RC)
so if R is increased then B.W will be decreased and it is independent of L.
6. B. µ n for Si = 1350 cm2 / v sec.
µ p for Si = 500 cm2 / v sec
7. B
8. B I I0
R = 9Ω . 3 K

Q 1 Q 2 β 2= 9 . 3 KΩ
β 1= 7 0 0

-
•1 0 V •1
- 0 V
PANACEA IES/GATE Institute (The best institute of
electronics&communication engineering)
28A/11 Jiasarai Ground floor Delhi Ph: 09811382221, 011-32662945
Under the guidance yogesh agrawal (IES Rank-03&GATE-99.9% with 7-8
yrs teaching exp)

For calculation of I
0 – (–10) = 9.3 I + 0.7
I = 1.0 mA
if emitter area of Q1 and Q2 are equal then I = I0 but area of Q1 is half of Q2 so I
will be half of I0.
So I0 = 2I = 2.0 mA
9. A. If CE is disconnected from the circuit then, it will have voltage – series negative
feedback and due to that Ri (↑), R0 (↓) but voltage gain (↓) due to negative feed–
back.
R 0
Vi − 0 0 − V0 v • •
1
i -
10. A. = v
R1 R2 R + 2
0

Vo R 
⇒ = − 2  v0 •
Vi  R1 
R 3

## 11. D. NOR gate is Invert – AND

NAND gate is Invert – OR
12. D. For F to be 1, input of EX – NOR
Must have even No. of 1.
if A = 0, B = 0, C = 1
1st i/p of EXNOR will be 0
IInd i/p or EXNOR will be 1
III i/p of EXNOR is given as 1
So value of F, will be 1.
13. B. For Y5 to select combination of CBA must give 5.
So possible Range will be
A15 A14 A13 A12 A11 A10 A9 A8 A7 ------- A0
0 0 1 0 1 1 0 1 0 ------- 0
0 0 1 0 1 1 0 1 1 ------- 1
So Answer will be from 2DOO – 2DFF
14. A. X(z) = 5z2 + 4z-1 + 3
x[n] = 5 δ [n + 2] + 4 δ [n - 1] + 3 δ [n]
15. C. h1[n] = δ [n – 1]
h2[n] = δ [n – 2]
PANACEA IES/GATE Institute (The best institute of
electronics&communication engineering)
28A/11 Jiasarai Ground floor Delhi Ph: 09811382221, 011-32662945
Under the guidance yogesh agrawal (IES Rank-03&GATE-99.9% with 7-8
yrs teaching exp)
h[n] = h1[n] ⊗ h2[n]
⇒ H[z] = H1(z). H2(z)
= z–1 . z–2 = z–3
⇒ h[n] = δ [n – 3]
16. A. →
17. B.
Y (s ) S
18. B. H (s) = =
X (s) s + p
By input x(t) & output y(t) it is clear that w = 2,& φ = + 30º
2 2
but | H ( s ) |= & φ = 90º − tan −1  
4+ p 2
 p

2
so for p =
3

## Phase will be 30 degree

3 3
| H ( s ) |= So y (t ) = x (t ). 60º
2 2
K (1 + S / 0.1)
19. A. G ( s) H ( s ) =
(1 + s /10)
but 20 log K = 0 ⇒ K = 1
(1 + 10s )
So G(s) H (s) =
(1 + 0.1s )

## 20. C. AM, signal will be

S(t) = (AC + m(t)) cos(2π fc t)
only option B & C are Conventional AM
but in option B, M.I will be 2
while in option C, M.I will be ½
21. B. Aveg. Power of signal will be
AC 2 62
S(t) = = = 18 w
2 2
PANACEA IES/GATE Institute (The best institute of
electronics&communication engineering)
28A/11 Jiasarai Ground floor Delhi Ph: 09811382221, 011-32662945
Under the guidance yogesh agrawal (IES Rank-03&GATE-99.9% with 7-8
yrs teaching exp)
22. C. S11 ≠ S22
S12 = S21
It is reciprocal because S12 = S21 but not loss-less because when power is sent
from 1 to 2 then S11 is present, whole power is not reaching at 2.
23. D. For distortion -less line
LG = RC
L C
=
R G
L
Z0 =
C
R
⇒ Z0 =
G
Here attenuation constant α = RG
R
= R×
Z0
R 0.1
α= =
Z 0 50
= 0.002 neper/meter
24. C. h(t) = S(T - t)
s ( t ) h ( t )
• 1
1

0 t
- T 0 T

Em 2 µ
25. C. Pav = but η =
2η ε
n0
∴ η= = ( 60π )
2
(1) 2 1
Pav = =
2 × 60π 120π
1
26. A if e y = x x
Taking log both the sides
PANACEA IES/GATE Institute (The best institute of
electronics&communication engineering)
28A/11 Jiasarai Ground floor Delhi Ph: 09811382221, 011-32662945
Under the guidance yogesh agrawal (IES Rank-03&GATE-99.9% with 7-8
yrs teaching exp)
1
y= lnx
x
lnx
y=
x
1
x. − ln x.1
dy 1 − ln x
= x 2 =
dx x x2
dy
max or min =0
dx
1 − ln x
=0
x2
ln x = 1
x=e
 1
2 x 2  0 −  − ( 1 − ln x ) 2 x
d y
= 
x
2
dx x4
at x = e
−e 1
4
=− 3 <0
e e
Max at x = e
27. D

r
if A = xy aˆ x + x aˆ y then
2
28.C

∫ A.dl
Ñ
l = xi + yj
d l = dxi + dy j
A.d l = xy dn + x 2 dy

∫ ( xy dn + x dy)
2

parallel
x − Axis y = 1 dy = 0
2/ 3 3 1/ 3
4
1
∫ x dx +
3 ∫1
dy + 3 ∫ n dx
2/ 3
3
PANACEA IES/GATE Institute (The best institute of
electronics&communication engineering)
28A/11 Jiasarai Ground floor Delhi Ph: 09811382221, 011-32662945
Under the guidance yogesh agrawal (IES Rank-03&GATE-99.9% with 7-8
yrs teaching exp)
1
1
+ ∫ dy = 1
33
2
parallel 10 y − Axis x = dx = 0
3
Along y = 3 dy = 0
1
Along x =
3

1− 2z 1− 2z
29.C X ( z) = f (z) =
z ( z − 1)( z − 2) z ( z − 1)( z − 2)
Poles are z(z - 1) (zx - 2) = 0
Z = 0, 1, 2
Per at z = 0
lt z f(z)
z →0

(1 − 2 z ) 1 1
lt z = =
z →0
z ( z − 1)( z − 2) (0.1)(0 − 2) 2

Per at z = 1
lt (z - 1) f(z)
z →1

(1 − 2 z ) (1 − 2)
lt ( z − 1) = =1
z →1
z ( z − 1)( z − 2) 1(1 − 2)
Per at z = 2
lt ( z − 2) f ( z )
z →2

(1 − 2 z ) (1 − 4)
lt ( z − 2) =
z →2 z ( z − 1)( z − 2) 2(2 − 1)
3
=−
2
dy ( x)
30.B − y ( x) = x
dn
PANACEA IES/GATE Institute (The best institute of
electronics&communication engineering)
28A/11 Jiasarai Ground floor Delhi Ph: 09811382221, 011-32662945
Under the guidance yogesh agrawal (IES Rank-03&GATE-99.9% with 7-8
yrs teaching exp)
dy ( x)
= y ( x) = x
dn
dy
= y+x
dx
y1 = y0 + h f ( x0 , y0 )
= 0 + (.1).0 = 0
h = .1
f ( x, y ) = ( y + x )
f (0, 0) = 0 + 0 = 0
f ( x1 , y1 ) = x1 + y1
= (.1) + 0
= 0.1
y2 = y1 + h f ( x1 , y1 )
= 0 + (.1) × 0.1 = .01
y3 = y2 + h f ( x2 , y2 )
= .01 + (.1) [ x2 + y2 ]
= .01 + (.1)[.2 + .01]
= .01 + (.1)[.21]
= .01 + .021
= .031

 3s + 1 
31. D. f (t ) = L−1  3 
 s + 4 s + ( K − 3) s 
2

F ( s) = L( f (t ))
(3s + 1)
= 3
s + 4 s 2 + ( k − 3) s
lim f (t ) = lim SF ( s ) = 1
t →∞ s →0

(3s + 1)
⇒ lim =1
s →0 s + 4 s + ( k − 3)
2

⇒ k −3 = 1 ⇒ K = 4
32. A. When switch was open for a long time, then inductor will behave as short
circuited.
1 Ω0

• iL ( 0 )
1 . 5 A 1 Ω0
1 Ω0
PANACEA IES/GATE Institute (The best institute of
electronics&communication engineering)
28A/11 Jiasarai Ground floor Delhi Ph: 09811382221, 011-32662945
Under the guidance yogesh agrawal (IES Rank-03&GATE-99.9% with 7-8
yrs teaching exp)

So iL (0) = 0.75 A
but at t = 0+, switch is closed and iL (0–) = iL (0+) = 0.75A
1 Ω0

i ( t ) 0 . 7 5 A
1 . 5 A 1 0 A 1 Ω0
1 5 m H

1.5 − 0.75
So Value of i(t) at t = 0 =
2
= 0.375 A
at t = ∞, value of i(t) will be
1.5
i(t = ∞) = = 0.5 A
3
because 15 mH, inductor will be short circuited.
These conditions are full-filled only in option - A
33. A 20 mH → +| 20 j 2 0 j V x

50 µ F → – 20 j I
Now apply KCL V = 2 0 0 º 1Ω - 2 0 j
V − Vx Vx V
= + x
20 j 1 −20 j
⇒ V − Vx = (20 j )Vx − V x
20 0º
⇒ V = 20 j.Vx ⇒ Vx =
20 j
Vx = 1 withangle − 90º
Vx
So I= = 1 withangle − 90º
1
so A = ( −1 j )
34. A. Calculate current, supplied by
10 V, battery and that will be zero
So power will be product of V&I and answer will be zero
35. B. For P – N – P Transistor
PANACEA IES/GATE Institute (The best institute of
electronics&communication engineering)
28A/11 Jiasarai Ground floor Delhi Ph: 09811382221, 011-32662945
Under the guidance yogesh agrawal (IES Rank-03&GATE-99.9% with 7-8
yrs teaching exp)
I EP
emitter − injection − eff = =1
I EP + I EN
⇒ I EN = 0
So There is very small, doping in base region then only IEN ≈ 0
36. C. When doping is (↑) then reverse break down voltage will be decreased i.e break
down will be achieved at smaller vale of voltage
but at the same time depletion width will (↓) and which will increase depletion capacitance
2εV j  1 1  εA
w=  +  C=
q  N A ND  ω
37. D. initially QA = 0 = QB = QC
at that time DA = 1 = QB XNORQC
DB = QA = 0
DC = QB = 0
So after one clock pulse
QA = 1 QB = 0 QC = 0
at that time DA = QB XNOR QC = 1
DB = 1
DC = QB = 0
So after 2, clock pulses
QA = 1
QB = 1
QC = 0
So only option - D is correct.
38. B. Diode D2 will remain in
OFF, Condition.
If vi = –5 volt, then
5 − 0 20 − 0 0 − v0
− + =
R 4R R
⇒ v0 = 0
if vi = −10 volt
10 − 0 20 − 0 0 − v0
− + =
R 4R R
5 v
⇒ − = − 0 ⇒ v0 = 5
R R
39. D. S1(A) S0(B) O/P I0 = C
PANACEA IES/GATE Institute (The best institute of
electronics&communication engineering)
28A/11 Jiasarai Ground floor Delhi Ph: 09811382221, 011-32662945
Under the guidance yogesh agrawal (IES Rank-03&GATE-99.9% with 7-8
yrs teaching exp)
0 0 I0 I1 = D
0 1 I1 I2 = C
1 0 I2 I3 = C .D
1 1 I3
F(A, B, C, D)
= A B I 0 + A B I1 + A B I 2 + ABI 3
Simply put value of I0, I1, I2 & I3 and then solve in K-Map.
40. C.
41. B. (S2 + 4S +3) Y(s) = (2s + 4) X(s)
Y (s) 2( s + 2)
⇒ = = H (s)
X ( s ) ( s + 1)( s + 3)
x ( t ) = e −2 t u ( t )
1
X ( x) =
s+2
2  1 1 
So Y ( s) = = −
( s + 1)( s + 3)  s + 1 s + 3 
y (t ) = e− t u (t ) − e−3t u (t )
3 −1
2− z
42. C. H ( z) = 4
3 1
1 − z −1 + z −2
4 8
2 − 3 / 4 z −1
F=
( 1 − 1/ 4 z −1 ) (1 − 1/ 2 z −1 )
For causal ROC, must be Right of Right - Most pole and For stable it must
include unit circle.
43. C. wm = 1200 π
fm = 600 Hz
fs = 2 fm = 2×600 = 1200 Hz
44. B. For Minm steady state error it must be PI controller.
in PI, 1st critical freqn is pole and II is zero, so (B) must be correct answer.
45. D.
+ v ( t )
x ( t ) d
+ y ( t )
d t
+
PANACEA IES/GATE Institute (The best institute of
electronics&communication engineering)
28A/11 Jiasarai Ground floor Delhi Ph: 09811382221, 011-32662945
Under the guidance yogesh agrawal (IES Rank-03&GATE-99.9% with 7-8
yrs teaching exp)

## v(t) = x(t) + x(t - 0.5)

V(s) = (1 + e–0.5S) X(s)
Y(s) = S.V(s) = S. (1 + e–0.5S) X(s)
H(s) = S(1 + e–0.5S)
δ YY(w) = δ XX(w). |H(w)|2
|H(w)|2 = w2((1 + cos 0.5 w)2 + sin(0.5 w)2)
if w = 2π f = 2
|H(w)|2 = w2 ((1 + cos π f)2 + (sin (π f))2)
if f = 1, 3, 5, 7, ….
cos π f = –1 sin π f = 0 so for f = (2n + 1)f0
so |H(w)|2 = 0
Er η2 −η1
46. A. =
Ei η2 + η1

η = η1  µ
 2 Qη =
 3  ε0
1 −1
Er
= 3
Ei 1 + 1
=− 1 ( )
2
3
r
Er = −12 cos(3 ×108 t + y ) az
r 12 r
Hr = cos(3 ×108 t + y ) ax
120π
1 r
= cos(3 ×108 t + y )ax
10π
47. B. i/p seen due to λ /8 is
ZSC = Z0 tan β l
2π λ
= 30 × tan ×
8
λ
Z1 = j30 Ω
imped. Seen due to λ /4 line is

( )
2
Z2 30 2
Z2 = 0 = = 60 Ω
ZR 30
= 20Ω
PANACEA IES/GATE Institute (The best institute of
electronics&communication engineering)
28A/11 Jiasarai Ground floor Delhi Ph: 09811382221, 011-32662945
Under the guidance yogesh agrawal (IES Rank-03&GATE-99.9% with 7-8
yrs teaching exp)
Z R − Z 0 30 j + 60 − 60 j
K= = =
Z R + Z 0 30 j + 60 + 60 j + 4
| K |= 0.24
1+ | K |
VSWR = = 1.64
1− | K |
48. B. The resistance seen by voltage source vs is
R = Rs + (RB || hie)
100
hie = β / g m = = 259Ω
0.3861
RB || hie = 258Ω
R = 1000 + 258 = 1258Ω
49. B. The resistance due to C2 will be (R0 + RL)
1 1
fL = wher R0 = RC ||
2π ( R0 + RL )C2 h0 e
1
=
2 × 3.14 × (1 + 0.25) ×103 × 4.7 ×10 −6

103
=
2 × 3.14 × 1.25 × 4.7
= 27.1 Hz
In above question R0=RC because 1/hoe=infinite
50. D. & 51. C.
P1 = 2/s2 × 0.5 = 1/s2
P2 = 2/s × 0.5 = 1/s
L1 = – 1/s L2 = – 1/s2
Y ( s ) P1 ∆1 + P2 ∆ 2
=
U (s) ∆
∆ = 1 − ( L1 + L2 )
= 1+ 1 + 1 2
s s
1
s2 + 1
Y (s) s = (1 + s )
=
U ( s) 1 + 1 + 1 ( s + s + 1)
2
s s2
52. B. & 53. B.
PANACEA IES/GATE Institute (The best institute of
electronics&communication engineering)
28A/11 Jiasarai Ground floor Delhi Ph: 09811382221, 011-32662945
Under the guidance yogesh agrawal (IES Rank-03&GATE-99.9% with 7-8
yrs teaching exp)
Trick for solving this question is
JD = σ E = ND . q.µ n.E
ND.q.µ n = 1016 × 1.6 × 10–19 × 1350
= (2.16)
Just check option.
For (A) → E = 1 KV/cm, J = 2.16 × 103 A/cm
which is wrong
For (B) → E = 5 KV/cm, J = 1.08 × 104 A/cm2
which is correct
(C) & (D) are also wrong.
54.B&55.D
56.B
57.A
58. D H
F
59. B
60.D 5 1 0 7

## No of persons playing neither hockey nor football = 25 – (5 + 10 + 7) = 3

61. C
62. C
It is addition of two number which has base 8
137+276=435 it is according to base-8 addition
63. D 5 skilled worker can build a well in 20 days
Q 1 skilled worker can build a wallin 5 × 20
5 × 20
∴2 skilled worker can build a wallin = 50 day
2
8semi-skilled worker can build a well in 25 day
Q 1 semi-skilled worker can build a well in 25 × 8
25 × 8 100
∴ 6semi-skilled worker can build a well in = day
6 3
10 unskilled worker can build in 30 days
Q 1 unskilled worker can build in 10 ×30
10 × 30
∴ 5 unskilled worker can build in = 60
5
PANACEA IES/GATE Institute (The best institute of
electronics&communication engineering)
28A/11 Jiasarai Ground floor Delhi Ph: 09811382221, 011-32662945
Under the guidance yogesh agrawal (IES Rank-03&GATE-99.9% with 7-8
yrs teaching exp)
1 3 1
All log eller = + +
50 100 60
6 + 9 + 5 20 1
= = =
300 300 15
1
port all log eller 1 day
15
= " " 15 day

64. B 65. B