5 4 3 2 1

REV Description DATE BY PAGE NO. SCHEMATIC PAGE

D D

1 COVER PAGE
2 POWER MANAGEMENT
v1 First release
3/6/2015 QXN 3 PROCESSOR 1 OF 3, JTAG HEADER
PCB version is v1
4 PROCESSOR 2 OF 3, UAB PORTS
5 PROCESSOR 3 OF 3
6 LED, CONFIGURATION AND BUTTON
7 DDR3 MEMORY

C 8 eMMC FLASH C

9 10/100 ETHERNET
10 EXP CONN, uSD

This work is licensed under the Creative Commons Attribution 4.0 International License.
To view a copy of this license,visit
B http://creativecommons.org/licenses/by-sa/4.0 B

This schematic is *NOT SUPPORTED* and DOES NOT constitute

a reference design. Only Community support is allowed via
resources at BeagleBoard.org/discuss.
THERE IS NO WARRANTY FOR THIS DESIGN , TO THE EXTENT
PERMITTED BY APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED
IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
PROVIDE THE DESIGN IS WITHOUT WARRANTY OF ANY KIND,
EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED
TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS TO THE
QUALITY AND PERFORMANCE OF THE DESIGN IS WITH YOU. SHOULD
THE DESIGN PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL
A
NECESSARY SERVICING, REPAIR OR CORRECTION. A

Title
BeagleBone Green Cover Page
Size Document Number Rev
B v1
Date: Thursday, June 04, 2015 Sheet 1 of 10
5 4 3 2 1
 5 4 3 2 1

TP1

TESTPT1
USB_DC R168 VDD_5V SYS_5V
U2
10 7
AC SYS1 8
D
USB_DC 12 SYS2 Battery access pins. D
0R,1% DNP USB
C2 4 TP5 TESTPT1
Pins are randomly DGND

select wether the VDD_3V3A

10uF,10V C1 17
NC1
BAT1
BAT2
5 placed to fit them in,
15 6 TP6 TESTPT1
usb can provide1A
10uF,10V NC BAT_SENSE 11 TP7 TESTPT1 but will be able to tie
TS
DGND TP8 TESTPT1 into them either with a

R4
current power DGND C3 P_INT_LDO 48 VDD_3V3A

R3
0.1uf,6.3V INT_LDO cape or wires. Pins will

1.5K,1%
C4 10uF,10V P_BYPASS 47 R1
1.5K,1%
BYPASS DGND not be populated.
14 16 VIO
DGND MUX_IN MUX_OUT
9 18 100K,1%
4 PMIC_POWR_EN PWR_EN VIO
44 26
RESET PGOOD PMIC_PGOOD 3
25 46
10 PWR_BUT PB_IN LDO_PGOOD LDO_PGOOD 3
28 13 WAKEUP 4
4,10 I2C0_SCL SCL WAKEUP
27 45
4,10 I2C0_SDA SDA INT PMIC_INT 3
S3 34
SMD Button Top ISINK1 33
1 2 36 ISINK2
MTG1 ISET2
38
C
MHOLE 3 4 FB_WLED C

35
MTG2 ISET1
POWER 37
L4
MHOLE DGND BUTTON SYS_5V
MTG3 VDDS_DDR
C7 10uF,10V 21 L1
MHOLE
DGND VIN_DCDC1 20 P_L1 1 2 R6
1.5V
L1 LQM2HPN2R2MG0L 0,1%
MTG4 19 VDCDC1
C8 10uF,10V 22 VDCDC1 L2 VDD_MPU
MHOLE VIN_DCDC2 23 P_L2 1 2
L2 LQM2HPN2R2MG0L
24 VDCDC2 VDDS VDD_CORE
C10 10uF,10V 32 VDCDC2 L3
VIN_DCDC3 31 P_L3 1 2
L3 LQM2HPN2R2MG0L C11 C12 C9
SYS_5V 29 VDCDC3 VDD_1V8
VDCDC3 R9 0,1%,DNI 10uF,10V 10uF,10V 10uF,10V
39 40
LDO3_IN LDO3 VIO
VDD_3V3A C14
B DGND C13 10uF,10V 42 43 B
LDO4_IN LDO4 R7 10uF,10V
0,1% VRTC C15
2 3 VLDO1 R5
VINLDO VLDO1 0,1% 10uF,10V
1 R8
VLDO2 0,1% C16

2.2uF,6.3V DGND DGND DGND

VDD_3V3B VDD_3V3AUX
AGND

PGND

POWER LED
PPAD

VDD_3V3A DGND 4.75K,5%

SYS_5V 470K,1% 280K,1% R11
R10 TPS65217C D1 PWR_LEDR
U4 DGND
41

30

49

2 3 R12
1 IN OUT 4 C18 LTST-C191TBKT
C17 5 EN ADJ 6 DGND
7 GND1 GND3 8 2.2uF,6.3V
2.2uF,6.3V GND2 GND4 C19 C20
TL5209 500mA 470pF,6.3V 0.1uf,6.3V DGND

DGND

A DGND DGND DGND DGND DGND A

Title
BeagleBone Green Power Management
Size Document Number Rev
B v1
Date: Monday, July 27, 2015 Sheet 2 of 10
5 4 3 2 1
 5 4 3 2 1

VDD_3V3A VDD_3V3A VDD_3V3A VDD_3V3A

R171 R172 R175

4.75K,5% 4.75K,5% 4.75K,5%.DNP
U17 VDD_3V3A
1 8
2 XIN/CXIN VDD 7 VIO
Y2 3 CKOUT ADS1 6 R14
SSON ADS0 3.3V
2

24MHz R17 4 5 10K,1%

1M,1% GND MOD OUT R173 S1
U16

5
C25 SSDCI3128AF R174 4.75K,5% SMD Button Top
1 2

VCC
1

18pF,50V 4.75K,5%,DNP
2 4
C26 A Y 3 4 C24

GND
18pF,50V 2.2uF,6.3V

NC
D D
GND_OSC0 GND_OSC0 SN74LVC1G07DCK

RESET

3
DGND
R29 DGND
0,1%
DGND
2 PMIC_PGOOD

GND_OSC0 DGND 1.8V

2 LDO_PGOOD

C21 1.8V

U5A
R30 V10 3.3V B15
18pF,50V OSC0_IN PORZn A10
0,1% C22 NRESET_INOUT SYS_RESETn 9,10
2

Y1 U11 1.8V B5
OSC1_OUT1 41 V11 OSC0_OUT RTC_PORZn
GND_OSC0 VSS_OSC0 SubArctic AM335x B18
PMIC_INT 2
OSC1_IN A6 NNMI A15 PROC_A15 XDMA_EVENT_INTR0
3

R18 33
DGND 18pF,50V 32.768KHz MC-306 OSC1_IN EVENT_INTR0/TIMER4/CLKOUT1/SPI1_CS1/PR1PRU1R31_16/EMU2/GPIO0_19 D14 CLKOUT_SRC R19
OSC1_OUT EVENT_INTR1/TCLKIN/CLKOUT2/TIMER7/PR1PRU0_PRUR31_16/EMU3/GPIO0_20 CLKOUT2 3,10
A4
GND_OSC1 A5 OSC1_OUT 15mm x 15mm B10 JTAG_TRSTn
0,1%
R20
VSS_RTC Package NTRST C11 JTAG_TMS 0,1%
GPIO3_20 4
DDR_A[15..0] TMS B11 JTAG_TDI
7 DDR_A[15..0] DDR_A0 F3 TDI A12 JTAG_TCK
DDR_A1 H1 DDR_A0 TCK A11 JTAG_TDO
DDR_A2 E4 DDR_A1 TDO C14 JTAG_EMU0
DDR_A3 C3 DDR_A2 EMU0/GPIO3_7 B14 JTAG_EMU1
DDR_A4 C2 DDR_A3 EMU1/GPIO3_8
DDR_A5 B1 DDR_A4 V12
DDR_A6 DDR_A5 GPMC_CLK/LCD_MEM_CLK/GPMC_WAIT1/MMC2_CLK/PRT1_MII1_TXEN/MCASP0_FSR/GPIO2_1 GPIO2_1 10
D5 V6
DDR_A7 DDR_A6 GPMC_CSN0/GPIO1_29 GPIO1_29 10
E2 U9
DDR_A8 DDR_A7 GPMC_CSN1/GPMC_CLK/MMC1_CLK/PRT1EDIO_DATA_IN6/PRT1_EDIO_DATA_OUT6/PR1_PRU1_PRU_R30_12/PR1_PRU1_PRU_R31_12/GPIO1_30 MMC1_CLK 8,10
D4 V9
DDR_A9 DDR_A8 GPMC_CSN2/GPMC_BE1N/MMC1_CMD/PR1_EDIO_DATA_IN7/PR1_EDIO_DATA_OUT7/PR1_PRU1_PRU_R30_13/PR1_PRU1_PRU_R31_13/GPIO1_31 U5_T13 MMC1_CMD 8,10
C1 T13 H
DDR_A10 F4 DDR_A9 GPMC_CSN3/MMC2_CMD/PR1_MDIO_DATA/GPIO2_0 U6
DDR_A11 DDR_A10 GPMC_WEN/TIMER6/GPIO2_4 TIMER6 10
F2 T7
DDR_A12 DDR_A11 GPMC_OEN_REN/TIMER7/EMU4/GPIO2_3 TIMER7 10
C E3 R7 C
DDR_A13 DDR_A12 GPMC_ADVN_ALE/TIMER4/GPIO2_2 TIMER4 10
H3 T6
DDR_A14 DDR_A13 GPMC_BE0N_CLE/TIMER5/GPIO2_5 TIMER5 10
H4 U18
DDR_BA[2..0] DDR_A15 D3 DDR_A14 GPMC_BE1N/GMII2_COL/GPMC_CSN6/MMC2_DAT3/GPMC_DIR/PR1_MII1_RXLINK/MCASP0_ACLKR/GPIO1_28 T17 GPIO1_28 10
7 DDR_BA[2..0] DDR_BA0 DDR_A15 GPMC_WAIT0/GM112_CRS/GPMC_CSN4/RMII2_CRS_DV/MMC1_SDCD/PR1_MII1_RXDV/UART4_RXD/GPIO0_30 UART4_RXD 10
C4 U17
DDR_BA1 DDR_BA0 GPMC_WPN/GMII2_RXERR/GPMC_CSN5/RMII2_RXERR/MMC2_SDCD/PR1_MDIO_MDCLK/UART4_TXD/GPIO0_31 UART4_TXD 10
E1
DDR_BA2 B3 DDR_BA1 U7
DDR_D[15..0] DDR_BA2 GPMC_AD0/MMC1_DAT0//////GPIO1_0 V7 MMC1_DAT0 8,10
7 DDR_D[15..0] DDR_D0 M3 GPMC_AD1/MMC1_DAT1//////GPIO1_1 R8 MMC1_DAT1 8,10
DDR_D1 M4 DDR_D0 GPMC_AD2/MMC1_DAT2//////GPIO1_2 T8 MMC1_DAT2 8,10
DDR_D2 N1 DDR_D1 GPMC_AD3/MMC1_DAT3//////GPIO1_3 U8 MMC1_DAT3 8,10
DDR_D3 N2 DDR_D2 GPMC_AD4/MMC1_DAT4//////GPIO1_4 V8 MMC1_DAT4 8,10
DDR_D4 N3 DDR_D3 GPMC_AD5/MMC1_DAT5//////GPIO1_5 R9 MMC1_DAT5 8,10
DDR_D5 N4 DDR_D4 GPMC_AD6/MMC1_DAT6//////GPIO1_6 T9 MMC1_DAT6 8,10
DDR_D6 P3 DDR_D5 GPMC_AD7/MMC1_DAT7//////GPIO1_7 U10 MMC1_DAT7 8,10
DDR_D7 P4 DDR_D6 GPMC_AD8/LCD_DATA23/MMC1_DAT0/MMC2_DAT4/EHRPWM2A/PR1_MII_MT0_CLK//GPIO0_22 T10 EHRPWM2A 10
DDR_D8 J1 DDR_D7 GPMC_AD9/LCD_DATA22/MMC1_DAT1/MMC2_DAT5/EHRPWM2B/PR1_MII0_CRS//GPIO0_23 T11 EHRPWM2B 10
DDR_D9 K1 DDR_D8 GPMC_AD10/LCD_DATA21/MMC1_DAT2/MMC2_DAT6/EHRPWM2_TRIPZONE_INPUT/PR1_MII0_TXEN//GPIO0_26 U12 GPIO0_26 10
DDR_D10 K2 DDR_D9 GPMC_AD11/LCD_DATA20/MMC1_DAT3/MMC2_DAT7/EHRPWM2_SYNCI_O/PR1_MII0_TXD3//GPIO0_27 T12 GPIO0_27 10
DDR_D11 K3 DDR_D10 GPMC_AD12/LCD_DATA19/MMC1_DAT4/MMC2_DAT0/EQEP2A_IN/PR1_MII0_TXD2/PR1_PRU0_PRU_R30_14/GPIO1_12 R12 GPIO1_12 10
R161
DDR_D12 K4 DDR_D11 GPMC_AD13/LCD_DATA18/MMC1_DAT5/MMC2_DAT1/EQEP2B_IN/PR1_MII0_TXD1/PR1_PRU0_PRU_R30_15/GPIO1_13 V13 GPIO1_13 10
0,1%
DDR_D13 L3 DDR_D12 GPMC_AD14/LCD_DATA17/MMC1_DAT6/MMC2_DAT2/EQEP2_INDEX/PR1_MII0_TXD0/PR1_PRU0_PRU_R31_14/GPIO1_14 U13 GPIO1_14 10
DDR_D14 L4 DDR_D13 GPMC_AD15/LCD_DATA16/MMC1_DAT7/MMC2_DAT3/EQEP2_STROBE/PR1_ECAP0_ECAP_CAPIN_APWM_O/PR1_PRU0_PRU_R31_15/GPIO1_15 GPIO1_15 10
DDR_D15 M1 DDR_D14 R13 U5_R13 R160
DDR_D15 GPMC_A0/GMII2_TXEN/RGMII2_TCTL/RMII2_TXEN/GPMC_A16/PR1_MII_MT1_CLK/EHRPWM1_TRIPZONE_INPUT/GPIO1_16 V14 GPIO1_16 10
0,1%
D2 GPMC_A1/GMII2_RXDV/RGMII2_RCTL/MMC2_DAT0/GPMC_A17/PR1_MII1_TXD3/EHRPWM1_SYNCI_O/GPIO1_17 U14 GPIO1_17 10 VDD_3V3A
7 DDR_CLK D1 DDR_CK GPMC_A2/GMII2_TXD3/RGMII2_TD3/MMC2_DAT1/GPMC_A18/PR1_MII1_TXD2/EHRPWM1A/GPIO1_18 T14 EHRPWM1A 10
7 DDR_CLKn G3 DDR_NCK GPMC_A3/GMII2_TXD2/RGMII2_TD2/MMC2_DAT2/GPMC_A19/PR1_MII1_TXD1/EHRPWM1B/GPIO1_19 R14 EHRPWM1B 10
R169
7 DDR_CKE H2 DDR_CKE GPMC_A4/GMII2_TXD1/RGMII2_TD1/RMII2_TXD1/GPMC_A20/PR1_MII1_TXD0/EQEP1A_IN/GPIO1_20 V15 0,1% DNP
7 DDR_CSn F1 DDR_CSN0 GPMC_A5/GMII2_TXD0/RGMII2_TD0/RMII2_TXD0/GPMC_A21/PR1_MII1_RXD3/EQEP1B_IN/GPIO1_21 U15 USR0 6
R170
7 DDR_CASn G4 DDR_CASN GPMC_A6/GMII2_TXCLK/RGMII2_TCLK/MMC2_DAT4/GPMC_A22/PR1_MII1_RXD2/EQEP1_INDEX/GPIO1_22 T15 USR1 6
0,1% DNP
7 DDR_RASn B2 DDR_RASN GPMC_A7/GMII2_RXCLK/RGMII2_RCLK/MMC2_DAT5/GPMC_A23/PR1_MII1_RXD1/EQEP1_STROBE/GPIO1_23 V16 USR2 6
7 DDR_WEn DDR_WEn GPMC_A8/GMII2_RXD3/RGMII2_RD3/MMC2_DAT6/GPMC_A24/PR1_MII1_RXD0/MCASP0_ACLKX/GPIO1_24 U16 USR3 6 VDD_3V3A
DGND
M2 GPMC_A9/GMII2_RXD2/RGMII2_RD2/MMC2_DAT7/GPMC_A25/PR1_MII_MR1_CLK/MCASP0_FSX/GPIO1_25 T16 HDMI_INT
Y4
7 DDR_DQM0 P1 DDR_DQM0 GPMC_A10/GMII2_RXD1/RGMII2_RD1/RMII2_RXD1/GPMC_A26/PR1_MII1_CRS/MCASP0_AXR0/GPIO1_26 V17 USB1_OCn 4 HDMICLK_DISn 1 4
7 DDR_DQS0 P2 DDR_DQS0 GPMC_A11/GMII2_RXD0/RGMII2_RD0/RMII2_RXD0/GPMC_A27/PR1_MII1_RXER/MCASP0_AXR1/GPIO1_27 OE VCC External clock
7 DDR_DQSN0 J2 DDR_DQSN0 to the McASP0
7 DDR_DQM1 L1 DDR_DQM1 G17 2 3 R167 33 interface.GPIO3_21
B 7 DDR_DQS1 L2 DDR_DQS1 MMC0_CLK/GPMC_A24/UART3_CTSN/UART2_RXD/DCAN1_TX/PR1_PRU0_PRU_R30_12/PR1_PRU0_PRU_R31_12/GPIO2_30 G18 MMC0_CLKO 10 GND CLK 4,10 B
7 DDR_DQSN1 DDR_DQSN1 MMC0_CMD/GPMC_A25/UART3_RTSN/UART2_TXD/DCAN1_RX/PR1_PRU0_PRU_R30_13/PR1_PRU0_PRU_R31_13/GPIO2_31 G16 MMC0_CMD 10
G1 MMC0_DAT0/GPMC_A23/UART5_RTSN/UART3_TXD/UART1_RIN/PR1_PRU0_PRU_R30_11/PR1_PRU0_PRU_R31_11/GPIO2_29 G15 MMC0_DAT0 10
24.576MHZ C159 Oscillator can be disabled
7 DDR_ODT G2 DDR_ODT MMC0_DAT1/GPMC_A22/UART5_CTSN/UART3_RXD/UART1_DTRN/PR1_PRU0_PRU_R30_10/PR1_PRU0_PRU_R31_10/GPIO2_28 F18 MMC0_DAT1 10
0.1uf,6.3V via SW for power down
7 DDR_RESETn J3 DDR_RESETN MMC0_DAT2/GPMC_A21/UART4_RTSN/TIMER6/UART1_DSRN/PR1_PRU0_PRU_R30_9/PR1_PRU0_PRU_R31_9/GPIO2_27 F17 MMC0_DAT2 10 modes or if GPIO3_21
DDR_VTP MMC0_DAT3/GPMC_A20/UART4_CTSN/TIMER5/UART1_DCDN/PR1_PRU0_PRU_R30_8/PR1_PRU0_PRU_R31_8/GPIO2_26 MMC0_DAT3 10
needs to be used.
J4 DGND DGND
DDR_VREF VREFSSTL
DDR_VTP

AM3358BZCZ100
C28
VDD_3V3A
C158
0.1uf,6.3V
R22

DGND
VDD_3V3B VDD_3V3B
U3 0.1uf,6.3V

5
DGND VDD_3V3B
49.9,1%

R23 P2

VCC
JTAG_TMS 1 2 JTAG_TRSTn
JTAG_TDI 3 TMS TRSTn 4 R24 2 4 R162
5 TDI TDIS 6 4.75K,1% A Y 0,1% eMMC_RSTn 8

GND
JTAG_TDO 7 TVDD NC 8 SN74LVC1G06DCK

NC
DGND 4.75K,1% JTAG_TCK 9 TDO GND1 10 DGND
11 TCKRTN GND2 12
JTAG_EMU0 TCK GND3 JTAG_EMU1

3
13 14
SYS_RESETn 15 EMU0 EMU1 16
XDMA_EVENT_INTR0 17 SRST GND4 18
EMU2 EMU3 CLKOUT2 3,10
19 20 DGND
4,10 MMC0_CD EMU4 GND5
CTI JTAG,DNI R25
C30 4.75K,1%
C29
0.1uf,6.3V
0.1uf,6.3V

DGND DGND DGND

DGND

A A

Title
BeagleBone Green Processor 1 of 3 and JTAG
Size Document Number Rev
C v1
Date: Thursday, June 04, 2015 Sheet 3 of 10
5 4 3 2 1
 5 4 3 2 1

VDD_3V3B VRTC
D D

R163
4.75K,1%
R26
4.75K,1%

AIN7 U5B
K18
C6 GMII1_TXCLK/UART2_RXD/RGMII1_TCLK/MMC0_DAT7/MMC1_DAT0/UART1_DCDN/MCASP0_ACLKX/GPIO3_9 K17 MII1_TXCLK 9
VDD_ADC
2 PMIC_POWR_EN C5 PMIC_POWER_EN 1.8V GMII1_TXD0/RMII1_TXD0/RGMII1_TD0/MCASP1_AXR2/MCASP1_ACLKR/EQEP0B_IN/MMC1_CLK/GPIO0_28 K16 MII1_TXD0 9
R164
2 WAKEUP EXT_WAKEUP 1.8V GMII1_TXD1/RMII1_TXD1/RGMII1_TD1/MCASP1_FSR/MCASP1_AXR1/EQEP0A_IN/MMC1_CMD/GPIO0_21 K15 MII1_TXD1 9
4.75K,1%
SubArctic AM335X GMII1_TXD2/DCAN0_RX/RGMII1_TD2/UART4_TXD/MCASP1_AXR0/MMC2_DAT2/MCASP0_AHCLKX/GPIO0_17 J18 MII1_TXD2
MII1_TXD3
9
9
B6 GMII1_TXD3/DCAN0_TX/RGMII1_TD3/UART4_RXD/MCASP1_FSX/MMC2_DAT1/MCASP0_FSR/GPIO0_16 J16
10 AIN0 C7 AIN0 GMII1_TXEN/RMII1_TXEN/RGMII1_TCTL/TIMER4/MCASP1_AXR0/EQEP0_INDEX/MMC2_CMD/GPIO3_3 H17 MII1_TXEN 9
R27
10 AIN1 B7 AIN1 GMII1_CRS/RMII1_CRS_DV/SPI1_D0/I2C1_SDA/MCASP1_ACLKX/UART5_CTSN/UART2_RXD/GPIO3_1 H16 MII1_CRS_DV 9
0,1% DGND
10 AIN2 A7 AIN2 15mm x 15mm GMII1_COL/RMII2_REFCLK/SPI1_SCLK/UART5_RXD/MCASP1_AXR2/MMC2_DAT3/MCASP0_AXR2/GPIO3_0 MII1_COL 9
10 AIN3 C8 AIN3 Package L18
10 AIN4 B8 AIN4 GMII1_RXCLK/UART2_TXD/RGMII1_RCLK/MMC0_DAT6/MMC1_DAT1/UART1_DSRN/MCASP0_FSX/GPIO3_10 M16 MII1_RXCLK 9
10 AIN5 A8 AIN5 GMII1_RXD0/RMII1_RXD0/RGMII1_RD0/MCASP1_AHCLKX/MCASP1_AHCLKR/MCASP1_ACLKR/MCASP0_AXR3/GPIO2_21 L15 MII1_RXD0 9
10 AIN6 C9 AIN6 GMII1_RXD1/RMII1_RXD1/RGMII1_RD1/MCASP1_AXR3/MCASP1_FSR/EQEP0_STROBE/MMC2_CLK/GPIO2_20 L16 MII1_RXD1 9
C33
AIN7 GMII1_RXD2/UART3_TXD/RGMII1_RD2/MMC0_DAT4/MMC1_DAT3/UART1_RIN/MCASP0_AXR1/GPIO2_19 L17 MII1_RXD2 9
C31 C32
VREFP_ADC GMII1_RXD3/UART3_RXD/RGMII1_RD3/MMC0_DAT5/MMC1_DAT2/UART1_DTRN/MCASP0_AXR0/GPIO2_18 MII1_RXD3 9
0.1uf,6.3V B9 J15
VREFN_ADC A9 VREFP GMII1_RXERR/RMII1_RXERR/SPI1_D1/I2C1_SCL/MCASP1_FSX/UART5_RTSN/UART2_TXD/GPIO3_2 J17 MII1_RXERR 9
0.1uf,6.3V 0.001uf,50V
VREFN GMII1_RXDV/LCD_MEMORY_CLK/RGMII1_RCTL/UART5_TXD/MCASP1_ACLKX/MMC2_DAT0/MCASP0_ACLKR/GPIO3_4 MII1_RXDV 9
A17 H18 U5_H18 R28 33
10 UART2_RXD SPI0_SCLK/UART2_RXD/I2C2_SDA/EHRPWM0A/PR1_UART0_CTS_N/PR1_EDIO_SOF/EMU2/GPIO0_2 RMII1_REFCLK/XDMA_EVENT_INTR2/SPI1_CS0/UART5_TXD/MCASP1_AXR3/MMC0_POW/MCASP1_AHCLKX/GPIO0_29 MII1_REFCLK 9
B17 M18
10 UART2_TXD SPI0_D0/UART2_TXD/I2C2_SCL/EHRPWM0B/PR1_UART0_RTS_N/PR1_EDIO_LATCH_IN/EMU3/GPIO0_3 MDIO_CLK/TIMER5/UART5_TXD/UART3_RTSN/MMC0_SDWP/MMC1_CLK/MMC2_CLK/GPIO0_1 MDIO_CLK 9
GNDA_ADC GNDA_ADC B16 M17
10 I2C1_SDA A16 SPI0_D1/MMC1_SDWP/I2C1_SDA/EHRPWM0_TRIPZONE_INPUT/PR1_UART0_RXD/PR1_EDIO_DATA_IN0/PR1_EDIO_DATA_OUT0/GPIO0_4 MDIO_DATA/TIMER6/UART5_RXD/UART3_CTSN/MMC0_SDCD/MMC1_CMD/MMC2_CMD/GPIO0_0 MDIO_DATA 9
10 I2C1_SCL SPI0_CS0/MMC2_SDWP/I2C1_SCL/EHRPWM0_SYNCI_O/PR1_UART0_TXD/PR1_EDIO_DATA_IN1/PR1_EDIO_DATA_OUT1/GPIO0_5
C15
J1 3,10
C155 MMC0_CD SPI0_CS1/UART3_RXD/ECAP1_IN_PWM1_OUT/MMC0_POW/XDMA_EVENT_INTR2/MMC0_SDCD/EMU4/GPIO0_6 R1
UART0_TX LCD_DATA0/GPMC_A0//EHRPWM2A//PR1_PRU1_PRU_R30_0/PR1_PRU1_PRU_R31_0/GPIO2_6 LCD_DATA0 6,10
0.1uf,6.3V E16 R2
Mark pin 1 U15 UART0_RX E15 UART0_TXD/SPI1_CS1/DCAN0_RX/I2C2_SCL/ECAP1_IN_PWM1_OUT/PR1_PRU1_PRU_R30_15/PR1_PRU1_PRU_R31_15/GPIO1_11 LCD_DATA1/GPMC_A1//EHRPWM2B//PR1_PRU1_PRU_R30_1/PR1_PRU1_PRU_R31_1/GPIO2_7 R3
LCD_DATA1
LCD_DATA2
6,10
6,10
UART0_RXD/SPI1_CS0/DCAN0_TX/I2C2_SDA/ECAP2_IN_PWM2_OUT/PR1_PRU1_PRU_R30_14/PR1_PRU1_PRU_R31_14/GPIO1_10 LCD_DATA2/GPMC_A2//EHRPWM2_TRIPZONE_INPUT//PR1_PRU1_PRU_R30_2/PR1_PRU1_PRU_R31_2/GPIO2_8
clearly 1
2
1
2 1OE VCC
8
7
VDD_3V3B
TP9
E18
E17 UART0_CTSN/UART4_RXD/DCAN1_TX/I2C1_SDA/SPI1_D0/TIMER7/PR1_EDC_SYNC0_OUT/GPIO1_8 LCD_DATA3/GPMC_A3//EHRPWM2_SYNCI_O//PR1_PRU1_PRU_R30_3/PR1_PRU1_PRU_R31_3/GPIO2_9
R4
T1
LCD_DATA3 6,10
1A 2OE UART0_RTSN/UART4_TXD/DCAN1_RX/I2C1_SCL/SPI1_D1/SPI1_CS0/PR1_EDC_SYNC1_OUT/GPIO1_9 LCD_DATA4/GPMC_A4//EQEP2A_IN//PR1_PRU1_PRU_R30_4/PR1_PRU1_PRU_R31_4/GPIO2_10 LCD_DATA4 6,10
3 3 6 TESTPT1 T2
B_UART0_RX 2Y 1Y LCD_DATA5/GPMC_A5//EQEP2B_IN//PR1_PRU1_PRU_R30_5/PR1_PRU1_PRU_R31_5/GPIO2_11 LCD_DATA5 6,10
4 4 5 T3
5 B_UART0_TX GND 2A LCD_DATA6/GPMC_A6/PR1_EDIO_DATA_IN6/EQEP2_INDEX/PR1_EDIO_DATA_OUT6/PR1_PRU1_PRU_R30_6/PR1_PRU1_PRU_R31_6/GPIO2_12 T4 LCD_DATA6 6,10
6 LCD_DATA7/GPMC_A7/PR1_EDIO_DATA_IN7/EQEP2_STROBE/PR1_EDIO_DATA_OUT7/PR1_PRU1_PRU_R30_7/PR1_PRU1_PRU_R31_7/GPIO2_13 U1 LCD_DATA7 6,10
C SN74LVC2G241
LCD_DATA8/GPMC_A12/EHRPWM1_TRIPZONE_INPUT/MCASP0_ACLKX/UART5_TXD/PR1_MII0_RXD3/UART2_CTSN/GPIO2_14 LCD_DATA8 6,10 C
D15 U2
R165

10 UART1_TXD UART1_TXD/MMC2_SDWP/DCAN1_RX/I2C1_SCL//PR1_UART0_TXD/PR1_PRU0_PRU_R31_16/GPIO0_15 LCD_DATA9/GPMC_A13/EHRPWM1_SYNCI_O/MCASP0_FSX/UART5_RXD/PR1_MII0_RXD2/UART2_RTSN/GPIO2_15 LCD_DATA9 6,10

D16 U3
POWERDOWN
DGND
10 UART1_RXD D18 UART1_RXD/MMC1_SDWP/DCAN1_TX/I2C1_SDA//PR1_UART0_RXD/PR1_PRU1_PRU_R31_16/GPIO0_14 LCD_DATA10/GPMC_A14/EHRPWM1A/MCASP0_AXR0//PR1_MII0_RXD1/UART3_CTSN/GPIO2_16 U4 LCD_DATA10 6,10
10 I2C2_SDA UART1_CTSN/TIMER6/DCAN0_TX/I2C2_SDA/SPI1_CS0/PR1_UART0_CTS_N/PR1_EDC_LATCH0_IN/GPIO0_12 LCD_DATA11/GPMC_A15/EHRPWM1B/MCASP0_AHCLKR/MCASP0_AXR2/PR1_MII0_RXD0/UART3_RTSN/GPIO2_17 LCD_DATA11 6,10
HEADER 6 DGND ISOLATION 10 I2C2_SCL
D17
UART1_RTSN/TIMER5/DCAN0_RX/I2C2_SCL/SPI1_CS1/PR1_UART0_RTS_N/PR1_EDC_LATCH1_IN/GPIO0_13 LCD_DATA12/GPMC_A16/EQEP1A_IN/MCASP0_ACLKR/MCASP0_AXR2/PR1_MII0_RXLINK/UART4_CTSN/GPIO0_8
V2
V3 LCD_DATA12 6,10
LCD_DATA13/GPMC_A17/EQEP1B_IN/MCASP0_FSR/MCASP0_AXR3/PR1_MII0_RXER/UART4_RTSN/GPIO0_9 LCD_DATA13 6,10
C16 V4
UART0 Serial
100K,1%

2,10 I2C0_SCL C17 I2C0_SCL/TIMER7/UART2_RTSN/ECAP1_IN_PWM1_OUT////GPIO3_6 LCD_DATA14/GPMC_A18/EQEP1_INDEX/MCASP0_AXR1/UART5_RXD/PR1_MII_MR0_CLK/UART5_CTSN/GPIO0_10 T5 LCD_DATA14 6,10

2,10 I2C0_SDA I2C0_SDA/TIMER4/UART2_CTSN/ECAP2_IN_PWM2_OUT////GPIO3_5 LCD_DATA15/GPMC_A19/EQEP1_STROBE/MCASP0_AHCLKX/MCASP0_AXR3/PR1_MII0_RXDV/UART5_RTSN/GPIO0_11 LCD_DATA15 6,10
Port
USB to USB0_DP N17 V5 LCDPCLK R45 22
USB0_DM USB0_DP LCD_PCLK/GPMC_A10//PR1_EDIO_DATA_IN4/PR1_EDIO_DATA_OUT4/PR1_PRU1_PRU_R30_10/PR1_PRU1_PRU_R31_10/GPIO2_24 LCD_PCLK 10
TTL Serial DGND
N18
M15 USB0_DM LCD_VSYNC/GPMC_A8//PR1_EDIO_DATA_IN2/PR1_EDIO_DATA_OUT2/PR1_PRU1_PRU_R30_8/PR1_PRU1_PRU_R31_8/GPIO2_22
U5
R5
LCDVSYNC
LCDVHYNC
R46
R47
0
0
LCD_VSYNC 10
Cable USB0_ID P16 USB0_CE
USB0_ID
LCD_HSYNC/GPMC_A9//PR1_EDIO_DATA_IN3/PR1_EDIO_DATA_OUT3/PR1_PRU1_PRU_R30_9/PR1_PRU1_PRU_R31_9/GPIO2_23
LCD_AC_BIAS_EN/GPMC_A11//PR1_EDIO_DATA_IN5/PR1_EDIO_DATA_OUT5/PR1_PRU1_PRU_R30_11/PR1_PRU1_PRU_R31_11/GPIO2_25
R6 LCDDE R48 0
LCD_HSYNC
LCD_DE 10
10

3.3V R159
F16
P15 USB0_DRVVBUS/GPIO0_18
USB_DC USB0_VBUS
0,1% A14
USB1_DP R17 MCASP0_AHCLKX/EQEP0_STROBE/MCASP0_AXR3/MCASP1_AXR1/EMU4/PR1_PRU0_PRU_R30_7/PR1_PRU0_PRU_R31_7/GPIO3_21 A13 GPIO3_21 3,10
USB1_DM R18 USB1_DP MCASP0_ACLKX/EHRPWM0A//SPI1_SCLK/MMC0_SDCD/PR1_PRU0_PRU_R30_0/PR1_PRU0_PRU_R31_0/GPIO3_14 B13 SPI1_SCLK 10
P18 USB1_DM MCASP0_FSX/EHRPWM0B//SPI1_D0/MMC1_SDCD/PR1_PRU0_PRU_R30_1/PR1_PRU0_PRU_R31_1/GPIO3_15 D12 SPI1_D0 10
USB1_CE MCASP0_AXR0/EHRPWM0_TRIPZONE_INPUT//SPI1_D1/MMC2_SDCD/PR1_PRU0_PRU_R30_2/PR1_PRU0_PRU_R31_2/GPIO3_16 SPI1_D1 10
DGND R49 0,1% USB1_ID P17 C12
USB1_DRVVBUS F15 USB1_ID MCASP0_AHCLKR/EHRPWM0_SYNCI_O/MCASP0_AXR2/SPI1_CS0/ECAP2_IN_PWM2_OUT/PR1_PRU0_PRU_R30_3/PR1_PRU0_PRU_R31_3/GPIO3_17 B12 SPI1_CS0 10
USB1_VBUS T18 USB1_DRVVBUS/GPIO3_13 MCASP0_ACLKR/EQEP0A_IN/MCASP0_AXR2/MCASP1_ACLKX/MMC0_SDWP/PR1_PRU0_PRU_R30_4/PR1_PRU0_PRU_R31_4/GPIO3_18 C13
USB1_VBUS MCASP0_FSR/EQEP0B_IN/MCASP0_AXR3/MCASP1_FSX/EMU2/PR1_PRU0_PRU_R30_5/PR1_PRU0_PRU_R31_5/GPIO3_19 D13 GPIO3_19 10
MCASP0_AXR1/EQEP0_INDEX//MCASP1_AXR0/EMU3/PR1_PRU0_PRU_R30_6/PR1_PRU0_PRU_R31_6/GPIO3_20 GPIO3_20 3

R50 GPIO0_7SRC C18

10 GPIO0_7 ECAP0_IN_PWM0_OUT/UART3_TXD/SPI1_CS1/PR1_ECAP0_ECAP_CAPIN_APWM_O/SPI1_SCLK/MMC0_SDWP/XDMA_EVENT_INTR2/GPIO0_7
0,1%
AM3358BZCZ100

R51 GPIO3_18
0,1%

B B

VDD_3V3A

USB_DC
FB8

8
R52 1 2
0.1R,0805 P3

G4

G5
10K,1% DIP USB A TYPE FMAL 5
SYS_5V U8 FB7 USB0_ID 4 G1
2 8 USB1_PWR 1 2 VBUS 1 VBUS 5 USB0_DP 3 ID
IN1 OUT1 USB1_DM SHIEL D USB0_DM D+
3 7 150OHM800mA 2 D- 2
USB1_DRVVBUS 4 IN2 OUT2 6 USB1_DP 3 D+ 1 D-
1 EN OUT3 5 4 GND 6 VB

G2

G3
C34 + GND OC 9 U9
SHIEL D
U10
R53 PAD 1 6 1 6 DGND P4 SMD Micro USB-B-without POST-W/P
D+ VBUS D+ VBUS

6
100uF,6.3V 10K,1% TPS2051 (DGN) C35
DGND 2 DGND 2
DGND D- 5 0.1uf,6.3V D- 5 C36
DGND 3 NC 3 NC
DGND ID 4 ID 4 0.1uf,6.3V
GND GND

USB PC
TPD4S012 TPD4S012
DGND

CONNECTOR
USB1_OCn 3
DGND

USB HOST

A A

Title
BeagleBone Green Processor 2 of 3, USB, and Serial
Size Document Number Rev
C v1
Date: Thursday, June 04, 2015 Sheet 4 of 10
5 4 3 2 1
 5 4 3 2 1

VDD_3V3A

VDD_CORE

C37 C38
VDD_CORE 0.1uf,6.3V 0.1uf,6.3V
DGND
C39 C40 C41 C42 C43 C44 C45 C46 C47 C48 C49 C50 C51 C52 C53 C54 C55 U5C
F6 P7 C56 C57
10uF,10V F7 VDD_CORE1 VDDSHV11 P8 0.1uf,6.3V 0.1uf,6.3V
10uF,10V

10uF,10V
0.1uf,6.3V

0.1uf,6.3V

0.1uf,6.3V

0.1uf,6.3V

0.1uf,6.3V

0.1uf,6.3V

0.1uf,6.3V

0.1uf,6.3V

0.1uf,6.3V

0.1uf,6.3V

0.1uf,6.3V

0.1uf,6.3V

0.1uf,6.3V

0.1uf,6.3V
D
G6 VDD_CORE2 VDDSHV12 D
G7 VDD_CORE3
G10 VDD_CORE4 P10
H11 VDD_CORE5 VDDSHV21 P11
J12 VDD_CORE6 VDDSHV22
DGND K6 VDD_CORE7 C58 C59
K8 VDD_CORE8 P12 0.1uf,6.3V 0.1uf,6.3V
K12 VDD_CORE9 VDDSHV31 P13
VDD_CORE10 VDDSHV32 DGND
L6
L7 VDD_CORE11
L8 VDD_CORE12 C60 C61
VDD_MPU L9 VDD_CORE13 H14 0.1uf,6.3V 0.1uf,6.3V
M11 VDD_CORE14 VDDSHV41 J14
M13 VDD_CORE15 SubArctic AM335X VDDSHV42
N8 VDD_CORE16
N9 VDD_CORE17
C62 C63 C64 C65 N12 VDD_CORE18 K14
VDD_MPU N13 VDD_CORE19 VDDSHV51 L14
10uF,10V 0.1uf,6.3V 0.1uf,6.3V 0.1uf,6.3V VDD_CORE20 VDDSHV52 C66 C67
F10
F11 VDD_MPU1 15mm x 15mm 0.1uf,6.3V 0.1uf,6.3V
F12 VDD_MPU2 Package E10
VDD_MPU3 VDDSHV61 DGND
F13 E11
G13 VDD_MPU4 VDDSHV62 E12 C77
DGND H13 VDD_MPU5 VDDSHV63 E13 C68 C69 C70 C71 C72 C73 C74 C75 C76
VDD_PLL J13 VDD_MPU6 VDDSHV64 F14 0.1uf,6.3V 0.1uf,6.3V 0.1uf,6.3V 0.1uf,6.3V0.1uf,6.3V0.1uf,6.3V0.1uf,6.3V 0.1uf,6.3V 0.1uf,6.3V10uF,10V
TP2 VDD_MPUON A2 VDD_MPU7 VDDSHV65 G14
TESTPT1 VDD_MPU_MON VDDSHV66 N5
FB1 CAP_VDD_SRAM_CORE D9 VDDSHV67 P5
1 2 H15 CAP_VDD_SRAM_CORE VDDSHV68 P6
VDD_1V8 VDDS_PLL_MPU VDDSHV69
150OHM800mA D10 VDDS
CAP_VDD_SRAM_MPU D11 VDDS_SRAM_MPU_BB
CAP_VBB_MPU C10 CAP_VDD_SRAM_MPU E6
C78 C79 E9 CAP_VBB_MPU VDDS1 E14
VDD_1V8 VDDS_SRAM_CORE_BG VDDS2
0.1uf,6.3V 0.1uf,6.3V F9 C80 C81 C82 C83 C84 C85
VDDS3 K13
N15 VDDS4 N6 0.1uf,6.3V 0.1uf,6.3V 0.1uf,6.3V 0.1uf,6.3V 0.1uf,6.3V 0.1uf,6.3V
C VDD_3V3A C
DGND DGND N16 VDDA3P3V_USB0 VDDS5 P9
VDD_1V8 VDDA1P8V_USB0 VDDS6 P14
C89

C90

C91
C86 C87 C88 M14 VDDS7
0.1uf,6.3V VSSA_USB2 VDD_ADC DGND
0.1uf,6.3V 0.1uf,6.3V R15 FB2
1uF,10V

1uF,10V

1uF,10V

R16 VDDA3P3V_USB1 D8 1 2
VDDA1P8V_USB1 VDDA_ADC VDD_1V8
FB3
N14 E8 150OHM800mA 1 2
VSSA_USB1 VSSA_ADC
M5 150OHM800mA
DGND E7 VPP R10
VDD_PLL VDDS_PLL_DDR VDDS_PLL_CORE_LCD VDD_PLL
DGND GNDA_ADC DGND
C92 E5
F5 VDDS_DDR1 D7 C93 C94
VDDS_DDR2 VDDS_RTC VDD_RTC VRTC
0.1uf,6.3V G5 D6 0.1uf,6.3V 0.1uf,6.3V
H5 VDDS_DDR3 CAP_VDD_RTC B4 ENZ_KALDO_1P8V
J5 VDDS_DDR4 ENZ_KALDO_1P8V
K5 VDDS_DDR5 GNDA_ADC DGND
VDDS_DDR DGND L5 VDDS_DDR6 R11
VDDS_DDR7 VDDS_OSC VDD_PLL
TP3

VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
A3 TESTOUT
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
TESTOUT
C95 C96 C103 TESTPT1 R54 C104 C105 C106
C97 C98 C99 C100 C101 C102 AM3358BZCZ100
A1
A18
F8
G8
G9
G11
G12
H6
H7
H8
H9
H10
H12
J6
J7
J8
J9
J10
J11
K7
K9
K10
K11
L10
L11
L12
L13
M6
M7
M8
M9
M10
M12
N7
N10
N11
V1
V18
10uF,10V 10uF,10V 0.1uf,6.3V 0.1uf,6.3V 0.1uf,6.3V 0.1uf,6.3V 0.1uf,6.3V 0.1uf,6.3V 0.1uf,6.3V 1uF,10V 0.1uf,6.3V 1uF,10V

10K,1%

DGND DGND

DGND DGND

B B

A A

Title
BeagleBone Green Processr 3 of 3
Size Document Number Rev
C v1
Date: Thursday, June 04, 2015 Sheet 5 of 10
5 4 3 2 1
 5 4 3 2 1

SYS_5V
VDD_3V3A

R55
R56
R57
R58
R59
R60
R61
R62
R63
R64
R65
R66
R67
R68
R69
R70

LEDCA

LEDDA
LEDBA
R71
R74 4.75K,5%
100K,1%,DNI

100K,1%,DNI
100K,1%,DNI
100K,1%,DNI
100K,1%,DNI
100K,1%,DNI
100K,1%,DNI
100K,1%,DNI
100K,1%,DNI

100K,1%,DNI
100K,1%,DNI
R72 R73 4.75K,5%
S2 4.75K,5% 4.75K,5%
100K,1%

100K,1%
100K,1%
100K,1%
100K,1%
R75 100,1% SMD Button Top
D D

LEDAA
1 2

3 4 D2 LTST-C191TBKT D3 LTST-C191TBKT D4 LTST-C191TBKT D5 LTST-C191TBKT

SYS_BOOT0 LCD_DATA0 4,10 USR0 USR1 USR2

LEDDC
SYS_BOOT1 LCD_DATA1 4,10 uSD BOOT USR3

LEDCC
LEDAC

LEDBC
SYS_BOOT2 LCD_DATA2 4,10
SYS_BOOT3 LCD_DATA3 4,10
SYS_BOOT4 DGND
LCD_DATA4 4,10
SYS_BOOT5 LCD_DATA5 4,10 User LED's

3
SYS_BOOT6 LCD_DATA6 4,10

10k

10k

10k
SYS_BOOT7 Q1B Q2A Q2B
LCD_DATA7 4,10

10k
SYS_BOOT8 Q1A 5 2 5
LCD_DATA8 4,10 DMC56404 DMC56404 DMC56404
SYS_BOOT9 2
LCD_DATA9 4,10 3 USR0 DMC56404

47k

47k

47k
SYS_BOOT10 LCD_DATA10 4,10

47k
SYS_BOOT11 LCD_DATA11 4,10
SYS_BOOT12 R76 R77 R78
LCD_DATA12 4,10

4
SYS_BOOT13 100K,1% 100K,1% 100K,1% R79
LCD_DATA13 4,10

1
SYS_BOOT14 100K,1%
LCD_DATA14 4,10
SYS_BOOT15 LCD_DATA15 4,10
DGND DGND DGND

Boot Configuration DGND DGND

R80
R81
R82
R83
R84
R85
R86
R87
R88
R89
R90
R91
R92
R93
R94
R95

DGND DGND DGND

C 3 USR1 C
3 USR2
3 USR3
100K,1%,DNI

100K,1%,DNI
100K,1%,DNI
100K,1%,DNI
100K,1%,DNI
100K,1%

100K,1%
100K,1%
100K,1%
100K,1%
100K,1%
100K,1%
100K,1%
100K,1%

100K,1%
100K,1%

DGND

B B

A A

Title
BeagleBone Green LED, Configuration, and Reset
Size Document Number Rev
B v1
Date: Thursday, June 04, 2015 Sheet 6 of 10
5 4 3 2 1
 5 4 3 2 1

DGND R96
10K,1%
VDDS_DDR R97
1.5K,1% U12 DDR3L SDRAM
T2
3 DDR_RESETn RESET# DDR_A[15..0]
DDR_A0 DDR_A[15..0] 3
J7 N3
3 DDR_CLK CK A0 DDR_A1
K7 P7
3 DDR_CLKn CKn A1 DDR_A2
K9 P3
3 DDR_CKE CKE A2 DDR_A3
L2 N2
3 DDR_CSn CSn A3 DDR_A4
J3 P8
D 3 DDR_RASn RASn A4 DDR_A5 D
K3 P2
3 DDR_CASn CASn A5 DDR_A6
L3 R8
3 DDR_WEn WEn A6 DDR_A7
R2
3 DDR_D[15..0] DDR_D0 A7 DDR_A8
E3 T8
DDR_D1 F7 DQ0 A8 R3 DDR_A9
DDR_D2 F2 DQ1 A9 L7 DDR_A10
DDR_D3 F8 DQ2 A10 R7 DDR_A11
DDR_D4 H3 DQ3 A11 N7 DDR_A12
DDR_D5 H8 DQ4 A12 T3 DDR_A13
DDR_D6 G2 DQ5 A13 T7 DDR_A14
DDR_D7 H7 DQ6 A14 M7 DDR_A15 DDR_BA[2..0]
DDR_D8 DQ7 A15 DDR_BA0 DDR_BA[2..0] 3
D7 M2
DDR_D9 C3 DQ8 BA0 N8 DDR_BA1
DDR_D10 C8 DQ9 BA1 M3 DDR_BA2
DDR_D11 C2 DQ10 BA2
DDR_D12 A7 DQ11 K1 DDR_ODT
DDR_D13 DQ12 ODT DDR_ODT 3
A2
DDR_D14 B8 DQ13 B2
DDR_D15 DQ14 VDD1 VDDS_DDR
A3 G7
DQ15 VDD2 R9
C7 VDD3 K2
3 DDR_DQS1 UDQS VDD4
B7 K8
3 DDR_DQSN1 UDQSn VDD5 N1
F3 VDD6 N9
C 3 DDR_DQS0 LDQS VDD7 C
G3 R1
3 DDR_DQSN0 LDQSn VDD8 D9
D3 VDD9
3 DDR_DQM1 UDM
E7 A9
3 DDR_DQM0 LDM VSS1 B3
VSS2 VDDS_DDR
E1
A1 VSS3 G8
VDDS_DDR VDDQ1 VSS4
A8 J2
C1 VDDQ2 VSS5 J8
C9 VDDQ3 VSS6 M1 C107 C108 C109 C110 C111 C112 C113 C114 C115 C116 C117
D2 VDDQ4 VSS7 M9
E9 VDDQ5 VSS8 P1

0.1uf,6.3V

0.1uf,6.3V

0.1uf,6.3V

0.1uf,6.3V

0.1uf,6.3V

0.1uf,6.3V

0.1uf,6.3V

0.1uf,6.3V

0.1uf,6.3V

0.1uf,6.3V

0.1uf,6.3V
F1 VDDQ7 VSS9 P9
H2 VDDQ8 VSS10 T1
H9 VDDQ9 VSS11 T9
VDDQ10 VSS12
J1 B1
J9 NC1 VSSQ1 B9 DGND DGND
L1 NC2 VSSQ2 D1
NC3 VSSQ3 VDDS_DDR
L9 D8
DDR_VREF NC4 VSSQ4 E2
VSSQ5 E8
VSSQ6 F9
R98 M8 VSSQ7 G1 C118 C119 C120 C121 C122
B VDDS_DDR B
10K,1% VREF_CA VSSQ8 G9
VSSQ9

10uF,10V

10uF,10V
0.1uf,6.3V

0.1uf,6.3V

0.1uf,6.3V
H1 L8 ZQ R99
R100 VREF_DQ ZQ 240
10K,1% C124
C123
0.1uf,6.3V MT41K256M16HA -125:E DGND
0.001uf,50V D2516EC4BXGGB
4Gb DDR3 DGND

DGND DGND

A A

Title
BeagleBone Green DDR3 Memory
Size Document Number Rev
B v1
Date: Thursday, June 04, 2015 Sheet 7 of 10
5 4 3 2 1
 5 4 3 2 1

VDD_3V3B

VDD_3V3B

eMMC_VCCI

R101
R102
R103
R104
R105
R106
R107
R108
R109
R110
R111
C125
VDD_3V3B
D 2.2uF,6.3V D
DGND

10K,1%
10K,1%
10K,1%
10K,1%
10K,1%
10K,1%
10K,1%
10K,1%
10K,1%
10K,1%
10K,1%

H10
J10
DGND

M4

G5
N4
C6

N2

C4

N5

C2
K9

E6
P3
P5

P6
P4

E7

K8
F5
U13
A3 E1 C126 C127 C128 C129 C130

VCCI
VCC0
VCC1
VCC2
VCC3
VCCQ1
VCCQ2
VCCQ3
VCCQ4
VCCQ5

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSS1
VSS2
VSS3
VSS4
VSS5
3,10 MMC1_DAT0 DAT0 NC1
A4 E2
3,10 MMC1_DAT1 DAT1 NC2
A5 E3 10uF,10V 0.1uf,6.3V 0.1uf,6.3V 0.1uf,6.3V 0.1uf,6.3V
3,10 MMC1_DAT2 DAT2 NC3
B2 A2
3,10 MMC1_DAT3 DAT3 NC4
B3 A6
3,10 MMC1_DAT4 DAT4 NC5
B4 A7
3,10 MMC1_DAT5 DAT5 NC6
B5 A8
3,10 MMC1_DAT6 DAT6 NC7
B6 E8 DGND
3,10 MMC1_DAT7 DAT7 NC8
M5 E9
3,10 MMC1_CMD CMD NC9
M6 E10
3,10 MMC1_CLK CLK NC10
K5 A1
3 eMMC_RSTn RST NC11 E12
K6 NC12 E13
N6 NC123 NC13 E14
E5 NC122 NC14 F1
N9 NC121 NC15 F2
N8 NC120 NC16 F3
N7 NC119 NC17 A9
J12 NC118 NC18 B14
P14 NC117 NC19 C14
C
N3 NC116 NC20 C13
C

P10 NC115 NC21 C12

N1 NC114 NC22 C11
M14 NC113 NC23 F10
M13 NC112 NC24 C10
M12 NC111 NC25 F12
M11 NC110 NC26 F13
M10 NC109 NC27 F14
M9 NC108 NC28 C9
M8 NC107 NC29 C8
M7 NC106 NC30 C7
P11 NC105 NC31 C5
P12 NC104 NC32 C3
P13 NC103 NC33 C1
M3 NC102 NC34 D14
M2 NC101 NC35 D13
M1 NC100 NC36 D12
L14 NC99 NC37 D4
L13 NC98 NC38 D3
L12 NC97 NC39 G12
A10 NC96 NC40 G13
A11 NC95 NC41 G14
A12 NC94 NC42 H1
A13 NC93 NC43 H2
B B
A14 NC92 NC44 H3
B1 NC91 NC45 D2
B7 NC90 NC46 H5
G1 NC89 NC47 D1
L3 NC88 NC48 B13
L2 NC87 NC49 B12
L1 NC86 NC50 B11
K14 NC85 NC51 B10
K13 NC84 NC52 B9
K12 NC83 NC53 H12
NC82 NC54
NC81
NC80
NC79
NC78
NC77
NC76
NC75
NC74
NC73
NC72
NC71
NC70
NC69
NC68
NC67
NC66
NC65
NC64
NC63
NC62
NC61
NC60
NC59
NC58
NC57
NC56
NC55
MEM_MNAND_4GB MTFC4GACAAAM-1M WT
G2
K10
G3
G10
K7
N11
N10
B8
K3
K2
K1
J14
J13
N12
N13
N14
P1
P2
P7
P9
P8
J5
J3
J2
J1
H14
H13
KE4CN2H5A-A58

A A

Title
BeagleBone Green 4G eMMC
Size Document Number Rev
B v1
Date: Thursday, June 04, 2015 Sheet 8 of 10
5 4 3 2 1
 5 4 3 2 1

REFCLKO
VDD_3V3B
RXD2/RMIISEL

RXD3/PHYAD2
VDD_PHYA
RXER/PHYAD0

1.5K,1%R113

R114

R112
D D

R115

R116

R118
C131 C132 C133

R117

1.5K,1%

1.5K,1%
0.1uf,6.3V 0.1uf,6.3V 10uF,10V

10K,1%

10K,1%

10K,1%
MODE2

10K,1%
DGND DGND DGND
VDD_3V3B RXD1/MODE1

1 2 PHY_VDDCR VDD_PHYA RXD0/MODE0

150OHM800mA FB4
C135 C136 C134
0.1uf,6.3V
470pF,6.3V 1uF,10V DGND

R119

R120

R121

R122

R123
C162
33pF,4 EMI DGND
ETHERNET

49.9,1%

49.9,1%

49.9,1%

49.9,1%
CONNECTOR

12

27
DGND

6
DGND
P5

1.5K,1%

VDDCR
VDD2A
VDD1A
VDDIO
R124 10,1%,DNI 5
4 MII1_REFCLK TCT
29 TXP 3
16 TXP 28 TXN 6 TD+
4 MDIO_DATA MDIO TXN TD-
17 1 7
C 4 MDIO_CLK MDC RD+ NC C
R125 100,1% RXD3/PHYAD2 8 2
4 MII1_RXD3 RXD3/PHYAD2 RD-
R126 100,1% RXD2/RMIISEL 9 31 RXP 4 8
4 MII1_RXD2 RXD2/RMIISEL RXP RCT GND
R127 100,1% RXD1/MODE1 10 30 RXN
4 MII1_RXD1 RXD1/MODE1 RXN YEL_C
R128 100,1% RXD0/MODE0 11 R130 470,5% 11 13
4 MII1_RXD0 RXD0/MODE0 YELC SHD1
R129 100,1% RXDV 26 C137 C138 C139 C140 YELA 12 14
4 MII1_RXDV RXDV GRN_C YELA SHD2
R131 100,1% REFCLKO 7 R132 470,5% 10 DGND
4 MII1_RXCLK RXCLK/PHYAD1 GRNC
R133 100,1% RXER/PHYAD0 13 33pF,4 EMI
33pF,4 EMI
33pF,4 EMI GRNA 9
4 MII1_RXERR RXER/RXD4/PHYAD0 GRNA
33pF,4 EMI
R134 100,1% TXCLK 20 U14 C166 C165 LPJ0011BBNL
4 MII1_TXCLK TXCLK TCT_RCT
21 DGND DGND DGND DGND R135 R136
4 MII1_TXEN TXEN
22 LAN8710A 10K,1% 100nF,4 EMI 100nF,4 EMI C163 ESD_RING
4 MII1_TXD0 TXD0
23 C164 C141 R137
4 MII1_TXD1 TXD1
24 100pF,4 EMI 0.022uF,10V 0,1%
4 MII1_TXD2 TXD2 VDD_PHYA
25 100pF,4 EMI 0.1R,0805
4 MII1_TXD3 TXD3
R138 100,1% MODE2 15 DGND DGND
4 MII1_COL COL/CRS_DV/MODE2
R139 100,1% CRS 14 ACTIVE WHEN LINK PRESENT.
4 MII1_CRS_DV CRS BLINKS OFF DURING ACTIVITY.
3 DGND
R140 0,1%,DNI LED1/REGOFF 2 ACTIVE WHEN AT 100MB DGND
19 LED2/nINTSEL
3,10 SYS_RESETn nRST ETH_TXD4
18
R141 PHY_XTAL1 R142 0,1% 5
RCLKIN nINT/TXER/TXD4
XTAL1/CLKIN
GND_EP

1M,1%,DNI
PHY_XTAL2 4 32 RBIAS
XTAL2 RBIAS
B B
R145
R143 C161 QFN32_5X5MM_EP3P3MM R144 10K,1%
33

10,1% 12.1K,1%
33pF,4 EMI
Y3
PHYX 2 1

25.000MHz
C142 XTAL150SMD_125X196 C143 DGND DGND
DGND DGND
30pF,50V 30pF,50V

DGND DGND

A A

Title
BeagleBone Green Ethernet
Size Document Number Rev
B v1
Date: Thursday, June 04, 2015 Sheet 9 of 10
5 4 3 2 1
 5 4 3 2 1

P8
P9
1 2
3 4 DGND 1 2 DGND
3,8 MMC1_DAT6 MMC1_DAT7 3,8
CAUTION: USED ON BOARD

CAUTION: USED ON BOARD

5 6 VDD_3V3B 3 4 VDD_3V3B
3,8 MMC1_DAT2 MMC1_DAT3 3,8
7 8 VDD_5V 5 6 VDD_5V
D 3 TIMER4 TIMER7 3 D
9 10 SYS_5V 7 8 SYS_5V
3 TIMER5 TIMER6 3
11 12 9 10
3 GPIO1_13 GPIO1_12 3 2 PWR_BUT SYS_RESETn 3,9
13 14 11 12
3 EHRPWM2B GPIO0_26 3 3 UART4_RXD GPIO1_28 3
15 16 13 14
3 GPIO1_15 GPIO1_14 3 3 UART4_TXD EHRPWM1A 3
17 18 15 16
3 GPIO0_27 GPIO2_1 3 3 GPIO1_16 EHRPWM1B 3
19 20 MMC1_CMD 3,8 17 18
3 EHRPWM2A 4,10 I2C1_SCL I2C1_SDA 4,10
21 22 MMC1_DAT5 3,8 19 20
3,8 MMC1_CLK 4 I2C2_SCL I2C2_SDA 4
23 24 MMC1_DAT1 3,8 21 22
3,8 MMC1_DAT4 4,10 UART2_TXD UART2_RXD 4,10
25 26 GPIO1_29 3 23 24
3,8 MMC1_DAT0 3 GPIO1_17 UART1_TXD 4
27 28 25 26
4 LCD_VSYNC LCD_PCLK 4 3,4 GPIO3_21 UART1_RXD 4
29 30 27 28
4 LCD_HSYNC LCD_DE 4 4 GPIO3_19 SPI1_CS0 4
31 32 4 SPI1_D0 29 30
4,6 LCD_DATA14 LCD_DATA15 4,6 SPI1_D1 4
33 34 31 32 VDD_ADC
4,6 LCD_DATA13 LCD_DATA11 4,6 4 SPI1_SCLK
35 36 33 34
4,6 LCD_DATA12 LCD_DATA10 4,6 4 AIN4
37 38 35 36
4,6 LCD_DATA8 LCD_DATA9 4,6 4 AIN6 AIN5 4
39 40 37 38
4,6 LCD_DATA6 LCD_DATA7 4,6 4 AIN2 AIN3 4
41 42 39 40
4,6 LCD_DATA4 LCD_DATA5 4,6 4 AIN0 AIN1 4
43 44 41 42
4,6 LCD_DATA2 LCD_DATA3 4,6 3 CLKOUT2 GPIO0_7 4
45 46 43 44
4,6 LCD_DATA0 LCD_DATA1 4,6
45 46
FEMALE HEADER 2x23
FEMALE HEADER 2x23 GNDA_ADC

DGND DGND DGND DGND

C C

EXPANSION HEADER EXPANSION HEADER

VDD_3V3B

VDD_3V3A
C153 C154 U7 Board ID
1 4
R150

R151

R152

R153

R154

R155

2,4 I2C0_SCL SCL VCC

10uF,10V 0.1uf,6.3V 3 C152
2,4 I2C0_SDA SDA
2 0.1uf,6.3V
VSS
DGND
5 WP
10K,1%

10K,1%

10K,1%

10K,1%

10K,1%

10K,1%

WP R156 10K,1%
P10 24LC32A DGND
1 9 DGND 256KX8
3 MMC0_DAT2 DAT2 GND
2 10 VDD_3V3B
3 MMC0_DAT3 CD/DAT3 CD TP4
B 3 11 R157 10K,1% B
3 MMC0_CMD CMD GND3 TESTPT1
4 12
5 VDD GND4 13
3 MMC0_CLKO CLOCK GND5
6 14
7 VSS GND6 15
3 MMC0_DAT0 DAT0 GND7
8 16
3 MMC0_DAT1 DAT1 microSDGND8
SCHA5B0200

DGND
uSD CONNECTOR
3,4 MMC0_CD

J4 J5

1 1
4,10 I2C2_SCL 4,10 UART2_RXD
2 2
4,10 I2C2_SDA 4,10 UART2_TXD
VDD_3V3B 3 VDD_3V3B 3
4 4

A A

GroveHDR GroveHDR

Title
DGND DGND
BeagleBone Green Expansion Headers, uSD.and EEPROM
GROVE CONNECTOR Size Document Number Rev
B v1
Date: Thursday, June 04, 2015 Sheet 10 of 10
5 4 3 2 1