EE 382V Radio Frequency Integrated Circuit Design, HW 2

Prof. R. Gharpurey

Due on March 1, 2018

Q1. An amplier has internal device noise sources given by idn and ign . The input referred noise sources
are given by
vn,in = αidn
in,in = βidn + ign

idn i∗gn


idn and ign have a nite correlation coecient given by κ = q  . α, β and γ are
hidn i∗dn i ign i∗gn

complex, frequency-dependent scaling parameters derived from circuit small-signal parameters. For
the above amplier, determine the noise parameters Fmin , GN , Ropt and Xopt . [15]

Q2. A small-signal amplier has the following non-linear characteristic. [20]

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vout = 10vin − 10vin

For this amplier please answer the following:

(a) For a sinusoidal input, vin = A.cos(ωt), determine the input amplitude A, for which the gain of
the amplier is reduced by 1-dB compared to its small-signal value.
(b) If the input consists of a desired signal A1 .cos(ω1 t) and a blocker A2 .cos(ω2 t), determine the value
of the blocker amplitude A2 at which the gain of the amplier as observed by the desired signal
decreases by 3 dB. Assume that A1  A2 .
(c) Repeat part 2 for vin = A1 .cos(ω1 t) + A2 . {cos(ω2 t) + cos(ω3 t)}. In this case, the amplier is
subjected to two blockers of equal amplitudes.
(d) Using a polynomial VCVS to model the amplier, verify parts 1-3 in simulation.

Q3. A single-ended amplier is shown below. M1 and M3 are NMOS devices, congured as a common-
gate and a common-source amplier, respectively. PMOS devices, M2 and M4 , are congured as a
current-mirror. Nn and Np are integer scaling constants, that denote the sizes of M3 and M4 relative
to M1 and M2 , respectively. The output voltage, vOU T , is observed at the drains of M3 and M4 , that
are connected together. The load resistor, RLOAD , is connected between the output node and a bias
voltage, set at VDD /2.
The capacitors CB are used for DC blocking, and can be considered a short at all (non-zero) frequencies
of interest. LCH is a large choke inductor, which is a short at DC, and can be considered an open at
all frequencies of interest. The gates of M1 and M3 are biased using the same voltage VG . RBIAS is a
large bias resistor.
Ignore output resistance, gate resistance, body eect and all device capacitance. All MOS devices
and resistors exhibit thermal noise, where the noise spectral densities are given by i2dn /∆f = 4kT γgm
A2 /Hz for an N or P-type MOSFET with device transconductance gm , and i2n /∆f = (4kT /R) A2 /Hz ,

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 for a resistance of R Ω. Assume that NMOS and PMOS devices have identical γ . DC bias sources
that set the voltages VG and VDD /2 can be assumed to be ideal ac grounds. 25

For this circuit, please answer the following:

(a) Determine the ratio Np /Nn that is required to set the DC in RLOAD equal to 0. Use this ratio in
all the parts below. Note that M2 and M4 form an ideal current mirror, so that iD4 = Np iD2 . 3
(b) What is the resistance RIN looking into the circuit? Assume that RBIAS is suciently large that
it can be ignored. Express your result in terms of device small-signal parameters. 3
(c) Determine the eective small-signal (linear) voltage gain of the circuit dened as vout /vin . Assume
that the resistance looking into the circuit, RIN , is perfectly matched to RS . Express your result
in terms of the device transconductance gm1 , Nn and RLOAD . 5
(d) Show that for RBIAS  RS , the noise contribution of RBIAS to the output of the circuit at the
signal frequencies where CB is a short, is negligible. It is sucient to evaluate the noise of RBIAS
at the gate of M3 and verify that it tends to zero for RBIAS  RS . 4
(e) Determine the noise contributions of RS , M1 , M2 , M3 , M4 and RLOAD at the output node in
V 2 /Hz . 7
(f) Determine an expression for the noise gure of the circuit, dened as the ratio of the total noise
spectral density observed at the output, to the noise spectral density arising from the source
resistance RS . Ignore the noise contribution of RBIAS . Express your result as a function of gm1 ,
gm2 , Nn and resistance RLOAD . 3

Q4. A bipolar dierential amplier employs an ideal tail current source IEE . The devices are ideally
matched, and the circuit is perfectly balanced. The dierential amplier has load resistors of values
RL . [40]
(a) Find an expression that relates the dierential output of the amplier to it's input, upto the third
order of non-linearity (vout = a1 vin + a3 vin
3
).
(b) What is the IIP3 of the amplier?
n n ωm oo
(c) Assume that the input to the amplier is given by vin = A1 .cos(ω1 t)+A2 . m(t).cos (ω1 + 3 )t ,
2
ω
where A2  A1 , and m(t) = cos( m t). If the system is otherwise noiseless, what is the apparent
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SNR of the output signal, expressed as a function of A1 , A2 , m(t) and IIP3?

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(d) Assume that the tail current is modied to the following form: IEE = IEE(bias) + b2 m(t)2 . Can
you nd a value of b2 for which the IM3 induced at ω1 is completely eliminated?