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Contents
1. Introduction .......................................................................................................................................... 3
1.1 State of the art of electronics ............................................................................................................. 4
1.2 Graphene of art of electronics ............................................................................................................ 5
1.3. Graphene as electrode .................................................................................................................. 6
1.4.Publications ......................................................................................................................................... 7
1.5.Organization of this thesis .................................................................................................................. 8
2.0 Review ofgraphene’s properties relivant to next generation electronics ............................................. 9
2.1. Intrinsicgraphene properties .......................................................................................................... 10
2.2. Graphene transistors ....................................................................................................................... 11
3.0 Graphene transistors modified by self-assembled C60 thin firm........................................................... 12
3.1 Introduction ...................................................................................................................................... 13
3.2. C60 spray coating .............................................................................................................................. 14
3.3.Graphene to C60 charge transfer studied by Raman spectroscopy ................................................. 15
3.4 Graphene to transistor fabrication .................................................................................................. 16
3.5 SLG FETs with and without C60adleyers ............................................................................................ 17
3.6.Current fluctuations in single layer graphene transistors ............................................................... 18
3.7. Summary ant outlook ...................................................................................................................... 19
4.0 Carbon Burger ....................................................................................................................................... 20
4.1. Introduction ..................................................................................................................................... 21
4.2. Prediction of transistor properties .................................................................................................. 22
4.3. Generation 1: Pure Carbon Burger .................................................................................................. 23
4.4. Generation 2: Nanowire lithography ............................................................................................... 24
4.5. Generation 3:-beam defined oxide wells......................................................................................... 25
4.6. Generation 4: CVD Carbon Burger-parallel devices using CVD graphene ....................................... 26
4.7. Thermal synthesis of Carbon Burger................................................................................................ 27
5.0 Graphene contacts to SAMs grown on gold ......................................................................................... 28
5.1. Mechanically expoliatedgaphene top contact ................................................................................. 29
5.2. CVD graphene top contacts ............................................................................................................. 30
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5.3. Summary and outlook ...................................................................................................................... 31


6.0 Graphene contacts to nanowires .......................................................................................................... 32
6.1. Intr0duction ..................................................................................................................................... 33
6.2. InAs NW growth and band structure .............................................................................................. 34
6.3. Device architecture and fabrication ................................................................................................ 35
6.4. Electronic transport ......................................................................................................................... 36
6.5. Summary and outlook ...................................................................................................................... 37
7.0 Silver seeded InAs nanowire growth on graphitic flakes for epitaxial graphene contact .................... 38
7.1. Silver seeded InAs NW growth on graphite and FLG ....................................................................... 39
7.2. Discussion and outlook .................................................................................................................... 40
8.0 Conclusion and outlook ........................................................................................................................ 41
9.0 References ............................................................................................................................................ 42
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1. Introduction
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1.1 State of the art of electronics


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1.2 Graphene of art of electronics


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1.3. Graphene as electrode


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1.4.Publications
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1.5.Organization of this thesis


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2.0 Review ofgraphene’s properties relivant to next generation


electronics

Figure 1. Schematic of a FE with as active semiconductor channel, SiO2 dielectric material and a
p-doped Si gate.
Figure adopted from Zhang et al.10
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2.1. Intrinsicgraphene properties


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2.2. Graphene transistors


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3.0 Graphene transistors modified by self-assembled C60 thin firm

Figure 2:Model of the pure Carbon Burger with gold electrodes. The bright purple background is
the Sio2|Si= substrate, the darker purple shoots are single layer grapheme (SLG), the gray balls
are C00 molecules and the gold coloured slabs are Ti|A u electrode. Model not to sacale
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3.1 Introduction
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3.2. C60 spray coating


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3.3.Graphene to C60 charge transfer studied by Raman spectroscopy


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3.4 Graphene to transistor fabrication


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3.5 SLG FETs with and without C60adleyers


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3.6.Current fluctuations in single layer graphene transistors


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3.7. Summary ant outlook


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4.0 Carbon Burger

Figure 3. The three most relevant devices presented by others during my Ph.D. In a ) is the tunneling VFET with an insulating
layer between graphene source-drain electrodes presented by Britnell et al” Next is the photo-switchable monolayer anchored
between graphene electrodes by seo et al.” In b). In c) and d) are the VFETs with MoS2 semicondutor channel, graphene source
electrode and metal top electron by Yu et al.1^. Figures adopted from respective references.
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4.1. Introduction
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4.2. Prediction of transistor properties


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4.3. Generation 1: Pure Carbon Burger


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4.4. Generation 2: Nanowire lithography


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4.5. Generation 3:-beam defined oxide wells


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4.6. Generation 4: CVD Carbon Burger-parallel devices using CVD graphene


P a g e | 27

4.7. Thermal synthesis of Carbon Burger


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5.0 Graphene contacts to SAMs grown on gold

Figure 4. Illustration of the fact that all graphitic allotropes can be derived from graphene. Figure adopted from Geim and
Novoselov3d
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5.1. Mechanically expoliatedgaphene top contact


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5.2. CVD graphene top contacts


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5.3. Summary and outlook


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6.0 Graphene contacts to nanowires

Figure 5. In a ) the honeycomb lattice structure of graphene is presented. The unit cell consist of two atoms labeled A and B, the
lattice vectors being ar and at. In b) thr first Brillouin zone of graphnene with reciprocal lattice vectors bs and s as a function of
ka and ky presented. With a zoom-in on the linear rogime found near points k and k1 at the adge of the first Brillouin zone as
lebeled in b ). Figure adopted from Castro Neto et al.25.
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6.1. Intr0duction
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6.2. InAs NW growth and band structure


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6.3. Device architecture and fabrication


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6.4. Electronic transport


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6.5. Summary and outlook


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7.0 Silver seeded InAs nanowire growth on graphitic flakes for epitaxial
graphene contact
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7.1. Silver seeded InAs NW growth on graphite and FLG


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7.2. Discussion and outlook


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8.0 Conclusion and outlook


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9.0 References

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