Volume

A
Hardware Description 201-TTDHD001
TJ100MC-4L Version 1.0
Revision history

Revision Date Comments

Rel 1.0 24/05/2005

© 2000-2005 Tejas Networks India Ltd., All Rights Reserved.

To the best of Tejas Networks's knowledge, at the time of its preparation, the information in this document is accurate.
However, Tejas Networks makes no warranty or representation with respect to its accuracy and disclaims all liability
which may result from inaccuracies, or third-party use, or third-party reliance. This information is subject to change
without notice.

No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in any form or by any means,
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implies no license under patents or copyrights. Trademarks in this document belong to their respective companies.
 Table of Contents i

Table of Contents 0

About this document 1

1.1 Audience 2
1.2 References 2
Specifications and safety warnings 3
2.1 Recommended maximum power specifications 3
2.2 Physical specifications 3
2.3 EMI specifications 4
Power supply unit (PSUL1) 5
3.1 Introduction 5
3.2 Operating parameters 6
3.2.1 Input fuses 6
3.3 Construction 6
3.4 Functional description 8
3.4.1 Load sharing 8
3.4.2 Alarms and protection 8
3.5 Detailed Specifications 10
3.6 Diagnostic Functions 11
Multi function card (MFC1) 13
4.1 Introduction 13
4.2 Power consumption 13
4.3 Construction 13
4.3.1 Alarm contacts 15
4.3.2 Network management interface 15
4.3.3 Orderwire interface 15
4.3.4 Modem and craft interfaces 16
4.4 Functional description 16
STM-4 cross connect card (XCC16L) 17
5.1 Introduction 17
5.2 Power supply requirements 17
5.3 Construction 17
5.4 Functional description 19
5.4.1 Redundancy control 19
System control unit (SCU4) 21
6.1 Introduction 21
6.2 Power supply requirements 21
6.3 Construction 21
6.3.1 Memory 24
E1 tributary card (TET16, TET21, TET28) 25
7.1 Introduction 25
7.2 Power supply requirements 25
7.2.1 Supply voltages 25
7.2.2 Power consumption 25

Hardware Description Version 1.0

ii Table of Contents

7.3 Construction 25
7.3.1 Subrack Interface 27
7.4 Functional description 27
E3/DS3 tributary card (TE31) 29
8.1 Introduction 29
8.2 Power supply requirements 29
8.2.1 Supply voltages 29
8.2.2 Power consumption 29
8.3 Construction 29
8.3.1 Subrack interface 31
8.3.2 Traffic interfaces 31
8.4 Functional description 31
3 E3/DS3 tributary card (TE33) 33
9.1 Introduction 33
9.2 Power supply requirements 33
9.2.1 Input voltage 33
9.2.2 Power consumption 33
9.3 Construction 33
9.3.1 Subrack interface 35
9.3.2 Traffic interfaces 35
9.4 Functional description 35
Ethernet tributary card (ETC, ETCFT) 37
10.1 Introduction 37
10.2 Power supply requirements 37
10.2.1 Input supply voltages 37
10.2.2 Power consumption 37
10.3 Construction 37
10.3.1 Subrack interface 40
10.4 Functional description 40
Ethernet tributary card (TP01) 43
11.1 Introduction 43
11.2 Power supply requirements 43
11.2.1 Input supply voltages 43
11.2.2 Power consumption 43
11.3 Construction 43
11.3.1 Subrack interface 45
11.4 Functional description 45
Ethernet tributary card (TP01FT) 47
12.1 Introduction 47
12.2 Power supply requirements 47
12.2.1 Input supply voltages 47
12.2.2 Power consumption 47
12.3 Construction 47
12.3.1 Subrack interface 49
12.4 Functional description 49
STM-1 aggregate/tributary card (A011, A012) 51

TJ100MC-4L
 Table of Contents iii

13.1 Introduction 51
13.2 Power supply requirements 51
13.2.1 Input voltage 51
13.2.2 Power consumption 51
13.3 Construction 51
13.3.1 Subrack interface 53
13.4 Functional description 53
13.5 Optical power specifications 54
STM-1e/E4 tributary card (A1E4) 57
14.1 Introduction 57
14.2 Power supply requirements 57
14.2.1 Input voltage 57
14.2.2 Power consumption 57
14.3 Construction 57
14.3.1 Subrack interface 59
14.4 Functional description 59
STM-1e tributary card(A012E) 61
15.1 Introduction 61
15.2 Power supply requirements 61
15.2.1 Input voltage 61
15.2.2 Power consumption 61
15.3 Construction 61
15.3.1 Subrack interface 63
15.4 Functional description 63
STM-4 aggregate/tributary card (A041,A041VLR) 65
16.1 Introduction 65
16.2 Power supply requirements 65
16.2.1 Input voltage 65
16.2.2 Power consumption 65
16.3 Construction 65
16.3.1 Subrack interface 67
16.4 Functional description 67
16.5 Optical power specifications 69
Ethernet Tributary Card (TR01) 71
17.1 Introduction 71
17.2 Power Supply Requirements 72
17.2.1 Input Supply Voltages 72
17.2.2 Power Consumption 72
17.3 Construction 72
17.4 Functional Description 74
17.4.1 Electrical Interface 74
17.4.2 Optical Interface 74
17.4.3 10/100Mbps Fast Ethernet PHY 74
17.4.4 Ethernet Mapper (Implemented in VIRTEX2PRO-P20 FPGA) 75
17.4.5 SDR SDRAM Interface 75
17.4.6 DDR SDRAM Interface 76

Hardware Description Version 1.0

iv Table of Contents

TJ100MC-4L
 1
About this document 1-

This document provides a unit-level description and detailed

technical specifications of the TJ100MC-4L SDH/SONET network
element and its tributary Card. The TJ100MC-4L is a part of Tejas
Networks suite of products in the synchronous fiber optic
transmission product portfolio. The topics covered are:

• Chapter 2: Specifications and safety warnings

• Chapter 3: Power Supply Unit (PSUL1)
• Chapter 4: Multi Function Card (MFC1)2
• Chapter 5: STM-4 Cross Connect Card (XCC16L)
• Chapter 6: System Control Unit (SCU4)
• Chapter 7: E1 Tributary Card (TET16, TET21, TET28)
• Chapter 8: 1 E3/DS3 Tributary Card (TE31)
• Chapter 9: 3 E3/DS3 Tributary Card (TE33)
• Chapter 10: Ethernet Tributary Card (ETC, ETCFT)
• Chapter 11:Ethernet Tributary Card (TP01)
• Chapter 12: Ethernet Tributary Card (TP01FT)
• Chapter 13: STM-1 Aggregate/Tributary Card (A011, A012)
• Chapter 14: STM1e/E4 Tributary card (A1E4)
• Chapter 15: STM-1e Tributary Card (A012E)
• Chapter 16:STM-4 Aggregate/Tributary Card (A041, A041VLR)
• Chapter 17:Ethernet Tributary Card TRO1

Hardware Description Version 1.0

2 About this document

1.1 Audience
This document is intended for the following groups:

• Node installers
• Network administrators
• Network maintenance and operation personnel
1.2 References
This document refers to the following documents:

• Installation Procedure – 201-TTDIP001

• User Interface Guide – 000-TTDUG001, 001-TTDUG001

TJ100MC-4L
 2
Specifications and safety warnings 1-

2.1 Recommended maximum power specifications

The power dissipation of a fully loaded configuration of TJ100MC-4L
system is around 200 watts. TJ100MC-4L has redundant power
supplies in its 2 slots.

The following table lists the power specifications required for safe and
proper operation.
Table 2-1

Power Requirements Suggested Source Fusing

Input Tolerance -40V to –60V
Power Consumption Depends on configuration 30W to 200W.
Fuse Rating 6.3A slow, 20mm glass fuse
Power Cable Type 1.5mm²
Power Connector Type D-sub
Chassis Ground Connector Type Screw/LUG

2.2 Physical specifications

Physical specifications are as follows:
Table 2-2

Specification Description
Chassis Height 485mm
Chassis Depth 270mm
Chassis Width (including mounting flanges) 482mm

Hardware Description Version 1.0

4 Specifications and safety warnings

Table 2-2

Chassis Width (excluding mounting flanges) 435mm

Weight (Maximum Configuration) 24kgs
Weight (Minimum Configuration) 15kgs

2.3 EMI specifications

The EMI specifications are as follows:
Table 2-3
EMI Specifications EN55022, EN61000
Safety CSA 60950, CSA 60825-1

TJ100MC-4L
 3
Power supply unit (PSUL1) 1-

3.1 Introduction
The power supply unit (PSUL1) are part of the base TJ100MC-4L.
The PSUL1 forms one part of a redundant, load-sharing (not true
current sharing) supply and provides a stable d.c. power to other
Cards in the system. Each PSUL1 delivers 150W power output with
primary and secondary voltages being 48V and 12V respectively.

WARNING
Input Voltage
The PSUL1 normally operates with 48V DC. Take all precautions
when working on live equipment.

CAUTION
Static sensitive devices
Static charge can damage the equipment. While unpacking and
handling Cards, or making system interconnections, wear a
grounding wrist strap to discharge the static buildup.

Hardware Description Version 1.0

6 Power supply unit (PSUL1)

CAUTION
Removal/Replacements
When removing a PSUL1, the unit should not be replaced into
the system for at least 5 seconds to ensure that unit capacitors
have discharged.

WARNING
Heat Sinks
Do not touch the heat sinks on the unit just after removal

3.2 Operating parameters

• Input voltage: 48V d.c. with either the positive or the negative
input earthed.
• Output voltage: +12 V d.c. at 12.5A maximum
• Output power: 150W
3.2.1 Input fuses
A 6.3A slow-blow glass fuse (Protection PST 6.3A, Tejas
PartNumber: 999-AJC00004-E) with maximum sustained dissipation
of 1.6W is used on the positive line of the input power.

3.3 Construction
The PSUL1 card fits in the slots 16 and 17 of the TJ100MC-4L
chassis. The front view of the PSUL1 is as shown below:

TJ100MC-4L
 Power supply unit (PSUL1) 7

Table 3-1
Front panel description
The front panel of this card includes:
• Power connector
• Power ON/OFF switch
• 2 LED indicators
• Primary voltage monitoring port
• Secondary voltage monitoring port

RET GND -48V

48 V 12 V
ACTIVE
POWER

48Vdc 6A

Visual Indicators:
The two LEDs, Power and Active LEDs provide a visual indication of the input and the output
voltages relative to the card.
LED Color Status
POWER Green The DC-DC converter is
active
Off The DC-DC converter is
in-active
ACTIVE Green The output voltage is within
specified range
Red The output voltage is out of
range

Hardware Description Version 1.0

8 Power supply unit (PSUL1)

The switch provided in the front panel controls power supply to the
circuit pack. The two monitoring ports, in the front panel, facilitate
the verification of the output voltage from the card. For details
regarding the power connector, refer to the ‘Installation Procedures’,
201-TTDIP001.

The connection with the TJ100MC-4L backplane is made with a

single 33-pin Goldfish connector from “Positrons
PCIC16W7M400A1, Tejas PartNumber: 999-CAC000163-E” make.
This connector has Make First Break Last (MFBL) arrangement to
ensure that system earth and ground will be the first to make contact.

3.4 Functional description

Power connection to the PSUL1 is a via a 3-pin power D-connector
located on the front of the unit. For redundancy requirements, two
separate units should be installed in the subrack and connected to
each of the station power units. The power inputs should be fused or
automatic circuit breakers should be installed.

The PSUL1 is a single output isolated DC-DC convertor. The power

input is applied via fuses, input protection and filtering circuitry to the
DC-DC convertor. The convertor used provides 12V d.c. output.

The output circuits have blocking diodes for protection when two
PSUL1s are connected in parallel via the backplane. A local 3.3V d.c.
supply is generated for the serial EPROMs on the card.

The serial EEPROM is used to store the part number, serial number
and the manufacturing/testing data.

3.4.1 Load sharing

True current sharing is not available in the power supply units. By
virtue of the blocking diodes, there is an unequal load sharing across
the two power supply units.

3.4.2 Alarms and protection

The PSUL1 is protected against output short circuit, over voltage and
under voltage. Input over voltage and under voltage protection is
provided. The output over voltage protection is latched and the unit

TJ100MC-4L
 Power supply unit (PSUL1) 9

will not restart until power to the unit is removed and reconnected.
The other protections do not result in latched shutdown and hence
the PSUL1 restarts after normal conditions are restored.

User selectable thresholds are also available. Refer to ‘User Interface

Guide – 000-TTDUG001, 001-TTDUG001’ for more details.

The PSUL1 supports the monitoring of following parameters:

• Input voltage
• 12V internal output voltage
• 12V output on the backplane
• Board temperature

Hardware Description Version 1.0

10 Power supply unit (PSUL1)

3.5 Detailed Specifications

Table 3-2

Specification Range
Input Voltage Range Normal Operation: -40.5V to –57.5V DC
Input Current 6A max
Maximum operating Ambient
0oC to 50oC (Requires forced convection at higher power)
Temperature
Output Voltage 12V +/0.5V/-1.2V
Output Current 12.5A max
Line Regulation ±2%
Ripple 120mVp-p
Load Regulation ±5%
Efficiency 70% (50% load to 100% load)
Fuse 6.3A Slow Blow Glass fuse. Field replaceable.
Input Under Voltage Protection Shutdown: -35V 4V
Input Over Voltage Protection Shutdown: -65V 4V
EMI/EMC Compliance EN55022 Class A
Hot Swap Capability Present
Redundancy Present
ON/OFF Control Rocker switch with protective flaps on the Front Panel.
-48V: 3-pin Power D-connector
Power Interface
12V: 33-pin Positronic goldfish connector
Output Over-voltage 13.5V +1.5V/-0.75V
Output Under-voltage 7V +3V/-1.5V
Output Over-Current 20A±5A
Over-Temperature 110C +10C

TJ100MC-4L
 Power supply unit (PSUL1) 11

3.6 Diagnostic Functions

The front panel test points are available for in-circuit monitoring of
input and output voltages of the PSUL1. These test points are
protected against accidental short circuit. The other variables can be
monitored through software.

Hardware Description Version 1.0

12 Power supply unit (PSUL1)

TJ100MC-4L
 4
Multi function card (MFC1) 1-

4.1 Introduction
The MFC1 in TJ100MC-4L is used to implement miscellaneous
interfaces. This card is plugged into to the slot 18 of the TJ00MC-4L
chassis. This card supports the following interfaces along with the
visual alarm indicators:

• OrderWire interface
• 10/100 NMS Ethernet interface
• 2 serial interfaces for modem and craft interfaces
• Alarm input and output interfaces
4.2 Power consumption
MFC1 consumes a maximum power of 4W, at 12V dc.

4.3 Construction
The MFC1 fits into the slot 18 of the TJ100MC-4L chassis. The
MFC1 has front panel connections for the user interfaces along with
visual indications. The front view of the MFC1 is as shown below:

Hardware Description Version 1.0

14 Multi function card (MFC1)

Table 4-1

O/W NMS
POWER

CRITICAL

MAJOR

MINOR

DEFERRED
SERIAL PORT 1 SERIAL PORT 2 ALARM IN ALARM OUT

ALARM
RESET

The NMS interface is associated with two LEDs, Green and Amber. The possible LED status and
their significance is given below:
Cards Status NMS LED
Amber Green
Link Speed 10 Mbps OFF NA
Link Speed 10 Mbps ON NA
Receiver Activity NA Blink on packet received
The orderwire interface is associated with a single bicolor LEDs, Green and Red. The possible LED
status and their significance is given below:
Card State OW LED
Telephone On hook Green
Telephone Ringing Green Blinking
Telephone Off hook Red
Visual Indicators
The MFC1 has visual indications for alarms and the power on the card. The following visual
indications are available:
LED Name LED Color Status
Power Green Card is powered-up
Off Card is not powered-up
Critical Alarm Red Critical Alarm is present
Off Critical Alarm is not present
Major Alarm Orange Major Alarm is present
Off Major Alarm is not present

TJ100MC-4L
 Multi function card (MFC1) 15

Table 4-1
Minor Alarm Yellow Minor Alarm is present
Off Minor Alarm is not present
Deferred Alarm Blue Deferred Alarm is present
Off Deferred Alarm is not present

4.3.1 Alarm contacts

The MFC1 card of the TJ100MC-4L has two D-15 connectors in the
front panel for dry alarm contacts, the Alarm In and Alarm Out
interfaces.

The connector for Alarm In is used to feed in alarms to the MFC1.

For details regarding the pin configuration of the connector, refer to
the ‘Installation Procedure, 201-TTDHIG001-D’.

The connector for Alarm Out is used to derive alarms out of the
MFC1. For details regarding the pin configuration of the connectors,
refer to the ‘Installation Procedure, 201-TTDHIG001-D’.

4.3.2 Network management interface

The network management interface (NMS Interface) provides a
CSMA/CD based LAN transceiver of an Ethernet link through an
RJ45 connector on the MFC1. The Ethernet address is available in the
non-volatile memory on the system.

The NMS interface physical layer is completely implemented in

hardware. The physical layer device provides clock recovery, bit
timing, equalization and a ‘jabber’ circuit. The media access control
(MAC) function is implemented in software available as part of the
microcontroller.

‘Jabber’ circuitry ensures that the transmitter does not hold up the
interface for more than a full frame of data.

4.3.3 Orderwire interface

This is an operator’s communication channel that directly supports a
2-wire analog telephone. It has the full battery, overvoltage, ringing,
supervision, codec, hybrid and test (BORSCHT) functions.

Hardware Description Version 1.0

16 Multi function card (MFC1)

Voice and signaling traffic is carried over E1 or E2 bytes of the SDH

overhead.

2-wire analog interface is handled by hardware using a ringing SLIC

and codec. The line impedance can be set according to local
conventions from the user interface.

4.3.4 Modem and craft interfaces

The craft interface provides a RS232C based interface for
configuration using a local craft terminal. The default baud rate
setting is 9600 bauds, with 1 stop bit, no parity and no
hardware/software flow control.

The NE is configured as the data-circuit terminating equipment

(DCE) and the local craft terminal is configured as the data
terminating equipment (DTE).

4.4 Functional description

The MFC1 card supports the following interfaces:

• OrderWire interface
• 10/100 NMS Ethernet interface
• 2 serial interfaces for modem and craft interfaces
• Alarm input and output interfaces
The card consists of a CPLD to implement most of the above
functionalities. The CPLD has processor accessible registers that
monitor and control the Alarm interface.

The CPLD has an I2 C interface that enables the system processor to

access the registers that monitor and control the Alarm interface. The
CPLD also maps the modem/craft and & OrderWire data to the
OHXC bus. This is done by dividing the OHXC bus into various
time-slots (of 64kbps each) and mapping each of Modem, Craft and
OrderWire data to a time-slot.

The MFC1 has a SLIC device to handle the 2-wire analog OrderWire
Interface. The SLIC device converts the analog voice-data to PCM
samples and vice-versa.

TJ100MC-4L
 5
STM-4 cross connect card (XCC16L) 1-

5.1 Introduction
The XCC16L is the cross connect card that occupies the slots 6 and
7 in the TJ100MC4-L chassis. The card consists of the cross connect
sub-system and the timing sub-system. The system provides for
redundancy on the XCC16L card.

5.2 Power supply requirements

The XCC16L consumes a maximum power of 12W.

5.3 Construction
The XCC16L fits into the slots 6 and 7 in the TJ100MC-4L chassis.
The front panel of the XCC16L is as shown below:

Hardware Description Version 1.0

18 STM-4 cross connect card (XCC16L)

Table 5-1
Card Description
Visual Indicators
The visual indicators on the XCC16L circuit pack include two LEDs, the
ACTIVE and the STATUS LEDs. The possible LED status and their
significance is given below:
LED Color Status
STATUS
ACTIVE

ACTIVE Amber Card is booting-up

Green Card is active (Master)
Off Card is in stand-by mode (Slave)
Red Card failure/Admin down
SWAP
HOT

STATUS Amber Card is booting-up

Green Card is booting-up
Off Card in stand-by mode
Red Admin down
Hot Swap switch
The master and the slave card configuration of the redundant XCC16L cards
can be forced using the hot swap switch. When the hot swap switch is
activated, the respective card renders the peer card as the master and takes
over as a slave. The switch is functional only on the card that is active provided
another card is available in the stand-by configuration.
BITS Interface
TJ100MC-4L supports a BITS clock interface on the cross connect Cards
through a 9-pin D-type connector. For details regarding the pin configuration
refer to the ‘Installation Procedure’.
The BITS clock input/output is at 2.048MHz and can be nominated as a
reference for node synchronization. Loss-of-Signal (LOS) is detected on the
clock input and this alarm is used as a trigger to change over to the next
synchronization reference. The timing reference failed alarm is reported on
the user interface.
The BITS data input/output is at 2.048Mbps and uses Extended Super Frame
(ESF) for framing. Both PCM30 and PCM31 (with/without CRC) can be used
on the input. This input can be nominated as a reference for node
synchronization. LOS, LOF and AIS are detected on this input and this alarm
is used as a trigger to change over to the next synchronization reference. The
timing reference failed alarm is reported on the user interface.

TJ100MC-4L
 STM-4 cross connect card (XCC16L) 19

5.4 Functional description

The cross connect sub-system of the XCC16L card consists of a cross
connect fabric for 4x4 STM-4. The fabric is a non-blocking switch at
VC-12 granularity.

The cross connect card takes in upto 16 STM-1 worth traffic and
supports strict-sense non-blocking cross connection of 1008x1008
VT2/TU-12.

The timing sub-system has a stratum-3 timing module that generates

the reference clocks for the entire equipment, including the SDH
timing signals.

The backplane interface on the cross connect card has a 16xSTM-1

drop bus output, 16xSTM-1 add bus input, telecom bus frame timing,
telecom bus clocks, and processor control bus.

The buffering scheme depends on the type of interface and the

direction of the signals. The telecom buses received (as input) on the
cross connect card are buffered and directed to the cross connect
fabric. The telecom buses transmitted (as output) from the card are
distributed after clock buffering.

The telecom bus frame timing signals received or transmitted by the

cross connect card are buffered before reaching terminating on the
FPGA. The timing signals are buffered through a bi-directional
buffer. The on-board synchronization module has a PLL that
generates the telecom bus clocks that are buffered through zero-delay
clock buffers.

CPLD has the processor interface to the backplane and generates CS

for all the processor accessible devices on-board.

5.4.1 Redundancy control

TJ100MC-4L provides for a redundancy on the XCC16L card. The
master and the slave card configuration can be forced using the hot
swap switch on the front panel of the XCC16L. When the hot swap
switch is activated, the respective card renders the peer card as the
master and takes over as a slave. The switch is functional only on the
card that is active provided another card is available in the stand-by
configuration. The backplane datapath inputs are available on both

Hardware Description Version 1.0

20 STM-4 cross connect card (XCC16L)

the cards while, the active card drives the backplane datapath outputs.
Both the cards are accessible to the SCU4 card The BITS/E1
reference from either of the cards can be used for synchronization.
The active card has a logical broadcast region that contains all the
configurable datapath utility. The active status is resolved by hardware
if Auto Negotiation is enabled. Else, it is software controlled on a
break-and-make basis. If autonegotiation is enabled, the stand-by
circuit pack takes control automatically if the active card is ejected or
made stand-by.

TJ100MC-4L
 6
System control unit (SCU4) 1-

6.1 Introduction
The SCU4 cards can be plugged into the slots 8 and 9 of the
TJ100MC-4L chassis. The SCU4 card initiates the configuration and
control of the other cards on the TJ100MC-4L system at boot-up.
The SCU4 card houses the Processor Sub-system (PSS) that handles
the control path. The system provides for redundancy on the SCU4
cards.

6.2 Power supply requirements

The SCU4 consumes a maximum power of 8W.

6.3 Construction
The SCU4 card can be plugged into the slots 8 and 9 of the
TJ100MC-4L chassis. The front panel supports visual indicators that
reflect the status of the card, a diagnostic interface through an RJ45
connector, and two push button switches for soft reset and
redundancy control. The front panel of the SCU4 card is as shown
below:

Hardware Description Version 1.0

22 System control unit (SCU4)

Table 6-1
Card Description
Visual Indicators:
LED Color Status
Active Amber blinking Card is booting up
Green Booting process complete
STATUS
ACTIVE

(Master)
Off Booting process complete
(Slave)
DIAG

Status Amber blinking Card is booting up

Green Booting process complete
SWAP
HOT

Off Card failure

Diagnostic Interface:
The diagnostic interface facilitates debugging through an RJ45 connector.
For details regarding the pin configuration and connection refer to the
Installation Procedure. Note that the diagnostic interface is authorized for
Tejas Networks personnel only.
Hot Swap Switch
The master and the slave card configuration of the redundant SCU4 cards
can be forced using the hot swap switch. When the hot swap switch is
activated, the respective card renders the peer card as the master and takes
over as a slave. The switch is functional only on the card that is active
provided another card is available in the stand-by configuration.

Reset Switch
The Reset switch, when activated provides a non-service disruptive reboot
on the card.
RESET

TJ100MC-4L
 System control unit (SCU4) 23

Functional description
The SCU4 performs the configuration, control, and processing of the
other cards on the TJ100MC-4L. The Management processor is a
versatile one-chip integrated microprocessor and peripheral
combination that is prominently used for communications and
networking systems. The processor incorporates memory
management units (MMUs) and instruction and data caches. It also
provides a dedicated communications processor module (CPM) and
inter-integrated controller I2 C channel.

The SCU4 has three types of memory interfaces,

• 16 MBytes Flash Memory

• 128 MBytes SDRAM
• 128 MBytes Compact Flash Disk
The SCU4 consists of a 32-bit microcontroller and an on board
external memory to implement the required functions. The software
residing in this block controls the overall management of the system.

A 1024 second timer is implemented on the card to check for

software errors. If this timer expires, the operating system (OS) and
application software is restarted. This restart is service non-affecting,
except for loss of management connectivity during the restart. The
time required for restarting the OS and the application software is
around 5 minutes.

Hardware errors are checked in the software every 10 seconds. The

minor, major, critical or deferred LED indication will glow depending
on the type and severity of error detected.

A real time clock (RTC) is available on board for time stamping of

alarms and events. The RTC maintains time in the event of power
failure (or powering off). The backup battery for this is a “super cap”
of value 1F. This capacitor will maintain the RTC time and calendar
functions for approximately 4 weeks after the system is powered off.

Hardware Description Version 1.0

24 System control unit (SCU4)

6.3.1 Memory
SCU4 has four types of memory on board which has following
functions:

• 128 bytes of non-volatile memory to hold part number, serial

numbers, and manufacturing test results. The memory contents
cannot be modified and are available for viewing from the user
interface.
• 16 Mbytes of non-volatile, which can be changed under program
control, to hold boot-loader, operating system, application
program and configuration information.
• 128 Mbytes of volatile memory for OS and application software
data and stack operations.
• 128Mb of mass storage.

TJ100MC-4L
 7
E1 tributary card (TET16, TET21, TET28) 1-

7.1 Introduction
The E1 cards, TET16, TET21, and TET28 are generic tributary cards
that can be used across all the Tejas’s STM-1/4 products. E1 tributary
interface cards provide line interfaces to 16 E1, 21 E1, and 28 E1
channels respectively in both, add and drop directions. These cards
map and demap the E1 channels into SDH/SONET frame (at
programmed slots) for the tributary card to make the cross connects.
The interface to the trunk card is through 19.44 MHz Telecom bus
for the SDH/SONET data path. The software control is with the
trunk card through a generic processor bus. This card can be plugged
into any of the slots from 10 to 14 of the TJ100MC-4L chassis.

7.2 Power supply requirements

7.2.1 Supply voltages
+12V 10%, supplied via a Type-N connector.

7.2.2 Power consumption

The power consumed by an E1 Tributary card is 8W.

7.3 Construction
The front panel of the TET28 card is below:

Hardware Description Version 1.0

26 E1 tributary card (TET16, TET21, TET28)

Table 7-1
Card Description
Visual Indicators
The visual indicators on the TET28 card includes two LEDs, the
ACTIVE and the STATUS LEDs. The possible LED status and their
significance is given below:
STATUS

LED Color Status

ACTIVE

ACTIVE Amber On insertion/power

ON
Green Initialization
Complete/In use
Red Card Inactive/Admin
E1 Down
STATUS Amber On insertion/power
ON
Green Initialization
Complete
15-28

Red Hardware
error/Admin down
Interfaces:
This card provides line interface to 28 E1 channels in both, add and drop
directions along with visual indicators. The E1 interface is provided
through 62 way D- type connectors. For details regarding the connectors
refer to the Installation Procedure.
The TET28 provides the following interfaces:
E1 interfaces on 120 ohm 62 way D- type connectors
Processor bus for control path communication to the other cards in the
subrack (to/from the backplane)
1-14

System clocks and timing signals (to/from the backplane)

E1 Monitor Interface:
Rev-2, E1 tributary cards have an E1 monitoring port that enables mon-
itoring desired E1 port (software configurable) through a 75 O BNC
connector.

TJ100MC-4L
 E1 tributary card (TET16, TET21, TET28) 27

7.3.1 Subrack Interface

The E1 Tributary cards use 2 Euro connectors to connect to the
backplane of the subrack. In addition, there is a power connector for
+12V d.c. input to the card. The subrack interface has the following:

• 16-bit parallel address/data bus for inter-card communication.

• Control signals for the inter-card communication bus.
• All equipment clocks (19.44MHz, 2.048MHz, 1.544MHz, 2kHz
Multi-Frame sync)
• 2 bi-directional telecom bus and associated control signals. Each
telecom bus carries one STM-1 worth of traffic.
• Status signals (CardPresent, Alarm, SlotIdentifier)
7.4 Functional description
The E1 signals terminate on the card through two 62 way D-type
connectors.

The E1 mapper supports mapping/demapping of 21/28 E1

tributaries into 19.44 MHz telecom bus at programmed slots. The
card supports dual telecom bus interface. A hardware-multiplexing
scheme is implemented to interface E1 mapper with the dual telecom
bus.

The CPLD performs address decoding of the devices on the card

along with some support functionality for inter card communication.

The I2 C serial EPROM contains card ID information like the serial

number, part number and number of E1 ports.

Note 1: Number of E1’s are factory configurable.

Note 2: Number of ports in TET 16 and TET 21 are 16 and 21 respectively. Except this
change, Hardware description for TET-16 and TET-21 remains same as given
above.

Hardware Description Version 1.0

28 E1 tributary card (TET16, TET21, TET28)

TJ100MC-4L
 8
E3/DS3 tributary card (TE31) 1-

8.1 Introduction
The 1 port E3/DS3 card is a generic tributary card that can be used
across all the Tejas STM-1/4 products. TE31 provides line interface
to an E3/DS3 channel in both, add and drop directions. The port is
software configurable to support E3/DS3 rates correspondingly. The
card maps E3/DS3 tributaries into a AU-3/AU-4. This card can be
plugged into any of the slots from 10 to 14 of the TJ100MC-4L
chassis.

8.2 Power supply requirements

8.2.1 Supply voltages
12V ± 10%, supplied via a Type-N connector.

8.2.2 Power consumption

The maximum power consumed by TE31 is 6 W.

8.3 Construction
The front panel of the TE31 is as shown below:

Hardware Description Version 1.0

30 E3/DS3 tributary card (TE31)

Table 8-1
Card Description
Visual Indicators:
The visual indicators on the TE31 card includes two LEDs, the ACTIVE
and the STATUS LEDs. The possible LED status and their significance
is given below:
STATUS
ACTIVE

LED Color Status

ACTIVE Amber On insertion/power
ON
Green Initialization
Complete/In use
Red Card Inactive/Admin
Down
STATUS Amber On insertion/power
ON
Green Initialization
Complete
Red Hardware
error/Admin down
E3/DS3 Interface:
E3/DS3 This card provides line interface to an E3/DS3 channel in both, add and
drop directions along with visual indicators. The E3/DS3 interface is
Tx

provided through BNC connectors. For details regarding the connectors

1

refer to the Installation Procedure.

Rx

The TE31 provides the following interfaces:

• 1 E3/DS3 interface through 75 ohm BNC connectors
• Processor bus for control path communication to the other cards in the
subrack (to/from the backplane)
• System clocks and timing signals (to/from the backplane)

TJ100MC-4L
 E3/DS3 tributary card (TE31) 31

8.3.1 Subrack interface

The TE31 uses 2 Euro connectors to connect to the backplane of the
subrack. In addition, there is a power connector for +12V d.c. input
to the card. The subrack interface has the following:

• 16-bit parallel address/data bus for inter-card communication.

• Control signals for the inter-card communication bus.
• All equipment clocks (19.44MHz, 2.048MHz, 1.544MHz, 2kHz
Multi-Frame sync)
• 2 bi-directional telecom bus and associated control signals. Each
telecom bus carries one STM-1 worth of traffic.
• Status signals (CardPresent, Alarm, SlotIdentifier)
8.3.2 Traffic interfaces
The TE31 card has two BNC connectors for the 75 ohm E3/DS3
interface. For details regarding the connectors refer to the Installation
Procedure. These interfaces confirm to ITU-T G.703 standard.

8.4 Functional description

TE31 maps E3/DS3s into VC-3/AU-4. It also does the reverse
functionality of extracting the E3/DS3 from the VC-3/AU-4. The
TE31 is user configurable for either E3 or DS3 application. E3/DS3
High Density Bipolar 3 (HDB3) or B3ZS coded signals enter the
TE31 from the BNC connectors. They are magnetically coupled into
the Line Interface Unit (LIU), which does clock recovery,
HDB3/B3ZS decoding and alarm detection. Alarms detected by the
LIU are Loss Of Signal (LOS) and Alarm Indication Signal (AIS).
These alarms optionally cause an AIS signal to be generated towards
the SDH side and the PDH side. The LIU sends out digital NRZ
E3/DS3 signals, along with the extracted clock, to the Mapper ASIC.
The Mapper ASIC receives system frame, payload and multi-frame
indication from the timing block in the TE31. The incoming E3/DS3
signal is mapped into the VC-3. Asynchronous mapping of the
E3/DS3 is performed and bit stuffing is used to compensate for the
plesiochronous rate differences in the system VC-3 rate and the
incoming E3/DS3 rate. This TUG-3 is mapped on to a specific time
slot on the ‘Add’ telecom bus. The time slot chosen is according to
the telecom bus slot selection algorithm and depends on the existing
cross-connects in the system and the available slots to the mapper
ASIC.

Hardware Description Version 1.0

32 E3/DS3 tributary card (TE31)

TJ100MC-4L
 9
3 E3/DS3 tributary card (TE33) 1-

9.1 Introduction
The 3 port E3/DS3 card is a generic tributary card that can be used
across all the Tejas’s STM-1/4/16 products. TE33 provides line
interface to 3 E3/DS3 channels in both, add and drop directions.
Each of the three ports on the card are independently software
configurable to support E3/DS3 rates correspondingly. The card
maps E3/DS3 tributaries into a AU-3/AU-4.

9.2 Power supply requirements

9.2.1 Input voltage
12V ± 10%, supplied via a Type-N connector.

9.2.2 Power consumption

The TE33 consumes a maximum power of 7W.

9.3 Construction
The front panel of the TE33 is as shown below:

Hardware Description Version 1.0

34 3 E3/DS3 tributary card (TE33)

Table 9-1
Card Description
Visual Indicators:
The visual indicators on the TE33 card includes two LEDs, the ACTIVE
and the STATUS LEDs. The possible LED status and their significance
is given below:
STATUS
ACTIVE

LED Color Status

ACTIVE Amber On insertion/power
ON
Green Initialization
Complete/In use
Red Card Inactive/Admin
Down
E3/DS3

STATUS Amber On insertion/power

Tx

ON
Green Initialization
3

Complete
Rx

Red Hardware
error/Admin down
E3/DS3 Interface:
Tx

This card provides line interface to 3 E3/DS3 channels in both, add and
drop directions along with visual indicators. The 3 E3/DS3 interfaces are
2

provided through BNC connectors. For details regarding the connectors

Rx

refer to the Installation Procedure.

The TE33 provides the following interfaces:
• 3 E3/DS3 interfaces through 75 ohm BNC connectors
Tx

• Processor bus for control path communication to the other cards in the
subrack (to/from the backplane)
1

• System clocks and timing signals (to/from the backplane)

Rx

TJ100MC-4L
 3 E3/DS3 tributary card (TE33) 35

9.3.1 Subrack interface

The TE33 uses 2 Euro connectors to connect to the backplane of the
subrack. In addition, there is a power connector for +12V d.c. input
to the card. The subrack interface has the following:

• 16-bit parallel address/data bus for inter-card communication.

• Control signals for the inter-card communication bus.
• All equipment clocks (19.44MHz, 2.048MHz, 1.544MHz, 2kHz
Multi-Frame sync)
• 2 bi-directional telecom bus and associated control signals. Each
telecom bus carries one STM-1 worth of traffic.
• Status signals (CardPresent, Alarm, SlotIdentifier)
9.3.2 Traffic interfaces
The TE33 card has six BNC connectors for the 75 ohm E3/DS3
interfaces. For details regarding the connectors refer to the
Installation Procedure. These interfaces confirm to ITU-T G.703
standard.

9.4 Functional description

This card provides line interface to 3 E3/DS3 channels in both, add
and drop directions along with visual indicators. The E3/DS3 serial
data terminates on LIUs via the transformers on the card. The LIU
can be configured to take either E3/DS3 data. The LIU provides
adaptive equalization. The data from LIU is passed on to the Mapper
which maps E3/DS3 data into STM-1 frame. The Mapper also
provides jitter attenuation feature. Even though the Mapper provides
77.76MHz telecom bus interface, it is capable of inter-operating with
19.44MHz telecom bus of backplane.

The CPLD on the card controls the devices on the card by providing
following functionalities:

• Address decoding and chip selection of various devices on the

card
• Give reset to all the devices
• Generate single interrupt to processor from various on card
interrupts
• Configure LIUs
• Provide timing signals to Mapper

Hardware Description Version 1.0

36 3 E3/DS3 tributary card (TE33)

TJ100MC-4L
Ethernet tributary card (ETC, ETCFT)
10 1-

10.1 Introduction
The Ethernet tributary card, ETC and ETCFT are generic tributary
cards that can be used across all the Tejas’s STM-1/4 products. ETC
tributary interface cards provide line interfaces to 8 10/100Mbps
Ethernet ports. ETCFT tributary interface cards provide line
interfaces to 4 100BASE-FX Ethernet ports. These cards map and
de-map the Ethernet ports into SDH by using (maximum of) 63
VC-12s of the SDH frame. The time slot in which this VC-12 gets
mapped/de-mapped is programmable through software. This card
can be plugged into any of the slots from 10 to 14 of the TJ100MC-4L
chassis.

The interface to the tributary card is through 19.44 MHz Telecom bus
for the SDH data path. The software control is provided to ETC by
interfacing it to the System Controller Card using the back plane.

10.2 Power supply requirements

10.2.1 Input supply voltages
12V ± 10%, supplied via a Type-N connector.

10.2.2 Power consumption

The maximum power consumed by an ETC card is 25W.

10.3 Construction
The front panel of the ETC card is as shown below:

Hardware Description Version 1.0

38 Ethernet tributary card (ETC, ETCFT)

Table 10-1
Card Description
Visual Indicators:
The details of the visual indicators on the ETC card is given below:
LED Color Status
ACTIVE Green Card is Active
STATUS
ACTIVE

Amber Card is Booting

Off Card Failure
STATUS Green Card is Good
DIAG

Off Card is failed

1
2

RJ45-Amber Off 10Mbps link active

3
4

when port is in-service

5
6

Amber 100Mbps link active

7
8

RJ45-Green Off Link Failure

Green LED ON, if Link
8

pulses detected (10 or

100 Mbps). LED
Blinks, if Activity
7

Determined
Diagnostic Interface:
6

The diagnostic interface facilitates debugging through an RJ45

connector. For details regarding the pin configuration and connection
5

refer to the Installation Guide. Note that the diagnostic interface is

authorized for Tejas personnel only.
Interfaces:
4

ETC supports the following Interfaces:

• Line side interface for eight 10/100 Mbps full/half duplex Ethernet
3

ports through RJ45 connectors.

• Diag Interface through an RJ45 connector.
2

• Processor bus for the control path communication to the other cards in
the subrack (to/from the back plane)
1

• Two telecom buses for the data path interface to the tributary cards
(to/from the backplane)

TJ100MC-4L
 Ethernet tributary card (ETC, ETCFT) 39

Table 10-2
Card Description
Visual Indicators:
The details of the visual indicators on the ETC-F card is given below:
LED Color Status
ACTIVE Green Card is Active
STATUS
ACTIVE
ACTIVE

Amber Card is Standby

Off Card Failure
DIAG

STATUS Green Card is Good

Red Card is failed
Tx
Rx

Tx Off Card Failure

4

Green
3

Transmit enabled on
2

Fx port.
1

Red Transmit disabled on

Fx port
100 BASE- FX
Tx 4 Rx

Rx Off Card Failure

Green Signal detected on Fx
port.
100 BASE- FX
Tx

Red Loss of signal on Fx

3 Rx

port.
Diagnostic Interface:
The diagnostic interface facilitates debugging through an RJ45 connec-
100 BASE- FX
Tx 2

tor. For details regarding the pin configuration and connection refer to
the Installation Guide. Note that the diagnostic interface is authorized
Rx

for Tejas personnel only.

Interfaces:
Tx 1 Rx
100 BASE- FX

ETCFT supports the following Interfaces:

• Line side interface for four 100 Base FX on SC-PC Connectors
• Diag Interface through an RJ45 connector.
• Processor bus for the control path communication to the other cards in
the subrack (to/from the back plane)
• Two telecom buses for the data path interface to the tributary cards
(to/from the backplane)

Hardware Description Version 1.0

40 Ethernet tributary card (ETC, ETCFT)

10.3.1 Subrack interface

The Ethernet Tributary card uses 2 Euro connectors to connect to the
backplane of the subrack. The subrack interface has the following:

• 16-bit parallel address/data bus for inter-card communication.

• Control signals for the inter-card communication bus.
• All equipment clocks (19.44MHz, 2.048MHz, 1.544MHz, 2kHz
Multi-Frame sync)
• 2 bi-directional telecom bus and associated control signals. Each
telecom bus carries one STM-1 worth of traffic.
• Status signals (CardPresent, Alarm, SlotIdentifier)
10.4 Functional description
The network processor takes in the Ethernet frames from the octal
MAC device and converts it into PPP/LAPS packets and sends it to
the TDM FPGA. Similarly, in the other direction it takes in
PPP/LAPS packets from TDM FPGA and converts it to Ethernet
frames and sends it to octal MAC.

The octal MAC chip interfaces to IX bus and receives Ethernet

frames from the Network Processor. The received frames are then
transmitted to PHY layer devices. Similarly in the other direction it
takes in data from MII ports and transfers it to the Network
Processor.

The quad PHY devices are used to interface physical Ethernet ports
to MII interface. Each of these devices is capable of interfacing four
ports.

Depending upon the assembly configuration, the card has 8 RJ-45

connectors or 4 Fiber transceivers or 4 RJ-45 and 2 Fiber transceivers.

FPGA acts as a bridge between IX bus and the Telecom bus. The
HDLC frames from the FPGA are mapped into VC-12s of the SDH
frames (using virtual concatenation) and then transmitted on the
Telecom bus. The FPGA also de-maps the HDLC frames from the
VC-12s and then puts them onto the IX bus after removing the
HDLC framing bytes. This FPGA is designed in Tejas Networks
India Ltd. and can support mapping and de-mapping of 63 VC-12s.

TJ100MC-4L
 Ethernet tributary card (ETC, ETCFT) 41

The card fully complies with the recent Ethernet over SDH/SONET
standards on virtual concatenation, Ethernet framing over SDH, and
dynamic bandwidth resizing as per ITU-T and ANSI.

Hardware Description Version 1.0

42 Ethernet tributary card (ETC, ETCFT)

TJ100MC-4L
Ethernet tributary card (TP01)
11 1-

11.1 Introduction
The Ethernet tributary card, TP01 is a generic tributary card that can
be used across all the Tejas Networks’ STM-1/4/16 products. TP01
tributary interface cards provide line interfaces to eight 10/100Mbps
Tx port. This card maps and de-maps the Ethernet data into the
virtual containers of different granularity (VC 12/VC 3/VC 4 or VT
1.5/STS1/STS-3c) of the SDH/SONET frame. The VC in which the
data is mapped / de-mapped is programmable through software.

11.2 Power supply requirements

11.2.1 Input supply voltages
Input supply voltage is -12V ± 10%.

11.2.2 Power consumption

The maximum power consumed by a TP01 card is 8W.

11.3 Construction
The front panel of the TP01 card is as shown below:

Hardware Description Version 1.0

44 Ethernet tributary card (TP01)

Table 11-1
Card Description
Visual Indicators:
The details of the visual indicators on the ETC card is given below:
LED Color Status
Active Amber Card jacked in/iniliatize
STATUS

ACTIVE

Green Card initialized

Red Admin down
Off Card Failure
Status Green Card recognized
Red Admin down
Off Card Failure
RJ45-Amber Off 10Mbps Mode is enabled
8

Amber 100Mbps Mode is enabled

RJ45-Green Off Link Failure
7

Green LED on if Link pulses

6

Detected (10 or 100 Mbps).

LED Blinks, if there is an
5

activity on the link.

4
3
2
1

TJ100MC-4L
 Ethernet tributary card (TP01) 45

11.3.1 Subrack interface

The Ethernet Tributary card uses 2 Euro connectors to connect to the
backplane of the chassis. The subrack interface has the following:

• 16-bit parallel address/data bus for inter-card communication.

• Control signals for the inter-card communication bus.
• All equipment clocks (19.44MHz, 2.048MHz, 1.544MHz, 2kHz
Multi-Frame sync)
• 2 bi-directional telecom bus and associated control signals. Each
telecom bus carries one STM-1 worth of traffic.
• Status signals (CardPresent, Alarm, SlotIdentifier)
11.4 Functional description
From the Ethernet line side the Ethernet data is taken into the TP01
card using RJ-45 connector. This is interfaced to an octal PHY that in
turn supplies the raw Ethernet data to the Ethernet mapper via SMII
interface. PHY will support both auto –negotiations and auto
MDI/MDIX cross over on systems.

The mapper supports connection up to eight 10/100 Mbps Ethernet

ports. In the mapper Ethernet frames are encapsulated using GFP,
LAPS or LAPF protocol. The encapsulated Ethernet frames are then
mapped into either virtually concatenated low or high order payloads,
such as VT1.5 SPE/VC-12/STS-1 SPE/VC-3, or into contiguously
concatenated payloads such as STS-3c SPE/VC-4.

In the other direction, the SDH/SONET data from the backplane

interface will go to the mapper and the MAC (MAC is the part of
mapper). This will decode the Ethernet frames. This Ethernet frame
then via PHY will reach RJ-45 connector.

Hardware Description Version 1.0

46 Ethernet tributary card (TP01)

TJ100MC-4L
Ethernet tributary card (TP01FT)
12 1-

12.1 Introduction
The Ethernet tributary card, TP01FT is a generic tributary card that
can be used across all the Tejas Networks’ STM-1/4/16 products.
TP01FT tributary interface cards provide to four 10-Base T/100 base
T Ethernet ports and four 100BASE-FX Ethernet ports. This card
maps and de-maps the Ethernet data into the virtual containers of
different granularity (VC 12/VC 3/VC 4 or VT 1.5/STS1/STS-3c) of
the SDH/SONET frame. The VC in which the data is mapped /
de-mapped is programmable through software.

12.2 Power supply requirements

12.2.1 Input supply voltages
Input supply voltage is -12V ± 10%.

12.2.2 Power consumption

The maximum power consumed by a TP01FT card is 10W.

12.3 Construction
The front panel of the TP01FT card is as shown below:

Hardware Description Version 1.0

48 Ethernet tributary card (TP01FT)

Table 12-1
Card Description
Visual Indicators:
The details of the visual indicators on the ETC card is given below:
LED Color Status
Active Amber Card jacked in
Green Card initialized
STATUS

ACTIVE

Off/Red Card Failure

Status Green Card recognized
Rx
Tx

Off/Red Card Failure

P8

Off
P7

RJ45-Amber 10Mbps Mode is enabled

P6

Amber 100Mbps Mode is enabled

P5

RJ45-Green Off Link Failure

P8

Green LED on if Link Detected (10

or 100). LED Blinks if there is
an activity on the link.
P7

Tx Off Card Failure

Green
P6

Transmit enabled on Fx port.

Red Transmit disabled on Fx port
P5

Rx Off Card Failure

Green Signal detected on Fx port.
P4

Red Loss of signal on Fx port.

P3
P2
P1

TP01 FT

TJ100MC-4L
 Ethernet tributary card (TP01FT) 49

12.3.1 Subrack interface

The Ethernet Tributary card uses 2 Euro connectors to connect to the
backplane of the chassis. The subrack interface has the following:

• 16-bit parallel address/data bus for inter-card communication.

• Control signals for the inter-card communication bus.
• All equipment clocks (19.44MHz, 2.048MHz, 1.544MHz, 2kHz
Multi-Frame sync)
• 2 bi-directional telecom bus and associated control signals. Each
telecom bus carries one STM-1 worth of traffic.
• Status signals (CardPresent, Alarm, SlotIdentifier)
12.4 Functional description
From the Ethernet line side the Ethernet data is taken into the
TP01FT card using RJ-45 connector and short-form factor
transreceivers. This is interfaced to an octal PHY that in turn supply
the raw Ethernet data to the Ethernet mapper via SMII interface.
PHY will support both auto –negotiations and auto MDI/MDIX
cross over on the Tx port. Fx port always work at 100Mbps.

The mapper supports connection up to eight 10/100 Mbps Ethernet

ports. In the mapper Ethernet frames are encapsulated using GFP,
LAPS or LAPF protocol. The encapsulated Ethernet frames are then
mapped into either virtually concatenated low or high order payloads,
such as VT1.5 SPE/VC-12/STS-1 SPE/VC-3, or into contiguously
concatenated payloads such as STS-3c SPE/VC-4.

In the other direction, the SDH/SONET data from the backplane

interface will come to the mapper and the MAC (MAC is the part of
mapper). This will decode the Ethernet frames. This Ethernet frame
then via PHY will reach RJ-45 connector or the SFF transreceiver.

Hardware Description Version 1.0

50 Ethernet tributary card (TP01FT)

TJ100MC-4L
STM-1 aggregate/tributary card (A011, A012)
13 1-

13.1 Introduction
The STM1- Aggregate/Tributary cards are generic tributary cards that
can be used across all the Tejas’s STM-1/4 products. The STM-1
Tributary cards, A011, and A012 are designed to function as 1 port
STM-1 and 2 port STM-1 tributary cards respectively. This card can
be plugged into any of the slots from 10 to 14 of the TJ100MC-4L
chassis.

13.2 Power supply requirements

13.2.1 Input voltage
12V ± 10%, supplied via a Type-N connector.

13.2.2 Power consumption

The maximum power consumed by an STM-1 tributary card is 12W.

13.3 Construction
The front panel of the STM-1 tributary card is given below:

Hardware Description Version 1.0

52 STM-1 aggregate/tributary card (A011, A012)

Table 13-1
Card Description
Visual Indicators:
The visual indicators in the STM-1 cards include the Active and the
Status LEDs and an LED each for Tx and Rx for the STM interfaces.
The possible LED status and their significance is given below:
LED Color Status
STATUS
ACTIVE

ACTIVE Amber On insertion/power

ON
Green Initialization
Complete/In use
Red Card Inactive/Admin
Down
Rx
Tx

STATUS Amber On insertion/power

2

ON
1

Green Initialization
Complete
Red Hardware
error/Admin down
Tx Green Laser is ON, and the
corresponding port is
transmitting.
Red Laser is OFF.
S1.1 Rx Green The corresponding
port is receiving a
Tx

signal.
2

Red The corresponding

Rx

port is not receiving a

S1.1
signal.
Tx
1
Rx

TJ100MC-4L
 STM-1 aggregate/tributary card (A011, A012) 53

Table 13-1 continue

Interfaces:
This card is designed to provide a 2 port STM-1 tributary card. The STM-1 interfaces are provided
through SC connectors. For details regarding the connectors refer to the Installation Procedure.
• 2 STM-1 interfaces through SC connectors.
• Processor bus for control path communication to the other cards in the subrack (to/from the
backplane)
• 2 telecom buses for the data path interface to the tributary card (to/from the backplane)
• System clock and timing signals (to/from the backplane)

13.3.1 Subrack interface

The STM-1 aggregate/tributary cards use 2 Euro connectors to
connect to the backplane of the subrack. The following subrack
interfaces are supported:

• 16-bit parallel address/data bus for inter-card communication.

• Control signals for the inter-card communication bus.
• All equipment clocks (19.44MHz, 2.048MHz, 1.544MHz, 2kHz
Multi-Frame sync)
• 2 bi-directional telecom bus and associated control signals. Each
telecom bus carries one STM-1 worth of traffic.
• Status signals (CardPresent, Alarm, SlotIdentifier)
13.4 Functional description
The SDH subsystem comprises of the optical transceiver for the
STM-1 interfaces, the STM-1 Overhead Processors, Pointer
Processing Devices and Protection Switching devices.

The STM1 aggregate/Tributary Card has two optical transceivers

operating at STM-1 rate for the tributary interface. The STM-1
Transceiver complies the L1.1 and S1.1 requirements of the G.957
standard set for optical interfaces for SDH Systems.

The overhead termination device provides a Telecom Bus interface

for downstream devices. The pointer processors adapt the payload to
the system clock and frame rate. The STM1 Tributary Card gets a
19.44 MHz clock from the backplane.

The programmable logic subsystem comprises of a CPLD and a

Multifunction FPGA that performs different functions.

Hardware Description Version 1.0

54 STM-1 aggregate/tributary card (A011, A012)

The CPLD on the board performs the following functions. The

different functions are register controllable using a processor
interface.

• Address Decoding and Chip select generation

• Reset Generation
• Backplane Connector Interfacing
• Miscellaneous Signals Interfacing
• Interrupt Controller
The Multifunction FPGA on this card board performs the following
functions.

• In-band control (IBC) channel Logic k

• Alarms Processing
• Orderwire Channel
• Telecom Bus Timing
• HDLC Controller
The A012 can be configured to work as an aggregate card as well as a
tributary card. The bus switch does the following functions.

• The Backplane bus selection for the telecom bus from the
different ports.
• On reset, it prevents the ADD timing signals to be driven out of
the card. This can be enabled when floating timing mode is
selected in the A012 FPGA register.
13.5 Optical power specifications
The optical interface specifications are given below:
Table 13-2
Unit Values
Digital signal Mbps 155.52
Nominal bit rate
Optical Interface S1.1 S1.2 L1.1 L1.2
Operating wavelength nm 1310 1550 1310 1550
Source type MLM MLM SLM MLM SLM SLM

TJ100MC-4L
 STM-1 aggregate/tributary card (A011, A012) 55

Table 13-2
Spectral Maximum nm 7.7 2.5 - 3 - -
characteristi RMS width ()
cs: Maximum - - 1 - 1 1
–20db width
Mean Maximum dBm -8 -8 0 0
launched Minimum -15 -15 -5 -5
power:

Minimum extinction ratio dBm 8.2 8.2 10 10

Minimum sensitivity dBm -28 -28 -34 -34
Minimum overload dBm -8 -8 -10 -10

Note : A011 and A012 has one and two ports respectively.

Hardware Description Version 1.0

56 STM-1 aggregate/tributary card (A011, A012)

TJ100MC-4L
STM-1e/E4 tributary card (A1E4)
14 1-

14.1 Introduction
The A1E4 card is designed to support STM-1e/E4 interfaces and can
be used across all the Tejas’s STM-1/4 products. This card can be
plugged into any of the slots from 10 to 14 of the TJ100MC-4L
chassis.

14.2 Power supply requirements

14.2.1 Input voltage
12V ± 10%, supplied via a Type-N connector.

14.2.2 Power consumption

The maximum power consumed by an A1E4 card is 12W.

14.3 Construction
The front panel of the A1E4 card is shown below:

Hardware Description Version 1.0

58 STM-1e/E4 tributary card (A1E4)

Table 14-1
Card Description
Visual Indicators:
The visual indicators in the A1E4 card include the Active and the Status
LEDs and an LED each for Tx and Rx for the interface. The possible
LED status and their significance is given below:
STATUS
ACTIVE

LED Color Status

ACTIVE Amber On insertion/power ON
Green Initialization Complete/In
use
Red Card Inactive/Admin
Rx
Tx

Down
1

STATUS Amber On insertion/power ON

Green Initialization Complete
Red Hardware error/Admin
down
Tx Green Port transmit is ON, and
the corresponding port is
transmitting.
Red Port transmit is Off
Rx Green The corresponding port is
receiving a signal.
Red The corresponding port is
not receiving a signal.
Interfaces:
This card is designed to provide STM-1/E4 interface. The STM-1/E4
interface is provided through BNC connectors. For details regarding the
connectors refer to the Installation Procedure.
• 1 STM-1e/E4 interface through 75 BNC connectors.
• Processor bus for control path communication to the other cards in the
subrack (to/from the backplane)
• 2 telecom buses for the data path interface to the tributary cards
(to/from the backplane)
• System clocks and timing signals (to/from the backplane)

TJ100MC-4L
 STM-1e/E4 tributary card (A1E4) 59

14.3.1 Subrack interface

The A1E4 card uses 2 Euro connectors to connect to the backplane
of the subrack. The following subrack interfaces are supported:

• 16-bit parallel address/data bus for inter-card communication.

• Control signals for the inter-card communication bus.
• All equipment clocks (19.44MHz, 2.048MHz, 1.544MHz, 2kHz
Multi-Frame sync)
• 2 bi-directional telecom bus and associated control signals. Each
telecom bus carries one STM-1 worth of traffic.
• Status signals (CardPresent, Alarm, SlotIdentifier)
14.4 Functional description
The A1E4 card is designed to support STM-1e/E4 interfaces. The
electrical interface is designed to receive 139.264 Mbps or 155.52
Mbps data to be transmitted to the E4 Mapper and the STM1
Overhead terminator.

The programmable logic subsystem comprises of a CPLD and a

Multifunction FPGA that performs different functions. The CPLD
on the board performs the following functions.

• Address Decoding and Chip select generation

• Reset Generation
• Backplane Connector Interfacing
• Miscellaneous Signals Interfacing
• Interrupt Controller
The Multifunction FPGA on the A1E4 board performs the following
functions.

• In-band control (IBC) channel Logic

• Alarms Processing
• Orderwire Channel
• Telecom Bus Timing
• HDLC Controller

Hardware Description Version 1.0

60 STM-1e/E4 tributary card (A1E4)

TJ100MC-4L
STM-1e tributary card(A012E)
15 1-

15.1 Introduction
The A012E card is designed to support STM-1e interface that can be
used across all the Tejas’s STM-1/4 products. This card can be
plugged into any of the slots from 10 to 14 of the TJ100MC-4L
chassis.

15.2 Power supply requirements

15.2.1 Input voltage
12V ± 10%, supplied via a Type-N connector.

15.2.2 Power consumption

The maximum power consumed by an A012E card is 12W.

15.3 Construction
The front panel of the A1E4 card is shown below:

Hardware Description Version 1.0

62 STM-1e tributary card(A012E)

Table 15-1
Card Description
Visual Indicators:
The visual indicators in the A012E card include the Active and the Status
LEDs and an LED each for Tx and Rx for the interfaces. The possible
LED status and their significance is given below:
STATUS
ACTIVE

LED Color Status

ACTIVE Amber On insertion/power ON
Green Initialization Complete/In
use
Red Card Inactive/Admin Down
Rx

STATUS Amber On insertion/power ON

Tx

Green Initialization Complete

1

Red Hardware error/Admin

down
Tx Green Port transmit is ON, and the
corresponding port is
transmitting.
Red Port transmit is Off
Rx Green The corresponding port is
receiving a signal.
STM1e
Red The corresponding port is
not receiving a signal.
Tx

Interfaces:
2
Rx

This card is designed to provide STM-1e interface. The STM-1e interface

is provided through BNC connectors. For details regarding the
connectors refer to the Installation Guide.
Tx

• 2 STM-1e interfaces through BNC connectors.

1

• Processor bus for control path communication to the other cards in the
Rx

subrack (to/from the backplane)

• 2 telecom buses for the data path interface to the tributary cards
(to/from the backplane)
• System clocks and timing signals (to/from the backplane)

TJ100MC-4L
 STM-1e tributary card(A012E) 63

15.3.1 Subrack interface

The A012E card uses 2 Euro connectors to connect to the backplane
of the subrack. The following subrack interfaces are supported:

• 16-bit parallel address/data bus for inter-card communication.

• Control signals for the inter-card communication bus.
• All equipment clocks (19.44MHz, 2.048MHz, 1.544MHz, 2kHz
Multi-Frame sync)
• 2 bi-directional telecom bus and associated control signals. Each
telecom bus carries one STM-1 worth of traffic.
• Status signals (CardPresent, Alarm, SlotIdentifier)
15.4 Functional description
The SDH subsystem comprises of the STM-1e Daughter Card, the
STM-1 Overhead Processors, Pointer Processing Devices and
Protection Switching Buffers. A tributary unit pointer processor is
used so that the AU-4 pointer can be fixed to 522 for column
switching the TU12s inside the Crossconnect Device. The A012E
card circulative gets a 19.44 MHz clock from the backplane.

The programmable logic subsystem comprises of a CPLD and a

Multifunction FPGA that performs different functions.

The CPLD on the board performs the following functions.

• Address Decoding and Chip select generation

• Reset Generation
• Backplane Connector Interfacing
• Miscellaneous Signals Interfacing
• Interrupt Controller
The Multifunction FPGA performs the following functions.

• In-band control (IBC) channel Logic

• Alarms Processing
• Orderwire Channel
• Telecom Bus Timing
• HDLC Controller

Hardware Description Version 1.0

64 STM-1e tributary card(A012E)

The A012E can be configured to work in as an aggregate card as well

as a tributary card. The bus switch does the following functions.

• The Backplane bus selection for the telecom bus from the
different ports.
• On reset, it prevents the ADD timing signals to be driven out of
A012E card. This can be enabled when floating timing mode is
selected in the A012E FPGA register.

TJ100MC-4L
STM-4 aggregate/tributary card
16
(A041,A041VLR) 1-

16.1 Introduction
The STM-4 Tributary cards, A041, and A041VLR (Very Long Reach)
are designed to function as 1 port STM-4 tributary cards.

16.2 Power supply requirements

16.2.1 Input voltage
12V ± 10%, supplied via a Type-N connector.

16.2.2 Power consumption

The maximum power consumed by an STM-4 tributary card is 15W.

16.3 Construction
The front panel of the STM-4 tributary card is shown below:

Hardware Description Version 1.0

66 STM-4 aggregate/tributary card (A041,A041VLR)

Table 16-1
Card Description
Visual Indicators:
The visual indicators in the STM-4 cards include the Active and the
Status LEDs and an LED each for Tx and Rx for the STM interfaces.
The possible LED status and their significance is given below:
STATUS
ACTIVE

LED Color Status

ACTIVE Amber On insertion/power
ON
Green Initialization
Complete/In use
Red Card Inactive/Admin
Rx
Tx

Down
1

STATUS Amber On insertion/power

ON
Green Initialization
Complete
Red Hardware
error/Admin down
Tx Green Laser is ON, and the
corresponding port is
transmitting.
Red Laser is OFF.
Rx Green The corresponding
port is receiving a
signal.
L4.2 Red The corresponding
port is not receiving a
Tx

signal.
1
Rx

TJ100MC-4L
 STM-4 aggregate/tributary card (A041,A041VLR) 67

Table 16-1 continue

Interfaces:
This card is designed to provide an STM-4 tributary card. The STM-4 interface is provided
through SC connectors. For details regarding the connectors refer to the Installation Procedure
• 21 STM-4 interface through SC connectors.
• Processor bus for control path communication to the other cards in the subrack (to/from the
backplane)
• telcom buses for the data path interface to the tributary cards (to/from the backplane)
• System clocks and timing signals (to/from the backplane)

16.3.1 Subrack interface

The STM-4 tributary cards use 2 Euro connectors to connect to the
backplane of the subrack. The following subrack interfaces are
supported:

• 16-bit parallel address/data bus for inter-card communication.

• Control signals for the inter-card communication bus.
• All equipment clocks (19.44MHz, 2.048MHz, 1.544MHz, 2kHz
Multi-Frame sync)
• 2 bi-directional telecom bus and associated control signals. Each
telecom bus carries one STM-1 worth of traffic.
• Status signals (CardPresent, Alarm, SlotIdentifier)
16.4 Functional description
The SDH subsystem comprises of the optical transceiver for the
STM-4 interface, the STM-4 Overhead Terminator and Pointer
Processor.

The A041 Card has one optical transceiver operating at STM-4 rate
for the tributary interface. The optical transceiver mounted on the
card can be of L/S 4.1/4.2 types defined in ITU-T G.957. The
maximum span that can be achieved with a L4.2 Transceiver mounted
is 24dB (~80km).

The received STM-4 frame has to be processed for all alarms and
performance monitoring signals. In the receive direction, the
overhead terminator performs RSOH, MSOH and HO-POH
processing. This device also provides serial access to all the
user-defined bytes in the RSOH, MSOH and HO-POH. In the

Hardware Description Version 1.0

68 STM-4 aggregate/tributary card (A041,A041VLR)

transmit direction, this device generates the full OH bytes for the
STM-4 frame. It calculates and inserts the B1 and B2 BIPs, the remote
alarms and the DCC channels.

The pointer processor provides useful maintenance functions. They

include, for each tributary, detection of loss of pointer, detection of
AIS alarm, detection of tributary path signal label mismatch and
unstable alarms, detection of tributary path trace mismatch and
unstable alarms. The system clock, 19.44MHz is available as input
from the back-plane.

The programmable logic subsystem comprises of a CPLD and a

Multifunction FPGA and Flash that performs different functions.
The CPLD on the board performs the following functions.

• Address Decoding and Chip select generation

• Reset Generation
• Backplane Connector Interfacing
• Data Buffer and telecom bus buffer control Signals
• Laser Controller
• Flash control signals
• Interrupt Controller
The Multifunction FPGA on the A041 card performs the following
functions.

• In-band control (IBC) channel Logic

• Alarms Processing
• Orderwire Channel
• Telecom Bus Timing k
• HDLC Controller
• Line DCC Pass-thru
• ADC access logic
Flash is used to store identification/information about the card. It
contains Assembly Part Number, Serial Number, and Revision No. of
the card

TJ100MC-4L
 STM-4 aggregate/tributary card (A041,A041VLR) 69

16.5 Optical power specifications

The optical interface specifications are given below:
Table 16-2
Unit Values
A041 A041
VLR
Digital signal Mbps 622.08
Nominal bit rate
Optical Interface S4.1 L4.1 L4.2 V4.2

Digital signal
Nominal bit rate
Optical Interface S4.1 L4.1 L4.2 V4.2
Operating wavelength nm 1310 1310 1550 1550
Source type MLM MLM SLM SLM
Spectral characteristics: nm 2.5 1.7
- maximum RMS width (σ)
-maximum –20dB width nm - - <1
Mean launched power: dBm
Maximum -8 +2 +2 +4
Minimum -15 -3 -3 0
Minimum extinction ratio dB 8.2 10 10 10
Minimum sensitivity dBm -28.0 -28.0 -28.0 -34.0
Minimum overload dBm -8.0 -8.0 -8.0 -18.0

Hardware Description Version 1.0

70 STM-4 aggregate/tributary card (A041,A041VLR)

TJ100MC-4L
Ethernet Tributary Card (TR01)
17 1-

17.1 Introduction
The TR01 card contains all the necessary hardware to support one
STM-1 bandwidth of Ethernet traffic via Electrical or optical
interface. This is a generic tributary card which provides line interface
to 8 10/100Mbps (FE) and 2 1000Mbps (GE) Ethernet ports. This
card maps and de-maps the Ethernet ports into SDH with the uplink
bandwidth of 4XSTM-1. Ethernet data from FE and GE ports are
mapped onto GFP (GFP-T/GFP-F). This mapped data is finally
transported over 4XSTM-1 uplink using Virtual Concatenation
(VCAT) and Link Capacity Adjustment Scheme (LCAS). This card
will support both lower order (LO) and higher order (HO) VCAT
with complete 256 ms differential delay support through external
memory. The TR01 card supports following functional features:

• 8/10/100 Mbit/s Ethernet ports, each using a SMII interface onto

SONET/SDH.
• 2 GE interface using TBI interface.
• Performs Virtual Concatenation for SONET/SDH,
compensating for a maximum of 256 ms of differential delay.
• Link Capacity Adjustment Scheme (LCAS) to allow the size of the
virtual concatenation groups to be changed dynamically with
hitless switching.
• Jumbo frames.
• High Order and Low Order Virtual Concatenation
• Mixing of all supported virtual concatenation mappings according
to the [G.707] multiplexing structure up to a total payload rate
equivalent to 4X1 STM-1 signal.

Hardware Description Version 1.0

72 Ethernet Tributary Card (TR01)

It supports the following Ethernet frame encapsulation

/de-capsulation protocols:

• ITU-T G.7041, Generic Framing Procedure (GFP) supporting

both GFP-F and GFP-T.
• ITU-T X.86/X.85, Link Access Procedure SDH (LAPS)
• Live insertion and hot-swap capability

17.2 Power Supply Requirements

17.2.1 Input Supply Voltages
Input supply voltage is 12V ± 10%.

17.2.2 Power Consumption

The maximum power consumed by a TR01 card is 15W.

17.3 Construction
The front panel of the TR01 card is as shown below:

TJ100MC-4L
 Ethernet Tributary Card (TR01) 73

Table 17-1
Card Description
Visual Indicators:
The details of the visual indicators on the ETC card is given below:
LED Color Status
TR01

Active Amber Card jacked in

1

Green Card initialized

Off/Red Card Failure
2

Status Green Card recognized

3

Off/Red Card Failure

RJ45-Amber Off Card Failure / 10Mbps
4

Mode is enabled
Amber 100Mbps Mode is enabled
5

RJ45-Green Off Card Failure

6

Green LED on if Link Detected

(10 or 100). LED Blinks if
7

there is an activity on the

link.
8

Tx Off Card Failure

9 R x

Green Transmit enabled on Fx

GbE

port.
Tx

Red Transmit disabled on Fx

T x 10 R x

port
GbE

Rx Off Card Failure

9

Green Signal detected on Fx port.

10
Rx
Tx

Red Loss of signal on Fx port.

ACTIVE
STATUS

Hardware Description Version 1.0

74 Ethernet Tributary Card (TR01)

17.4 Functional Description

17.4.1 Electrical Interface
The card can support 8 10/100Mbps electrical interfaces and 2
1000Mbps optical interfaces. The electrical interface is supported via
RJ45 connectors. There will be two of Quad Ganged RJ45 connectors
on the board. This connector is from (VENDOR TBD).

Protection as per GR 1089 is supported on the electrical interfaces.

This is achieved by using the Protection diode (LC303-3) from
SEMTECH and Transformer with in built common mode choke
from (VENDOR TBD).

17.4.2 Optical Interface

2 Port 1000 Mbps optical interfaces are provided through SFP
modules, which interface directly with the Multi Gigabit Transceivers
embedded inside the FPGA implementing TBI interface for GigE
Support.

Features of this interface are

• Support for Short Range, Intermediate range and Long Range

optics by changing the module.
• Laser optical power, bias, temperature monitoring
• Receive optical power monitoring
• Hot Pluggable Optic modules
17.4.3 10/100Mbps Fast Ethernet PHY
The PHY used is LXT9785BC from Intel Corporation.

The PHY is an 8-port Fast Ethernet PHY Transceiver supporting

IEEE 802.3 physical layer applications at 10 Mbps and 100 Mbps.
Supports SMII/SS-SMII and RMII interface and in this board the
PHY is configured for SMII interface. SMII is used in this application.
Each network port can provide a twisted-pair (TP) or Low-Voltage
Positive Emitter Coupled Logic (LVPECL) interface. The
twisted-pair interface supports 10 Mbps and 100 Mbps (10BASE-T
and 100BASE-TX) Ethernet over twisted-pair. The LVPECL
interface supports 100 Mbps (100BASE-FX) Ethernet over
fiber-optic media.

Low power consumption 250 mW per port

TJ100MC-4L
 Ethernet Tributary Card (TR01) 75

Package of the PHY device is 241- ball BGA.

17.4.4 Ethernet Mapper (Implemented in VIRTEX2PRO-P20 FPGA)

FPGA implementing Ethernet Mapper used in the board is
Virtex2Pro –P20 (Package TBD) from Xilinx. It supports up to eight
10/100 Mbit/s Ethernet ports, each using a SMII interface OR up to
2 1000Mbps GigE ports each using TBI interface OR a mix of 8
10/100 Mbps and 1 1000 Mbps ports. Ethernet Management
interface for control and configuration of externally connected
PHY.Performs Virtual Concatenation for SONET/SDH,
compensating for complete 256 ms of differential delay through
external SDRAM. Support jumbo frames. Supports LCAS processing
(per ITU-TG.7042) with time critical part implemented in FPGA and
state machine implemented in base card PSS for low and high order
virtual concatenated payloads. Glue less memory interface to external
64/128/256 Mbit SDR SDRAM for buffering data for differential
delay. Glue less memory interface to external 64/128/256 Mbit DDR
SDRAM for buffering data in MAC. Supports Low Order POH and
Pointer processing for virtual containers worth 4x1 STM-1. 4
interfaces of Byte-wide 19.44 MHz parallel Add and Drop Telecom
Bus interfaces. Supports per-port Ethernet side and SONET/SDH
system side loop back for system level diagnostics. Supports internal
Ethernet packet generator for in system manufacturing tests. It
complies to:

• ITU-T G.7041, Generic Framing Procedure (GFP), supporting

both GFP-T and GFP-F (null extension header).
• ITU-T X.86/X.85, Link Access Procedure SDH (LAPS)
The power consumption of the device will be approximately 5W.

17.4.5 SDR SDRAM Interface

A maximum of 256Mbits of SDRAM is required for supporting
complete differential delay of 256 ms by buffering data worth 4X1
STM-1. Bandwidth required will be 155MBps. With 50 percent
efficiency the required bandwidth is supported on the interface
through 32-bit interface operating at 77 MHz. The SDRAM is
MT48LC16M16A2TG from Micron, which is 4M x 16 x 4banks. In
total, there are two SDRAM on the board to support the above said
differential delay. This is interfaced directly with the FPGA and do
not required any other glue interface.

Hardware Description Version 1.0

76 Ethernet Tributary Card (TR01)

17.4.6 DDR SDRAM Interface

For supporting maximum of 5.2 GHz (2X2 1000Mbps Ethernet
interface and 2X2 622 Mbps STM uplink), 64-bit DDR interface
(through 4 X16 DDR devices) will be provided. Memory is not the
constraint in this case but major constraint is the bandwidth to be
supported on the interface. With the burst size of 64 bits, it will take
4 clock cycles to transfer the data while the overhead with each
transfer is around 7 clock cycles. Operating this interface at 125 MHz
we will be able to achieve the required bandwidth. Other option is to
implement separate DDR controllers for TX and RX side each
required to support 2.6 Gbps and interfacing through 32 bit interface
(2 X16 DDR devices each). In this case keeping the same burst size it
will take 8 clock cycles to transfer the burst size of 64 bytes. With
overhead per transfer being constant (=7 clock cycles) each DDR
controller can be operated at a low speed of 77 MHz. Which option
to choose from the two is TBD.

TJ100MC-4L