CONTROL OF SOLAR LED STREET LIGHTING SYSTEM

BASED ON CLIMATIC CONDITIONS AND OBJECT

MOVEMENTS
 ABSTRACT

With the increased use of solar power, the solar LED street lighting system plays a major role.
Monitoring and controlling of street lights are utmost importance in order to reduce the power
consumption. Here we use remote streetlight monitoring and controlling system based on LED
and wireless sensor network. The present system is like, the street lights will be switched on in the
evening after the sun sets and they are switched off the next day morning after there is sufficient
light on the roads. It gives the best solution for electrical power wastage. In this work the two
sensors are used which are Light Dependent Resistor LDR (Light Dependent Resistor) sensor to
indicate a day/night time and the IR sensors to detect the movement on the street. The
microcontroller PIC16F877A is used as brain to control the street light system.

This project aims to illustrate an evaluation and analysis of the proposed system. The feasibility
study done by the team details the requirements and constraints considered in the design of the
system, as well as a technical overview of the solution. Additionally, the successful
implementation of a prototype further supports a possible large-scale development of the project.
Finally, it aims to present an overview of a profitable and green solution to the energy consumption
problem imposed by street lighting.
 CHAPTER 1

1. INTRODUCTION

1.1 Introduction

The project is designed for LED based street lights with auto intensity control using solar power
from photovoltaic cells. As awareness for solar energy is increasing, more and more individuals
and institutions are opting for solar energy. Photovoltaic panels are used for charging batteries by
converting the sunlight into electricity. A charge controller circuit is used to control the charging
and prevent the battery to overcharging from the solar panel. Battery charger should have over
voltage protection, short circuit protection and reversed polarity protection. Intensity of street
lights is required to be kept high during the peak hours. At late night intensity of light should be
max after some time the intensity can be reduced progressively till morning to save energy. Thus
final it completely shuts down at morning 6 AM, and again resumes at 6pm in the evening. The
process repeats every day. A good LED street lighting system is characterized with high efficiency,
energy-saving, long-life, high color rendering index and environmental protection, which not only
has a great significance on energy saving of the city lighting , but also has close relationship with
people's health and the economic development. So it is a noticeable issue how to design a
reasonable LED street light system. In general, following basic requirements on a qualified solar
LED Street light System shall met during design process.

 Learn general information of the meteorological conditions in the area.

 Select the cost-effective solar panel, the controller, the battery and a series of components.
 Adopt effective measures to protect the system.

CURRENT SITUATION AND DEVELOPMENT

From the current situation of the LED, there are still many problems which shall be further
improved. For example, the quality of the LED chip, heating problem, package problem, power
driver issue and the lifetime of the electronic components. LED lighting is a developing technology
although its luminous efficiency is improving and cost is continuously reduced, but it still needs
long time to completely replace the traditional high pressure sodium street lighting. Following
progressing of the technology, the LED lights can use more low-power products to achieve same
effect as the traditional lighting, and the price will decreased significantly in the coming year. The
significant progress of the LED must make it completely replace the traditional street lights
1.2 EXISTING SYSTEM

Current practice of Solar Powered LED Street Lights is still considered NOT energy efficient and
cost effective. This will lead to increase of cost on all aspects mainly PV and battery. In addition,
the structure to hold the LED lamps is affected due to the size and weight of the system on the
structure. Utilizing sensing devices, one can reduce the solar power system sizing thus minimizing
power losses between generation and load demand. Cost saving is achieved with a smaller system
size and less complicated structure to mount the system.
1.3 PROPOSED SYSTEM

An automatic control circuit of LED street lamp is designed. The circuit is supplied with solar cell
and stored electric energy with battery. Under the light control mode, the LED street lamp is turned
off in daytime and lit at night automatically. The major objective of this project is to design a solar
powered LED street light that is energy efficient using IR sensor to detect the persons movements.
Its measurable objectives are as follows:
To determine the load demand of the system by using IR sensor and appropriate algorithm to
control the light intensity of the LED lamp.
To carry out design of the new solar powered LED street light using the new load pattern data that
maximizes energy saving and the system’s energy efficiency.
1.4 BLOCK DIAGRAM

Solar Panel

Charger Control

RELAY
Battery
PIC

16F877A
PIR Sensor

LED Street Light

Light Sensor
1.5. WORKING PRINCIPLE

According to principle of photovoltaic effect, the solar panels receive solar radiation during the
day time and then convert it into electrical energy, which is stored in the battery. When the light
intensity reduced to about 10 lx during night and open circuit voltage of the solar panels reaches
at a certain value, the controller has detected voltage value and then act, the battery offer the energy
to the LED light to drive the LED emits visible light at a certain direction. In this work, two kinds
of sensors will be used which are light sensor (LDR) and InfraRed (IR) sensor. The light sensor
will detect darkness to activate the ON/OFF switch, so the streetlights will be ready to turn on and
the PIR sensor will detect movement to activate the streetlights. Light Dependent Resistor (LDR),
which varies according to the amount of light falling on its surface, this gives an indications for
whether it is a day or night time, the PIR sensors are placed on the side of the road, which can be
controlled by microcontroller (PIC16f877A). The IR will be activated only on the night time. If
any object crosses the IR beam, a particular light will be automatically ON. By using this as a basic
principle, the intelligent system can be designed for the perfect usage of streetlights in any place.
 CHAPTER 2
2. LITERATURE REVIEW

2.1 Introduction

The use of Solar Powered LED Street Lights has become an interesting topic of research as well
as application in the commercial world. In today’s application, most of the common High
Intensity Discharge (HID) lamps, often High Pressure Sodium (HPS) lamps are being replaced
by more low powered Light Emitting Diode (LED) lamps.

Figure 3.1: Structural schematic of Solar Powered LED Street Light System
Gong Siliang describes an automatic streetlight system based on LDR sensor. The system can be
set to run in automatic mode, which switch on at the sunset and switch off at the sunrise
automatically. This can be possible with the help of LDR (Light Dependent Resistor).
Gustavo describes LED street lighting system. The use of LED‟s is being considered promising
solution to modern street lighting systems, due to their longer life time and higher luminous
efficiency when compared with high intensity discharge lamps.
Radha Priyasree explains a system to reduce the power consumption of streetlights by avoiding
inefficient lighting which wastes significant financial resources each year. This is done by
dimming the lights during less traffic hours. For this purpose PIR sensor is used which detects any
movement. This initiative will help the government to save this energy and meet the domestic and
industrial needs.
 CHAPTER 3
3. HARDWARE DESCRIPTION

3.1 SOLAR POWER SUPPLY

A solar panel is a set of solar photovoltaic modules electrically connected and

mounted on a supporting structure. A photovoltaic module is a packaged, connected
assembly of solar cells. The solar panel can be used as a component of a larger
photovoltaic system to generate and supply electricity in commercial and residential
applications.
3.1.1 WORKING PRINCIPLE

The working principle of all today solar cells is essentially the same. It is
based on the photovoltaic effect. In general, the photovoltaic effect means the
generation of a potential difference at the junction of two different materials in
response to visible or other radiation.
3.1.2 The basic processes behind the photovoltaic effect are:

 Generation of the charge carriers due to the absorption of photons in

the materials that form a junction

 Subsequent separation of the photo-generated charge carriers in the

junction

 Collection of the photo-generated charge carriers at the terminals of

the junction
3.2 CHARGER CONTROLLER

A charge controller, charge regulator or battery regulator limits the rate at which electric current is
added to or drawn from electric batteries. It prevents overcharging and may protect
against overvoltage, which can reduce battery performance or lifespan, and may pose a safety risk.
It may also prevent completely draining ("deep discharging") a battery, or perform controlled
discharges, depending on the battery technology, to protect battery life. The terms "charge
controller" or "charge regulator" may refer to either a stand-alone device, or to control circuitry
integrated within a battery pack, battery-powered device, or battery charger. A series charge
controller or series regulator disables further current flow into batteries when they are full. A shunt
charge controller or shunt regulator diverts excess electricity to an auxiliary or "shunt" load, such
as an electric water heater, when batteries are full.

3.2.1 WORKING PRINCIPLE

The most essential charge controller basically controls the device voltage and opens the circuit,
halting the charging, when the battery voltage ascents to a certain level. More charge controllers
utilized a mechanical relay to open or shut the circuit, halting or beginning power heading off to
the electric storage devices.

Generally solar power systems utilize 12V of batteries. Solar panels can convey much more
voltage than is obliged to charge the battery. The charge voltage could be kept at a best level while
the time needed to completely charge the electric storage devices is lessened. This permits the solar
systems to work optimally constantly. By running higher voltage in the wires from the solar panels
to the charge controller, power dissipation in the wires is diminished fundamentally.

The solar charge controllers can also control the reverse power flow. The charge controllers can
distinguish when no power is originating from the solar panels and open the circuit separating the
solar panels from the battery devices and halting the reverse current flow.
3.3 BATTERY

An electric battery is a collection of one or more electrochemical cells in which stored chemical
energy is converted into electrical energy. The principles of operation haven’t changed much since
the time of Volta. Each cell consists of two half cells connected in series through an electrolytic
solution. One half cell houses the Anode to which the positive ions migrate from
the Electrolyte and the other houses the Cathode to which the negative ones drift. The two cells
are may be connected via a semi permeable membranous structure allowing ions to flow but not
the mixing of electrolytes as in the case of most primary cells or in the same solution as in
secondary cells.

3.3.1 WORKING PRINCIPLE

The energy released during accepting an electron by a neutral atom is known as electron affinity.
As the atomic structure for different materials are different, the electron affinity of different
materials will differ. If two different kinds of metals or metallic compounds are immersed in the
same electrolyte solution, one of them will gain electrons and the other will release electrons.
Which metal (or metallic compound) will gain electrons and which will lose them depends upon
the electron affinities of these metals or metallic compounds. The metal with low electron affinity
will gain electrons from the negative ions of the electrolyte solution. On the other hand, the metal
with high electron affinity will release electrons and these electrons come out into the electrolyte
solution and are added to the positive ions of the solution. In this way, one of these metals or
compounds gains electrons and another one loses electrons. As a result, there will be a difference
in electron concentration between these two metals. This difference of electron concentration
causes an electrical potential difference to develop between the metals. This electrical potential
difference or EMF can be utilized as a source of voltage in any electronics or electrical circuit.
This is a general and basic principle of battery

BATTERY CONNECTION BLOCK DIAGRAM

3.4 PIR Sensor

A Passive InfraRed sensor (PIR sensor) is an electronic device which measures infrared light
radiating from objects in its field of view. PIRs are often used in the construction of PIR-based
motion detectors (see below). Apparent motion is detected when an infrared source with one
temperature, such as a human, passes in front of an infrared source with another temperature, such
as a wall.

All objects emit what is known as black body radiation. This energy is invisible to the human eye
but can be detected by electronic devices designed for such a purpose. The term 'passive' in this
instance means the PIR does not emit energy of any type but merely accepts incoming infrared
radiation.

DESIGN

Infrared radiation enters through the front of the sensor, known as the sensor face. At the core of
a PIR is a solid state sensor or set of sensors, made from approximately 1/4 inches square of natural
or artificial pyroelectric materials, usually in the form of a thin film, out of gallium nitride (GaN),
caesium nitrate (CsNO3), polyvinyl fluorides, derivatives of phenylpyrazine, and cobalt
phthalocyanine. (See pyroelectric crystals.) Lithium tantalate (LiTaO3) is a crystal exhibiting both
piezoelectric and pyroelectric properties.
The sensor is often manufactured as part of an integrated circuit and may consist of one (1), two
(2) or four (4) 'pixels' of equal areas of the pyroelectric material. Pairs of the sensor pixels may be
wired as opposite inputs to a differential amplifier. In such a configuration, the PIR measurements
cancel each other so that the average temperature of the field of view is removed from the electrical
signal; an increase of IR energy across the entire sensor is self-cancelling and will not trigger the
device. This allows the device to resist false indications of change in the event of being exposed
to flashes of light or field-wide illumination. (Continuous bright light could still saturate the sensor
materials and render the sensor unable to register further information.) At the same time, this
differential arrangement minimizes common-mode interference; this allows the device to resist
triggering due to nearby electric fields. However, a differential pair of sensors cannot measure
temperature in that configuration and therefore this configuration is specialized for motion
detectors, see below.

PIR-based motion detector

Cylindrical facet lens in front of PIR sensor. Each facet (rectangle) is a Fresnel lens

In a PIR-based motion detector, the PIR sensor is typically mounted on a printed circuit board
which also contains the necessary electronics required to interpret the signals from the chip. The
complete circuit is contained in a housing which is then mounted in a location where the sensor
can view the area to be monitored. Infrared energy is able to reach the sensor through the window
because the plastic used is transparent to infrared radiation (but only translucent to visible light).
This plastic sheet prevents the introduction of dust and insects which could obscure the sensor's
field of view.
A few mechanisms have been used to focus the distant infrared energy onto the sensor surface.
The window may have Fresnel lenses molded into it. Alternatively, sometimes PIR sensors are
used with plastic segmented parabolic mirrors to focus the infrared energy; when mirrors are used,
the plastic window cover has no Fresnel lenses molded into it. A filtering window (or lens) may
be used to limit the wavelengths to 8-14 micrometers which is most sensitive to human infrared
radiation (9.4 micrometers being the strongest).

The PIR device can be thought of as a kind of infrared 'camera' which remembers the amount of
infrared energy focused on its surface. Once power is applied to the PIR the electronics in the PIR
shortly settle into a quiescent state and energize a small relay. This relay controls a set of electrical
contacts which are usually connected to the detection input of an alarm control panel. If the amount
of infrared energy focused on the sensor changes within a configured time period, the device will
switch the state of the alarm output relay. The alarm output relay is typically a "normally closed
(NC)" relay, also know as a "Form B" relay.

A person entering the monitored area is detected when the infrared energy emitted from the
intruder's body is focused by a Fresnel lens or a mirror segment and overlaps a section on the chip
which had previously been looking at some much cooler part of the protected area. That portion
of the chip is now much warmer than when the intruder wasn't there. As the intruder moves, so
does the hot spot on the surface of the chip. This moving hot spot causes the electronics connected
to the chip to de-energize the relay, operating its contacts, thereby activating the detection input
on the alarm control panel. Conversely, if an intruder were to try to defeat a PIR perhaps by holding
some sort of thermal shield between himself and the PIR, a corresponding 'cold' spot moving across
the face of the chip will also cause the relay to de-energize — unless the thermal shield has the
same temperature as the objects behind it.

Manufacturers recommend careful placement of their products to prevent false alarms. They
suggest mounting the PIRs in such a way that the PIR cannot 'see' out of a window. Although the
wavelength of infrared radiation to which the chips are sensitive does not penetrate glass very well,
a strong infrared source (a vehicle headlight, sunlight reflecting from a vehicle window) can
overload the chip with enough infrared energy to fool the electronics and cause a false (non-
intruder caused) alarm. A person moving on the other side of the glass however would not be 'seen'
by the PIR.

They also recommended that the PIR not be placed in such a position that an HVAC vent would
blow hot or cold air onto the surface of the plastic which covers the housing's window. Although
air has very low emissivity (emits very small amounts of infrared energy), the air blowing on the
plastic window cover could change the plastic's temperature enough to, once again, fool the
electronics.

PIRs come in many configurations for a wide variety of applications. The most common used in
home security systems has numerous Fresnel lenses or mirror segments and has an effective range
of about thirty feet. Some larger PIRs are made with single segment mirrors and can sense changes
in infrared energy over one hundred feet away from the PIR. There are also PIRs designed with
reversible orientation mirrors which allow either broad coverage (110° wide) or very narrow
'curtain' coverage.

PIRs can have more than one internal sensing element so that, with the appropriate electronics and
Fresnel lens, it can detect direction. Left to right, right to left, up or down and provide an
appropriate output signal.

PIR-based remote thermometer

Designs have been implemented in which a PIR circuit measures the temperature of a remote
object.[2] In such a circuit, a non-differential PIR output is used. The output signal is evaluated
according to a calibration for the IR spectrum of a specific type of matter to be observed. By this
means, relatively accurate and precise temperature measurements may be obtained remotely.
Without calibration to the type of material being observed, a PIR thermometer device is able to
measure changes in IR emission which correspond directly to temperature changes, but the actual
temperature values cannot be calculated

A infrared point sensor is a point gas detector based on the nondispersive infrared sensor
technology.
3.4.1 WORKING PRINCIPLE

Dual source and dual receivers are used for self compensation of changes in alignment, light source
intensity and component efficiency. The transmitted beams from two infrared sources are
superimposed onto an internal beam splitter. 50% of the overlapping sample and reference signal
is passed through the gas measuring path and reflected back onto the measuring detector. The
presence of combustible gas will reduce the intensity of the sample beam and not the reference
beam, with the difference between these two signals being proportional to the concentration of gas
present in the measuring path. The other 50% of the overlapped signal passes through the beam
splitter and onto the compensation detector. The compensation detector monitors the intensity of
the two infrared sources and automatically compensates for any long term drift.
Mean time between failures may go up to 15 years.

Micro heaters

Micro heaters can be used to raise the temperature from optical surfaces above ambient to enhance
performance and to prevent condensation on the optical surfaces.

Range

Toxic gasses are measured in the low parts per million (ppm) range. Flammable gasses are

measured in the 0 - 100 % lower flammable limit (LFL) or lower explosive limit (LEL) range.
3.5 LIGHT DEPENDENT RESISTANCE

The light dependent resistor (LDR) is a sensor whose resistance decreases when light impinges on
it. This kind of sensor is commonly used in light sensor circuits in open areas, to control street
lamps for example. Another possible use is in spectroscopic apparatus. In this kind of apparatus,
continuous light or pulsed light can be used. Continuous light is used in common spectroscopic
apparatus. The use of lock-in amplifiers made the use of pulsed light in spectroscopy easier, as is
commonly used in photoacoustic spectroscopy. LDR’s are made of semiconductors as light
sensitive materials, on an isolating base. The most common semiconductors used in this system
are cadmium sulphide, lead sulphide, germanium, silicon and gallium arsenide. A less known light
sensor is the electret microphone. As the electret membrane functions as an absorbing black body,
and as the electret microphone case has an air chamber that can be used as photo acoustic chamber,
the electret microphone can be used as a detector of pulsed light. This type of microphone can be
used to obtain the transmission spectrum of any transparent material. The aim of this
communication is to study the response of LDR to pulsed light and the analysis of the spectral
curves obtained with a LDR and an electret microphone as light sensors in an optical spectroscopy
device.

3.5.1 WORKING PRINCIPLE

Photo resistors are less light-sensitive devices than photodiodes or phototransistors: the two latter
components are true semiconductor devices, while a photo resistor is a passive component and
does not have a PN-junction. The photo resistivity of any photo resistor may vary widely
depending on ambient temperature, making them unsuitable for applications requiring precise
measurement of or sensitivity to light.

Photo resistors also exhibit a certain degree of latency between exposure to light and the
subsequent decrease in resistance, usually around 10 milliseconds. The lag time when going from
lit to dark environments is even greater than, often as long as one second. This property makes
them unsuitable for sensing rapidly flashing lights, but is sometimes used to smooth the response
of audio signal compression.
Applications

Photoresistors come in many types. Inexpensive cadmium sulphide cells can be found in many
consumer items such as camera light meters, street lights, clock radios, alarm devices, night lights,
outdoor clocks, solar street lamps and solar road studs, etc.

They are also used in some dynamic compressors together with a

small incandescent or neon lamp, or light-emitting diode to control gain reduction. A common
usage of this application can be found in many guitar amplifiers that incorporate an
onboard tremolo effect, as the oscillating light patterns control the level of signal running through
the amp circuit.

The use of CdS and CdSe photo resistors is severely restricted in Europe due to the RoHS ban on
cadmium.

Lead sulphide (PbS) and indium antimonide (InSb) LDRs (light-dependent resistors) are used for
the mid-infrared spectral region. Ge: Cuphotoconductors are among the best far-infrared detectors
available, and are used for infrared astronomy and infrared spectroscopy.
3.6 LED LIGHT

An LED light bulb is a solid-state lighting (SSL) device that fits in standard screw-in connections
but uses LEDs (light-emitting diodes) to produce light. LED light bulbs are a more
environmentally-friendly alternative to incandescent bulbs. LED bulbs use
a semiconductor device that emits visible light when an electric current passes through it. That
property is known as elecroluminescence. Compact fluorescents, the most common alternative to
incandescent bulbs, use electricity to excite mercury gas until it emits ultraviolet (UV) light. That
light is then passed through a phosphor, which causes it to emit more visible light.

LEDs themselves have been around for some time, but only recently have improvements in
efficiency, cost and output made them viable for the larger-scale lighting used in households,
businesses and other environments. Due to the rapid progress in LED technologies, products exist
with wide ranges of efficiencies and life spans.

3.6.1 WORKING PRINCIPLE

A light-emitting diode is a two-lead semiconductor light source. It is a p–n junction diode that
emits light when activated. When a suitable voltage is applied to the leads, electrons are able to
recombine with electron holes within the device, releasing energy in the form of photons. This
effect is called electroluminescence, and the color of the light (corresponding to the energy of the
photon) is determined by the energy band gap of the semiconductor.
 CHAPTER 4

MICROCONTROLLER

A microcontroller is a computer control system on a single chip. It has many electronic circuits
built into it, which can decode written instructions and convert them to electrical signals. The
microcontroller will then step through these instructions and execute them one by one. As an
example of this a microcontroller we can use it to controller the lighting of a street by using the
exact procedures. Microcontrollers are now changing electronic designs. Instead of hard wiring a
number of logic gates together to perform some function we now use instructions to wire the gates
electronically. The list of these instructions given to the microcontroller is called a program.
There are different types of microcontroller, this work focus only on the PIC16F877A
Microcontroller where it's pins as shown in below Figure.

4.1 PIN DIAGRAM

Introduction

The high performance of the PICmicro devices can be attributed to a number of

architectural features commonly found in RISC microprocessors. These include:

• Harvard architecture

• Long Word Instructions

• Single Word Instructions

• Single Cycle Instructions

• Instruction Pipelining

• Reduced Instruction Set

• Register File Architecture

• Orthogonal (Symmetric) Instructions

Figure shows a simple core memory bus arrangement for Mid-Range MCU devices.

Harvard Architecture:

Harvard architecture has the program memory and data memory as separate memories and
is accessed from separate buses. This improves bandwidth over traditional von Neumann
architecture in which program and data are fetched from the same memory using the same bus. To
execute an instruction, a von Neumann machine must make one or more (generally more) accesses
across the 8-bit bus to fetch the instruction. Then data may need to be fetched, operated on, and
possibly written. As can be seen from this description, that bus can be extremely congested. While
with Harvard architecture, the instruction is fetched in a single instruction cycle (all 14-bits).While
the program memory is being accessed, the data memory is on an independent bus and can be read
and written. These separated buses allow one instruction to execute while the next instruction is
fetched. A comparison of Harvard vs. von-Neumann architectures is shown in Figure.
Harvard vs. von Neumann Block Architectures

Long Word Instructions:

Long word instructions have a wider (more bits) instruction bus than the 8-bit Data
Memory Bus. This is possible because the two buses are separate. This further allows instructions
to be sized differently than the 8-bit wide data word which allows a more efficient use of the
program memory, since the program memory width is optimized to the architectural requirements.

Single Word Instructions:

Single Word instruction opcodes are 14-bits wide making it possible to have all single word
instructions. A 14-bit wide program memory access bus fetches a 14-bit instruction in a single
cycle. With single word instructions, the number of words of program memory locations equals
the number of instructions for the device. This means that all locations are valid
instructions.Typically in the von Neumann architecture, most instructions are multi-byte. In
general, a device with 4-KBytes of program memory would allow approximately 2K of
instructions. This 2:1 ratio is generalized and dependent on the application code. Since each
instruction may take multiple bytes, there is no assurance that each location is a valid instruction.

Long Word Instructions:

Long word instructions have a wider (more bits) instruction bus than the 8-bit Data
Memory Bus. This is possible because the two buses are separate. This further allows instructions
to be sized differently than the 8-bit wide data word which allows a more efficient use of the
program memory, since the program memory width is optimized to the architectural requirements.
Single Word Instructions:

Single Word instruction opcodes are 14-bits wide making it possible to have all single word
instructions. A 14-bit wide program memory access bus fetches a 14-bit instruction in a single
cycle. With single word instructions, the number of words of program memory locations equals
the number of instructions for the device. This means that all locations are valid instructions.
Typically in the von Neumann architecture, most instructions are multi-byte. In general, a device
with 4-KBytes of program memory would allow approximately 2K of instructions. This 2:1 ratio
is generalized and dependent on the application code. Since each instruction may take multiple
bytes, there is no assurance that each location is a valid instruction.

4.2 ARCHITECTURE DIAGRAM

Instruction Flow/Pipelining

An “Instruction Cycle” consists of four Q cycles (Q1, Q2, Q3, and Q4). Fetch takes one
instruction cycle while decode and execute takes another instruction cycle. However, due to
Pipelining, each instruction effectively executes in one cycle. If an instruction causes the program
counter to change (e.g.GOTO) then an extra cycle is required to complete the instruction.

The instruction fetch begins with the program counter incrementing in Q1.

In the Execution cycle, the fetched instruction is latched into the “Instruction Register
(IR)” in cycle Q1. This instruction is then decoded and executed during the Q2, Q3, and Q4 cycles.
Data memory is read during Q2 (operand read) and written during Q4 (destinations write).

Example shows the operation of the two stage pipeline for the instruction sequence shown.
At time T CY 0, the first instruction is fetched from program memory. During T CY 1, the first
instruction executes while the second instruction is fetched. During T CY 2, the second instruction
executes while the third instruction is fetched. During T CY 3, the fourth instruction is fetched
while the third instruction (CALL SUB_1) is executed. When the third instruction completes
execution, the CPU forces the address of instruction four onto the Stack and then changes the
Program Counter(PC) to the address of SUB_1. This means that the instruction that was fetched
during T CY 3 needs to be “flushed” from the pipeline. During T CY 4, instruction four is flushed
(executed as a NOP ) and the instruction at address SUB_1 is fetched. Finally during T CY 5,
instruction five is executed and the instruction at address SUB_1 + 1 is fetched.

Instruction Pipeline Flow

I/O Descriptions

The table gives a brief description of the functions that may be multiplexed to a port pin.
Multiple functions may exist on one port pin. When multiplexing occurs, the peripheral module’s
functional requirements may force an override of the data direction (TRIS bit) of the port pin (such
as in the A/D and LCD modules).

I/O Descriptions
I/O Descriptions (Cont.’d)
I/O Descriptions (Cont.’d)
I/O Descriptions (Cont.’d)
I/O Descriptions (Cont.’d)

Legend:

TTL = TTL-compatible input

CMOS = CMOS compatible input or output

ST = Schmitt Trigger input with CMOS levels

SM = SMBus compatible input. An external resistor is required if this pin is used as an Output.

NPU = N-channel pull-up

PU = Weak internal pull-up

No-P diode = No P-diode to VDD

AN = Analog input or output

I = input O = output

P = Power

L = LCD Driver
The Central Processing Unit (CPU) is responsible for using the information in the program
memory (instructions) to control the operation of the device. Many of these instructions operate
on data memory. To operate on data memory, the Arithmetic Logical Unit (ALU) is required. In
addition to performing arithmetical and logical operations, the ALU controls status bits (which are
found in the STATUS register). The results of some instructions force status bits to a value
depending on the state of the result.

The machine codes that the CPU recognizes are show in Table.

Mid-Range MCU Instruction Set

General Instruction Format

The Mid-Range MCU instructions can be broken down into four general formats as shown
in Figure. As can be seen the opcode for the instruction varies from 3-bits to 6-bits. This variable
opcode size is what allows 35 instructions to be implemented.

General Format for Instructions

Central Processing Unit (CPU)

The CPU can be thought of as the “brains” of the device. It is responsible for fetching the
correct instruction for execution, decoding that instruction, and then executing that instruction.
The CPU sometimes works in conjunction with the ALU to complete the execution of the
instruction (in arithmetic and logical operations). The CPU controls the program memory address
bus, the data memory address bus, and accesses to the stack.

Instruction Clock

Each instruction cycle (TCY) is comprised of four Q cycles (Q1-Q4). The Q cycle time is
the same as the device oscillator cycle time (TOSC). The Q cycles provide the timing/designation
for the Decode, Read, Process Data, Write, etc., of each instruction cycle. The following diagram
shows the relationship of the Q cycles to the instruction cycle.

The four Q cycles that make up an instruction cycle (TCY) can be generalized as:
Q1: Instruction Decode Cycle or forced No operation

Q2: Instruction Read Data Cycle or No operation

Q3: Process the Data

Q4: Instruction Write Data Cycle or No operation

Each instruction will show a detailed Q cycle operation for the instruction.

Q Cycle Activity

Arithmetic Logical Unit (ALU)

PIC micro MCUs contain an 8-bit ALU and an 8-bit working register. The ALU is a general
purpose arithmetic and logical unit. It performs arithmetic and Boolean functions between the data
in the working register and any register file.

Operation of the ALU and W Register

The ALU is 8-bits wide and is capable of addition, subtraction, shift and logical operations. Unless
otherwise mentioned, arithmetic operations are two's complement in nature. In two-operand
instructions, typically one operand is the working register (W register). The other operand is a file
register or an immediate constant. In single operand instructions, the operand is either the W
register or a file register.

The W register is an 8-bit working register used for ALU operations. It is not an addressable
register. Depending on the instruction executed, the ALU may affect the values of the Carry (C),
Digit Carry (DC), and Zero (Z) bits in the STATUS register. The C and DC bits operate as a borrow
bit and a digit borrow out bit, respectively, in subtraction. See the SUBLW and SUBWF
instructions for examples.

STATUS Register

The STATUS register, shown in Figure, contains the arithmetic status of the ALU, the
RESET status and the bank select bits for data memory. Since the selection of the Data Memory
banks is controlled by this register, it is required to be present in every bank. Also, this register is
in the same relative position (offset) in each bank

The STATUS register can be the destination for any instruction, as with any other register.
If the STATUS register is the destination for an instruction that affects the Z, DC or C bits, then
the write to these three bits is disabled. These bits are set or cleared according to the device logic.
Furthermore, the TO and PD bits are not writable. Therefore, the result of an instruction with the
STATUS register as destination may be different than intended.

For example, CLRF STATUS will clear the upper-three bits and set the Z bit. This leaves
the STATUS register as 000u u1uu (where u = unchanged).It is recommended, therefore, that only
BCF, BSF, SWAPF and MOVWF instructions are used to alter the STATUS register because these
instructions do not affect the Z, C or DC bits from the STATUS register. For other instructions,
not affecting any status bits, see Table.
Note 1:

Some devices do not require the IRP and RP1 (STATUS<7:6>) bits. These bits are not
used by the Section 5. CPU and ALU and should be maintained clear. Use of these bits as general
purpose R/W bits is NOT recommended, since this may affect upward code compatibility with
future products.

Note 2:

The C and DC bits operate as a borrow and digit borrow bit, respectively, in subtraction.

STATUS Register

Bit 7 IRP: Register Bank Select bit (used for indirect addressing)

1 = Bank 2, 3 (100h - 1FFh)

0 = Bank 0, 1 (00h - FFh)

For devices with only Bank0 and Bank1 the IRP bit is reserved, always maintain this bit clear.

Bit 6:5 RP1:RP0: Register Bank Select bits (used for direct addressing)

11 = Bank 3 (180h - 1FFh)

10 = Bank 2 (100h - 17Fh)

01 = Bank 1 (80h - FFh)

00 = Bank 0 (00h - 7Fh)

Each bank is 128 bytes. For devices with only Bank0 and Bank1 the IRP bit is reserved,
always maintain this bit clear.
Bit 4 TO: Time-out bit

1 = After power-up, CLRWDT instruction, or SLEEP instruction

0 = A WDT time-out occurred

Bit 3 PD: Power-down bit

1 = After power-up or by the CLRWDT instruction

0 = By execution of the SLEEP instruction

Bit2 Z: Zero bit

1 = The result of an arithmetic or logic operation is zero

0 = The result of an arithmetic or logic operation is not zero

Bit 1 DC: Digit carry/borrow bit (ADDWF ADDLW, SUBLW, SUBWF instructions) (for
borrow the polarity sreversed)

1 = A carry-out from the 4th low order bit of the result occurred

0 = No carry-out from the 4th low order bit of the result

Bit 0 C: Carry/borrow bit (ADDWF, ADDLW, SUBLW, SUBWF instructions)

1 = A carry-out from the most significant bit of the result occurred

0 = No carry-out from the most significant bit of the result occurred

Note:

For borrow the polarity is reversed. A subtraction is executed by adding the two’s
complement of the second operand. For rotate (RRF,RLF ) instructions, this bit is loaded with
either the high or low order bit of the source register.

OPTION_REG Register

The OPTION_REG register is a readable and writable register which contains various
control bits to configure the TMR0/WDT prescaler, the external INT Interrupt, TMR0, and the
weak pull-ups on PORTB.
OPTION_REG Register

Bit 7 RBPU: PORTB Pull-up Enable bit

1 = PORTB pull-ups are disabled

0 = PORTB pull-ups are enabled by individual port latch values

Bit 6 INTEDG: Interrupt Edge Select bit

1 = Interrupt on rising edge of INT pin

0 = Interrupt on falling edge of INT pin

Bit 5 T0CS: TMR0 Clock Source Select bit

1 = Transition on T0CKI pin

0 = Internal instruction cycle clock (CLKOUT)

Bit 4 T0SE: TMR0 Source Edge Select bit

1 = Increment on high-to-low transition on T0CKI pin

0 = Increment on low-to-high transition on T0CKI pin

Bit 3 PSA: Prescaler Assignment bit

1 = Prescaler is assigned to the WDT

0 = Prescaler is assigned to the Timer0 module

bit 2-0 PS2:PS0 : Prescaler Rate Select bits

PCON Register

The Power Control (PCON) register contains flag bit(s), that together with the TO and PD
bits, allows the user to differentiate between the device resets.

Note 1:

BOR is unknown on Power-on Reset. It must then be set by the user and checked on
subsequent resets to see if BOR is clear, indicating a brown-out has occurred. The BOR status bit
is a don't care and is not necessarily predictable if the brown-out circuit is disabled (by clearing
the BODEN bit in the Configuration word).

Note 2:

It is recommended that the POR bit be cleared after a power-on reset has been

Detected, so that subsequent power-on resets may be detected.

PCON Register

Bit 7 MPEEN: Memory Parity Error Circuitry Status bit

This bit reflects the value of the MPEEN configuration bit.

Bit 6:3 Unimplemented: Read as '0'

Bit 2 PER: Memory Parity Error Reset Status bit

1 = No error occurred

0 = A program memory fetch parity error occurred

(must be set in software after a Power-on Reset occurs)

Bit 1 POR: Power-on Reset Status bit

1 = No Power-on Reset occurred

0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)

Bit 0 BOR: Brown-out Reset Status bit

1 = No Brown-out Reset occurred

0 = A Brown-out Reset occurred (must be set in software after a Brown-out Reset occurs)

IO PORTS

General purpose I/O pins can be considered the simplest of peripherals. They allow the PICmicro
to monitor and control other devices. To add flexibility and functionality to a device, some pins
are multiplexed with an alternate function(s). These functions depend on which peripheral features
are on the device. In general, when a peripheral is functioning, that pin may not be used as a general
purpose I/O pin.

The direction of the I/O pins (input or output) is controlled by the data direction register,
called the TRIS register. TRIS<x> controls the direction of PORT<x>. A ‘1’ in the TRIS bit
corresponds to that pin being an input, while a ‘0’ corresponds to that pin being an output.

The PORT register is the latch for the data to be output. When the PORT is read, the device
reads the levels present on the I/O pins (not the latch). This means that care should be taken with
read-modify-write commands on the ports and changing the direction of a pin from an input to an
output.

Figure shows a typical I/O port. This does not take into account peripheral functions that maybe
multiplexed onto the I/O pin. Reading the PORT register reads the status of the pins whereas
writing to it will write to the port latch. All write operations (such as BSF and BCF instructions)
are read-modify-write operations. Therefore a write to a port implies that the port pins are read;
this value is modified, and then written to the port data latch.
 When peripheral functions are multiplexed onto general I/O pins, the functionality of the
I/O pins may change to accommodate the requirements of the peripheral module. Examples of this
are the Analog-to-Digital (A/D) converter and LCD driver modules, which force the I/O pin to the
peripheral function when the device is reset. In the case of the A/D, this prevents the device from
consuming excess current if any analog levels were on the A/D pins after a reset occurred.

With some peripherals, the TRIS bit is overridden while the peripheral is enabled.
Therefore, read-modify-write instructions (BSF, BCF, and XORWF) with TRIS as destination
should be avoided. The user should refer to the corresponding peripheral section for the correct
TRIS bit settings. PORT pins may be multiplexed with analog inputs and analog VREF input. The
operation of each of these pins is selected, to be an analog input or digital I/O, by clearing/setting
the control bits in the ADCON1 register (A/D Control Register1). When selected as an analog
input, these pins will read as ‘0’s.The TRIS registers control the direction of the port pins, even
when they are being used as analog inputs. The user must ensure the TRIS bits are maintained set
when using the pins as analog inputs.

Note 1:

If pins are multiplexed with Analog inputs, then on a Power-on Reset these pins are
configured as analog inputs, as controlled by the ADCON1 register. Reading port pins configured
as analog inputs read a ‘0’.
Note 2:

If pins are multiplexed with comparator inputs, then on a Power-on Reset these pins are
configured as analog inputs, as controlled by the CMCON register. Reading port pins configured
as analog inputs read a ‘0’.

Note 3:

If pins are multiplexed with LCD driver segments, then on a Power-on Reset these pins are
configured as LCD driver segments, as controlled by the LCDSE register. To configure the pins
as a digital port, the corresponding bits in the LCDSE register must be cleared. Any bit set in the
LCDSE register overrides any bit settings in the corresponding TRIS register.

Note 4:

Pins may be multiplexed with the Parallel Slave Port (PSP). For the PSP to function the
I/O pins must be configured as digital inputs and the PSPMODE bit must be set.

Note 5:

At present the Parallel Slave Port (PSP) is only multiplexed onto PORTD and PORTE. The
microprocessor port becomes enabled when the PSPMODE bit is set. In this mode, the user must
make sure that the TRISE bits are set (pins are configured as digital inputs) and that PORTE is
configured for digital I/O. PORTD will override the values in the TRISD register. In this mode the
PORTD and PORTE input buffers are TTL. The control bits for the PSP operation are located in
TRISE.

PORTA and the TRISA Register

The RA4 pin is a Schmitt Trigger input and an open drain output. All other RA port pins
have TTL input levels and full CMOS output drivers. All pins have data direction bits TRIS
registers) which can configure these pins as output or input. Setting a TRISA register bit puts the
corresponding output driver in a hi-impedance mode. Clearing bit in the TRISA register puts the
contents of the output latch on the selected pin(s).

Example 1: Initializing PORTA

CLRF STATUS ; Bank0

CLRF PORTA ; Initialize PORTA by clearing output

; data latches

BSF STATUS, RP0 ; Select Bank1

MOVLW 0xCF ; Value used to initialize data direction

MOVWF TRISA ; PORTA<3:0> = inputs PORTA<5:4> = outputs

; TRISA<7:6> always read as '0'

Figure: Block Diagram of RA3:RA0 and RA5 Pins

PORTB and the TRISB Register

PORTB is an 8-bit wide bi-directional port. The corresponding data direction register is
TRISB. Setting a bit in the TRISB register puts the corresponding output driver in a high-
impedance input mode. Clearing a bit in the TRISB register puts the contents of the output latch
on the selected pin(s).

Example: Initializing PORTB

Each of the PORTB pins has a weak internal pull-up. A single control bit can turn on all
the pull-ups. This is performed by clearing bit RBPU (OPTION<7>). The weak pull-up is
automatically turned off when the port pin is configured as an output. The pull-ups are disabled on
a Power-on Reset.

CLRF STATUS ; Bank0

CLRF PORTB ; Initialize PORTB by clearing output

; data latches

BSF STATUS, RP0 ; Select Bank1

MOVLW 0xCF ; Value used to initialize data direction

MOVWF TRISB ; PORTB<3:0> = inputs, PORTB<5:4> = outputs

; PORTB<7:6> = inputs

Each of the PORTB pins has a weak internal pull-up. A single control bit can turn on all the pull-
ups. This is performed by clearing bit RBPU (OPTION<7>). The weak pull-up is automatically
turned off when the port pin is configured as an output. The pull-ups are disabled on a Power-on
Reset.

Figure: Block Diagram of RB3:RB0 Pins

Four of PORTB’s pins, RB7:RB4, have an interrupt on change feature. Only pins configured as
inputs can cause this interrupt to occur (i.e. any RB7:RB4 pin configured as an output is excluded
from the interrupt on change comparison). The input pins (of RB7:RB4) are compared with the
old value latched on the last read of PORTB. The “mismatch” outputs of RB7:RB4 are OR’ed
together to generate the RB Port Change Interrupt with flag bit RBIF (INTCON<0>).

This interrupt can wake the device from SLEEP. The user, in the interrupt service routine, can
clear the interrupt in the following manner:

a) Any read or write of PORTB. This will end the mismatch condition.
b) Clear flag bit RBIF.

A mismatch condition will continue to set flag bit RBIF. Reading PORTB will end the
mismatch condition, and allow flag bit RBIF to be cleared. This interrupt on mismatch feature,
together with software configurable pull-ups on these four pins allow easy interface to a keypad
and make it possible for wake-up on key-depression. The interrupt on change feature is
recommended for wake-up on key depression and operations where PORTB is only used for the
interrupt on change feature. Polling of PORTB is not recommended while using the interrupt on
change feature.

Figure: Block Diagram of RB7:RB4 Pins

Four of PORTB’s pins, RB7:RB4, have an interrupt on change feature. Only pins configured as
inputs can cause this interrupt to occur (i.e. any RB7:RB4 pin configured as an output is excluded
from the interrupt on change comparison). The input pins (of RB7:RB4) are compared with the
old value latched on the last read of PORTB. The “mismatch” outputs of RB7:RB4 are OR’ed
together to generate the RB Port Change Interrupt with flag bit RBIF (INTCON<0>).

This interrupt can wake the device from SLEEP. The user, in the interrupt service routine, can
clear the interrupt in the following manner:

a) Any read or write of PORTB. This will end the mismatch condition.

b) Clear flag bit RBIF.

 A mismatch condition will continue to set flag bit RBIF. Reading PORTB will end the
mismatch condition, and allow flag bit RBIF to be cleared. This interrupt on mismatch feature,
together with software configurable pull-ups on these four pins allow easy interface to a keypad
and make it possible for wake-up on key-depression.

The interrupt on change feature is recommended for wake-up on key depression and operations
where PORTB is only used for the interrupt on change feature. Polling of PORTB is not
recommended while using the interrupt on change feature.

PORTC and the TRISC Register

PORTC is an 8-bit bi-directional port. Each pin is individually configurable as an input or

output through the TRISC register. PORTC pins have Schmitt Trigger input buffers. When
enabling peripheral functions, care should be taken in defining TRIS bits for each PORTC pin.
Some peripherals override the TRIS bit to make a pin an output, while other peripherals override
the TRIS bit to make a pin an input.

Example: Initializing PORTC

CLRF STATUS ; Bank0

CLRF PORTC ; Initialize PORTC by clearing output

; data latches

BSF STATUS, RP0 ; Select Bank1

MOVLW 0xCF ; Value used to initialize data direction

MOVWF TRISC ; PORTC<3:0> = inputs, PORTC<5:4> = outputs

; PORTC<7:6> = inputs

Figure: PORTC Block Diagram (Peripheral Output Override)

PORTD and the TRISD Register

PORTD is an 8-bit port with Schmitt Trigger input buffers. Each pin is individually
configurable as an input or output.

Example: Initializing PORTD

CLRF STATUS ; Bank0

CLRF PORTD ; Initialize PORTD by clearing output

; data latches

BSF STATUS, RP0 ; Select Bank1

MOVLW 0xCF ; Value used to initialize data direction

MOVWF TRISD ; PORTD<3:0> = inputs, PORTD<5:4> = outputs

; PORTD<7:6> = inputs
 Figure: Typical PORTD Block Diagram (in I/O Port Mode)

PORTE and the TRISE Register

PORTE can be up to an 8-bit port with Schmitt Trigger input buffers. Each pin is
individually configurable as an input or output.

Example: Initializing PORTE

CLRF STATUS ; Bank0

CLRF PORTE ; Initialize PORTE by clearing output

; data latches

BSF STATUS, RP0 ; Select Bank1

MOVLW 0x03 ; Value used to initialize data direction

MOVWF TRISE ; PORTE<1:0> = inputs, PORTE<7:2> = outputs

Figure: Typical PORTE Block Diagram (in I/O Port Mode)

Note:

On some devices with PORTE, the upper bits of the TRISE register are used for the Parallel
Slave Port control and status bits.

PORTF and the TRISF Register

PORTF is a digital input only port. Each pin is multiplexed with an LCD segment driver.
These pins have Schmitt Trigger input buffers.

Example: Initializing PORTF

BCF STATUS, RP0 ; Select Bank2

BSF STATUS, RP1

BCF LCDSE, SE16 ; Make all PORTF

BCF LCDSE, SE12 ; digital inputs

Figure: PORTF LCD Block Diagram

PORTG and the TRISG Register

PORTG is a digital input only port. Each pin is multiplexed with an LCD segment driver.
These pins have Schmitt Trigger input buffers

Example: Initializing PORTG

BCF STATUS, RP0 ; Select Bank2

BSF STATUS, RP1

BCF LCDSE, SE27 ; Make all PORTG

BCF LCDSE, SE20 ; and PORTE<7> digital inputs

 Figure: PORTG LCD Block Diagram

GPIO and the TRISGP Register

GPIO is an 8-bit I/O register. Only the low order six bits are implemented (GP5:GP0). Bits
7 and6 are unimplemented and read as ‘0’s. Any GPIO pin (except GP3) can be programmed
individually as input or output. The GP3 pin is an input only pin.

The TRISGP register controls the data direction for GPIO pins. A ‘1’ in a TRISGP register
bit puts the corresponding output driver in a hi-impedance mode. A ‘0’ puts the contents of the
output data latch on the selected pins, enabling the output buffer. The exceptions are GP3 which
is input only and its TRIS bit will always read as '1'. Upon reset, the TRISGP register is all ‘1’s,
making all pins inputs

A read of the GPIO port, reads the pins not the output data latches. Any input must be
present until read by an input instruction (e.g., MOVF GPIO, W). The outputs are latched and
remain unchanged until the output latch is rewritten.

Example: Initializing GPIO

CLRF STATUS ; Bank0

CLRF GPIO ; Initialize GPIO by clearing output

; data latches
BSF STATUS, RP0 ; Select Bank1

MOVLW 0xCF ; Value used to initialize data direction

MOVWF TRISGP ; GP<3:0> = inputs GP<5:4> = outputs

; TRISGP<7:6> always read as '0'

Figure: Block Diagram of GP5:GP0 Pins

The configuration word can set several I/O’s to alternate functions. When acting as
alternate functions, the pins will read as ‘0’ during port read. The GP0, GP1, and GP3 pins can be
configured with weak pull-ups and also with interrupt on change. The interrupt on change and
weak pull-up functions are not pin selectable. Interrupt on change is enabled by setting
INTCON<3>.If the device configuration bits select one of the external oscillator modes, the GP4
and GP5 pin’s GPIO functions are overridden and these pins are used for the oscillator.

I/O Programming Considerations

When using the ports (and GPIO) as I/O, design considerations need to be taken into
account to ensure that the operation is as intended.

Bi-directional I/O Ports

 Any instruction which performs a write operation actually does a read followed by a write
operation. The BCF and BSF instructions, for example, read the register into the CPU, execute the
bit operation, and write the result back to the register. Caution must be used when these instructions
are applied to a port with both inputs and outputs defined. For example, a BSF operation on bit5of
PORTB will cause all eight bits of PORTB to be read into the CPU. Then the BSF operation takes
place on bit5 and PORTB is written to the output latches. If another bit of PORTB is used as a bi-
directional I/O pin (e.g., bit0) and it is defined as an input at this time, the input signal present on
the pin itself would be read into the CPU and rewritten to the data latch of this particular pin,
overwriting the previous content. As long as the pin stays in the input mode, no problem occurs.
However, if bit0 is switched to an output, the content of the data latch may now be unknown.
Reading the port register, reads the values of the port pins. Writing to the port register writes the
value to the port latch. When using read-modify-write instructions (ex. BCF, BSF, etc.) on a port,
the value of the port pins is read, the desired operation is performed on this value, and the value is
then written to the port latch

Example shows the effect of two sequential read-modify-write instructions on an I/O port.

Example: Read-Modify-Write Instructions on an I/O Port

Initial PORT settings: PORTB<7:4> Inputs

PORTB<3:0> Outputs

PORTB<7:6> have external pull-ups and are not connected to other circuitry

PORT latch PORT pins

BCF PORTB, 7 ; 01pp pppp 11pp pppp

BCF PORTB, 6 ; 10pp pppp 11pp pppp

BSF STATUS, RP0;

BCF TRISB, 7 ; 10pp pppp 11pp pppp

BCF TRISB, 6 ; 10pp pppp 10pp pppp

Note that the user may have expected the pin values to be 00pp ppp.

The 2nd BCF caused RB7 to be latched as the pin value (high).

A pin configured as an output, actively driving a Low or High should not be driven from external
devices at the same time in order to change the level on this pin (“wired-or,” “wired-and”). The
resulting high output currents may damage the chip.

Successive Operations on an I/O Port

The actual write to an I/O port happens at the end of an instruction cycle, whereas for
reading, the data must be valid at the beginning of the instruction cycle (Figure). Therefore, care
must be exercised if a write followed by a read operation is carried out on the same I/O port. The
sequence of instructions should be such to allow the pin voltage to stabilize (load dependent)
before the next instruction which causes that file to be read into the CPU is executed. Otherwise,
the previous state of that pin may be read into the CPU rather than the new state. When in doubt,
it is better to separate these instructions with a NOP or another instruction not accessing this I/O
operation

Figure: Successive I/O Operation

Figure shows the I/O model which causes this situation. As the effective capacitance (C)
becomes larger, the rise/fall time of the I/O pin increases. As the device frequency increases or the
effective capacitance increases, the possibility of this subsequent PORTx read-modify-write
instruction issue increases. This effective capacitance includes the effects of the board traces. The
best way to address this is to add a series resistor at the I/O pin. This resistor allows the/O pin to
get to the desired level before the next instruction. The use of NOP instructions between the
subsequent PORTx read-modify-write instructions, is a lower cost solution, but has the issue that
the number of NOP instructions is dependent on the effective capacitance C and the frequency of
the device.

Figure: I/O Connection Issues

 CHAPTER 5
5. SPECIFICATION

5.1 SOLAR SPECIFICATIONS

 Typical Power: 15 W

 Optimum operating voltage (Vmp): 17.6

 Optimum operating current (Imp): 0.82

 Short circuit current: 3.65

 Dimensions: 12 x 15x 1 in.

 Weight: 1.5Kg

 Dimensions: 12x15x1 in.

 Frame Material: Aluminum with plastic edge caps

5.2 SOLAR CHARGE CONTROLLER SPECIFICATIONS

 Solar panel rating: 50W (4A, 12V nominal) (open circuit voltage: 18 to 20V)
 Output voltage range: 7 to 14V (adjustable) (not recommended for 6V applications)
 Max power dissipation: 16W (includes power dissipation of D3)
 Typical dropout voltage: 1.25V @ 4A
 Maximum current: 4A (current limiting provided by solar panel characteristics)
 Voltage regulation: 10mV (no load to full load)
 Battery discharge: 1mA (Chinese controls discharge at typically 5mA)
5.3 BATTERY SPECIFICATIONS

NOMINAL VOLTAGE 12V

INTERNAL IMPEDANCE 0.25 Ω
CHARGING CUT OFF VOLTAGE 13.3 V
DISCHARGING CUT OFF VOLTAGE 10.5
OPERATING TEMPERATURE charging 0oC ~ 45oC
discharging -0oC ~ 55oC
Chemistry Lead Acid
Capacity 7Ah
Rating 84
Length 5.95 inches
Width 2.56 inches
Height 3.7 inches
Weight 1 Kg
 CHAPTER 6
6. COST ESTIMATION

S. No. Description Qty Cost (Rs)

1 Solar Panel 1 900

2 Charger Controller 1 1000

3 Battery 1 900

4 PIR Sensor 1 500

5 LDR Sensor 1 500

6 LED Light 1 1000

7 PIC 16F877A 1 500

8 RELAY 1 250

9 Power Supply 1 500

10 PCB Design 1000

11 Development and Soldering work 1500

 7. CONCLUSION

This work elaborates the design and construction of automatic street control system circuit. This
Circuit Works properly to turn street light ON/OFF. LDR sensor and the IR sensors are the two
main conditions in working the circuit. If the two conditions have been satisfied the circuit will do
the desired work according to specific program. The street light has been successfully controlled
by microcontroller. With commands from the controller the lights will be glow bright in the places
of the movement. This work aims to reduce the drawbacks of the current street lighting system,
and find a solution to save power. This is done by replacing sodium vapor lamps by LED and
adding dimming technology to it. It also provides an effective measure to save energy by
preventing unnecessary wastage of electricity, caused due to manual switching of street-lights
when it is not required. One streetlight has a median consumption of 200 W yearly. With the
system presented in this work, every lamp uses about 20-25 W (95% of energy consumed by the
LEDs). The proposed circuit is active for about 10 hours daily and the total number of working
hours is about 300 per month, savings of about 66% to 71% are achieved. This system is versatile,
extendable and totally adjustable to user needs.
 8. REFERENCES

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[3]. Wang Yongqing, Hao Chuncheng, Zhang Suoliang,Huang Yali, Wang Hong,” Design of Solar
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[4]. WU Yue, SHI Changhong, ZHANG Xianghong, YANG Wei, “Design of New Intelligent
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[5]. Hengyu Wu, Minli Tang * (Corresponding author), Guo Huang,” Design of Multi-functional
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