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REGULATIONS-2013
Second Semester
1. Draw a pin diagram and truth table for the following gates and also verify its truth table (100)
(i) AND (ii) OR (iii) NAND (iv) NOR (v) EX‐OR (vi) EX‐NOR
2. (i)Develop a Half adder and full adder circuit using AND, EX‐OR and OR gates and also verify its
truth table. (50)
(ii) Draw a half adder circuit using NAND and NOR only. (50)
3. Construct a 4‐bit synchronous counter using any one of FF and also draw truth table and timing
diagrams. (100)
4. Construct a 4‐bit asynchronous counter using any one of FF and also draw truth table and timing
diagrams. (100)
5. Construct a 4‐bit BCD synchronous counter using any one of FF and also draw truth table and
timing diagrams. (100)
6. Draw a circuit diagram of 4‐bit serial input serial output and parallel input parallel output shift
register and also verify its truth table and timing diagrams. (100)
7. Verify the following Boolean theorem using AOI gates. (100)
(i) Commutative law (ii) Associative law (iii) Distributive law (iv) Absorption law
(v) Idempotent law (vi) De Margon’s Theorem
8. (i)Design and construct half subtractor and full subtractor circuits and verify the truth table
using logic gates. (50)
(a) Involution law (b) Complementary law (c) Absorption law
9. Design and implement a 4‐bit Binary to gray code converter and Gray to binary code converter
using basic logic gates. (100)
10. Design and Construct a 4‐bit binary adder and subtractor using IC7483.(100)
11. Design and construct a combinational circuit for an arbitrary function whose input is a four‐
bit number and whose output is the 2’s complement of the input number using basic logic
gates. (100)
12. (i)Design and verify the truth table of a three bit Odd/Even Parity generator and checker. (50)
13. (ii)Design and implement a 2 – bit magnitude comparator using basic gates. (50)
14. Design and Construct a 8‐bit magnitude comparator using IC 7485 (100)
15. Design and implement multiplexer and demultiplexer using logic gates and study of IC 74150
and IC 74154. (100)
16. (i)Using D FF, construct a circuit giving input parallel and getting output serial with necessary
waveforms. (50)
(ii)Using D FF, construct a circuit giving input serial and getting output serial with necessary
waveforms (50)
17. Design and implement a 4‐bit Ripple counter using JKFF and also draw the truth table and
necessary waveforms. (100)
18. Design and implement Mod‐10 counter using JKFF and also draw the truth table and necessary
waveforms. (100)
19. (i)Write a HDL program to implement half adder and full adder circuit using HDL simulator.(50)
(ii) Design and implement a 4‐bit Binary to gray code converter using basic logic gates. (50)
20. (i)Write a HDL program to implement Multiplexer circuit using HDL simulator.(50)
(ii) Design and implement a 4‐bit Gray to binary code converter using basic logic gates.(50)
21. Write a HDL program to implement D FF,T FF and ripple counter using HDL simulator.(100)
22. Design the logic circuit and verify the truth table of the given Boolean expression,
F (A, B, C, D) = Σ (0, 1, 2, 5, 8, 9, 10) (100)
23. Verify the following Boolean theorem using AOI gates.(100)
(i) Consensus theorem (ii) Commutative law (iii) Associative law (iv) Distributive law
(v)Idempotent law (vi) De Margon’s Theorem
24. Design and construct a combinational circuit for an arbitrary function whose input is a three‐
bit number and whose output is the 2’s complement of the input number using basic logic
gates. (100)
25. Design and implement a 3 bit synchronous up/down counter using JKFF. (100)
Mark allotment pattern
Aim/procedure/Algorithm ‐25
Circuit diagram/program ‐25
Connections/execution ‐15
Results ‐25
Viva ‐10
Total ‐100