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LinkSwitch-TN
™
Family
Lowest Component Count, Energy-Efficient
Off-Line Switcher IC
Product Highlights
Applications
• Appliances and timers
• LED drivers and industrial controls
and thermal shutdown circuitry onto a monolithic IC. The start-up
and operating power are derived directly from the voltage on the
Description DRAIN pin, eliminating the need for a bias supply and associated
circuitry in buck or flyback converters. The fully integrated
LinkSwitch-TN is specifically designed to replace all linear and auto-restart circuit in the LNK304-306 safely limits output power
capacitor-fed (cap dropper) non-isolated power supplies in the during fault conditions such as short-circuit or open loop,
under 360 mA output current range at equal system cost while reducing component count and system-level load protection
offering much higher performance and energy efficiency. cost. A local supply provided by the IC allows use of a non-
LinkSwitch-TN devices integrate a 700 V power MOSFET, safety graded optocoupler acting as a level shifter to further
oscillator, simple On/Off control scheme, a high-voltage switched enhance line and load regulation performance in buck and
current source, frequency jittering, cycle-by-cycle current limit buck-boost converters, if required.
BYPASS DRAIN
(BP) (D)
REGULATOR
5.8 V
BYPASS PIN
UNDERVOLTAGE
+
5.8 V -
4.85 V CURRENT LIMIT
COMPARATOR
+
6.3 V
- VI
LIMIT
JITTER
CLOCK
DCMAX
FEEDBACK THERMAL
(FB) SHUTDOWN
OSCILLATOR
1.65 V -VT
S Q
R Q
LEADING
EDGE
BLANKING SOURCE
(S)
PI-3904-032213
BYPASS DRAIN
(BP) (D)
REGULATOR
5.8 V
FAULT
PRESENT
AUTO-
RESTART BYPASS PIN
6.3 V COUNTER UNDERVOLTAGE
+
CLOCK
5.8 V - CURRENT LIMIT
RESET 4.85 V COMPARATOR
- VI
LIMIT
JITTER
CLOCK
DCMAX
FEEDBACK THERMAL
SHUTDOWN
(FB) OSCILLATOR
1.65 V -VT
S Q
R Q
LEADING
EDGE
BLANKING SOURCE
(S)
PI-2367-032213
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LNK302/304-306
DRAIN (D) Pin: for both average and quasi-peak emissions. The frequency
Power MOSFET drain connection. Provides internal operating jitter should be measured with the oscilloscope triggered at the
current for both start-up and steady-state operation. falling edge of the DRAIN waveform. The waveform in Figure 4
illustrates the frequency jitter of the LinkSwitch-TN.
BYPASS (BP) Pin:
Connection point for a 0.1 mF external bypass capacitor for the Feedback Input Circuit
internally generated 5.8 V supply. The feedback input circuit at the FEEDBACK pin consists of a
low impedance source follower output set at 1.65 V. When the
FEEDBACK (FB) Pin: current delivered into this pin exceeds 49 µA, a low logic level
During normal operation, switching of the power MOSFET is (disable) is generated at the output of the feedback circuit. This
controlled by this pin. MOSFET switching is terminated when a output is sampled at the beginning of each cycle on the rising
current greater than 49 µA is delivered into this pin. edge of the clock signal. If high, the power MOSFET is turned
on for that cycle (enabled), otherwise the power MOSFET
SOURCE (S) Pin: remains off (disabled). Since the sampling is done only at the
This pin is the power MOSFET source connection. It is also the beginning of each cycle, subsequent changes in the FEEDBACK
ground reference for the BYPASS and FEEDBACK pins. pin voltage or current during the remainder of the cycle are ignored.
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LNK302/304-306
PI-3660-081303
several functions: a) Inrush current limitation to safe levels for
500 rectifiers D3 and D4; b) Differential mode noise attenuation; c)
VDRAIN Input fuse should any other component fail short-circuit
400 (component fails safely open-circuit without emitting smoke, fire
or incandescent material).
300
Auto-Restart (LNK304-306 Only) To a first order, the forward voltage drops of D1 and D2 are
In the event of a fault condition such as output overload, output identical. Therefore, the voltage across C3 tracks the output
short, or an open-loop condition, LinkSwitch-TN enters into voltage. The voltage developed across C3 is sensed and
auto-restart operation. An internal counter clocked by the regulated via the resistor divider R1 and R3 connected to U1’s
oscillator gets reset every time the FEEDBACK pin is pulled FEEDBACK pin. The values of R1 and R3 are selected such
high. If the FEEDBACK pin is not pulled high for 50 ms, the that, at the desired output voltage, the voltage at the
power MOSFET switching is disabled for 800 ms. The auto- FEEDBACK pin is 1.65 V.
restart alternately enables and disables the switching of the
power MOSFET until the fault condition is removed. Regulation is maintained by skipping switching cycles. As the
output voltage rises, the current into the FEEDBACK pin will
Applications Example rise. If this exceeds IFB then subsequent cycles will be skipped
until the current reduces below IFB. Thus, as the output load is
A 1.44 W Universal Input Buck Converter
reduced, more cycles will be skipped and if the load increases,
The circuit shown in Figure 5 is a typical implementation of a
fewer cycles are skipped. To provide overload protection if no
12 V, 120 mA non-isolated power supply used in appliance
cycles are skipped during a 50 ms period, LinkSwitch-TN will
control such as rice cookers, dishwashers or other white goods.
enter auto-restart (LNK304-306), limiting the average output
This circuit may also be applicable to other applications such as
power to approximately 6% of the maximum overload power.
night-lights, LED drivers, electricity meters, and residential
Due to tracking errors between the output voltage and the
heating controllers, where a non-isolated supply is acceptable.
voltage across C3 at light load or no-load, a small pre-load may
be required (R4). For the design in Figure 5, if regulation to zero
The input stage comprises fusible resistor RF1, diodes D3 and
load is required, then this value should be reduced to 2.4 kΩ.
D4, capacitors C4 and C5, and inductor L2. Resistor RF1 is a
R1
13.0 kΩ
1%
R3 C3
RF1 2.05 kΩ 10 µF
8.2 Ω L2 D2
C1 1% 35 V 1N4005GP
2W 1 mH FB BP
100 nF 12 V,
D S L1 120 mA
D3 1 mH
1N4007 LinkSwitch-TN C2
85-265 C4 C5 280 mA R4
VAC 4.7 µF 4.7 µF LNK304 D1 100 µF 3.3 kΩ
D4 400 V 400 V UF4005 16 V
1N4007
RTN
PI-3757-041509
Figure 5. Universal Input, 12 V, 120 mA Constant Voltage Power Supply Using LinkSwitch-TN.
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LNK302/304-306
LinkSwitch-TN
RF1 D3 L2
D FB
D2
R1
BP +
C1
AC C4 C5 S S C3 L1
INPUT R3
DC
OUTPUT
S S C2
D4 D1
Figure 6a. Recommended Printed Circuit Layout for LinkSwitch-TN in a Buck Converter Configuration using P or G Package.
RF1 D3 L2
D S
LinkSwitch-TN
S L1
+
FB S
BP S D1
AC C3
INPUT C4 C5 D2 C2
DC
C1
R3 R1 OUTPUT
D4
Figure 6b. Recommended Printed Circuit Layout for LinkSwitch-TN in a Buck Converter Configuration using D Package to Bottom Side of the Board.
Output Current Table Select the LinkSwitch-TN device, freewheeling diode and
Data sheet maximum output current table (Table 1) represents output inductor that gives the lowest overall cost. In general,
the maximum practical continuous output current for both MDCM provides the lowest cost and highest efficiency converter.
mostly discontinuous conduction mode (MDCM) and continuous CCM designs require a larger inductor and ultrafast (tRR ≤35 ns)
conduction mode (CCM) of operation that can be delivered freewheeling diode in all cases. It is lower cost to use a larger
from a given LinkSwitch-TN device under the following LinkSwitch-TN in MDCM than a smaller LinkSwitch-TN in CCM
assumed conditions: because of the additional external component costs of a CCM
1. Buck converter topology. design. However, if the highest output current is required, CCM
2. The minimum DC input voltage is ≥70 V. The value of input should be employed following the guidelines below.
capacitance should be large enough to meet this criterion.
3. For CCM operation a KRP* of 0.4. Topology Options
4. Output voltage of 12 VDC. LinkSwitch-TN can be used in all common topologies, with or
5. Efficiency of 75%. without an optocoupler and reference to improve output voltage
6. A catch/freewheeling diode with tRR ≤75 ns is used for MDCM tolerance and regulation. Table 2 provide a summary of these
operation and for CCM operation, a diode with tRR ≤35 ns is configurations. For more information see the Application Note
used. – LinkSwitch-TN Design Guide.
7. The part is board mounted with SOURCE pins soldered to a
sufficient area of copper to keep the SOURCE pin tempera-
ture at or below 100 °C.
*KRP is the ratio of ripple to peak inductor current.
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PI-3751-041509
PI-3752-041509
Low-Side
Buck – + +
Optocoupler
Feedback LinkSwitch-TN
VIN VO
S D
VF PI-3754-041509
R=
IO
High-Side
Buck-Boost –
Direct
Feedback FB BP
+ D S
LinkSwitch-TN 1. Output referenced to input
VIN VO
+ 2. Negative output (VO) with respect to +VIN
3. Step up/down – VO > VIN or VO < VIN
PI-3755-041509
4. Low cost direct feedback (±10% typ.)
High-Side 2V
5. Fail-safe – output is not subjected to input
Buck-Boost – 300 Ω RSENSE = voltage if the internal power MOSFET fails
IO
2 kΩ
Constant FB BP RSENSE 6. Ideal for driving LEDs – better accuracy and
IO
Current LED temperature stability than Low-side Buck
+ D S
Driver constant current LED driver
LinkSwitch-TN
VIN 10 µF 100 nF 7. Requires an output load to maintain regulation
50 V
PI-3779-041509
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LNK302/304-306
Component Selection should not exceed the rated ripple voltage divided by the typical
current limit of the chosen LinkSwitch-TN.
Referring to Figure 5, the following considerations may be
helpful in selecting components for a LinkSwitch-TN design. Feedback Resistors R1 and R3
The values of the resistors in the resistor divider formed by R1
Freewheeling Diode D1 and R3 are selected to maintain 1.65 V at the FEEDBACK pin. It
Diode D1 should be an ultrafast type. For MDCM, reverse is recommended that R3 be chosen as a standard 1% resistor
recovery time tRR ≤75 ns should be used at a temperature of of 2 kΩ. This ensures good noise immunity by biasing the
70 °C or below. Slower diodes are not acceptable, as continuous feedback network with a current of approximately 0.8 mA.
mode operation will always occur during startup, causing high
leading edge current spikes, terminating the switching cycle Feedback Capacitor C3
prematurely, and preventing the output from reaching regulation. Capacitor C3 can be a low cost general purpose capacitor. It
If the ambient temperature is above 70 °C then a diode with tRR provides a “sample and hold” function, charging to the output
≤35 ns should be used. voltage during the off time of LinkSwitch-TN. Its value should
be 10 µF to 22 µF; smaller values cause poorer regulation at
For CCM an ultrafast diode with reverse recovery time tRR ≤35 ns light load conditions.
should be used. A slower diode may cause excessive leading
edge current spikes, terminating the switching cycle prematurely Pre-Load Resistor R4
and preventing full power delivery. In high-side, direct feedback designs where the minimum load
is <3 mA, a pre-load resistor is required to maintain output
Fast and slow diodes should never be used as the large reverse regulation. This ensures sufficient inductor energy to pull the
recovery currents can cause excessive power dissipation in the inductor side of the feedback capacitor C3 to input return via
diode and/or exceed the maximum drain current specification D2. The value of R4 should be selected to give a minimum
of LinkSwitch-TN. output load of 3 mA.
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from AC input lines. It may be advantageous to place capacitors 3. Maximum drain current – verify that the peak drain current is
C4 and C5 in-between LinkSwitch-TN and the AC input. The below the data sheet peak drain specification under worst-
second rectifier diode D4 is optional, but may be included for case conditions of highest line voltage, maximum overload
better EMI performance and higher line surge withstand (just prior to auto-restart) and highest ambient temperature.
capability. 4. Thermal check – at maximum output power, minimum input
voltage and maximum ambient temperature, verify that the
Quick Design Checklist LinkSwitch-TN SOURCE pin temperature is 100 °C or below.
This figure ensures adequate margin due to variations in
As with any power supply design, all LinkSwitch-TN designs RDS(ON) from part to part. A battery powered thermocouple
should be verified for proper functionality on the bench. The meter is recommended to make measurements when the
following minimum tests are recommended: SOURCE pins are a switching node. Alternatively, the
1. Adequate DC rail voltage – check that the minimum DC input ambient temperature may be raised to indicate margin to
voltage does not fall below 70 VDC at maximum load, thermal shutdown.
minimum input voltage.
2. Correct Diode Selection – UF400x series diodes are recom- In a LinkSwitch-TN design using a buck or buck-boost converter
mended only for designs that operate in MDCM at an topology, the SOURCE pin is a switching node. Oscilloscope
ambient of 70 °C or below. For designs operating in measurements should therefore be made with probe grounded
continuous conduction mode (CCM) and/or higher ambients, to a DC voltage, such as primary return or DC input rail, and not
then a diode with a reverse recovery time of 35 ns or better, to the SOURCE pins. The power supply input must always be
such as the BYV26C, is recommended. supplied from an isolated source (e.g. via an isolation transformer).
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LNK302/304-306
Thermal Resistance
Thermal Resistance: P or G Package: Notes:
(qJA) .................................70 °C/W(3); 60 °C/W(4) 1. Measured on pin 2 (SOURCE) close to plastic interface.
(qJC)(1) ..................................................11 °C/W 2. Measured on pin 8 (SOURCE) close to plastic interface.
D Package: 3. Soldered to 0.36 sq. in. (232 mm2), 2 oz. (610 g/m2) copper clad.
(qJA) ...............................100 °C/W(3); 80 °C/W(4) 4. Soldered to 1 sq. in. (645 mm2), 2 oz. (610 g/m2) copper clad.
(qJC)(2) ..................................................30 °C/W
Conditions
SOURCE = 0 V; TJ = -40 to 125 °C
Parameter Symbol See Figure 7 Min Typ Max Units
(Unless Otherwise Specified)
Control Functions
Output Average 62 66 70
fOSC TJ = 25 °C kHz
Frequency Peak-Peak Jitter 4
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Conditions
SOURCE = 0 V; TJ = -40 to 125 °C
Parameter Symbol See Figure 7 Min Typ Max Units
(Unless Otherwise Specified)
Control Functions (cont.)
BYPASS Pin
VBP 5.55 5.8 6.10 V
Voltage
BYPASS Pin
VBPH 0.8 0.95 1.2 V
Voltage Hysteresis
BYPASS Pin
IBPSC See Note D 68 mA
Supply Current
Circuit Protection
di/dt = 55 mA/s
126 136 146
TJ = 25 °C
LNK302
di/dt = 250 mA/s
145 165 185
TJ = 25 °C
di/dt = 65 mA/s
240 257 275
TJ = 25 °C
LNK304
di/dt = 415 mA/s
271 308 345
ILIMIT (See TJ = 25 °C
Current Limit mA
Note E) di/dt = 75 mA/s
350 375 401
TJ = 25 °C
LNK305
di/dt = 500 mA/s
396 450 504
TJ = 25 °C
di/dt = 95 mA/s
450 482 515
TJ = 25 °C
LNK306
di/dt = 610 mA/s
508 578 647
TJ = 25 °C
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LNK302/304-306
Conditions
SOURCE = 0 V; TJ = -40 to 125 °C
Parameter Symbol See Figure 7 Min Typ Max Units
(Unless Otherwise Specified)
Output
TJ = 25 °C 48 55.2
LNK302
ID = 13 mA TJ = 100 °C 76 88.4
TJ = 25 °C 24 27.6
LNK304
ID = 25 mA TJ = 100 °C 38 44.2
ON-State
RDS(ON) W
Resistance TJ = 25 °C 12 13.8
LNK305
ID = 35 mA TJ = 100 °C 19 22.1
TJ = 25 °C 7 8.1
LNK306
ID = 45 mA TJ = 100 °C 11 12.9
LNK302/304 50
VBP = 6.2 V, VFB ≥2 V,
OFF-State Drain LNK305 70
IDSS VDS = 560 V, mA
Leakage Current
TJ = 25 °C
LNK306 90
Rise Time tR 50 ns
Measured in a Typical Buck
Fall Time tF Converter Application 50 ns
DRAIN Pin
50 V
Supply Voltage
Output Enable Delay tEN See Figure 9 10 ms
Output Disable
tDST 0.5 ms
Setup Time
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LNK302/304-306
470 Ω
5W 470 kΩ
D FB
S1 S2
BP
50 V 50 V
S S 0.1 μF
S S
PI-3490-060204
DCMAX
(internal signal)
tP
FB
tEN
VDRAIN
1
tP =
fOSC
PI-3707-112503
Figure 8. LinkSwitch-TN Duty Cycle Measurement. Figure 9. LinkSwitch-TN Output Enable Timing.
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LNK302/304-306
1.1 1.2
PI-2680-012301
PI-2213-012301
1.0
(Normalized to 25 °C)
(Normalized to 25 °C)
Breakdown Voltage
Output Frequency
0.8
1.0 0.6
0.4
0.2
0.9 0
-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125
Junction Temperature (°C) Junction Temperature (°C)
Figure 10. Breakdown vs. Temperature. Figure 11. Frequency vs. Temperature.
1.4 1.4
PI-3710-071204
PI-3709-111203
1.0 1.0
Current Limit
0.8 0.8
Normalized
Normalized di/dt Normalized Current
0.6 di/dt = 1 0.6 di/dt = 1 Limit = 1
di/dt = 6 LNK302 55 mA/µs 136 mA
0.4 0.4 LNK304 65 mA/µs 257 mA
LNK305 75 mA/µs 375 mA
LNK306 95 mA/µs 482 mA
0.2 0.2
0 0
-50 0 50 100 150 1 2 3 4 5 6
Temperature (°C) Normalized di/dt
Figure 12. Current Limit vs. Temperature at Normalized di/dt. Figure 13. Current Limit vs. di/dt.
7 400 PI-3661-060613
PI-2240-012301
6 350
DRAIN Pin Current (mA)
BYPASS Pin Voltage (V)
25 °C
5 300
100 °C
4 250
3 200
2 150
Scaling Factors:
LNK302 0.5
1 100 LNK304 1.0
LNK305 2.0
0 50 LNK306 3.4
0
0 0.2 0.4 0.6 0.8 1.0 0 2 4 6 8 10 12 14 16 18 20
Time (ms) DRAIN Voltage (V)
Figure 14. BYPASS Pin Start-up Waveform. Figure 15. Output Characteristics.
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LNK302/304-306
1000
PI-3711-071404
Drain Capacitance (pF)
100
Scaling Factors:
LNK302 0.5
LNK304 1.0
LNK305 2.0
LNK306 3.4
10
1
0 100 200 300 400 500 600
Drain Voltage (V)
Figure 16. COSS vs. Drain Voltage.
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PDIP-8B (P Package)
⊕D S .004 (.10)
.137 (3.48) Notes:
MINIMUM 1. Package dimensions conform to JEDEC specification
-E-
MS-001-AB (Issue B 7/85) for standard dual-in-line (DIP)
package with .300 inch row spacing.
2. Controlling dimensions are inches. Millimeter sizes are
shown in parentheses.
3. Dimensions shown do not include mold flash or other
.240 (6.10) protrusions. Mold flash or protrusions shall not exceed
.260 (6.60) .006 (.15) on any side.
4. Pin locations start with Pin 1, and continue counter-clock-
wise to Pin 8 when viewed from the top. The notch and/or
dimple are aids in locating Pin 1. Pin 6 is omitted.
5. Minimum metal to metal spacing at the package body for
the omitted lead location is .137 inch (3.48 mm).
Pin 1 6. Lead width measured at package body.
7. Lead spacing measured with the leads constrained to be
.367 (9.32) perpendicular to plane T.
-D- .387 (9.83)
.057 (1.45)
.068 (1.73)
(NOTE 6)
-T-
SEATING .008 (.20)
PLANE .120 (3.05) .015 (.38)
.140 (3.56)
.014 (.36)
.053 (1.35)
.300 (7.62) P08B
.022 (.56) ⊕T E D S .010 (.25) M .390 (9.91)
PI-2551-040110
SMD-8B (G Package)
⊕ D S .004 (.10) .137 (3.48) Notes:
MINIMUM 1. Controlling dimensions are
inches. Millimeter sizes are
-E- shown in parentheses.
2. Dimensions shown do not
include mold flash or other
protrusions. Mold flash or
protrusions shall not exceed
.006 (.15) on any side.
.372 (9.45) 3. Pin locations start with Pin 1,
.240 (6.10)
.388 (9.86) .420
.260 (6.60) and continue counter-clock-
⊕ E S .010 (.25) wise to Pin 8 when viewed
.046 .060 .060 .046 from the top. Pin 6 is omitted.
4. Minimum metal to metal
spacing at the package body
for the omitted lead location
.080 is .137 inch (3.48 mm).
Pin 1 Pin 1
5. Lead width measured at
.086 package body.
.100 (2.54) (BSC) 6. D and E are referenced
.186
datums on the package
.286 body.
.367 (9.32)
-D- Solder Pad Dimensions
.387 (9.83)
.057 (1.45)
.125 (3.18) .068 (1.73)
.145 (3.68) (NOTE 5)
.004 (.10)
.032 (.81) .048 (1.22)
.053 (1.35)
.009 (.23) .004 (.10) .036 (0.91) 0 °- 8°
.037 (.94)
.012 (.30) .044 (1.12) G08B
PI-2546-040110
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SO-8C (D Package)
0.10 (0.004) C A-B 2X
2 DETAIL A
4 B
4.90 (0.193) BSC
A 4
D
8 5
GAUGE
PLANE
SEATING
PLANE
2 3.90 (0.154) BSC 6.00 (0.236) BSC o
C 0-8
0.25 (0.010)
1.04 (0.041) REF
BSC
0.10 (0.004) C D
0.40 (0.016)
2X 1
Pin 1 ID 4 0.20 (0.008) C 1.27 (0.050)
1.27 (0.050) BSC 2X
7X 0.31 - 0.51 (0.012 - 0.020)
0.25 (0.010) M C A-B D
C 0.17 (0.007)
0.25 (0.010)
Reference
Solder Pad +
Dimensions
Notes:
1. JEDEC reference: MS-012.
2.00 (0.079) 4.90 (0.193) 2. Package outline exclusive of mold flash and metal burr.
3. Package outline inclusive of plating thickness.
4. Datums A and B to be determined at datum plane H.
+ + + 5. Controlling dimensions are in millimeters. Inch dimensions
are shown in parenthesis. Angles in degrees.
1.27 (0.050) 0.60 (0.024)
D07C PI-4526-040110
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Power Integrations:
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