Department of Computer Science and Engineering

Bangladesh University of Engineering and Technology, Dhaka- 1000, Bangladesh

Phone: +880-2-9665650/7104 Fax: +880-2-9665612 Web: www.buet.ac.bd/cse

CSE 209
Digital Electronics and Pulse Technique
Date: April 27, 2008

Microelectronics- Jacob Millman

Chapter 5
Syllabus:
o Section: 5-2, 5-3, 5-4, 5-8, 5-9 (up to pg. 143), 5-11, 5-12, (up to pg. 151), 5-13, 5-14
(up to pg. 160 excluding fan-out).
Short Questions:
1. What do you mean by Negative logic and Positive logic?
2. Why R is chosen much larger than Rs in Fig. 5-3?
3. Explain how a negative logic OR gate is the same circuit as a positive AND gate?
4. What happens if the VR is larger than V(1) in Fig. 5-5(b)?
5. What happens in circuit of Fig. 5-5(b) if not all the inputs have the same upper
level V(1) ?
6. In designing transistor inverters like Fig. 5-7 what are the 3 transistor limitations?
(Learn specially the 3rd point in pg. 132).
7. Why the capacitor C1 is added in Fig. 5-14?
8. Define NM(0) and NM(1).
9. What is the significance of D2 in Fig. 5-18?
10. Why there is a limit in fan-out for the circuit in Fig. 5-18?
11. Why TTL has a low storage time (Fig. 5-21)?
12. What are the functions of input clamping diodes in Fig. 5-21?
13. Can TTL gate outputs be wire AND-ed? What is the problem when done so? What
is the solution? (Fig. 5-22)
14. Argument in favor of making Rc larger and smaller in Fig. 5-21?
15. What is the historical significance of totem-pole? How it is related to Fig. 5-23?
 Department of Computer Science and Engineering
Bangladesh University of Engineering and Technology, Dhaka- 1000, Bangladesh
Phone: +880-2-9665650/7104 Fax: +880-2-9665612 Web: www.buet.ac.bd/cse

16. Which transistor is called ‘Phase Splitter’ and why in Fig. 5-23?
17. Explain the behavior of ‘Source transistor’ in Fig. 5-23 when the output changes
from V(0) to V(1). (Describe how it turns ON, saturates and then goes OFF after
making the CL charged).
18. Why can’t we completely eliminate 100 ohm resistor in Fig. 5-23?
19. Can Totem-pole outputs be wire AND-ed? (pg. 151)
20. What can be said about the V(1) of Fig. 5-25? Eliminating 450 ohm resistors from
the circuit can solve this problem, but what is the disadvantage of this new circuit?
21. Write down the advantages and disadvantages of DCTL.
22. Why Q5 and Q6 are added in Fig. 5-29 although Fig. 5-28 works as ECL OR/NOR
gate?
23. Write down the advantages and disadvantages of ECL.
Mathematical Problems:
o Example: 5-1, 5-3, 5-5, 5-7
o Exercise: 5-36, 5-38, 5-41, 5-42, 5-43, 5-56

Microelectronics- Jacob Millman

Chapter 8
Syllabus:
o Section: 8-8, 8-9 ( up to Fig. 8-27 of pg. 265)
Short Questions:
1. Remember the two characteristics equations of MOS. There could be very simple
mathematical problems based on it.
2. Why MOS is better than BJT? Advantage/disadvantage of MOS devises.
3. Why NMOS is better than PMOS?
4. Given truth table/function draw the circuit using only NMOS.
5. Given a circuit drawn with NMOS, write down the function it realizes.
 Department of Computer Science and Engineering
Bangladesh University of Engineering and Technology, Dhaka- 1000, Bangladesh
Phone: +880-2-9665650/7104 Fax: +880-2-9665612 Web: www.buet.ac.bd/cse

6. Explain the circuit diagram of bi-stable latch. (Fig. 8-24). [memorize this circuit
please]
7. Given truth table/function draw the circuit using CMOS.
8. Given a circuit drawn with CMOS, write down the function it realizes.

Microelectronics- Jacob Millman

Chapter 9
Syllabus:
o Section: 9.6, 9.7 (up to pg. 293 excluding Four MOSFET Dynamic RAM Cell)
Short Questions:

1. What is linear addressing scheme?

2. What is 2D addressing? Compare it with liner addressing.
3. Draw the basic RAM organization. (Fig. 9-18 + Table 9-2)
4. Expanding memory: practice all versions that were discussed in 13th week.
5. Explain read/write operations of static MOS RAM. (Fig. 9-20, memorize this circuit
please)

Digital Integrated Electronics- Taub/Schilling

Chapter 14
Syllabus:
o Section: 14.5, 14.6, 14.12 (up to pg. 518),
Short Questions:
1. Prove equation 14.5-4, 14.5-6
2. What is the advantage of using OPAMP in Fig. 14.5-3?
3. What are the disadvantages of weighted-resistor D/A converter?
4. Finding the contribution of some input in R-2R ladder circuit. (Say, in Fig. 14.6-1
or 14.6-2, S0 = S2=S3=0, S1=1 etc.)
 Department of Computer Science and Engineering
Bangladesh University of Engineering and Technology, Dhaka- 1000, Bangladesh
Phone: +880-2-9665650/7104 Fax: +880-2-9665612 Web: www.buet.ac.bd/cse

5. Compute the value of r (in Fig. 14.6-3) for binary input format.
6. Compute the value of r (in Fig. 14.6-3) for BCD input format.
7. What do you mean by quantization error while A/D conversion?
8. Why the end registers in circuit 14.12-1 are R/2 whereas rests are R?
9. Explain a 2 bit parallel comparator type A/D converter.

Some tips/guidelines for final exam:

1. Do not write much in your answer script. Answer precisely.

2. Use sharp pencils for drawing.
3. Keep margins.
4. Answer all sub-questions of a question together. (If you have started question 1,
then answer 1(a), 1(b), 1(c) together, if possible serially.)
5. Start answering questions always at the start of a new page.
6. At the end of answering a mathematical problem, list the result(s) in a tabular
format.
7. Never take exams seriously.

S. M. Shahriar Nirjon
Lecturer,
Dept. of CSE, BUET.
email: nirjon@cse.buet.ac.bd