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en Ingeniería
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Grado*en*Ingeniería*
FUNDAMENTOS DE
Informática*
TECNOLIGÍA DE
DEPARTAMENTO DE AUTOMÁTICA COMPUTADORES
FUNDAMENTOS*DE*
! TECNOLIGÍA*DE*
ARQUITECTURA Y TECNOLOGÍA DE COMPUTADORES COMPUTADORES*
DEPARTAMENTO*DE*AUTOMÁTICA*
ARQUITECTURA*Y*TECNOLOGÍA*DE*COMPUTADORES* Curso*Académico*2012/2013!
!

CONTADORES
! ASÍNCRONOS
CONTADORES
Binario de 3 bits ASÍNCRONOS
Binario de 3 bits

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Binario de 4 bits
Binario de 4 bits
Flip-flops activos en flanco de bajada (atención a las entradas de
Flip-flops activos
clock de los en flanco
flip-flops, ahorade
esbajada
Q y no(atención
Q negado)a las entradas de
clock de los flip-flops, ahora es Q y no Q negado)

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Contador de décadas asíncrono
Contador de décadas asíncrono

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Contador módulo 12 asíncrono

 SN74LSXXD SOIC GND = PIN 10 pinouts (Connection Diagram) as
he device. the Dual In-Line Package.
s than 100 ns.
LOGIC DIAGRAM CONNECTION DIAGRAM
DIP (TOP VIEW)
LS92
SYMBOL
CP1 1 14 CP0

LS92
SN54/74LS93
LS93
SN54/74LS90 • SN54/74LS92 • SN54/74LS93
14
J Q J Q J Q J Q
NC 2

NC 3
13 NC

12 Q0
CP0 CP CP CP CP
KC Q KC Q KC Q KC Q NC 4 11 Q1
LS90D D D D AND LS93
LS92
MODE VCC 5 10 GND
1 SELECTION MODE SELECTION
14CP CP0
1
RESET / SET INPUTS OUTPUTS MR1 6 9 Q2
6 RESET
1 CP1 OUTPUTS
MR 1 INPUTS MR2 7 8 Q3
MR1 MR2 MR MS1 MS2MR QQ 0 QQ12 Q Q 11 9 8
Q0 Q1 Q2 Q3 2 7 0 11Q2 Q23 3 MR
H H L X Q
L 0L L L Q1 Q2 1 MR2 QQ
0 3 Q1 Q2 Q3
H H X L 1 2 L L L L H H L L L L NC = NO INTERNAL CONNECTION
X X H H H L L H L = PIN
H NUMBERS Count NOTE:
12 11 9 8 L X L X 2 3 12 9Count 8 11 HVCC =LPIN 5 Count The Flatpak version has the same
4/74LS90 • SN54/74LS92 • SN54/74LS93
X L X L Count LGND =LPIN 10 Count pinouts (Connection Diagram) as
= PIN 5 L X X L VCC = PIN 5Count H = HIGH Voltage Level
the Dual In-Line Package.
= PIN 10 X L L X GND = PIN Count
10 L = LOW Voltage Level
PINS LS90 HLOGIC
2, 3, 4, 13 DIAGRAM
= HIGH Voltage Level NC = PIN 4, 6, 7, 13 X = Don’t Care CONNECTION DIAGRAM
LS92 AND LS93
L = LOW Voltage Level DIP (TOP VIEW)
ODE SELECTION
X = Don’t Care MODELS93
SELECTION
LS TTL DATA
NPUTS OUTPUTS RESET
OUTPUTS
CP1 1 14 CP0
J Q INPUTS J Q J Q J Q
S1 MS2 Q0 Q1 Q2 Q3 MR1 2 13 NC
-90 14
X L L LS90L L
CP0 CP MR1 MRCP 2 Q0 Q1CP Q2 Q3 CP
LS92 LS93 MR2 3 12 Q0
L L L L L
BCD COUNT SEQUENCE KC Q H H K C Q LTABLE
TRUTH L KC QL L KC Q TRUTH TABLE
D D D D
H H H L L H L H Count NC 4 11 Q3
X Count OUTPUT 1 H L OUTPUT
Count OUTPUT
COUNT COUNT COUNT VCC 5 10 GND
L Q0 Q1 QCP
Count 2 1 Q3 L L Count
Q0 Q1 Q2 Q3 Q0 Q1 Q2 Q3
L Count 2
H = HIGH NC 6 9 Q1
0 L L LMR1 L 0 VoltageLLevelL9
L L 8 0 L L L L
X Count 12 11
1 H L LMR2 L3 L = LOW1 VoltageHLevelL
L L 1 H L L L 7
NC 8 Q2
Level 2 L H L L X =QDon’t
0 2 Care L Q1H
L
Q
L2
Q3
2 L H L L
evel 3 H H L L 3 H H L L 3 H H L L
4 L L H L 4 L L H L = PIN NUMBERS
4 L L H NCL= NO INTERNAL CONNECTION
5 H L H L 5 H L H L VCC = PIN 5 5 H L H NOTE:
L
6 L H H L 6 L L L H GND = PIN 10 6 L H H TheLFlatpak version has the same
7 H H H L 7 H L L H 7 H H H pinouts
L (Connection Diagram) as
8 L L L H 8 L H L H 8 L L L the H
Dual In-Line Package.
9 H L LS92
L H 9 H H LLS93 H 9 H L L H
NCE NOTE: Output Q0 is TRUTH
connected TABLE
to Input
10 L LTRUTHH TABLEH 10 L H L H
CP1 for BCD count. 11 H L H H 11 H H L H
T FAST
OUTPUT NOTE: Output Q is connected to AND LS TTL 12
OUTPUT
Input DATA L L H H
COUNT 0
COUNT
Q2 Q3 Q0 Q1 Q2 Q31 CP . Q0 Q15-91 Q2 Q3 13 H L H H
14 L H H H
L L 0 L L L L 0 L L L L15 H H H H
L L 1 H L L L 1 H L L NOTE:
L Output Q is connected to Input
0
L L 2 L H L L 2 L H L CP1.L
L L 3 H H L L 3 H H L L
H L 4 L L H L 4 L L H L
H L 5 H L H L 5 H L H L
H L 6 L L L H 6 L H H L
H L 7 H L L H 7 H H H L
L H 8 L H L H 8 L L L H
L H 9 H H L H 9 H L L H
to Input
10 L L H H 10 L H L H
11 H L H H 11 H H L H
NOTE: Output Q0 is connected to Input 12 L L H H
CP1. 13 H L H H
14 L H H H
15 H H H H
NOTE: Output Q0 is connected to Input
CP1.

FAST AND LS TTL DATA

5-93
 A B C D E F

CONTADORES SÍNCRONOS J Q J Q J Q J Q

CLK CLK CLK CLK

Binario de 4 bits K Q K Q K Q K Q

2
reloj
Q0 Q1 Q2 Q3

3
2

7
4 15 9 11 4 15 9 11
S

S
J Q J Q J Q J Q
4 1 6 1 6
CLK CLK CLK CLK

16 14 12 10 16 14 12 10
K Q K Q K Q K Q
R

R
3

8
5
reloj
Q0 Q1 Q2 Q3

Q0 Q1 Q2
6
up/down

7 reloj J Q J Q J Q

CLK CLK CLK

K Q K Q K Q

Q0

8
Q1
reloj

Q2
9

Q3
A B C D E F

 Contador de décadas síncrono
A B C D E F

J Q J Q J Q J Q

CLK CLK CLK CLK

K Q K Q K Q K Q

2
reloj
Q0 Q1 Q2 Q3

J0 = K0 = 1
3

J1 = K1 = Q0 Q3

2

7
4 15 9
J 2 = K 2 = Q0Q1 11 4 15 9 11
S

S
J Q J Q J Q J Q
4 1 6 1 6
CLK CLK CLK CLK

16
K Q
14 J3 = K 3 = Q0Q1Q2 + Q0Q3
12
K Q
10 16
K Q
14 12
K Q
10
R

R
3

8
5
reloj reloj 1 2 3 Q0
4 5 6 7
Q1
8 9 0Q2 1 Q3

Q0
Q0 Q1 Q2
6

Q1
up/down

Q2
J Q J Q J Q
7
CLK CLK CLK

Q3 K Q K Q K Q

reloj

9

A B C D E F
 2

7
4 15 9 11 4 15 9 11

S
J Q J Q J Q J Q
4 1 6 1 6
CLK CLK CLK CLK

16 14 12 10 16 14 12 10
K Q K Q K Q K Q

R
3

8
5
Contador síncrono ascendente/descendente
reloj
Q0 Q1 Q2 Q3

Q0 Q1 Q2
6
up/down

J Q J Q J Q
7
CLK CLK CLK

K Q K Q K Q

reloj

up/down
A B C D E F G

reloj 1 2 3 4 5 6 5 4 3 2 3 4 5 6

Q0

Q1

Q2