PD - 97482

AUTOMOTIVE GRADE
AUIRF1324
HEXFET® Power MOSFET
Features
l Advanced Process Technology
D VDSS 24V
l Ultra Low On-Resistance RDS(on) typ. 1.2m:
l 175°C Operating Temperature
max. 1.5m:
c
l Fast Switching G
l Repetitive Avalanche Allowed up to Tjmax ID (Silicon Limited) 353A
l Lead-Free, RoHS Compliant
l Automotive Qualified * S ID (Package Limited) 195A

Description
Specifically designed for Automotive applications, this HEXFET®
Power MOSFET utilizes the latest processing techniques to achieve
extremely low on-resistance per silicon area. Additional features of S
this design are a 175°C junction operating temperature, fast switch- D
G
ing speed and improved repetitive avalanche rating . These features
combine to make this design an extremely efficient and reliable TO-220AB
device for use in Automotive applications and a wide variety of other AUIRF1324
applications.
G D S
Gate Drain Source

Absolute Maximum Ratings

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; and
functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-
maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under
board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise specified.

Symbol Parameter Max. Units

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 353 c
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 249 c A
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Package Limited) 195
IDM Pulsed Drain Current d 1412
PD @TC = 25°C Maximum Power Dissipation 300 W
Linear Derating Factor 2.0 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche Energy (Thermally Limited) e 270 mJ
IAR Avalanche Current d See Fig. 14, 15, 22a, 22b A
EAR Repetitive Avalanche Energy e mJ
dv/dt Peak Diode Recovery f 0.46 V/ns
TJ Operating Junction and
-55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds (1.6mm from case) 300
Mounting torque, 6-32 or M3 screw x
10lb in (1.1N m) x
Thermal Resistance
Symbol Parameter Typ. Max. Units
RθJC Junction-to-Case j ––– 0.50
RθCS Case-to-Sink, Flat Greased Surface 0.50 ––– °C/W
RθJA Junction-to-Ambient ––– 62

HEXFET® is a registered trademark of International Rectifier.

*Qualification standards can be found at http://www.irf.com/
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AUIRF1324

Static Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 24 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 22 ––– mV/°C Reference to 25°C, ID = 5.0mA d
RDS(on) Static Drain-to-Source On-Resistance ––– 1.2 1.5 mΩ VGS = 10V, ID = 195A g
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 180 ––– ––– S VDS = 10V, ID = 195A
RG Internal Gate Resistance ––– 2.3 ––– Ω
IDSS Drain-to-Source Leakage Current ––– ––– 20 µA VDS = 24V, VGS = 0V
––– ––– 250 VDS = 24V, VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 200 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -200 VGS = -20V
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions
Qg Total Gate Charge ––– 160 240 ID = 195A
Qgs Gate-to-Source Charge ––– 84 ––– VDS = 12V
Qgd Gate-to-Drain ("Miller") Charge ––– 49 –––
nC
VGS = 10V g
Qsync Total Gate Charge Sync. (Qg - Qgd) ––– 76 ––– ID = 195A, VDS =0V, VGS = 10V
td(on) Turn-On Delay Time ––– 17 ––– VDD = 16V
tr Rise Time ––– 190 ––– ID = 195A
ns
td(off) Turn-Off Delay Time ––– 83 ––– RG = 2.7Ω
tf Fall Time ––– 120 ––– VGS = 10V g
Ciss Input Capacitance ––– 7590 ––– VGS = 0V
Coss Output Capacitance ––– 3440 ––– VDS = 24V
Crss Reverse Transfer Capacitance ––– 1960 ––– pF ƒ = 1.0 MHz, See Fig. 5
Coss eff. (ER) Effective Output Capacitance (Energy Related) ––– 4700 ––– i
VGS = 0V, VDS = 0V to 19V , See Fig. 11
Coss eff. (TR) Effective Output Capacitance (Time Related) ––– 4490 ––– VGS = 0V, VDS = 0V to 19V h
Diode Characteristics
Symbol Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current
(Body Diode)
––– ––– 353 c MOSFET symbol
showing the
D

A
ISM Pulsed Source Current integral reverse G

(Body Diode) d ––– ––– 1412

p-n junction diode. S

VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 195A, VGS = 0V g
trr Reverse Recovery Time ––– 46 ––– TJ = 25°C VR = 20V,
ns
––– 71 ––– TJ = 125°C IF = 195A
Qrr Reverse Recovery Charge ––– 160 –––
nC
TJ = 25°C di/dt = 100A/µs g
––– 430 ––– TJ = 125°C
IRRM Reverse Recovery Current ––– 7.7 ––– A TJ = 25°C
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:
 Calcuted continuous current based on maximum allowable junction … Pulse width ≤ 400µs; duty cycle ≤ 2%.
temperature Bond wire current limit is 195A. Note that current † Coss eff. (TR) is a fixed capacitance that gives the same charging time
limitation arising from heating of the device leds may occur with as Coss while VDS is rising from 0 to 80% VDSS .
some lead mounting arrangements.
‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as
‚ Repetitive rating; pulse width limited by max. junction
temperature. Coss while VDS is rising from 0 to 80% VDSS.
ƒ Limited by TJmax, starting TJ = 25°C, L = 0.014mH ˆ Rθ is measured at TJ approximately 90°C
RG = 25Ω, IAS = 195A, VGS =10V. Part not recommended for use
above this value .
„ ISD ≤ 195A, di/dt ≤ 450 A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.

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Qualification Information†
Automotive
††
(per AEC-Q101)
Qualification Level Comments: This part number(s) passed Automotive qualification.
IR’s Industrial and Consumer qualification level is granted by
extension of the higher Automotive level.

Moisture Sensitivity Level D2Pak MSL1

TO-262 N/A
Machine Model Class M4
AEC-Q101-002
Human Body Model Class H3A
ESD
AEC-Q101-001
Charged Device Model Class C5
AEC-Q101-005
RoHS Compliant Yes

† Qualification standards can be found at International Rectifier’s web site: http//www.irf.com/

†† Exceptions to AEC-Q101 requirements are noted in the qualification report.

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AUIRF1324
10000 10000
VGS VGS
≤60µs PULSE WIDTH TOP 15V ≤60µs PULSE WIDTH TOP 15V
Tj = 25°C 10V Tj = 175°C 10V
1000 8.0V 8.0V
ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)

6.0V 6.0V
5.5V 5.5V
5.0V 5.0V
4.5V 1000 4.5V
100 BOTTOM 4.0V BOTTOM 4.0V

10
100

1
4.0V
4.0V
0.1 10
0.1 1 10 100 0.1 1 10 100
V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 2.0
ID = 195A

RDS(on) , Drain-to-Source On Resistance

VGS = 10V
ID, Drain-to-Source Current (A)

100
T J = 175°C 1.5
(Normalized)

T J = 25°C
10

1.0
1

VDS = 15V
≤60µs PULSE WIDTH
0.1 0.5
2 3 4 5 6 7 8 9 -60 -40 -20 0 20 40 60 80 100120140160180

VGS, Gate-to-Source Voltage (V) T J , Junction Temperature (°C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature

100000 14.0
VGS = 0V, f = 1 MHZ
ID= 195A
C iss = C gs + C gd, C ds SHORTED
C rss = C gd 12.0 VDS= 19V
VGS, Gate-to-Source Voltage (V)

C oss = C ds + C gd VDS= 12V

10.0
C, Capacitance (pF)

8.0
10000 Ciss
Coss 6.0

Crss 4.0

2.0

1000 0.0
1 10 100 0 50 100 150 200
VDS, Drain-to-Source Voltage (V) QG, Total Gate Charge (nC)

Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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 AUIRF1324
1000 10000
OPERATION IN THIS AREA
LIMITED BY R DS(on)

ID, Drain-to-Source Current (A)

ISD, Reverse Drain Current (A)

T J = 175°C 1000
100µsec
100
1msec

100

T J = 25°C Limited by
package
10
10msec
10
Tc = 25°C
Tj = 175°C
VGS = 0V Single Pulse DC
1.0 1
0.0 0.5 1.0 1.5 1 10 100
VSD, Source-to-Drain Voltage (V) VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area
Forward Voltage

V(BR)DSS , Drain-to-Source Breakdown Voltage (V)

400 32
Id = 5mA
350
Limited By Package

300 30
ID, Drain Current (A)

250

200 28

150

100 26

50

0 24
25 50 75 100 125 150 175 -60 -40 -20 0 20 40 60 80 100120140160180

T C , Case Temperature (°C) T J , Temperature ( °C )

Fig 9. Maximum Drain Current vs. Fig 10. Drain-to-Source Breakdown Voltage
Case Temperature
2.0 1200
EAS , Single Pulse Avalanche Energy (mJ)

ID
1.8
TOP 44A
1000
1.6 83A
BOTTOM 195A
1.4
800
1.2
Energy (µJ)

1.0 600
0.8
400
0.6

0.4
200
0.2

0.0 0
-5 0 5 10 15 20 25 30 25 50 75 100 125 150 175

VDS, Drain-to-Source Voltage (V) Starting T J , Junction Temperature (°C)

Fig 11. Typical COSS Stored Energy Fig 12. Maximum Avalanche Energy vs. DrainCurrent
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AUIRF1324

1
Thermal Response ( Z thJC ) °C/W

D = 0.50

0.1 0.20

0.10
R1
R1
R2
R2
R3
R3
R4
R4
Ri (°C/W) τi (sec)
0.05 0.0125 0.000008
τJ τC
τJ τ
τ1 0.0822 0.000078
0.02 τ1
τ2 τ3 τ4
0.01 τ2 τ3 τ4 0.2019 0.001110
0.01
Ci= τi/Ri 0.2036 0.007197
Ci i/Ri
Notes:
SINGLE PULSE 1. Duty Factor D = t1/t2
( THERMAL RESPONSE ) 2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)

Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case

1000

Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming ∆Tj = 150°C and
Tstart =25°C (Single Pulse)
0.01
Avalanche Current (A)

100
0.05

0.10

10

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming ∆Τ j = 25°C and
Tstart = 150°C.
1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth

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 AUIRF1324

300
TOP Single Pulse
Notes on Repetitive Avalanche Curves , Figures 14, 15:
BOTTOM 1.0% Duty Cycle (For further info, see AN-1005 at www.irf.com)
250 ID = 195A 1. Avalanche failures assumption:
EAR , Avalanche Energy (mJ)

Purely a thermal phenomenon and failure occurs at a temperature far in

200 excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
150 4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
100 6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
50 tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
0
25 50 75 100 125 150 175
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Starting T J , Junction Temperature (°C) Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav

Fig 15. Maximum Avalanche Energy vs. Temperature

4.5
VGS(th) , Gate threshold Voltage (V)

4.0

3.5

3.0
ID = 250µA
2.5 ID = 1.0mA
ID = 1.0A
2.0

1.5

1.0
-75 -50 -25 0 25 50 75 100 125 150 175 200
T J , Temperature ( °C )

Fig 16. Threshold Voltage vs. Temperature

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AUIRF1324
Driver Gate Drive
P.W.
D.U.T P.W.
Period D=
Period
+

ƒ VGS=10V *
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance D.U.T. ISD Waveform
Current Transformer
+
Reverse
‚ Recovery Body Diode Forward
-
„ + Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
 dv/dt
VDD

RG • dv/dt controlled by RG VDD Re-Applied

• Driver same type as D.U.T. + Voltage Body Diode Forward Drop
• I SD controlled by Duty Factor "D" - Inductor Current
Inductor Curent
• D.U.T. - Device Under Test

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs

V(BR)DSS
15V
tp

L DRIVER
VDS

RG D.U.T +
V
- DD
IAS A
VGS
20V
tp 0.01Ω
I AS

Fig 22a. Unclamped Inductive Test Circuit Fig 22b. Unclamped Inductive Waveforms
RD
VDS VDS

VGS
90%
D.U.T.
RG
+
- VDD

V10V
GS 10%
Pulse Width ≤ 1 µs VGS
Duty Factor ≤ 0.1 %
td(on) tr t d(off) tf

Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms
Current Regulator Id
Same Type as D.U.T. Vds

Vgs
50KΩ

12V .2µF
.3µF

+
V
D.U.T. - DS
Vgs(th)
VGS

3mA

IG ID
Current Sampling Resistors Qgs1 Qgs2 Qgd Qgodr

Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform
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TO-220AB Package Outline

Dimensions are shown in millimeters (inches)

TO-220AB Part Marking Information

Part Number AUIRF1324

Date Code
Y= Year
IR Logo
YWWA WW= Work Week
A= Automotive, Lead Free

XX or XX

Lot Code

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

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AUIRF1324

Ordering Information
Base part Package Type Standard Pack Complete Part Number
Form Quantity
AUIRF1324 TO-220 Tube 50 AUIRF1324

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 AUIRF1324

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to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to
discontinue any product or services without notice. Part numbers designated with the “AU” prefix follow automotive industry and / or
customer specific requirements with regards to product discontinuance and process change notification. All products are sold subject to
IR’s terms and conditions of sale supplied at the time of order acknowledgment.

IR warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with IR’s standard
warranty. Testing and other quality control techniques are used to the extent IR deems necessary to support this warranty. Except where
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http://www.irf.com/technical-info/

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