Embedded System Design With ARM7 Microcontroller LPC2148

Designing with VHDL

Cranes Software International Limited

Duration: 3 Days

Course Objectives  Gate Array Design

 To bring both Circuits and System views  Standard Cell Based Design
on design together.  Full Custom Design
 Gain exposure the design of complex
digital VLSI circuits, computer aided Day 2-3:
simulation and synthesis tool for
VHDL – Introduction
hardware design.
 Learn about VHDL and different design
 Introduction to Programming
levels
 Data Flow Modeling
 Explore state machine and machine
 Behavioral Modeling
designing.
 Structural Modeling
 Process of synthesis of VHDL/Verilog

Digital Circuits Design

Pre-requisites
Students are required to have basic
 Basic Gates Design
knowledge on the following topics:
o NOT, AND, OR, XOR, etc.,
 Digital electronics basics
 Combinational Circuits Design
 VHDL/Verilog programming basics
o Half Adder, Half Subtractor,
 Prior knowledge of any FPGA
Full Adder, Full Subtractor,
Architectures
MUX, DEMUX, etc.,
 Sequential Circuits Design
Tools and Resources used
o D Latch, SR Latch, D Flip-
 Xilinx ISE
Flop, T Flip-Flop, SR Flip-
 ModelSim
Flop and JK Flip-Flop etc.,
o Counters
Take away

 To design and simulate the Day 4-5:

combinational and sequential digital
FSM Design
circuits using ModelSim & Xilinx
–VHDL/Verilog language.
 Introduction Finite State
 Skill of understanding documents for
Machine
developing any project.
 Types of FSM
 VHDL Programming to
Day 1:
design FSM
Introduction to Digital Circuits
Timing Analysis
 Basic Gates and Universal gates
Floor Planning
 Combinational Circuits
Placement and Routing
 Sequential Circuits

Conceptual View of FPGA

 VLSI Design Flow **Lab Exercises on Xilinx ISE and

 Y Chart ModelSim
 Design Hierarchy-Structural
 VLSI – FPGA Technology
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