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5 4 3 2 1

M 9F1 Block Diagram R1.0

D D

TI Charger
BQ24753ARHDR P.36

Inputs Outputs

DCBATOUT
DC_IN BT+

LVDS 10.1" LCD PANEL


P18 P12~P13 P28
DDRII CPU
CLOCK GEN. DDRII 667
SODIMM PineView-M System DC/DC
9LRS3165BKLFT TPS51125RGER P.37

Inputs Outputs

+3VALW
+5VALW
+5VALW_LDO
VGA D-Sub
DCBATOUT
+ECVCC
22mm x 22mm
P26
P6~P11

System DC/DC
TPS51124RGER P.38

C DMI x 2 Inputs Outputs C

+1_8VSUS
DCBATOUT
VCCGFX

HDP JACK
USB#3 USB#2 USB#1 USB#0
3G CON CON CON
P30 P27 P27 P27 AUDIO CODEC MIC JACK CPU DC/DC
P.39
USB2.0 Tiger Point HDA Int. DMIC
MAX8796GTJ+
USB#7 USB#6 USB#5 USB#5 REALTEK INPUTS OUTPUT
MM-SIM CAMERA BT WiFi ALC269Q DCBATOUT VHCORE
P30 P28 P31 P31
USB 2.0 (8 ports) P23
Speaker
SATA (2 Ports)
PCIE x 1 AZALIA HD AUDIO System DC/DC
G2998BP11U P.40
3 X1 PCIE IF
Inputs Outputs
1 PCI
LPC I/F +1_8VSUS +0_9VRUN

Transformer LAN + 4 in 1
B
Carder Reader 17mm x 17mm
SATA B
RJ45P22 10/100Mb PCIE Interface SATA
P22 JMC261 P21
HDD P25 System DC/DC
P14~P17 G9731F11U P.40

Inputs Outputs

+1_8VSUS +1_5VRUN
3 in 1
LPC,33MHZ
Card Slot
P21

System DC/DC
SM Bus G9731F11U P.40
EC Thermal Sensor
Inputs Outputs

NUVOTON NPCE783LA0DX P19 EMC1412-1 P33 +1_8VSUS +1_05VRUN

SPI SM Bus Battery Pack


P36

A BIOS TOUCH KBD A

P20
PAD P20 P20

CCPBG
Title
Block Diagram
Size Document Number Rev
A2 M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 1 of 44


5 4 3 2 1
5 4 3 2 1

CPUC0/CPUT0 CLK_CPU_BCLK# BCLKN

CLK_CPU_BCLK BCLKP Pineview


D D

CPUC1/CPUT1 CLK_MCH_BCLK# HPL_CLKINN DDR_A_CK0 M_CLK_DDR#0 CK0/CK0#

CLK_MCH_BCLK HPL_CLKINP DDR_A_CK#0 M_CLK_DDR0


CLK_PCIE_LAN# SRCC6/SRCT6 SO-DIMM
LAN DDR_A_CK1 M_CLK_DDR#1 CK1/CK1#
25MHz CLK_PCIE_LAN SRCC4/SRCT4 EXP_CLKIN# EXP_CLKINN
DDR_A_CK#1 M_CLK_DDR1
EXP_CLKIN EXP_CLKINP

SRCC1/SRCT1 DREFSSCLK# DPL_REFSSCLKINN

DREFSSCLK DPL_REFSSCLKINP
CLK_PCIE_WLAN# SRCC9/SRCT9
Wireless CLK_PCIE_WLAN
C
SRCC0/SRCT0 DREFCLK# DPL_REFCLKINN C

DREFCLK DPL_REFCLKINP

CLK_PCIE_3G# SRCC10/SRCT10
3G CLK_PCIE_3G
CPUC2/CPUT2 CLK_ICH_DMI# DMI_CLKINN
32.768KHz
CLK_ICH_DMI DMI_CLKINP

SRCC2/SRCT2 CLK_ICH_SATA# SATA_CLKINN

CLK_ICH_SATA SATA_CLKINP

USB_48MHz CLK_ICH48 CLK48


TPT
B
PCI_F5 CLK_ICH_PCI PCICLK B

HDA_BIT_CLK HDA_CODEC_BITCLK BCLK


REF0 CLK_ICH14 CLK14
HD Audio

CK-505
14.318MHz LPCCLK
PCI4 CLK_KBCPCI
32.768KHz
EC

A A

CCPBG
Title
Clock distribution
Size Document Number Rev
A3 M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 2 of 44


5 4 3 2 1
5 4 3 2 1

Pine Trail Power Flowchart for M9F1


D Voltage Rails O MEANS ON X MEANS OFF D

power +5VALW_LDO +5VALW +5VRUN


plane +ECVCC +3VALW +3VSUS +3VRUN
+1_8VSUS +1_8VRUN
+1_5VRUN
+1_05VRUN
+0_9VRUN
VCCGFX
VHCORE
State

S0
O O O O
S3
C O O O X C

S5/AC, S4
O O X X
S5 Battery only
O X X X
S5 S4/AC & Battery
don't exist (G3) X X X X

S3 : STR
S4 : STD
S5 : SOFT OFF
G3 : ME OFF
B B

A A

CCPBG
Title
Power Flowchart
Size Document Number Rev
A3 M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 3 of 44


5 4 3 2 1
5 4 3 2 1

Pine Trail Power On Sequence REV : 2009/08/17

S4/S5 State S3 State S0 State


D D

DC_IN/BT+

DCBATOUT

+5VALW_LDO/+ECVCC

G3 to S5
+3VALW/+5VALW

ALW_PWRGD

PM_RSMRST#

PWRSW#
C C

PWRBTN#

PM_SLP_S4#

SUS_ON

+3VSUS/+5VSUS/+1_8VSUS

PM_SLP_S3#

RUN_ON
+3VRUN/+5VRUN
+0_9VRUN/+1_5VRUN
+1_5V_PWRGD

B +1_05VRUN
S5 to S0 B

+1_05V_PWRGD

+1_8VRUN/VCCGFX

ALL_SYS_PWRGD

IMVP_VR_ON

VHCORE

CK_PWRGD

DELAY_VR_PWRGD

H_PWRGD

A PLT_RST# A

CCPBG
Power On Sequence(1)
Title

Size Document Number Rev


Custom M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 4 of 44


5 4 3 2 1
5 4 3 2 1

REV : 2009/08/18
Pine Trail Power On Sequence

-1 2 Battery Only
D

G3 to S5
-1 4 AC Mode

Reset IC
RN5VD30CA
5
Power On Button S5 to S0 4 19
2
ECRST#
DCBATOUT
BAT
0
-1 DCBATOUT 1 +ECVCC 7 PM_SLP_S4#
AC +5VALW_LDO
+ECVCC 10 PM_SLP_S3#
8
SUS_ON
6 PWRBTN#
C
11 RUN_ON C

+5VALW EC 18 H_PWRGD
3b ALW_PWRGD CPUPWRGD
3a ALW_ON NPCE783L 4 PM_RSMRST#
+3VALW
19
Tigerpoint
PLT_RST#

9
+3VSUS DDR_PWRGD
ALL_SYS_PWRGD
17 SYS_PWRGD_TPT
CPUPWRGOOD
PWROK
14 19 PLT_RST#
8 SUS_ON +1_8VSUS RSTIN#
14 CPU
Pineview
GFX_PWRGD

15 PWROK
B
IMVP_VR_ON VRMPWRGD B

+5VRUN
11 RUN_ON +3VRUN 17
+0_9VRUN 13 DELAY_VR_PWRGD
+1_5VRUN +1_5V_PWRGD
12
+1_5V_PWRGD +1_05VRUN

13
+1_05V_PWRGD VCCGFX
+1_8VRUN

IMVP 16 IMVP_CLK_EN# 16 CK_PWRGD


CLK Gen.
VHCORE CK505

A A

CCPBG
Power On Sequence(2)
Title

Size Document Number Rev


Custom M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 5 of 44


5 4 3 2 1
5 4 3 2 1

D D

U1A

C C
C4 1 2 0.1U_10V_K 0402_X5R DMI_RXP0_C F3 G2
14 DMI_RXP0 DMI_RXP_0 DMI_TXP_0 DMI_TXP0 14
C1 1 2 0.1U_10V_K 0402_X5R DMI_RXN0_C F2 G1
14 DMI_RXN0 DMI_RXN_0 DMI_TXN_0 DMI_TXN0 14
C2 1 2 0.1U_10V_K 0402_X5R DMI_RXP1_C H4 H3
14 DMI_RXP1 DMI_RXP_1 DMI_TXP_1 DMI_TXP1 14
C3 1 2 0.1U_10V_K 0402_X5R DMI_RXN1_C G3 J2
14 DMI_RXN1 DMI_RXN_1 DMI_TXN_1 DMI_TXN1 14

DMI
N7 L10 EXP_COMP
18 EXP_CLKIN# EXP_CLKINN EXP_RCOMPO
18 EXP_CLKIN N6 L9
EXP_CLKINP EXP_ICOMPI EXP_RBIAS
L8
EXP_RBIAS
R10
R9 RSVD_2 N11 1 26MIL TP1

1
RSVD_1 RSVD_TP_2 26MIL TP2
N10 P11 1
RSVD_3 RSVD_TP_1 R1 R2
N9
RSVD_15
750_F 49.9_F
0402 0402

2
K2 K3
RSVD_18 RSVD_20
J1 L2
RSVD_17 RSVD_19
M4 M2
RSVD_16 RSVD_14
L3 N2
RSVD_21 RSVD_7
QLJB Pull-down must be placed
null
within 500 mils of the processor.
B B

A A

CCPBG
Title
CPU- Pineview (1)
Size Document Number Rev
A3 M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 6 of 44


5 4 3 2 1
5 4 3 2 1

U1B
12,13 M_A_A[14..0] M_A_DQ[63..0] 12
M_A_A0 AH19 AD3 M_A_DQS0
M_A_A1 AJ18 DDR_A_MA_0 DDR_A_DQS_0 AD2 M_A_DQS#0
M_A_A2 DDR_A_MA_1 DDR_A_DQS#_0 M_A_DM0
AK18 AD4
M_A_A3 DDR_A_MA_2 DDR_A_DM_0
AK16
M_A_A4 DDR_A_MA_3 M_A_DQ0
AJ14 AC4
M_A_A5 DDR_A_MA_4 DDR_A_DQ_0 M_A_DQ1
AH14 AC1
M_A_A6 AK14 DDR_A_MA_5 DDR_A_DQ_1 AF4 M_A_DQ2
M_A_A7 DDR_A_MA_6 DDR_A_DQ_2 M_A_DQ3
AJ12 AG2
M_A_A8 DDR_A_MA_7 DDR_A_DQ_3 M_A_DQ4
D AH13 AB2 M_A_DQS[7..0] 12 D
M_A_A9 DDR_A_MA_8 DDR_A_DQ_4 M_A_DQ5
AK12 AB3
M_A_A10 DDR_A_MA_9 DDR_A_DQ_5 M_A_DQ6
AK20 AE2 M_A_DQS#[7..0] 12
M_A_A11 AH12 DDR_A_MA_10 DDR_A_DQ_6 AE3 M_A_DQ7
M_A_A12 DDR_A_MA_11 DDR_A_DQ_7
AJ11 M_A_DM[7..0] 12
M_A_A13 DDR_A_MA_12 M_A_DQS1
AJ24 AB8
M_A_A14 DDR_A_MA_13 DDR_A_DQS_1 M_A_DQS#1
AJ10 AD7
DDR_A_MA_14 DDR_A_DQS#_1 M_A_DM1
AA9
DDR_A_DM_1
AK22 AB6 M_A_DQ8
12,13 M_A_WE# DDR_A_WE# DDR_A_DQ_8
AJ22 AB7 M_A_DQ9
12,13 M_A_CAS# DDR_A_CAS# DDR_A_DQ_9
AK21 AE5 M_A_DQ10
12,13 M_A_RAS# DDR_A_RAS# DDR_A_DQ_10
AG5 M_A_DQ11
AJ20 DDR_A_DQ_11 AA5 M_A_DQ12
12,13 M_A_BS0 DDR_A_BS_0 DDR_A_DQ_12
AH20 AB5 M_A_DQ13
12,13 M_A_BS1 DDR_A_BS_1 DDR_A_DQ_13
AK11 AB9 M_A_DQ14
12,13 M_A_BS2 DDR_A_BS_2 DDR_A_DQ_14
AD6 M_A_DQ15
DDR_A_DQ_15
AD8 M_A_DQS2
DDR_A_DQS_2 M_A_DQS#2
12,13 M_CS#0 AH22 AD10
DDR_A_CS#_0 DDR_A_DQS#_2 M_A_DM2
12,13 M_CS#1 AK25 AE8
DDR_A_CS#_1 DDR_A_DM_2
AJ21
DDR_A_CS#_2 M_A_DQ16
AJ25 AG8
DDR_A_CS#_3 DDR_A_DQ_16 AG7 M_A_DQ17
DDR_A_DQ_17 M_A_DQ18
12,13 M_CKE0 AH10 AF10
DDR_A_CKE_0 DDR_A_DQ_18 M_A_DQ19
12,13 M_CKE1 AH9 AG11
DDR_A_CKE_1 DDR_A_DQ_19 M_A_DQ20
AK10 AF7
DDR_A_CKE_2 DDR_A_DQ_20 M_A_DQ21
AJ8 AF8
DDR_A_CKE_3 DDR_A_DQ_21 M_A_DQ22
AD11
C DDR_A_DQ_22 M_A_DQ23 C
12,13 M_ODT0 AK24 AE10
DDR_A_ODT_0 DDR_A_DQ_23
12,13 M_ODT1 AH26
DDR_A_ODT_1 M_A_DQS3
AH24 AK5
DDR_A_ODT_2 DDR_A_DQS_3 M_A_DQS#3
AK27 AK3
DDR_A_ODT_3 DDR_A_DQS#_3 AJ3 M_A_DM3
DDR_A_DM_3
AH1 M_A_DQ24
DDR_A_DQ_24 M_A_DQ25
12 M_CLK_DDR0 AG15 AJ2
DDR_A_CK_0 DDR_A_DQ_25 M_A_DQ26
12 M_CLK_DDR#0 AF15 AK6
AD13 DDR_A_CK#_0 DDR_A_DQ_26 AJ7 M_A_DQ27
12 M_CLK_DDR1 DDR_A_CK_1 DDR_A_DQ_27
AC13 AF3 M_A_DQ28
12 M_CLK_DDR#1 DDR_A_CK#_1 DDR_A_DQ_28
AH2 M_A_DQ29
DDR_A_DQ_29 M_A_DQ30
AL5
DDR_A_DQ_30 M_A_DQ31
AC15 AJ6
AD15 DDR_A_CK_3 DDR_A_DQ_31
DDR_A_CK#_3 M_A_DQS4
AF13 AG22
DDR_A_CK_4 DDR_A_DQS_4 M_A_DQS#4
AG13 AG21
DDR_A_CK#_4 DDR_A_DQS#_4 M_A_DM4
AD19
+1_8VSUS DDR_A_DM_4
AE19 M_A_DQ32
DDR_A_DQ_32 M_A_DQ33
AD17 AG19
RSVD_22 DDR_A_DQ_33 M_A_DQ34
AC17 AF22
1

RSVD_23 DDR_A_DQ_34 M_A_DQ35


Place resistors close to MCH PINS ON MCH_VREF, AB15 AD22
R3 RSVD_24 DDR_A_DQ_35 M_A_DQ36
AB17 AG17
Place 0.1uF CAP close to MCH. RSVD_25 DDR_A_DQ_36 AF19 M_A_DQ37
10K_J DDR_A_DQ_37 M_A_DQ38
AE21
DDR_A_DQ_38 M_A_DQ39
0402 AD21
2

DDRDIMM_VREF +1_8VSUS DDR_A_DQ_39


NC_0_J AE26 M_A_DQS5
B R4 1 2 0402 CPU_VSS_173 AB4 DDR_A_DQS_5 AG27 M_A_DQS#5 B
RSVD_26 DDR_A_DQS#_5 M_A_DM5
AK8 AJ27
1

RSVD_27 DDR_A_DM_5
R5 R6 AE24 M_A_DQ40
DDR_A_DQ_40 M_A_DQ41
AG25
NC_0_J 1K_F TP3 26MIL 1 AB11 DDR_A_DQ_41 AD25 M_A_DQ42
TP4 26MIL RSVD_TP_3 DDR_A_DQ_42 M_A_DQ43
0402 0402 1 AB13 AD24
2

RSVD_TP_4 DDR_A_DQ_43 M_A_DQ44


AC22
MCH_VREF DDR_A_DQ_44 M_A_DQ45
AL28 AG24
R7 DDR_VREF DDR_A_DQ_45
1 80.6_F 2 0402 MCH_DDR_RPD AK28 AD27 M_A_DQ46
MCH_DDR_RPU AJ26 DDR_RPD DDR_A_DQ_46 AE27 M_A_DQ47
1

DDR_RPU DDR_A_DQ_47
1

R8 C5 AK29 AE30 M_A_DQS6


0.1U_10V_K RSVD_28 DDR_A_DQS_6 M_A_DQS#6
AF29
1K_F DDR_A_DQS#_6 M_A_DM6
0402_X5R AF30
2

DDR_A_DM_6
0402
2

+1_8VSUS AG31 M_A_DQ48


DDR_A
DDR_A_DQ_48 M_A_DQ49
AG30
DDR_A_DQ_49 M_A_DQ50
AD30
R9 DDR_A_DQ_50
1 80.6_F 2 0402 AD29 M_A_DQ51
DDR_A_DQ_51 M_A_DQ52
AJ30
DDR_A_DQ_52 M_A_DQ53
AJ29
1

C6 DDR_A_DQ_53 M_A_DQ54
AE29
0.01U_6.3V_K DDR_A_DQ_54 M_A_DQ55
AD28
DDR_A_DQ_55
0402_X7R
2

AB27 M_A_DQS7
DDR_A_DQS_7 M_A_DQS#7
AA27
DDR_A_DQS#_7 M_A_DM7
AB26
DDR_A_DM_7
A A
Place CAP close to pin DDR_RPU AA24 M_A_DQ56
DDR_A_DQ_56 M_A_DQ57
AB25
DDR_A_DQ_57 M_A_DQ58
W24
DDR_A_DQ_58 M_A_DQ59
W22
DDR_A_DQ_59

DDR_A_DQ_60
AB24 M_A_DQ60
M_A_DQ61
CCPBG
AB23
DDR_A_DQ_61 Title
CPU- Pineview (2)
AA23 M_A_DQ62
DDR_A_DQ_62 M_A_DQ63
W27
DDR_A_DQ_63
QLJB Size Document Number Rev
null A3 M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 7 of 44


5 4 3 2 1
5 4 3 2 1

D D

Locate Series resistor within


U1C
750 mils of MCH
TP5 26MIL 1 XDP_RSVD_0 D12
TP6 26MIL XDP_RSVD_0 R10
1 XDP_RSVD_1 A7 M30 CRT_HSYNC 1 15_J 2 0402 HSYNC_VGA 26 Place VGA RGB resistors close
TP7 26MIL XDP_RSVD_1 CRT_HSYNC R11
1 XDP_RSVD_2 D6 M29 CRT_VSYNC 1 15_J 2 0402 VSYNC_VGA 26
C5
XDP_RSVD_2 CRT_VSYNC to MCH: <250 mils to MCH balls.
XDP_RSVD_3
C7
XDP_RSVD_5 C6 XDP_RSVD_4 N31 RED_VGA
XDP_RSVD_5 CRT_RED RED_VGA 26
D8 P30 GREEN_VGA 26
XDP_RSVD_6 CRT_GREEN GREEN_VGA
B7 P29 BLUE_VGA 26
XDP_RSVD_7 CRT_BLUE
A9 N30
XDP_RSVD_8 CRT_IRTN

VGA
XDP_RSVD_9 D9 BLUE_VGA
C8 XDP_RSVD_9
XDP_RSVD_11 XDP_RSVD_10
B8

1
XDP_RSVD_11
C10 L31 VGA_DDC_DAT 26
XDP_RSVD_12 CRT_DDC_DATA R19 R20 R21
D10 L30 VGA_DDC_CLK 26
XDP_RSVD_13 CRT_DDC_CLK
B11
B10 XDP_RSVD_14 P28 DACREFSET R12 1 665_F 2 0402 150_F 150_F 150_F
NC_1K_J XDP_RSVD_15 DAC_IREF Place DACIREF RES close
B12 0402 0402 0402

2
R13 XDP_RSVD_16 to MCH: <500mils to MCH ball
1 2 0402 XDP_RSVD_5 XDP_RSVD_17 C11 Y30 DREFCLK 18
XDP_RSVD_17 REFCLKINP
Y29 DREFCLK# 18
REFCLKINN
AA30 DREFSSCLK 18
1K_J REFSSCLKINP
AA31 DREFSSCLK# 18
R14 REFSSCLKINN
C 1 2 0402 XDP_RSVD_9 C
L11
R15 RSVD_4
1 2 0402 XDP_RSVD_11
NC_1K_J

K29 PM_DPRSLPVR_R R16 1 2POWER_CLOSE_GAP_0402


PM_EXTTS#_1/DPRSLPVR PM_DPRSLPVR 16,39
J30 PM_EXTTS#0 PM_EXTTS#0 12
PM_EXTTS#_0 R17
L5 IMVP_PWRGD_R 1 2POWER_CLOSE_GAP_0402 DELAY_VR_PWRGD 16,39
R18 PWROK
1 2 0402 XDP_RSVD_17 AA3 PLT_RST# 16,19,20,21,30,31,33
NC_1K_J RSTIN#

W8 CLK_MCH_BCLK# 18
HPL_CLKINN
W9 CLK_MCH_BCLK 18
HPL_CLKINP
TP8 26MIL 1 AA7

MISC
TP9 26MIL RSVD_TP_6
1 AA6
TP10 26MIL RSVD_TP_7
1 R5
TP11 26MIL RSVD_TP_8
1 R6
RSVD_TP_5
TP12 26MIL 1 AA21
TP13 26MIL RSVD_TP_11
1 W21
TP14 26MIL RSVD_TP_10
1 T21
TP15 26MIL RSVD_TP_9 +3VRUN
1 V21
RSVD_TP_12

R22
PM_EXTTS#0 1 2
B 10K_J 0402 B

QLJB
null

A A

CCPBG
Title
CPU- Pineview (3)
Size Document Number Rev
A3 M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 8 of 44


5 4 3 2 1
5 4 3 2 1

U1D
H_DPSLP# 1 26MIL TP18

U25 E7 H_SMI# H_SMI# 1 26MIL TP16


28 LVDS_CLKIN- LA_CLKN SMI# H_SMI# 15
28 LVDS_CLKIN+ U26 H7 H_A20M# 15
LA_CLKP A20M# H_STPCLK# 26MIL TP17
28 LVDS_RXIN0- R23 H6 H_FERR# 15 1
R24 LA_DATAN_0 FERR# F10
28 LVDS_RXIN0+ LA_DATAP_0 LINT0 H_INTR 15
28 LVDS_RXIN1- N26 F11 H_NMI 15
LA_DATAN_1 LINT1
D 28 LVDS_RXIN1+ N27 E5 H_IGNNE# 15 D
LA_DATAP_1 IGNNE# H_STPCLK#
28 LVDS_RXIN2- R26 F8 H_STPCLK# 15
LA_DATAN_2 STPCLK#

ICH
28 LVDS_RXIN2+ R27
LA_DATAP_2
G6 PM_DPRSTP# 16,39
R25 DPRSTP#
1 2.37K_F 2 0402 LIBG R22 G10 H_DPSLP#
H_DPSLP# 16
TP19 26MIL LIBG DPSLP#
1 J28 G8 H_INIT# 15
R26 LVBG INIT#
1 2 POWER_CLOSE_GAP_0402 LVREFH N22 E11 H_BPM4_PRDY#
R27 1 2 POWER_CLOSE_GAP_0402 LVREFL N23 LVREFH PRDY# F15 H_BPM5_PREQ#
+3VRUN LVREFL PREQ# Place within 500 mils of GTLREF'S pin.Zo=50ohm.
28 LCD_BLEN L27
LBKLT_EN

LVDS
28 LCD_BLCTL L26
LCTLA_CLK LBKLT_CTL +1_05VRUN
TP31 26MIL 1 L23 E13 PM_THERMTRIP# 15
LCTLB_DAT LCTLA_CLK THERMTRIP#
TP32 26MIL 1 K25
K23 LCTLB_DATA
28 LDDC_CLK_EDID LDDC_CLK
R30 1 2.2K_J 2 0402 LDDC_CLK_EDID K24
28 LDDC_DAT_EDID

1
LDDC_DATA
28 LCD_LVDDEN H26
LVDD_EN PROCHOT# R32
C18
R31 PROCHOT#
1 2.2K_J 2 0402 LDDC_DAT_EDID W1 H_PWRGD 16
CPUPWRGOOD 1K_F
1 26MIL TP20 0402

2
A13 CPU_GTLREF

1
GTLREF

1
H27 C7 C8 R33
VSS_1 220P_50V_J 1U_10V_K
+1_05VRUN 0402_NPO 0402_X5R 2K_F

2
L6 0402

2
RSVD_11
E17
NC_51_J TP21 26MIL 1 H_BPM#0 RSVD_10
G11
R34 BPM_1_0#
C 1 2 0402 H_BPM4_PRDY# TP22 26MIL 1 H_BPM#1 E15 H10 CLK_CPU_BCLK# 18
C
TP23 26MIL H_BPM#2 BPM_1_1# BCLKN
1 G13 J10 CLK_CPU_BCLK 18
R35 BPM_1_2# BCLKP
1 51_J 2 0402 H_BPM5_PREQ# TP24 26MIL 1 H_BPM#3 F13
BPM_1_3# BSEL0
K5 BSEL0 18
TP25 26MIL 1 H_BPM_2#0 B18 BSEL_0 H5 BSEL1 +1_05VRUN
BPM_2_0#/RSVD BSEL_1 BSEL1 18
TP26 26MIL 1 H_BPM_2#1 B20 K6 BSEL2
BPM_2_1#/RSVD BSEL_2 BSEL2 18
NC_62R_J TP27 26MIL H_BPM_2#2

CPU
1 C20 VID[6..0] 39
R36 BPM_2_2#/RSVD
1 2 0402 CPU_RSVD_01 TP28 26MIL 1 H_BPM_2#3 B21 H30 VID0
BPM_2_3#/RSVD VID_0 R37
H29 VID1 BSEL0 1 470_J 2 0402
R38 1 51_J 2 0402 H_TDI VID_1 H28 VID2
VID_2 R39
G30 VID3 BSEL1 1 470_J 2 0402
R40 VID_3
1 51_J 2 0402 H_TDO CPU_RSVD_01 G5 G29 VID4
RSVD_5 VID_4 R41
H_TDI D14 F29 VID5 BSEL2 1 470_J 2 0402
H_TDO TDI VID_5 VID6
D13 E29
R42 TDO VID_6 +1_05VRUN
1 51_J 2 0402 H_TMS H_TCK B14
H_TMS TCK
C14 L7
H_TRST_N TMS RSVD_9
C16 D20

1
TRST# RSVD_12
H13
RSVD_8 R43
D18
RSVD_6
33 H_THERMDA D30
THRMDA_1 26MIL TP29 976_F
33 H_THERMDC E30 K9 1
THRMDC_1 RSVD_TP_14 26MIL TP30
D19 1 0402

2
R44 RSVD_TP_13
1 51_J 2 0402 H_TCK K7 EXTBGREF
EXTBGREF

1
R45 1 51_J 2 0402 H_TRST_N

1
C9 R46
1U_10V_K
0402_X5R 3.32K_F

2
C30 0402

2
B
D31 THRMDA_2/RSVD B
THRMDC_2/RSVD

R306 1 100K_J 2 0402 LCD_BLEN QLJB


null
R314 1 100K_J 2 0402 LCD_LVDDEN Place within 500 mils of Processor pin.

+1_05VRUN

1
R47

68_J
2 0402
R48
PROCHOT# 1 2 OVT_EC# 16,19,39
POWER_CLOSE_GAP_0402

A A

CCPBG
Title
CPU- Pineview (4)
Size Document Number Rev
A3 M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 9 of 44


5 4 3 2 1
5 4 3 2 1

VHCORE
U1E
PINEVIEW_M 3500mA 1 uF x 4
A23
VCC_1
2.2 uF x A25

1
VCCGFX VCC_2 C12 C13 C14 C15 C24
1
1 uF x 7 VCC_3
A27
B23 1U_10V_K 1U_10V_K 1U_10V_K 1U_10V_K NC_1U_10V_K
VCC_4
T13 B24 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R

2
VCCGFX_1 VCC_5
T14 B25
VCCGFX_2 VCC_6
T16 B26
1

1
C16 C17 C18 C19 C20 C10 C21 C11 VCCGFX_3 VCC_7
T18 B27
VCCGFX_4 VCC_8
1.38A
1U_6.3V_K 1U_6.3V_K 1U_6.3V_K 1U_6.3V_K 1U_6.3V_K 2.2U_6.3V_M 1U_6.3V_K 1U_6.3V_K T19 C24
VCCGFX_5 VCC_9 VHCORE
0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R V13 C26
2

2
VCCGFX_6 VCC_10
D V19 D23 D
VCCGFX_7 VCC_11
W14 D24

2
VCCGFX_8 VCC_12
W16 D26

1
W18 VCCGFX_9 VCC_13 D28 C29 D35
1

1
VCCGFX_10 VCC_14

GFX/MCH
C27 C28 C209 C30 W19 E22 + NC_330U_2.5V_M C25 C22 C23 C26 NC_SED0603-050D900-10-LF
10U_6.3V_M 0.1U_10V_K 33P_50V_J + NC_330U_2.5V_M D34 VCCGFX_11 VCC_15 22U_6.3V_M NC_22U_6.3V_M NC_22U_6.3V_M 33P_50V_J
E24 3.5x2.8x1.9 null
VCC_16
0603_X5R 0402_X5R 0402_NPO 3.5x2.8x1.9 NC_SED0603-050D900-10-LF E27 0805_X5R 0805_X5R 0805_X5R 0402_NPO

CPU
2

1
VCC_17
null F21

2
VCC_18 F22

1
VCC_19
F25
VCC_20
+VCC_DDR VCC_21
G19
+1_05VRUN Place beside C23
+1_8VSUS Place beside C30 VCC_22
G21
G24

2
VCC_23
2.2 uF x VCC_24
H17
R49 H19 D36
4 VCC_25
1 2 H22 NC_SED0603-050D900-10-LF
VCC_26
H24 null
power_close_gap_0805 VCC_27
J17

1
1

1
C32 C33 C34 C35 C36 C37 AK13 VCC_28 J19
33P_50V_J NC_2.2U_6.3V_M 2.2U_6.3V_M 2.2U_6.3V_M 2.2U_6.3V_M 2.2U_6.3V_M VCCSM_1 VCC_29
AK19 J21
VCCSM_5 VCC_30
0402_NPO 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R AK9 J22
2

2
VCCSM_6 VCC_31 VHCORE
AL11
AL16
VCCSM_7 VCC_32
K15
K17
Place beside R56
AL21 VCCSM_2 VCC_33 K21

1
VCCSM_3 VCC_34
AL25
VCCSM_4 VCC_35
L14 PU & PD avoid to route with stub
Splitting VCCA_DDR and VCCA_CK_DDR Place CAPS and resistor L16 R50
VCC_36
power shapes are proven effective to close to MCH Balls for VCK_DDR L19
VCC_37
2.27A L21 100_F Layout Note: Route VCCSENSE &
reduce the DDR2 clock jitter. +1_8VSUS +VCCCK_DDR VCC_38
N14 0402

2
C VCCA_DDR and VCCA_CK_DDR rails R51 22 uF x VCC_39
N16 VSSSENSE traces at 27.4 Ohms C
VCC_40
are split near 1 2 1 AK7
VCCCK_DDR_1 VCC_41
N19 VCCSENSE 39 with 25 mil spacing to other
Pineview-M to avoid noise coupling. AL7 N21 VSSSENSE 39
power_close_gap_0805 VCCCK_DDR_2 VCC_42 signals. Place PU and PD within
1

1
C38 C39 2 inch of CPU.
22U_6.3V_M NC_0.1U_6.3V_K U10 R52

DDR
VCCA_DDR_1
0805_X5R 0402_X5R U5
2

2
VCCA_DDR_2 100_F
U6
+1_05VRUN VCCA_DDR_3
10 uF x U7 0402

2
POWER
VCCA_DDR_4 +VCCA
4.7 uF x
1 U8
VCCA_DDR_5
R53 1 +1_5VRUN
1 uF x 1 U9
VCCA_DDR_6 R54
1 2 +VCCA_VCCD V2 0.01 uF x
V3
VCCA_DDR_7 1.32A 1 1 2
1

1
power_close_gap_0805 C31 C40 C41 C42 VCCA_DDR_8
V4
33P_50V_J 22U_6.3V_M 1U_6.3V_K 4.7U_6.3V_K W10 VCCA_DDR_9 POWER_CLOSE_GAP_0402

1
VCCA_DDR_10 C43
0402_NPO 0805_X5R 0402_X5R 0603_X5R W11
2

VCCA_DDR_11 +VCCPC6 +1_05VRUN 0.01U_6.3V_K


C29
1

VCCSENSE R56
AA10 B29 0402_X7R

2
R55 VCCACK_DDR_1 VSSSENSE
AA11 Y2 1 2
VCCACK_DDR_2 VCCA
POWER_CLOSE_GAP_0402
80mA

1
1 uF x 2 C44POWER_CLOSE_GAP_0402
0.1U_10V_K Place near PIN Y2
2

D4 0402_X5R +1_05VRUN

2
1

C45 C46 VCC_43


1U_6.3V_K 1U_6.3V_K B4 R57
VCCP_1 +TPEV_VCCP
0402_X5R 0402_X5R B3 1 2
2

VCCP_2
AA19 POWER_CLOSE_GAP_0402
VCCD_AB_DPL
B +VCCAD180_LVDS +1_8VRUN B
L1
22 uF x 1 uF x 1 R58
+1_8VRUN +VCCSFR_AB_DPL VCCD_HMPLL V11 1 2 1 2
VCCD_HMPLL 1

1
R59 1 uF x 2 C47 C48 POWER_CLOSE_GAP_0402
1 2 AC31
VCCSFR_AB_DPL
60mA 22U_6.3V_M 0.1UH_0603 1U_6.3V_K
V30 +VCCAD180_LVD_R 0805_X5R LQM18NNR10K00D 0402_X5R

2
1

POWER_CLOSE_GAP_0402 C49 C50 C202 +1_8VRUN VCCALVDS


W31
1U_6.3V_K 1U_6.3V_K 33P_50V_J
L2
154mA 305mA VCCDLVDS
0402_X5R 0402_X5R 0402_NPO 1 uF x 1

LVDS
2

+VCCACRTDAC T30
VCCACRTDAC
EXP\CRT\PLL
1

600R-100MHZ_0603 C51 +1_05VRUN +3VRUN +VCCA_DMI +1_05VRUN


EBMS160808A601 1U_10V_K 1 uF x 2 R60
0402_X5R 1 uF x1 5mA T31 T1 1 2
2

VCC_GIO VCCA_DMI_1
J31 T2
480mA

1
VCCRING_EAST VCCA_DMI_2 C223 C52 C53 POWER_CLOSE_GAP_0603
C3 T3
DMI

VCCRING_WEST_3 VCCA_DMI_3 +1_8VRUN 33P_50V_J 1U_6.3V_M 1U_6.3V_M


+VCC_RING B2
1

C54 VCCRING_WEST_1 R63


C2 P2 104mA 0402_NPO 0402_X5R 0402_X5R

2
1U_6.3V_M VCCRING_WEST_2 RSVD_13 +VCCSFR_DMIHMPLL
+VCC_LGI_VID A21 AA1 1 2
0402_X5R VCC_LGI VCCSFR_DMIHMPLL
2

E2 POWER_CLOSE_GAP_0402

1
VCCP_3 C55
1U_6.3V_K
0402_X5R

2
+1_05VRUN +VCC_RING
R61 1 uF x 2 QLJB
1 2 +1_05VRUN null
A
R62 A
POWER_CLOSE_GAP_0402 1 2 +VCC_RING
1

C56 C58
1

1U_6.3V_K 1U_6.3V_K POWER_CLOSE_GAP_0402 C57


0402_X5R 0402_X5R NC_1U_6.3V_M
2

0402_X5R
CCPBG
2

Title
Place Caps close to CPU Pin C3,C2,B2. CPU- Pineview (5)
Size Document Number Rev
A3 M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 10 of 44


5 4 3 2 1
5 4 3 2 1

U1F

A11 F24
VSS_72 VSS_153
A16 F28
A19 VSS_71 VSS_152 F4
VSS_70 VSS_151
A29 G15
RSVD_NCTF_19 VSS_150
D A3 G17 D
RSVD_NCTF_18 VSS_149
A30 G22
RSVD_NCTF_17 VSS_148
A4 G27
AA13 RSVD_NCTF_16 VSS_147 G31
VSS_69 VSS_146
AA14 H11
VSS_68 VSS_145
AA16 H15
VSS_67 VSS_144
AA18 H2
VSS_66 VSS_143
AA2 H21
AA22 VSS_65 VSS_142 H25
VSS_64 VSS_141
AA25 H8
VSS_63 VSS_140
AA26 J11
VSS_62 VSS_139
AA29 J13
VSS_61 VSS_138
AA8 J15
AB19 VSS_60 VSS_137 J4
VSS_59 VSS_136
AB21 K11
VSS_58 VSS_135
AB28 K13
VSS_57 VSS_134
AB29 K19
VSS_56 VSS_133
AB30 K26
AC10 VSS_55 VSS_132 K27
VSS_54 VSS_131
AC11 K28
VSS_53 VSS_130
AC19 K30
VSS_52 VSS_129
AC2 K4

GND
VSS_51 VSS_128
AC21 K8
AC28 VSS_50 VSS_127 L1
VSS_49 VSS_126
AC30 L13
VSS_48 VSS_125
AD26 L18
VSS_47 VSS_124
AD5 L22
VSS_46 VSS_123
AE1 L24
VSS_45 VSS_122
AE11 L25
C VSS_44 VSS_121 C
AE13 L29
VSS_43 VSS_120
AE15 M28
VSS_42 VSS_119
AE17 M3
VSS_41 VSS_118
AE22 N1
AE31 VSS_40 VSS_117 N13
VSS_39 VSS_116
AF11 N18
VSS_38 VSS_115
AF17 N24
VSS_37 VSS_114
AF21 N25
VSS_36 VSS_113
AF24 N28
AF28 VSS_35 VSS_112 N4
VSS_34 VSS_111
AG10 N5
VSS_33 VSS_110
AG3 N8
VSS_32 VSS_109
AH18 P13
VSS_31 VSS_108
AH23 P14
AH28 VSS_30 VSS_107 P16
VSS_29 VSS_106
AH4 P18
VSS_28 VSS_105
AH6 P19
VSS_27 VSS_104
AH8 P21
VSS_26 VSS_103
AJ1 P3
RSVD_NCTF_15 VSS_102
AJ16 P4
VSS_25 VSS_101
AJ31 R25
VSS VSS_100
AK1 R7
RSVD_NCTF_13 VSS_99
AK2 R8
RSVD_NCTF_12 VSS_98
AK23 T11
AK30 VSS_24 VSS_97 U22
RSVD_NCTF_11 VSS_96
AK31 U23
RSVD_NCTF_10 VSS_95
AL13 U24
VSS_23 VSS_94
AL19 U27
VSS_22 VSS_93
AL2 V14
B
AL23 RSVD_NCTF_9 VSS_92 V16
B
VSS_21 VSS_91
AL29 V18
RSVD_NCTF_8 VSS_90
AL3 V28
RSVD_NCTF_7 VSS_89
AL30 V29
RSVD_NCTF_6 VSS_88
AL9 W13
B13 VSS_20 VSS_87 W2
VSS_19 VSS_86
B16 W23
VSS_18 VSS_85
B19 W25
VSS_17 VSS_84
B22 W26
VSS_16 VSS_83
B30 W28
B31 RSVD_NCTF_5 VSS_82 W30
RSVD_NCTF_4 VSS_81
B5 W4
VSS_15 VSS_80
B9 W5
VSS_14 VSS_79
C1 W6
RSVD_NCTF_3 VSS_78
C12 W7
VSS_13 VSS_77
C21 Y28
VSS_12 VSS_76
C22 Y3
VSS_11 VSS_75
C25 Y4
VSS_10 VSS_74
C31
RSVD_NCTF_2
D22
VSS_9
E1
RSVD_NCTF_1
E10
VSS_8
E19
VSS_7
E21
VSS_6
E25 T29
VSS_5 VSS_73
E8
VSS_4
F17
VSS_3
F19
VSS_2
A A

QLJB
null

CCPBG
Title
CPU- Pineview (6)
Size Document Number Rev
A3 M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 11 of 44


5 4 3 2 1
5 4 3 2 1

+1_8VSUS 1.8V DIMM=3.08A

201
202
+1_8VSUS
Place close to VREF pin. CN1
DDR2_VREF 1 2

SMDFIX1
SMDFIX2
VREF VSS46 M_A_DQ4 7 M_A_DQ[63:0]
3 4
VSS47 DQ4
1

1
C60 C59 C224 M_A_DQ0 5 6 M_A_DQ5
2.2U_6.3V_M 0.1U_6.3V_K 33P_50V_J M_A_DQ1 DQ0 DQ5 7,13 M_A_A[14..0]
7 8
DQ1 VSS15 M_A_DM0
0402_X5R 0402_X5R 0402_NPO 9 10 7 M_A_DQS[7..0]
2

2
M_A_DQS#0 VSS37 DM0
11 12
M_A_DQS0 DQS#0 VSS5 M_A_DQ6
D 13 14 7 M_A_DQS#[7..0] D
DQS0 DQ6 M_A_DQ7
15 16
M_A_DQ2 VSS48 DQ7
17 18 7 M_A_DM[7..0]
M_A_DQ3 DQ2 VSS16 M_A_DQ12
19 20
DQ3 DQ12 M_A_DQ13
21 22
M_A_DQ8 VSS38 DQ13
23 24
M_A_DQ9 DQ8 VSS17 M_A_DM1
25 26
DQ9 DM1
27 28
M_A_DQS#1 VSS49 VSS53
29 30 M_CLK_DDR0 7
M_A_DQS1 DQS#1 CK0
31 32 M_CLK_DDR#0 7
DQS1 CK0# +1_8VSUS DDRDIMM_VREF
33 34
M_A_DQ10 VSS39 VSS41 M_A_DQ14
35 36
M_A_DQ11 DQ10 DQ14 M_A_DQ15
37 38
DQ11 DQ15
39 40

1
VSS50 VSS54
41 42 R64 R65
M_A_DQ16 VSS18 VSS20 M_A_DQ20
43 44
M_A_DQ17 DQ16 DQ20 M_A_DQ21 1K_F NC_0_J
45 46
DQ17 DQ21 NC_0_J
47 48 0402 0402

2
M_A_DQS#2 VSS1 VSS6 DDR2_EXTTS#0 R66
49 50 1 2 0402 PM_EXTTS#0 8
M_A_DQS2 DQS#2 NC3 M_A_DM2
51 52
DQS2 DM2 DDR2_VREF
53 54
M_A_DQ18 VSS19 VSS21 M_A_DQ22
55 56
M_A_DQ19 DQ18 DQ22 M_A_DQ23
57 58

1
DQ19 DQ23
59 60
M_A_DQ24 VSS22 VSS24 M_A_DQ28 R67
61 62
DQ24 DQ28

1
M_A_DQ25 63 64 M_A_DQ29 (20 mil) C61
DQ25 DQ29 0.1U_6.3V_K 1K_F
65 66
M_A_DM3 VSS23 VSS25 M_A_DQS#3
67 68 0402_X5R 0402

2
DM3 DQS#3 M_A_DQS3
69 70
NC4 DQS3
71 72
M_A_DQ26 VSS9 VSS10 M_A_DQ30
C 73 74 C
M_A_DQ27 DQ26 DQ30 M_A_DQ31
75 76
DQ27 DQ31
77 78
VSS4 VSS8
7,13 M_CKE0 79 80 M_CKE1 7,13
CKE0 CKE1
81 82
VDD7 VDD8
83 84
NC1 A15 M_A_A14

DDR2 SDRAM SO-DIMM


7,13 M_A_BS2 85 86
A16_BA2 A14
87 88
M_A_A12 VDD9 VDD11 M_A_A11
89 90
M_A_A9 A12 A11 M_A_A7

(200P)
91 92
M_A_A8 A9 A7 M_A_A6
93 94
A8 A6
95 96
M_A_A5 VDD5 VDD4 M_A_A4
97 98
M_A_A3 A5 A4 M_A_A2
99 100
M_A_A1 A3 A2 M_A_A0
101 102
A1 A0
103 104
M_A_A10 VDD10 VDD12 +1_8VSUS
105 106 M_A_BS1 7,13
A10/AP BA1
7,13 M_A_BS0 107 108 M_A_RAS# 7,13
BA0 RAS#
7,13 M_A_WE# 109 110 M_CS#0 7,13
WE# S0#
111 112
VDD2 VDD1
7,13 M_A_CAS# 113 114 M_ODT0 7,13
CAS# ODT0 M_A_A13
7,13 M_CS#1 115 116
S1# A13

1
117 118 C62 C63 C64 C65 C66
VDD3 VDD6 2.2U_6.3V_M 2.2U_6.3V_M 2.2U_6.3V_M 2.2U_6.3V_M 2.2U_6.3V_M
7,13 M_ODT1 119 120
ODT1 NC2
121 122 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R

2
M_A_DQ32 VSS11 VSS12 M_A_DQ36
123 124
M_A_DQ33 DQ32 DQ36 M_A_DQ37
125 126
DQ33 DQ37
127 128
M_A_DQS#4 VSS26 VSS28 M_A_DM4
129 130
M_A_DQS4 DQS#4 DM4
131 132
DQS4 VSS42 M_A_DQ38
133 134
M_A_DQ34 VSS2 DQ38 M_A_DQ39
B 135 136 Place these Caps near So-DIMM0 B
M_A_DQ35 DQ34 DQ39
137 138
DQ35 VSS55 M_A_DQ44
139 140
M_A_DQ40 VSS27 DQ44 M_A_DQ45
141 142
M_A_DQ41 DQ40 DQ45
143 144
DQ41 VSS43 M_A_DQS#5
145 146
M_A_DM5 VSS29 DQS#5 M_A_DQS5 +1_8VSUS
147 148
DM5 DQS5
149 150
M_A_DQ42 VSS51 VSS56 M_A_DQ46
151 152
M_A_DQ43 DQ42 DQ46 M_A_DQ47
153 154
DQ43 DQ47
155 156
M_A_DQ48 VSS40 VSS44 M_A_DQ52
157 158

1
M_A_DQ49 DQ48 DQ52 M_A_DQ53 C67 C68 C69 C70 C71
159 160
DQ49 DQ53 0.1U_6.3V_K 0.1U_6.3V_K 0.1U_6.3V_K 0.1U_6.3V_K 33P_50V_J
161 162
VSS52 VSS57
163 164 M_CLK_DDR1 7 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_NPO

2
NCTEST CK1
165 166 M_CLK_DDR#1 7
M_A_DQS#6 VSS30 CK1#
167 168
M_A_DQS6 DQS#6 VSS45 M_A_DM6
169 170
DQS6 DM6
171 172
M_A_DQ50 VSS31 VSS32 M_A_DQ54
173 174
M_A_DQ51 DQ50 DQ54 M_A_DQ55
175 176
DQ51 DQ55
177
VSS33 VSS35
178 Place these Caps near So-DIMM0
M_A_DQ56 179 180 M_A_DQ60
M_A_DQ57 DQ56 DQ60 M_A_DQ61
181 182
DQ57 DQ61
183 184
M_A_DM7 VSS3 VSS7 M_A_DQS#7
185 186
DM7 DQS#7 M_A_DQS7
187 188
M_A_DQ58 VSS34 DQS7 +3VRUN
189 190
M_A_DQ59 DQ58 VSS36 M_A_DQ62
191 192
DQ59 DQ62 M_A_DQ63 NC_10K_J
193 194
VSS14 DQ63 R68
16,18 SMB_DATA 195 196 1 2 0402
SDA VSS13 DIMM0_SA0 R69
A 16,18 SMB_CLK 197 198 1 10K_J 2 0402 A
SCL SA0 DIMM0_SA1 R70
+3VRUN 199 200 1 10K_J 2 0402
VDD(SPD) SA1
1

C72 C73 C225 DDR2 SO-DIMM_2x100P


0.1U_6.3V_K 0.1U_6.3V_K 33P_50V_J FOX_AS0A426-N4SC-4H
0402_X5R 0402_X5R 0402_NPO SMBus Address: A0H(W)/A1H(R)
2

CCPBG
Title
DDRII(SO-DIMM0)
Size Document Number Rev
Custom M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 12 of 44


5 4 3 2 1
5 4 3 2 1

D D

+0_9VRUN
1

1
C74 C75 C76 C77 C78 C79 C80 C81 C82 C83 C84 C85 C86 C87 C88
0.1U_6.3V_K 0.1U_6.3V_K 0.1U_6.3V_K 0.1U_6.3V_K 0.1U_6.3V_K 0.1U_6.3V_K 0.1U_6.3V_K 0.1U_6.3V_K 0.1U_6.3V_K 0.1U_6.3V_K 0.1U_6.3V_K 0.1U_6.3V_K 0.1U_6.3V_K 0.1U_6.3V_K 33P_50V_J
0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_NPO
2

2
C C

+0_9VRUN
Place one cap close to every two pull-up resistors terminated to +0_9VRUN.

M_A_A0 R71 1 47_J 2 0402

M_A_A1 R72 1 47_J 2 0402


7,12 M_A_A[14..0] R73 47_J
M_A_A2 1 2 0402

+0_9VRUN +0_9VRUN

R74 1 47_J 2 0402 R75 1 47_J 2 0402


7,12 M_CS#0 7,12 M_A_BS0
R76 1 47_J 2 0402 R77 1 47_J 2 0402 M_A_A3 R78 1 47_J 2 0402
7,12 M_CS#1 7,12 M_A_BS1 R79 47_J 0402
M_A_A4 1 2
M_A_A5 R80 1 47_J 2 0402
M_A_A6 R81 1 47_J 2 0402

R82 1 47_J 2 0402


R83 47_J 0402 7,12 M_A_BS2 R84 47_J 0402
7,12 M_CKE0 1 2 7,12 M_A_CAS# 1 2
R85 1 47_J 2 0402 R86 1 47_J 2 0402
B 7,12 M_CKE1 7,12 M_A_RAS# B
R87 1 47_J 2 0402 R88 1 47_J 2 0402
7,12 M_ODT0 R89 47_J 0402 7,12 M_A_WE# R90 47_J 0402
1 2 M_A_A7 1 2
7,12 M_ODT1 R91 47_J 0402
M_A_A8 1 2
M_A_A9 R92 1 47_J 2 0402
M_A_A10 R93 1 47_J 2 0402

M_A_A11 R94 1 47_J 2 0402


M_A_A12 R95 1 47_J 2 0402
M_A_A13 R96 1 47_J 2 0402
M_A_A14 R97 1 47_J 2 0402

A A

CCPBG
Title
DDRII (Termination)
Size Document Number Rev
A3 M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 13 of 44


5 4 3 2 1
5 4 3 2 1

U2B
USB port table
6 DMI_TXN0 R23 H7 USB_PN0 27
R24 DMI0RXN USBP0N H6
6 DMI_TXP0
P21
DMI0RXP USBP0P
H3
USB_PP0
USB_PN1
27
27
Port0 External USB1
6 DMI_RXN0 DMI0TXN USBP1N
6 DMI_RXP0 P20 H2 USB_PP1 27
DMI0TXP USBP1P
6 DMI_TXN1 T21
T20
DMI1RXN USBP2N
J2
J3
USB_PN2 27 Port1 External USB2
6 DMI_TXP1 DMI1RXP USBP2P USB_PP2 27
T24 K6 USB_PN3 30

DMI
6 DMI_RXN1 DMI1TXN USBP3N +3VALW
6 DMI_RXP1 T25
T19
DMI1TXP USBP3P
K5
K1
USB_PP3 30 Port2 External USB3 RP11
D
DMI2RXN USBP4N USB_PN4 31 D
T18 K2 USB_PP4 31 USB_OC#5 1 8
DMI2RXP USBP4P USB_OC#4
U23
U24 DMI2TXN USBP5N
L2
L3
USB_PN5 31 Port3 WWAN (3G/GPS) USB_OC#0
2
3
7
6
DMI2TXP USBP5P USB_PP5 31
V21 M6 USB_PN6 28 USB_OC#2 4 5
DMI3RXN USBP6N
V20
V24
DMI3RXP USBP6P
M5
N1
USB_PP6 28 Port4 WLAN(WIFI)
DMI3TXN USBP7N USB_PN7 30 8.2K
V23 N2 USB_PP7 30
DMI3TXP USBP7P 0804_8P4R
Port5 Bluetooth +3VALW
RP2
D4 USB_OC#0
OC0# USB_OC#0 27

USB
USB_OC#1 USB_OC#3
31 WLAN_RXN1 K21
K22
PERn1 OC1#
C5
D3 USB_OC#2
USB_OC#1 27 Port6 Camera module USB_OC#1
1
2
8
7
31 WLAN_RXP1 PERp1 OC2# USB_OC#2 27
C89 1 2 0.1U_10V_K 0402_X5R LAN_TXN1_C J23 D2 USB_OC#3 USB_OC#6 3 6
31 WLAN_TXN1 PETn1 OC3#
C90 2 0.1U_10V_K 0402_X5R LAN_TXP1_C USB_OC#4 USB_OC#7
31 WLAN_TXP1 1 J24
M18
PETp1 OC4#
E5
E6 USB_OC#5
Port7 MM-SIM 4 5
21 LAN_RXN2 PERn2 OC[5]#/GPIO29
M19 C2 USB_OC#6
21 LAN_RXP2 PERp2 OC[6]#/GPIO30 8.2K
C91 1 2 0.1U_10V_K 0402_X5R LAN_TXN2_C K24 C3 USB_OC#7
21 LAN_TXN2 PETn2 OC[7]#/GPIO31 0804_8P4R
C92 1 2 0.1U_10V_K 0402_X5R LAN_TXP2_C K25
21 LAN_TXP2 PETp2
30 WWAN_RXN3 L23
PERn3
30 WWAN_RXP3 L24
C93 PERp3
30 WWAN_TXN3 1 2 NC_0.1U_10V_K 0402_X5R WWAN_TXN3_C L22 G2 USBRBIAS 1 R98 2
PETn3 USBRBIAS

PCI-E
C252 1 2 NC_0.1U_10V_K 0402_X5R WWAN_TXP3_C M21 G3 22.6_F 0402
30 WWAN_TXP3 PETp3 USBRBIAS#
P17
PERn4
P18
PERp4
Traces tied together close to Pin
N25 Length no longer than 200 mil to Resistor.
PETn4
N24
PETp4
F4 CLK_ICH48 18
CLK48 +3VRUN +3VRUN
C C
RP3 RP4

Place the resistor PCI_PIPQA# 1 8 PCI_SERR# 1 8


PCI_PIPQC# 2 7 PCI_STOP# 2 7
+1_5VRUN within 500 mils of TPT. PCI_PIPQF# 3 6 PCI_DEVSEL# 3 6
PCI_PIPQG# 4 5 PCI_FRAME# 4 5
R99 1 24.9_F 2 0402 DMICOMP H24
DMI_ZCOMP 8.2K 8.2K
J22
DMI_IRCOMP 0804_8P4R 0804_8P4R
18 CLK_ICH_DMI# W23
DMI_CLKN
18 CLK_ICH_DMI W24
DMI_CLKP
2

QV56 +3VRUN +3VRUN


null
RP5 RP6
U2A PCI_PIPQB# 1 8 PCI_PLOCK# 1 8
PCI_IRDY# PCI_PIPQD#
Straping Options Flash A5 B22 PCI_PIPQH#
2
3
7
6 PCI_PERR#
2
3
7
6
PCI_DEVSEL# PAR AD0 PCI_PIPQE# PCI_TRDY#
B15 D18 4 5 4 5
DEVSEL# AD1
STRAP2#/ STRAP1#/ Routing 18 CLK_ICH_PCI J12
A23
PCICLK AD2
C17
C18
GPIO17 GPIO48 20 PCI_RST# PCIRST# AD3 8.2K 8.2K
PCI_IRDY# B7 B17
C22 IRDY# AD4 C19 0804_8P4R +3VRUN 0804_8P4R
0 1 SPI PCI_SERR# B11
PME# AD5
B18
PCI_STOP# SERR# AD6
1 0 PCI PCI_PLOCK#
F14
A8
STOP# AD7
B19
D16
PCI_TRDY# PLOCK# AD8
B 1 1 LPC PCI_PERR#
A10
D10 TRDY#
PCI
AD9
D15
A13 P_REQ1# R100 1 8.2K_J 2 0402
B
PCI_FRAME# PERR# AD10
A16 E14
FRAME# AD11
STRAP2#/GPIO17 and STRAP1#/GPIO48 H14
AD12 R101
L14 P_REQ2# 1 8.2K_J 2 0402
have weak internal pull-ups AD13
J14
A18 AD14 E10
GNT1# AD15 R102
E16 C11 TPT_GPIO22_PU 1 8.2K_J 2 0402
+3VRUN GNT2# AD16
E12
P_REQ1# AD17
G16 B9
REQ1# AD18 R103
P_REQ2# A20 B13 RUNTIME_SCI# 1 8.2K_J 2 0402
NC_1K_J NC_10K_J REQ2# AD19 L12
0402 AD20
2 1 R104 FLASH_SEL0 R105 1 2 0402 B8
FLASH_SEL0 AD21
G14
GPIO48/STRAP1# AD22
A3 TPT Strap Pin
NC_1K_J NC_10K_J FLASH_SEL1 A2 B5
0402 STRAP2#/GPIO17 AD23
2 1 R106 FLASH_SEL1 R107 1 2 0402 TPT_GPIO22_PU C15 A6 Strap Pin Internal PU/PD External PU/PD
RUNTIME_SCI# GPIO22 AD24
19 RUNTIME_SCI# C9 G12
GPIO1 AD25
AD26
H12 STRAP0# PU 20K PU 10K(NC) to +3VRUN/PD 1K(NC)
C8
AD27
AD28
D9 STRAP1# PU 20K PU 10K(NC) to +3VRUN/PD 1K(NC)
PCI_PIPQA# B2 C7
+3VRUN PCI_PIPQB# PIRQA# AD29
D7
PIRQB# AD30
C1 STRAP2# PU 20K PU 10K(NC) to +3VRUN/PD 1K(NC)
PCI_PIPQC# B3 B1
PCI_PIPQD# PIRQC# AD31
H10
0402 PIRQD#
2 8.2K_J 1 R108 TPT_M13_RSVD_PU PCI_PIPQE# E8
PCI_PIPQF# PIRQE#/GPIO2
D6
PCI_PIPQG# PIRQF#/GPIO3
H8 H16
0402 PIRQG#/GPIO4 C/BE0#
1 10K_J 2 R109 TPT_K9_RSVD_PU PCI_PIPQH# F8 M15
PIRQH#/GPIO5 C/BE1#
C13
RSVD_TPT_D11 C/BE2#
A D11 L16 A
TPT_K9_RSVD_PU STRAP0# C/BE3#
K9
R110 RSVD_1
1 NC_1K_J 2 0402 RSVD_TPT_D11 TPT_M13_RSVD_PU M13
RSVD_2
1

STRAP0#:Top-Block Swap Override. QV56


If the signal is sampled low,
null CCPBG
this indicates that the system is Title
strapped to the "top-block swap" mode Tiger Point (1)
(Tiger Point inverts A16 for all cycles targeting FWH BIOS space)
Size Document Number Rev
A3 M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 14 of 44


5 4 3 2 1
5 4 3 2 1

D D

U2C

R12 AE6 SATA_RXN0 25


RSVD_3 SATA0RXN
AE20 AD6 SATA_RXP0 25
AD17 RSVD_4 SATA0RXP AC7
RSVD_5 SATA0TXN SATA_TXN0 25
AC15 AD7 SATA_TXP0 25
RSVD_6 SATA0TXP
AD18 AE8
RSVD_7 SATA1RXN
Y12 AD8
RSVD_8 SATA1RXP
AA10 AD9
AA12 RSVD_9 SATA1TXN AC9
RSVD_10 SATA1TXP
Y10

SATA
RSVD_11
AD15
RSVD_12
W10
RSVD_13
V12
AE21 RSVD_14
RSVD_15
AE18
RSVD_16 PLACE SATARBIAS RESISTORS CLOSE
AD19
RSVD_17
U12 TO ICH: <500 MILS TO ICH BALLS
RSVD_18
AD4 CLK_ICH_SATA# 18
AC17 SATA_CLKN AC4
RSVD_19 SATA_CLKP CLK_ICH_SATA 18
AB13
RSVD_20 R111
AC13 AD11 SATARBIAS SATARBIAS 1 24.9_F 2 0402
RSVD_21 SATARBIAS#
AB15 AC11
RSVD_22 SATARBIAS HDD_LED#
Y14 AD25 HDD_LED# 29
RSVD_23 SATALED#
C AB16 C
RSVD_24
AE24
RSVD_25
AE23
RSVD_26
+3VRUN
AA14 U16 H_A20GATE
RSVD_27 A20GATE H_A20GATE 19
V14 Y20 H_A20M# 9
1

RSVD_28 A20M#
Y21
R112 CPUSLP#
Y18 H_IGNNE# 9
IGNNE# AD21 +3VRUN
10K_J INIT3_3V#
AD16 AC25 H_INIT# 9
RSVD_29 INIT#
0402 AB11 AB24 H_INTR 9
HOST
2

RSVD_30 INTR
AB10 Y22 H_FERR# 9
DBGSTRP_SET_UP RSVD_31 FERR#
AD23 T17 H_NMI 9
GPIO36 NMI AC21 H_RCIN#
RCIN# H_RCIN# 19
AA16 INT_SERIRQ
SERIRQ INT_SERIRQ 19,20
AA21 HDD_LED# R113 1 10K_J 2 0402
SMI# H_SMI# 9
V18 H_STPCLK# 9
STPCLK# H_THERMTRIP_R
AA20
THRMTRIP# H_A20GATE R114 1 8.2K_J 2 0402

H_RCIN# R115 1 10K_J 2 0402


3
INT_SERIRQ R116 1 8.2K_J 2 0402
QV56
null

B +1_05VRUN B

+1_05VRUN
PLACE CLOSE TO TPT AA20 H_FERR# R117 1 56_J 2 0402
< 1000MILS
1

R118 Place close to TPT


pull-up at PAGE 32
56_J
0402
2

R120
H_THERMTRIP_R 1 2 PM_THERMTRIP# 9
POWER_CLOSE_GAP_0402

A A

CCPBG
Title
Tiger Point (2)
Size Document Number Rev
A3 M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 15 of 44


5 4 3 2 1
5 4 3 2 1

U2D +3VRUN
19,20 LPC_AD[3..0]
1 AA5 T15 SATA_GP_DETECT# R121 1 10K_J 2 0402
TP35 26MIL LDRQ1#/GPIO23 BMBUSY#/GPIO0
LPC_AD0 V6 W16 GPIO25 (Internal pull-high)
LAD0/FWH0 GPIO6 ID_LPC_PCI# 20

LPC
LPC_AD1 AA6 W14 DMI AC/DC Coupling Selection:
LPC_AD2 LAD1/FWH1 GPIO7 TPT_GPIO8 1 If the signal is sampled high, the DMI interface is strapped
Y5 K18 26MIL TP53
LPC_AD3 LAD2/FWH2 GPIO8 TPT_GPIO9 1 to operate in DC coupled mode (No coupling capacitors
W8 H19 26MIL TP54
LAD3/FWH3 GPIO9 EXT_SMI# R122 1 NC_0_J 2 0402 are required on DMI differential pairs).
20 LPC_DRQ0# Y8 M17 EXTSMI# 19
LDRQ0# GPIO10 SATA0_PWR_EN# If the signal is sampled low, the DMI interface is strapped
19,20 LPC_FRAME# Y4 A24 1 26MIL TP36
FWH4/LFRAME# GPIO12 C23 WAKE_SCI#_R R123 1 2 to operate in AC coupled mode (Coupling capacitors are
R124 GPIO13 WAKE_SCI# 19
23 HDA_CODEC_BITCLK 1 33_J 2 0402 HDA_BITCLK P6 P5 PANEL_ID0 required on DMI differential pairs).
R125 HDA_BIT_CLK GPIO14
D 1 33_J 2 0402 HDA_CODEC_RST#_1 U2 E24 CONFIG_MODE_N 1 POWER_CLOSE_GAP_0402 D

AUDIO
23,24 HDA_CODEC_RST# HDA_RST# GPIO15 26MIL TP37
W2 AB20 PM_DPRSLPVR
23 HDA_CODEC_SDATAIN0 HDA_SDIN0 DPRSLPVR PM_DPRSLPVR 8,39
1 V2 Y16 R205 1 NC_0_J2 0402 R147
TP38 26MIL HDA_SDIN1 STP_PCI# PM_STPPCI# 18
P8 AB19 POWER_CLOSE_GAP_0402
HDA_SDIN2 STP_CPU# PM_STPCPU# 18 +3VRUN
R126 1 33_J 2 0402 HDA_CODEC_SDATAOUT_1 AA1 R3
23 HDA_CODEC_SDATAOUT HDA_SDOUT GPIO24
R127 1 33_J 2 0402 HDA_CODEC_SYNC_1 Y1 C24 TPEV_ICH_GP25 1 2
23 HDA_CODEC_SYNC HDA_SYNC GPIO25
AA3 D19 PANEL_ID1
18 CLK_ICH14 CLK14 GPIO26
D20 MB_FLASH_EN 20

1
C368 U3 GPIO27 F22 1

EPROM
EE_CS GPIO28 26MIL TP39
NC_22P_50V_J AE2 AC19 PM_CLKRUN# PM_CLKRUN# 19,20
EE_DIN CLKRUN# U20
2 0402_NPO T6 U14

5
EE_DOUT GPIO33 BOARDID0 PLTRST#_R
V3 AC1 1 26MIL TP40 1
EE_SHCLK GPIO34 BOARDID1
Close to R124 for EMI GPIO38
AC23 1 26MIL TP41 4 PLT_RST# 8,19,20,21,30,31,33
T4 AC24 BOARDID2 1 2
26MIL TP42

1
+3VALW LAN_CLK GPIO39 C94 NC_SN74LVC1G08DCKR
P7

3
R128 LAN_RST# LAN_RSTSYNC NC_150P_50V_J
1 2 B23 AB22 H_PWRGD 9
LAN_RST# CPUPWRGD/GPIO49
AA2 0402_NPO

LAN

2
POWER_CLOSE_GAP_0402 LAN_RXD0 R130
AD1 AB17 ICH_THRM# 1 NC_0_J 2 0402 OVT_EC# 9,19,39
R129 1 10K_J 2 0402 SMB_ALERT#_R AC2 LAN_RXD1 THRM# V16 VR_PWRGD_CLKEN R149 1 2
LAN_RXD2 VRMPWRGD CK_PWRGD 18

MISC
R131 1 10K_J 2 0402 SMLALERT_ICH W3 AC18 ICH_SYNC#
R132 10K_J 0402 SMLINK0_ICH LAN_TXD0 MCH_SYNC# POWER_CLOSE_GAP_0402
1 2 T7 E21 PWRBTN# 19
R133 10K_J 0402 SMLINK1_ICH LAN_TXD1 PWRBTN# ICH_RI#
1 2 U4 H23
LAN_TXD2 RI# PM_SUS_STAT#
G22 PM_SUS_STAT# 20
R134 1 10K_J 2 0402 EXT_SMI# RTC_X1 W4 SUS_STAT#/LPCPD# D22 SUSCLK 1

RTC
RTCX1 SUSCLK 26MIL TP43
RTC_X2 V5 G18
R135 RTCX2 SYS_RESET# SB_RST# 20
1 10K_J 2 0402 WAKE_SCI#_R RTC_RST# T5 G23 PLTRST#_R
RTCRST# PLTRST# PCIE_WAKE#
C25 PCIE_WAKE# 21,31
SMB_ALERT#_R WAKE# SM_INTRUDER#
E20 T8
R139 1 10K_J 2 0402 ICH_RI# SMB_CLK_ICH SMBALERT#/GPIO11 INTRUDER# IMVP_PWRGD R141 2 POWER_CLOSE_GAP_0402
H18 U10 1 SYS_PWRGD_TPT
SMBCLK PWROK

SMB
C R140 1 10K_J 2 0402 SB_RST# SMB_DATA_ICH E23 AC3 RSMRST#_ICH R142 1 2 POWER_CLOSE_GAP_0402 C
SMBDATA RSMRST# PM_RSMRST# 19
SMLALERT_ICH H21 AD3 ICH_INTVRMEN
R143 LINKALERT# INTVRMEN
1 1K_J 2 0402 PCIE_WAKE# SMLINK0_ICH F25 J16 HDA_SPKR 23
SMLINK1_ICH SMLINK0 SPKR
F24
R144 1 8.2K_J 2 0402 ICH_BATLOW# SMLINK1 H20 SLP_S3#_R R145 1 2 POWER_CLOSE_GAP_0402
SLP_S3# PM_SLP_S3# 19
1 R2 E25 SLP_S4#_R R146 1 2 POWER_CLOSE_GAP_0402
TP44 26MIL SPI_MISO SLP_S4# PM_SLP_S4# 19
1 T1 F21 SLP_S5#_R R166 1 2 POWER_CLOSE_GAP_0402
TP48 26MIL SPI_MOSI SLP_S5# PM_SLP_S5# 19

SPI
TP49 26MIL 1 M8
+3VALW SPI_CS# ICH_BATLOW#
TP50 26MIL 1 P9 B25
1 R4 SPI_CLK BATLOW# AB23 PM_DPRSTP#_R R148 1 2 POWER_CLOSE_GAP_0402 +3VRUN
TP51 26MIL SPI_ARB DPRSTP# PM_DPRSTP# 9,39
AA18 H_DPSLP# 9
DPSLP#
F20 1 26MIL TP45
1

C708 TP3

2
0.1U_6.3V_K
U38 0402_X5R C330
2

8 7 QV56 NC_0.1U_10V_K

1
VCC WP null
0402_X5R

5
SMB_CLK_ICH 6 U21
SMB_DATA_ICH SCL
5 1 19,41 ALL_SYS_PWRGD 1
SDA A0 SYS_PWRGD_TPT
2 4
A1
4 3 8,39 DELAY_VR_PWRGD 2
VSS A2
EEPROM_SOP-8_256x8 NC7SZ08P5

3
HT24LC02 null

SMBus Address: AE/AFH R183 1 NC_0_J 2 0402

B +3VRUN +3VRUN +3VALW +3VRUN B


+3VALW
1

R150 TPT_GPIO8 0402 2 10K_J 1 R332 ID_LPC_PCI# R151 1 NC_10K_J2 0402


1

TPT_GPIO9 0402 2 10K_J 1 R331


R153 R154 2.2K_J R155 R156 PM_CLKRUN# R152 1 8.2K_J 2 0402
0402 +3VALW
2

2.2K_J 2.2K_J 2.2K_J 2.2K_J ICH_THRM# R157 1 10K_J 2 0402


0402 0402 Q2A 0402 0402 SATA0_PWR_EN# 0402 2 10K_J 1 R208
2

2
5

2N7002DW R136 1 NC_10K_J2 0402 PANEL_ID0 R270 1 10K_J 2 0402 CONFIG_MODE_N 0402 2 10K_J 1 R137 ICH_SYNC# R158 1 1K_J 2 0402
null R138 1 NC_10K_J2 0402 PANEL_ID1 R272 1 10K_J 2 0402
G

SMB_CLK_ICH 3 4 SMB_CLK 12,18 VCCRTC


Q2B
D

Panel ID
2

2N7002DW VR_PWRGD_CLKEN R159 1 100K_J 2 0402


null
G

SMB_DATA_ICH 6 1 SM_INTRUDER# R161 1 1M_J 2 0402 RSMRST#_ICH R160 2 10K_J 1 0402


SMB_DATA 12,18
D

ICH_INTVRMEN R163 1 332K_F 2 0402 SYS_PWRGD_TPT R162 1 10K_J 2 0402


VCCRTC +ECVCC
MB_FLASH_EN R164 1 10K_J 2 0402
R167
20K_J D3 TPEV_ICH_GP25 R165 1 1K_J 2 0402
RTC_X2 C95 1 2 15P_50V_J RTC_RST# 1 2 1 2
2

0402_NPO 0402 CH500H-40PT


1

J1 C96 C97 R169


1

1U_6.3V_M 1U_6.3V_M
4

A
R168 Y1 OPEN_JUMP_OPEN2 0402_X5R 0402_X5R 510_F A
2

32.768KHZ_12.5P_10PPM 0402 FOX_HS6202E-LH


1

10M_J MC306
HEADER CONN_2P
RTC2

0402
2

1 R170 2RTC1 2 SMDFIX2

RTC_X1
C98
510_F
1 SMDFIX1

CN2
CCPBG
1 2 0402
3

Title
0402_NPO 18P_50V_J Tiger Point (3)
Size Document Number Rev
A3 M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 16 of 44


5 4 3 2 1
5 4 3 2 1

+3VRUN +5VRUN +3VALW +5VALW

1
D4 R171 D5 R172
CH500H-40PT CH500H-40PT
100_J 10_J
0402 0402

2
1

1
C99 C100
D U2E 1U_10V_K 0.1U_10V_K D
6mA 0402_X5R 0402_X5R

2
F12 +V5REF
V5REF
10mA +1_5VRUN
F5 +V5REF_SUS
V5REF_Sus R173
45mA
Y6 +VCCA_SATA_PLL 1 2
VccSATAPLL
2mA

1
AE3 VCCRTC C101 C102 C103 POWER_CLOSE_GAP_0402
VccRTC 33P_50V_J 0.1U_10V_K 10U_6.3V_M
24mA

1
Y25 +1_5VRUN C104 C105 0402_NPO 0402_X5R 0603_X5R
+VCCDMI_PLL_ICH

2
VccDMIPLL R174 0.1U_10V_K 0.01U_6.3V_K
1422mA
F6 +1_5VRUN_TPT 1 2 0402_X5R 0402_X7R

2
VCCUSBPLL

1
C106 C107 C108 C109 C110 C241 power_close_gap_0805 Place next to pin Y6
14mA 1U_6.3V_M 1U_6.3V_M 10U_6.3V_M 0.1U_10V_K 0.1U_10V_K 33P_50V_J
W18 0402_X5R 0402_X5R 0603_X5R 0402_X5R 0402_X5R 0402_NPO Place near ICH PIN AE3

2
V_CPU_IO

Place near VCCSATA, Place near pin VCCAUPLL F6


AA8
Vcc1_5_1 M9 VCCUSBCORE,VCCA3GP
Vcc1_5_2
M20
Vcc1_5_3 +1_05VRUN
N22
Vcc1_5_4 R175
955mA
+1_05VRUN_TPT 1 2
POWER

1
C C111 C112 C113 C114 power_close_gap_0805 C
J10 10U_6.3V_M 1U_6.3V_M 1U_6.3V_M 33P_50V_J
Vcc1_05_1
K17 0603_X5R 0402_X5R 0402_X5R 0402_NPO
2

2
Vcc1_05_2
P15
Vcc1_05_3 V10
Vcc1_05_4 Place near pin VCCA3GBG,H25
Place near VCC +3VRUN
216mA R176
H25 +V_3P3_S2 1 2
Vcc3_3_1
AD13
1

1
Vcc3_3_2 C115 C116 C117 C118 C119 C120 C121 C122 POWER_CLOSE_GAP_0402
F10
Vcc3_3_3 1U_10V_K 1U_10V_K 1U_10V_K 0.1U_10V_K 0.1U_10V_K NC_1U_10V_K NC_1U_10V_K 33P_50V_J
G10
Vcc3_3_4
R10 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_NPO
2

2
Vcc3_3_5 T9
Vcc3_3_6

Place near VCCPPCI,VCCPLPC Place near pin VCCASATABG


F18
VccSus3_3_1 +3VALW
N4
VccSus3_3_2 R177
VccSus3_3_3
K7 92mA
F1 +V_3P3_S5 1 2
VccSus3_3_4
1

1
C123 C124 C125 C126 C127 POWER_CLOSE_GAP_0402
0.1U_10V_K 1U_6.3V_M 1U_6.3V_M NC_10U_6.3V_M 33P_50V_J
0402_X5R 0402_X5R 0402_X5R 0603_X5R 0402_NPO +1_5VRUN
2

2
24mA R178
+VCCDMI_PLL_ICH 1 2
5

1
B C242 C128 C129 POWER_CLOSE_GAP_0402 B
QV56
Place near pin K7,N4 Place near to F18 33P_50V_J 0.01U_6.3V_K 4.7U_6.3V_K
null 0402_NPO 0402_X7R 0603_X5R

2
Place near pin F1-VCCUABG

Place near pin VCCA3GPLL,Y25

U2F

RSVD_33
Vss_10
Vss_11
Vss_12
Vss_13
Vss_14
Vss_15
Vss_16
Vss_17
Vss_18
Vss_19
Vss_20
Vss_21
Vss_22
Vss_23
Vss_24
Vss_25
Vss_26
Vss_27
Vss_28
Vss_29
Vss_30
Vss_31
Vss_32
Vss_33
Vss_34
Vss_35
Vss_36
Vss_37
Vss_38
Vss_39
Vss_40
Vss_41
Vss_42
Vss_43
Vss_44
Vss_45
Vss_46
Vss_47
Vss_48
Vss_49
Vss_50
Vss_51
Vss_52
Vss_53
Vss_54
Vss_55
Vss_56

Vss_57
Vss_58
Vss_59
Vss_1
Vss_2
Vss_3
Vss_4
Vss_5
Vss_6
Vss_7
Vss_8
Vss_9

QV56
null
A A
A1
A25
B6
B10
B16
B20
B24
E18
F16
G4
G8
H1
H4
H5
K4
K8
K11
K19
K20
L4
M7
M11
N3
N12
N13
N14
N23
P11
P13
P19
R14
R22
T2
T22
V1
V7
V8
V19
V22
V25
W12
W22
Y2
Y24
AB4
AB6
AB7
AB8
AC8
AD2
AD10
AD20
AD24
AE1
AE10
AE25

G24
AE13
F2

AE16
CCPBG
Title
Tiger Point (4)
Size Document Number Rev
A3 M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 17 of 44


5 4 3 2 1
5 4 3 2 1

+1_05VRUN +3VRUN R179 +3V_48M +3VRUN


POWER_CLOSE_GAP_0603

1 2
1

1
C201 C131 C132 C133 C134 C135 C136 C284 C130 C143 C144 C291 C293 C137 C138 C139 C140 C141 C142
10U_10V_M 0.1U_16V_K 0.1U_16V_K 0.1U_16V_K 0.1U_16V_K 0.1U_16V_K 0.1U_16V_K 33P_50V_J 4.7U_6.3V_K 1U_16V_K 0.1U_16V_K 33P_50V_J 33P_50V_J 10U_10V_M 0.1U_16V_K 0.1U_16V_K 0.1U_16V_K 0.1U_16V_K 0.1U_16V_K
0805_X5R 0402_X7R 0402_X7R 0402_X7R 0402_X7R 0402_X7R 0402_X7R 0402_NPO 0603_X5R 0603_X5R 0402_X7R 0402_NPO 0402_NPO 0805_X5R 0402_X7R 0402_X7R 0402_X7R 0402_X7R 0402_X7R
2

2
+3VRUN

D D

1
CLK_ICH14 C145 1 2 NC_22P_50V_J
+1_05VRUN R232 R220 0402_NPO
U4 PCLK_FWH C146 1 2 NC_22P_50V_J
NC_10K_J 10K_J 0402_NPO
0402 0402 CLK_ICH_PCI C147 1 2 NC_22P_50V_J

2
C150 1 2 33P_50V_J CK505_X1 56 0402_NPO
0402_NPO VDDCPU_IO CLK_KBCPCI C148 NC_22P_50V_J
27 45 PM_STPPCI# 16 1 2

2
VDDPLL3I/O PCI_STOP# 0402_NPO
33 44 PM_STPCPU# 16
Y4 +3VRUN +3V_48M VDDSRCI/O_1 CPU_STOP# CLK_ICH48 C149 NC_22P_50V_J
43 1 2
14.31818MHZ_20P_30PPM 52 VDDSRCI/O_2 0402_NPO
57 CLK_MCH_BCLK# 8
VDDSRCI/O_3 CPUC_F_LR1
19 58 NB
1

VDDI/O96MHZ CPUT_F_LR1 CLK_MCH_BCLK 8


C151 1 2 33P_50V_J CK505_X2 16 For EMI
0402_NPO VDD48
9 60 CLK_CPU_BCLK# 9
VDDPCI CPUC_LR0
4 61 CLK_CPU_BCLK 9 CPU
VDDREF CPUT_LR0
46
VDDSRC
62
VDDCPU
23 41 CLK_PCIE_WLAN 31
VDD SRCT_LR10
SRCC_LR10
42 CLK_PCIE_WLAN# 31 Wireless
SEL2 SEL1 SEL0
CK505_X1 3 37 CPU FSB
CK505_X2 2
X1
X2
SRCT_LR9
SRCC_LR9
38
CLK_PCIE_3G
CLK_PCIE_3G#
30
30
WWAN FSC FSB FSA
R180 1 2 33_J
16 CLK_ICH14
53 100M X
9 BSEL2
R181 1 10K_J 2 0402 CPU_SEL2_R 5
REF/FSLC/TEST_SEL
CPUC_ITP_LR2/SRCC8
CPUT_ITP_LR2/SRCT8
54
CLK_ICH_DMI#
CLK_ICH_DMI
14
14
1 0 1
9 BSEL1
R182 1 2 1K_J CPU_SEL1_R 64
FSLB/TEST_MODE
SB DMI 0 0 1 133M 533M
47 CLK_PCIE_LAN#_R R390 1 33_J 2 0402 CLK_PCIE_LAN# 21
R319 1 2 33_J CLK_48 SRCC_LR6
17 48 CLK_PCIE_LAN_R R391 1 33_J 2 0402 LAN 166M 667M
14 CLK_ICH48 USB48/FSLA SRCT_LR6 CLK_PCIE_LAN 21 0 1 1
R184 1 2 2.2K_J 14
9 BSEL0 PCI5_F/ITP_EN 0 1 0 200M 800M
13 34 266M 1067M
C
14 CLK_ICH_PCI
R185 1 2 33_J PCLKCLK5 PCI4/27_SEL SRCT_LR4
SRCC_LR4
35
EXP_CLKIN
EXP_CLKIN#
6
6 NB CLK 0 0 0 C

12 Reserved
19 CLK_KBCPCI
R186 1 2 33_J PCLKCLK4 PCI3
SRCT_LR2/SATACLKT
28 CLK_ICH_SATA 15
1 1 1
R187 1 2 33_J PCLKCLK2 11 29
20 PCLK_FWH PCI2/TME SRCC_LR2/SATACLKC CLK_ICH_SATA# 15 SB SATA
TP46 26MIL 1
10
PCI1/CR#_B R189 0_J
20 DREFCLK_1 1 2 0402 DREFCLK 8
DOT96T/SRCT_LR0
TP47 26MIL 18 21 DREFCLK_1# R190 1 0_J 2 0402 DREFCLK# 8
PCI0/CR#_A DOT96C/SRCC_LR0
R387 1 0_J 2 0402 7
12,16 SMB_CLK SCLK
R388 1 0_J 2 0402 6 39 CR#_G +3VRUN
12,16 SMB_DATA SDATA SRCC_LR11/CR#_G
40 CR#_H
R193 1 0_J SRCT_LR11/CR#_H
8 DREFSSCLK 2 0402 DREFSSCLK_1 24 +3VRUN
R194 1 0_J 27FIX/SRCT_LR1/SE1
8 DREFSSCLK# 2 0402 DREFSSCLK_1# 25 50
27SS/SRCC_LR1/SE2 SRCC_LR7/CR#_E
51

1
SRCT_LR7/CR#_F R196
22 31 WLAN_CLKREQ# 1 0402 2 470_J CR#_H R197 1 10K_J 2 0402
GND_1 R195 R198
26 31 30 3G_CLKREQ# 1 0402 2 470_J CR#_G R199 1 10K_J 2 0402
GND_2 SRCT_LR3/CR#_C
18 32
GND48 SRCC_LR3/CR#_D 10K_J
15
GNDPCI
1 0402

2
GNDREF
30
GNDSRC_1 CK_PWRGD
36 63 CK_PWRGD 16
GNDSRC_2 CK_PWRGD/PD#
49
GNDSRC_3

3
59
GNDCPU D
+3VRUN
1 IMVP_CLK_EN# 39
R188 1 10K_J 2 0402 PCLKCLK2 S G
65 55 Q4

2
R191 THERMAL PAD NC
1 10K_J 2 0402 PCLKCLK4 2N7002.215
R192 1 10K_J 2 0402 PCLKCLK5 null

B B

9LRS3165BKLFT
ICS9LPRS365YGLFT setting table null

PIN NAME DESCRIPTION


Byte 5, bit 7
0 = PCI0 enabled (default)
1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair
PCI0/CR#_A Byte 5, bit 6
0 = CR#_A controls SRC0 pair (default),
1= CR#_A controls SRC2 pair
PIN NAME DESCRIPTION
Byte 5, bit 5
0 = PCI1 enabled (default) Byte 5, bit 1
1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair 0 = SRC3 enabled (default)
PCI1/CR#_B Byte 5, bit 4 1= CR#_D enabled. Byte 5, bit 0 controls whether CR#_D controls SRC1 or SRC4 pair
0 = CR#_B controls SRC1 pair (default) SRCC3/CR#_D Byte 5, bit 0
1= CR#_B controls SRC4 pair 0 = CR#_D controls SRC1 pair (default)
1= CR#_D controls SRC4 pair
0 = Overclocking of CPU and SRC Allowed
PCI2/TME 1 = Overclocking of CPU and SRC NOT allowed Byte 6, bit 7
0 = SRC7# enabled (default)
SRCC7/CR#_E 1= CR#_F controls SRC6
PCI3
Byte 6, bit 6
0 = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96# 0 = SRC7 enabled (default)
PCI4/27M_SEL 1 = Pin17 as 27MHz, Pin 18 as 27MHz_SS, Pin13 as SRC-0, Pin14 as SRC-0# SRCT7/CR#_F 1= CR#_F controls SRC8

A 0 =SRC8/SRC8# Byte 6, bit 5 A


PCI_F5/ITP_EN 1 = ITP/ITP# 0 = SRC11# enabled (default)
SRCC11/CR#_G 1= CR#_G controls SRC9
Byte 5, bit 3
0 = SRC3 enabled (default) Byte 6, bit 4
1= CR#_C enabled. Byte 5, bit 2 controls whether CR#_C controls SRC0 or SRC2 pair 0 = SRC11 enabled (default)
SRCT3/CR#_C Byte 5, bit 2 SRCT11/CR#_H 1= CR#_H controls SRC10
0 = CR#_C controls SRC0 pair (default),
1= CR#_C controls SRC2 pair CCPBG
CLOCK GEN
Title

Size Document Number Rev


Custom M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 18 of 44


5 4 3 2 1
5 4 3 2 1

Use EC to implement power limit


Wireless switch should use U5.124, reserve U5.100 A/D for detecting voltage level
(Default setting -- Hardware Power Limit)
+ECVCC +3VRUN
If use EC to implement, it should do setting as below. 100mA
Stuff
C720, C721, R233, R359, PR144, PR145, PR146

1
C158 C159 C295

1
C294 C152 C153 C154 C155 C156 C157 10U_6.3V_Y 0.1U_16V_M 33P_50V_J
NC 33P_50V_J 10U_6.3V_Y 0.1U_16V_M 0.1U_16V_M 0.1U_16V_M 0.1U_16V_M 0.1U_16V_M 0805_Y5V 0402_X5R 0402_NPO CH500H-40PT D6

2
0402_NPO 0805_Y5V 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R H_RCIN#_D 1 2 H_RCIN# 15

2
R357, PR139, PU9, PC115, PC116, PR118, PR123, PR124
D D

115

102
+ECVCC CH500H-40PT D7

88
76
46
19
36 EC_IADAPT

4
U5A H_A20GATE_C 1 2 H_A20GATE 15

1
C720

AVCC

VDD
VCC5
VCC4
VCC3
VCC2
VCC1
NC_0.01U_6.3V_K
0402_X7R

2
C160
104 124 BT_WLAN_SW#_P124 R233 1 NC_0_J 2 0402 NC_10P_50V_J
VREF LPCPD#/GPIO10 BT_WLAN_SW# 29
+ECVCC LID Switch 7 PLT_RST# 0402_NPO
LRESET# PLT_RST# 8,16,20,21,30,31,33
97 2 CLK_KBCPCI CLK_KBCPCI 2 1
100K_J R322 1 2 POWER_CLOSE_GAP_0402 PM_THRM#_EC 98
AD0/GPIO90 A/D LCLK
3
CLK_KBCPCI 18
33 PM_THRM# AD1/GPIO91 LFRAME# LPC_FRAME# 16,20
R204 2 1 0402 LIDIN# LIDIN# 99 6 CLK_35001 CLK_35001 41
20,28 LIDIN# AD2/GPIO92 GPIO24
EC_AD3/GPIO93 100 126
AD3/GPIO93 LAD0 LPC_AD0 16,20
POWER_CLOSE_GAP_0402 108 127
33 FAN1_TACH GPIO05 LAD1 LPC_AD1 16,20
R357 1 2 30 WWAN_PWR_EN 96 128
29 BT_WLAN_SW# GPIO04 LAD2 LPC_AD2 16,20
EC_AD3/GPIO93 PM_SLP_S4# 95 1 +3VALW
16 PM_SLP_S4# LPC LPC_AD3 16,20

1
R359 1 NC_0_J 2 0402 C384 PWRSW#_R GPIO03 LAD3
36 EC_VADAPT 94 125 INT_SERIRQ 15,20 RP9
1500P_25V_K GPIO07 SERIRQ
8 PM_CLKRUN# 16,20
CLKRUN#/GPIO11 H_RCIN#_D CLK_SMB
0402_X7R 122 1 4

2
1

C721 ACIN_EC KBRST#/GPIO86 H_A20GATE_C DAT_SMB


36 ACIN_EC 101 121 2 3
NC_0.01U_6.3V_K DA0/GPIO94 GPIO85/GA20 RUNTIME_SCI#_D CH500H-40PT 1
36 CHARGE_CTRL
105 D/A 29 2 D8 RUNTIME_SCI# 14
0402_X7R DA1/GPIO95 ECSCI#/GPIO54
106 9 EXTSMI# 16 SMBUS Channel 1
2

37 ALW_PWRGD DA2/GPIO96 SMI#/GPIO65 4.7K_J


107 123 CH500H-40PT 1 2 D9 WAKE_SCI# 16
36 BATT_PRS# GPIO97 PWUREQ#/GPIO67 0404
28 OP_SD# 23,24 +3VRUN
GPIO53
40,41 GFX_PWRGD 80 24 WWAN_EN 29,30
GPIO41 GPIO47 RP7
17 120
41 35001_RST#
1 SYSTEM_ID1 TCK/GPIO42 GPIO SMB SDA3/GPIO31 SMB_THRM_CLK
20 119 1 4
tpc40t_50 TP52 GPIO43/TMS (wake-up SCL3/GPIO23 DAT_SMB_R R202 1 100_F
38,41 DDR_PWRGD 21 68 2 0402 DAT_SMB 36
SMB_THRM_DATA 2 3
GPIO44/TDI capability) SDA2/GPIO74 CLK_SMB_R R203 1 100_F
36 AC_OFF 25 67 2 0402 CLK_SMB 36
1 SYSTEM_ID0 GPIO50/TDO SCL2/GPIO73 SMB_THRM_DATA 10K
tpc40t_50 TP56
27 69 SMB_THRM_DATA 33 SMBUS Channel 0
+ECVCC GPIO52/RDY# SDA1/GPIO22 SMB_THRM_CLK
70 SMB_THRM_CLK 33 0404_4P2R
SCL1/GPIO17
GPIO 84 MODEL_ID1 1
GPIO77 TP55 tpc40t_50
83 SHBM 1
C
(no wake-up GPO76/SHBM
82
TP122 tpc40t_50
+3VRUN C
RUN_ON 38,40,41
2

capability) GPIO75
91 1 TP137 tpc40t_50
R200 GPIO81
21 LAN_PWR_EN
110 SPI
EC_TRIST# GPO82/TEST# PM_THRM#_EC R320 1 10K_J
4.7K_J tpc40t_50 TP57 1 112 2 0402
GPO84/TRIST# PM_RSMRST#_R R206 1
0402 23 2 POWER_CLOSE_GAP_0402 PM_RSMRST# 16
GPIO46/TRST# ALL_SYS_PWRGD_EC R280 1 NC_0_J 2 0402
14
1

GPIO34 ALL_SYS_PWRGD 16,41


PWRSW# 111
SER CIR GPIO16
114
109
SUS_ON 27,38,40,41
20,29 PWRSW# 20 E51TXD SOUT_CR/GPO83/XORTR# GPIO30 CAPLOCK_LED 29
113 +3VSUS
20 E51RXD GPIO87/SIN_CR
2

PM_SLP_S5# 93
16 PM_SLP_S5# GPIO06
R201
110_J BT_WLAN_SW# R209 1 10K_J 2 0402
0402
DAT_35001 BT_PRS# R211 1 10K_J 2 0402
FIR 75
1

GPIO72 DAT_35001 41
PWRSW#_R 74
GPIO71 WLAN_EN 29,31
73 OVT_EC# 9,16,39 WLAN_EN changes to HIGH enable
GPIO70
2

C161
0.1U_16V_M_B 44
1

VCORF
0402_X5R

AGND
GND6
GND5
GND4
GND3
GND2
GND1
C162 PM_SLP_S5# R217 1 100K_J 2 0402
1U_10V_K PM_SLP_S4# R218 1 100K_J 2 0402
0603_X5R PM_SLP_S3# R219 1 100K_J 2 0402
2 NPCE783LA0DX

116
89
78
45
18
5

103
null
RUN_ON R223 1 100K_J 2 0402
SUS_ON R224 1 100K_J 2 0402
ALW_ON R221 1 100K_J 2 0402
RUN_ON1 R222 1 100K_J 2 0402

SHBM R225 1 4.7K_J 2 0402

PLT_RST# 0402 2 10K_J 1 R226

B B
32KXCLKO
1

R210
U5B
20M_J
Y2 0603 32KXCLKI 77 Place at EC side.
2

32KXCLKI 32KXCLKO 32KX1/32KCLKIN KSO0


4 1 79 53 KSO0 20
MODEL_ID0 32KX2 KBSOUT0/JENK# KSO1
tpc40t_50 TP58 1 30 52 KSO1 20
1

C163 C164 CLKOUT/GPIO55 KBSOUT1/TCK KSO2


3 2 51 KSO2 20
15P_50V_J 15P_50V_J KBSOUT2/TMS KSO3
50 KSO3 20
MC306 KBSOUT3/TDI KSO4 +ECVCC
32 49
0402_NPO 0402_NPO
EC RESET
2

33 FAN1_PWM A_PWM/GPIO15 KBSOUT4/JEN0# KSO4 20


118 48 KSO5
29 SUSPEND_LED B_PWM/GPIO21 KBSOUT5/TDO KSO5 20
32.768KHZ_12.5P_10PPM 62 47 KSO6
29 POWER_LED C_PWM/GPIO13 KBSOUT6/RDY# KSO6 20
65 43 KSO7
29 NUMLOCK_LED D_PWM/GPIO32 KBSOUT7 KSO7 20
R212 1 NC_0_J 2 0402 22 KSO8
38,40 +1_05V_PWRGD
16 E_PWM/GPIO45 KBC KBSOUT8
42
41 KSO9
KSO8 20
R227 1 100K_J2 0402
28 BL_OFF# F_PWM/GPIO40 KBSOUT9/SDP_VIS# KSO9 20
81 40 KSO10
29 CHARGE_LED G_PWM/GPIO66 KBSOUT10_P80_CLK KSO10 20
29 SCRLOCK_LED 66 39 KSO11
H_PWM/GPIO33 KBSOUT11_P80_DAT KSO11 20
38 KSO12 R229
KBSOUT12/GPIO64 KSO12 20
BT_PRS# 31 37 KSO13 1 2 ECRST# 1 2
31 BT_PRS# TA1/GPIO56 KBSOUT13/GPIO63 KSO13 20 FORCE_OFF# 33
39 IMVP_VR_ON 63 36 KSO14
TB1/GPIO14 KBSOUT14/GPIO62 KSO14 20
117 35 KSO15 CH500H-40PT D33 POWER_CLOSE_GAP_0402
36 ENCHG# KSO15 20

1
64 TA2/GPIO20 KBSOUT15/GPIO61/XOR_OUT 34 C165
T/P 16 PM_SLP_S3# 1 TP76 tpc40t_50
+5VRUN 26 TB2/GPIO01 KBSOUT16/GPIO60 33 0.1U_16V_M_B
1
16 PWRBTN# GPIO51 KBSOUT17/GPIO57 TP77 tpc40t_50
R228 1 2.2K_J 2 0402 ALW_ON_R 15 0402_X5R
37,41 ALW_ON

2
RP8 GPIO36
4 1 CLK_TP 13 54 KSI0
31 BT_ON PSDAT3/GPIO12 KBSIN0 KSI0 20
3 2 DAT_TP 40 RUN_ON1 12 55 KSI1
PSCLK3/GPIO25 KBSIN1 KSI1 20
11 56 KSI2
41 PWRLIMIT# PSDAT2/GPIO27 KBSIN2 KSI2 20
10K 10 57 KSI3
26 MB_CRT_DET# PSCLK2/GPIO26 KBSIN3 KSI3 20
0404_4P2R DAT_TP 71 58 KSI4
20 DAT_TP PSDAT1/GPIO35 KBSIN4 KSI4 20
CLK_TP 72 59 KSI5
20 CLK_TP PSCLK1/GPIO37 PS/2 KBSIN5
60 KSI6
KSI5 20
KBSIN6 KSI6 20
61 KSI7
SPI_ROM_SDI 86
FIU KBSIN7 KSI7 20
A 20 SPI_ROM_SDI F_SDI A
SPI_ROM_SDO 1 2 SPI_ROM_SDO_R 87
20 SPI_ROM_SDO F_SDO
R230 22_J 0402 90 85 ECRST#
20 SPI_ROM_CS# F_CS0# VCC_POR#
20 SPI_ROM_CLK 1 2 SPI_ROM_CLK_R 92
R231 22_J 0402 F_SCK

NPCE783LA0DX
SYSTEM ID0-1
1

C222 null +ECVCC


NC_1000P_50V_K NC_10K_J 100K_J
0402_X7R R349 1 2 0402 SYSTEM_ID0 R342 1 2 0402
2

R355 1
NC_10K_J
2 0402 SYSTEM_ID1 R345 1
100K_J
2 0402 CCPBG
EC (NPCE783L)
Title

Size Document Number Rev


Custom M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 19 of 44


5 4 3 2 1
5 4 3 2 1

+5VRUN +5VRUN_TP
F9
2 1
Touch Pad Keyboard

1
C166 CN4
10V-0.125A_1206 0.1U_16V_M 19 KSO15 KSO15 24
1206L012 0402_X5R C711 1 2 KSO15 23 KSO14 KSO14 19

1
VR1 100P_50V_J 0402_NPO KSO13 22
Left Button 19 KSO13
21 KSO12 KSO12 19
D C712 1 2 KSO13 19 KSI7 KSI7 20 D
SW1 100P_50V_J 0402_NPO 19 KSO11 KSO11 19
1 2 19 KSO10 KSO10 18

Touch Pad CONN. NC_MLVS0603M04_VR C713 1 2 KSI4 17 KSI6 KSI6 19

2
5 null 100P_50V_J 0402_NPO 19 KSI5 KSI5 16
3 4 LEFT# 15 KSO9 KSO9 19
C714 1 2 KSO7 19 KSI4 KSI4 14
1BT001-1420L-001_SW-TACT 100P_50V_J 0402_NPO 13 KSO8 KSO8 19
19 KSO7 KSO7 12
C715 1 2 KSO5 11 KSO6 KSO6 19
100P_50V_J 0402_NPO 19 KSO5 KSO5 10
9 KSO4 KSO4 19
+5VRUN_TP C716 1 2 KSO3 19 KSO3 KSO3 8
100P_50V_J 0402_NPO 7 KSI3 KSI3 19
8

CN3 19 KSO2 KSO2 6


1 2 LEFT# C717 1 2 KSO2 5 KSO1
3 4 DAT_TP 19
Right Button 100P_50V_J 0402_NPO 19 KSO0 KSO0 4
KSO1 19

19 CLK_TP 5 6 RIGHT# 3 KSI2 KSI2 19


SW2 C718 KSO0 KSI1
1 2 19 KSI1 2
FPC CONN_6P 1 2 100P_50V_J 0402_NPO 1 KSI0 KSI0 19
7

KOTL_F42206-V11190

1
C385 5 C719 1 2 KSI1
NC_10P_50V_J 3 4 RIGHT# 100P_50V_J 0402_NPO FPC CONN_24P FOX_GB72240-26511-8H
0402_NPO
2 1BT001-1420L-001_SW-TACT

1
VR2
Place these caps close to CN4.
C C
NC_MLVS0603M04_VR

2
null

BFT Test Point for Touch Pad (BOTTOM side)


tpc60b_100 TP100 1 GND BFT Test Point for Keyboard (BOTTOM side)
tpc60b_100 TP109 1 LEFT# tpc60b_100 TP96 1 KSI4
tpc60b_100 TP110 1 RIGHT# tpc60b_100 TP97 1 KSO7
tpc60b_100 TP111 1 DAT_TP tpc60b_100 TP98 1 KSO5
tpc60b_100 TP112 1 CLK_TP tpc60b_100 TP99 1 KSI2
tpc60b_100 TP113 1 +5VRUN_TP

tpc40t_75 TP101 1 SPI_ROM_CS#


tpc40t_75
tpc40t_75
tpc40t_75
tpc40t_75
TP102
TP103
TP104
TP105
1
1
1
1
SPI_ROM_SDI_R
SPI_ROM_WP#
GND
+ECVCC
EXTERNAL SPI ROM INTERFACE Debug Port
CN6
tpc40t_75 TP106 1 SPI_HOLD# +ECVCC
B tpc40t_75 TP107 SPI_ROM_CLK +ECVCC B

14
1

SMDFIX1

SMDFIX2
tpc40t_75 TP108 1 SPI_ROM_SDO 32 31
SMDFIX2

12 1 2 LPC_AD0 LPC_AD0 16,19


SPI_ROM_CLK 11 16,19 LPC_AD1 LPC_AD1 3 4 LPC_AD2 LPC_AD2 16,19
19 SPI_ROM_CLK
SPI_ROM_SDO 10 16,19 LPC_AD3 LPC_AD3 5 6 LPC_FRAME# LPC_FRAME# 16,19
+ECVCC 19 SPI_ROM_SDO
SPI_ROM_SDI 9 7 8
LID Switch 19 SPI_ROM_SDI
19 SPI_ROM_CS# SPI_ROM_CS# 8
16 LPC_DRQ0#
16 PM_SUS_STAT# 9 10 1
ID_LPC_PCI#
26MIL TP62
16

16 MB_FLASH_EN MB_FLASH_EN 7 8,16,19,21,30,31,33 PLT_RST# PLT_RST# 11 12 PM_CLKRUN# PM_CLKRUN# 16,19


CARD_INSERT 6 15,19 INT_SERIRQ INT_SERIRQ 13 14 PCLK_FWH 18
2

C167 5 15 16 1 26MIL TP63


0.1U_10V_K 4 19,29 PWRSW# PWRSW# 17 18
1

0402_X5R U12 3 +5VRUN 19 20 +3VRUN R236


1

1 2 R234 2 +ECVCC 21 22 PCI_RST#_JIG 1 2


VCC OUT LIDIN# 19,28 PCI_RST# 14
4 3 NC_10K_J 1 E51RXD 23 24 1
GND NC 19 E51RXD 26MIL TP64
0402 SMDFIX1
19 E51TXD E51TXD 25 26 POWER_CLOSE_GAP_0402
MRMS402B 27 28
16 SB_RST#
2

null 13 29 30

SMDFIX4
SMDFIX3
34 33
CN5
+ECVCC +ECVCC +ECVCC NC_FPC_12P
FOX_GB5RF120-1200-7F B TO B CONN_2x15P
FOX_QT510306-L011-7F
2
2

C168 C296 R235


A
R237
10K_J
R239
10K_J
BIOS ROM 0.1U_16V_M_B
0402_X5R
33P_50V_J 10K_J
0402
A
0402_NPO
2

0402 0402
1

U7
1

SPI_ROM_CS# 1 8
SPI_ROM_SDI SPI_ROM_SDI_R CS# VCC SPI_HOLD#
1

R238
2
SPI_ROM_WP#
2
3
DO/IO1
WP#/IO2
HOLD#/IO3
CLK
7
6 SPI_ROM_CLK
SPI_ROM_SDO
CCPBG
4 5
GND DI/IO0
KB/TP/Debug Port
22_J Title
0402 FLASH_SOIC-8P_16MB
W25Q16BVSSIG
Size Document Number Rev
A3 M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 20 of 44


5 4 3 2 1
5 4 3 2 1

For EMI (Close to JMC261)


SD_DAT0/XD_D0/MS_D0 R401 1 56_J 2 0402 CR_D0
+1.2V_LAN SD_DAT1/XD_D1/MS_D1 R400 1 56_J 2 0402 CR_D1
SD_DAT2/XD_D2/MS_D2 R399 1 56_J 2 0402 CR_D2
SD_DAT3/XD_D3/MS_D3 R398 1 56_J 2 0402 CR_D3
XD_D4/MS_D4 R402 1 56_J 2 0402 CR_D4
XD_D5/MS_D5 R403 1 56_J 2 0402 CR_D5 +3V_LAN
XD_D6/MS_D6 R404 1 56_J 2 0402 CR_D6 +3VALW
1 XD_D7/MS_D7 R405 1 56_J 2 0402 CR_D7

1
C169 C170 C171
0.1U_16V_K 0.1U_16V_K NC_10U_10V_M SD_CMD/MS_BS/XD_WE# 0402 2 33_J 1 R397 CR_SDCMD_MSBS
0402_X7R 0402_X7R 0805_X5R 40 mils 40 mils
2

2
SD_CLK/MS_SCLK/XD_CS# R240 1 22_J 2 0402 SD_CLK/MS_SCLK/XD_CS#_1 1 2
S3 LAN & CR Power OFF (Battery only)
closed pin#26 closed pin#17 closed pin#17 R241

2
D NC_0_J D

1
C172 R242 C173 0805

1
C380 C381 C386 C387 C388 C389 C390 C391 C392 C393 1U_10V_K 1M_J 1000P_50V_K

2
NC_10P_50V_J NC_10P_50V_J NC_10P_50V_J NC_10P_50V_J NC_10P_50V_J NC_10P_50V_J NC_10P_50V_J NC_10P_50V_J NC_10P_50V_J NC_10P_50V_J 0603_X5R 0402_X7R
0402

2
+1.2V_LAN 0402_NPO 0402_NPO 0402_NPO 0402_NPO 0402_NPO 0402_NPO 0402_NPO 0402_NPO 0402_NPO 0402_NPO S

1
1 2 1 G
D Q7
R243 FDN340P

3
100K_J null
1

1
C174 C175 C176 C177 D 0402
0.1U_16V_K 0.1U_16V_K 0.1U_16V_K NC_10U_10V_M EC Controll R244
0402_X7R 0402_X7R 0402_X7R 0805_X5R 1 2 1
2

2
19 LAN_PWR_EN G Q8
S
POWER_CLOSE_GAP_0402 2N7002.215

2
closed pin#51 closed pin#62 closed pin#55 closed pin#55 C178 null
NC_0.47U_16V_M
0603_X5R

2
+3V_LAN

SD_WP#/XD_WP#
SD_CLK/MS_SCLK/XD_CS#
+3V_LAN +3V_LAN SD_CMD/MS_BS/XD_WE# XD_CLE 1
26MIL TP79
SD_DAT3/XD_D3/MS_D3

XD_D4/MS_D4
XD_D5/MS_D5
XD_D6/MS_D6
1

C181 C182 C183 C184 SD_DAT2/XD_D2/MS_D2 XD_D7/MS_D7


0.1U_16V_K 0.1U_16V_K 0.1U_16V_K NC_10U_10V_M SD_DAT1/XD_D1/MS_D1
0402_X7R 0402_X7R 0402_X7R 0805_X5R SD_DAT0/XD_D0/MS_D0 XD_RE# 1 R246 R247 R248 C189 Function
26MIL TP80
2

MDIO Single End = 50 ohm 0 NC NC NC Disable D3E

48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
closed pin#45 closed pin#27 closed pin#38 closed pin#38
U8
+1.2V_LAN
NC NC 0 NC Enable D3E(1)

VDDIO
MDIO0
MDIO1
MDIO2

MDIO3
MDIO4
MDIO5
GND_3
MDIO6
MDIO7
VDDIO_2
MDIO8
MDIO9
MDIO10
MDIO11
MDIO12
NC 100K NC 0.1u Enable D3E(2)
C +3V_LAN +1.2V_LAN +3V_LAN +3V_OUT C
TP71 26MIL 1 49
LED0 GND_4
32
XD_R/B#
1. For JMC251/261 only.
TP72 26MIL 1 50 31
51
LED1 MDIO13
30 XD_ALE 1 2. MPD connect to Main Power or RSTN for D3E
VDD_2 MDIO14 26MIL TP82
+1.2V_LAN 52
GND_5 SMB_SDA/CR_LEDN
29 SMB_SDA/CR_LED 29 application, to AUX power otherwise.
53 28
1

22 MDI0+ VIP_1 TESTN


C185 C186 C187 C188 54 27
0.1U_16V_K 0.1U_16V_K 0.1U_16V_K NC_10U_10V_M 22 MDI0- VIN_1 VDDIO_1
55 26
AVDD12 VDD_1 +3V_LAN +3VRUN
0402_X7R 0402_X7R 0402_X7R 0805_X5R 56 25
2

+3V_LAN 22 MDI1+ VIP_2 VCC3O


57 24 SD_CR_CD0N
22 MDI1- VIN_2 CR_CD0N MS_CR_CD1N
58 23
GND_6 CR_CD1N SMB_SCL
closed pin#2 closed pin#11 closed pin#59 closed pin#59 59
AVDD33 SMB_SCL/LED2
22 R246 1 2 NC_0_J 0402
60 21 CR_CPPE# 1
VIP_3(NC) CREQN 26MIL TP75
61 20 MPD R247 1 2 NC_100K_J 0402
VIN_3(NC) MPD PCIE_WAKE# R248
62 19 PCIE_WAKE# 16,31
AVDD12(NC) WAKEN RSTN
63 18 1 2
VIP_4(NC) RSTN
64 17

2
VIN_4(NC) AVDDTX

VDDREG
POWER_CLOSE_GAP_0402

VDDX33

AVDDH
GND_1

GND_2
C189

XOUT

CLKN
REXT

CLKP
FB12

RXN
RXP
NC_0.1U_16V_K

TXN
TXP

1
XIN

LX
0402_X7R
JMC261

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
null

1REXT

LANXOUT
1 2

LANXIN
PLT_RST# 8,16,19,20,30,31,33

REGLX
PCIe Differential Pairs = 100 ohm
R249
R250 1K_J
12K_F 0402
0402
PCIE_RXP1_JMC C190 1 2 0.1U_16V_K

2
PCIE_RXN1_JMC C192 LAN_RXP2 14
1 2 0.1U_16V_K
LAN_RXN2 14

LAN_TXN2 14
LAN_TXP2 14
Card Reader Pull High/Low Resistors 25MHz Crystal

+3V_LAN
+3V_LAN

+1.2V_LAN
B B

+3V_LAN CLK_PCIE_LAN 18
HOSONIC_E5FA25.0000F12D33
CLK_PCIE_LAN# 18
Y3 +3V_LAN
LANXIN 1 2 LANXOUT
R254 1 2 4.7K_J 0402 MS_CR_CD1N
25MHZ_12P_30PPM
R255 1 2 4.7K_J 0402 SD_CR_CD0N
1

1
1 2 C194 C193
0.1U_16V_K 10U_10V_M
R245 0402_X7R 0805_X5R
2

2
+3V_CR NC_1M_J
1

C179 0402 C180


18P_50V_J 18P_50V_J
R256 1 2 10K_J 0402 SD_CMD/MS_BS/XD_WE# 0402_NPO 0402_NPO
2

GND_CR
R257 1 2 10K_J 0402 SD_WP#/XD_WP#

R258 1 2 1K_J 0402 XD_R/B#

27
CN7
+3V_OUT +3V_CR +3V_CR CR_D2 1

SMDFIX1
DAT2
2
CR_D7 VSS_1
3
R253 CR_D3 4 DATA7
External EEPROM for MAC address DAT3
Internal Switching Regulator 1 2
SD_CLK/MS_SCLK/XD_CS#_1
5
VCC
M9F0 saves MAC address in BIOS POWER_CLOSE_GAP_0603 CR_SDCMD_MSBS
6
7
SCLK
1

1
+3V_LAN +3V_LAN C197 C198 C199 C200 CR_D3 CMD
8
MS_CR_CD1N DATA3
10U_10V_M 1U_10V_K 2.2U_16V_Y 0.1U_6.3V_K 9
INS
+1.2V_LAN 0805_X5R 0603_X5R 0603_Y5V 0402_X5R 10 R409 1 2 0_J
2

2
CR_D6 VSS1 1206
11
CR_D2 DATA6
12
L4 DATA2
13
1

C191 REGLX 1 2 CR_D0 VDD


14 GND_CR
CR_D1 DATA0
NC_0.1U_16V_K R251 R252 (20mil) (20mil) 15
DATA1
0402_X7R SD_CLK/MS_SCLK/XD_CS#_1 16 R410 1 2 0_J
2

NC_4.7K_J NC_4.7K_J CR_SDCMD_MSBS CLK


4.7UH_2.9x2.9x1.2 C195 C196 17 1206
U9 10U_10V_M 0.1U_16V_K BS
0402 0402 PH031B-4R7MS 18
2

VSS_2
1 8 0805_X5R 0402_X7R 19
2

A A0 VCC SD_CR_CD0N CR_D5 VSS2 A


2
A1 WP
7 closed to chip. tpc40t_75 TP138 1 20
DATA5
GND_CR
3 6 SMB_SCL CR_D4 21
A2 SCL SMB_SDA/CR_LED tpc40t_75 TP139 SD_WP#/XD_WP# CR_D0 DATA4
4 5 1 22
GND SDA CR_D1 DAT0

SMDFIX2
23
NC_EEPROM_SOIC-8P_8KB tpc40t_75 TP140 1 GND SD_CR_CD0N DAT1
24
Detect
AT24C08BN-SH-T 25
SD_WP#/XD_WP# Common
26
Write Protect
SOCKET_26P
BFT Test Point for SD Card (BOTTOM side)

28
YAMAICHI_FRS018-2100-1

CCPBG
GND_CR
LAN + 4 in 1 CR - JM261
Title

Size Document Number Rev


A2 M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 21 of 44


5 4 3 2 1
5 4 3 2 1

+1.2V_LAN

D D

1
R259
11

NC_0_J
L5 0402

2
PTH1 PTH3
1 RJ45_1 Zdiff = 100 Ohm RJ45_1 16 1 MDI0+
TX+ TD+ MDI0+ 21
2 RJ45_2 15 2
RJ45_3 RJ45_2 CT4 CT1 MDI0-
3 14 3 MDI0- 21
RJ45_4+5 TX- TD-
4 13 4
13 4
5 12 5
RJ45_6 RJ45_3 12 5 MDI1+
6 11 6 MDI1+ 21
RJ45_7+8 RX+ RD+
7 10 7
RJ45_6 CT3 CT2 MDI1-
8 9 8 MDI1- 21
PTH2 PTH4
RX- RD-
1-1_350UH
CN8 LF-H86P-2
12

10

MODULAR JACK CONN_8P


FOX_JM36111-R3D03-7H
C C

GND_CR

RJ45_4+5
RJ45_7+8

1
C205 C206
R260 R261 R262 R263 0.1U_16V_M 0.1U_16V_M
0402_X5R
BFT Test Point for RJ45 (BOT side) 0402_X5R

2
75_J 75_J 75_J 75_J
tpc40t_75 TP153 1 RJ45_1 0402 0402 0402 0402

2
tpc40t_75 TP154 1 RJ45_2
tpc40t_75 TP155 1 RJ45_3

1
tpc40t_75 TP156 1 RJ45_4+5 U_C1 C205, C206 close to Pin2, Pin7 of L5 each
tpc40t_75 TP157 1 RJ45_6 1500P_2KV_K
tpc40t_75 TP158 1 RJ45_7+8 1808_X7R

2
B B

GND_TR
Place close to L5
C203
1 2

0.1U_50V_K
0603_X7R
C204
1 2

1000P_50V_K
0402_X7R

A GND_TR A
CCPBG
Transformer & RJ45
Title

Size Document Number Rev


A4 M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 22 of 44


5 4 3 2 1
5 4 3 2 1

+5VRUN
Audio Power
+5V_AUDIO
R264
L6
100R-100MHZ_0805 +5V_AUDIO_S 1 2 +5V_AUDIO
HPB2012Z-101T40 NC_0_J 0805
D D

U10

1
+5VRUN 3 4 C210 C211
+5V_PVDD +3VRUN +3VRUN IN OUT 0.1U_10V_K 10U_10V_M
R267 1 0402_X5R 0805_X5R

2
SHDN#

1
1 2 C214 2 5
1U_10V_K GND SET
+5V_AUDIO 0603_X5R G923-475T1UF

2
0_J
1

1
C321 C221 C215 C217 C213 C207 C208 C322 null
0603 33P_50V_J 0.1U_10V_K 0.1U_10V_K 10U_10V_M 0.1U_10V_K 10U_10V_M 0.1U_10V_K 33P_50V_J
0402_NPO 0402_X5R 0402_X5R 0805_X5R 0402_X5R 0805_X5R 0402_X5R 0402_NPO
2

2
GND_AUDIO

1
Close to Codec C323
33P_50V_J
+5V_PVDD U11 0402_NPO

2
PGND 1 25
C215 close to U11 pin39 9
DVDD AVDD1
38
DVDD_IO AVDD2
C221 close to U11 pin46 39
PVDD1
GND_AUDIO
46 21 MIC1_L C374 1 2 4.7U_10V_K 0805_X5R
PVDD2 MIC1_L EXT_MIC_L 24
22 MIC1_R C375 1 2 4.7U_10V_K 0805_X5R
MIC1_R EXT_MIC_R 24
28 DMIC_DAT 2
GPIO0/DMIC_DATA
28 DMIC_CLK 3 16
GPIO1/DMIC_CLK MIC2_L
17
R266 MIC2_R
16 HDA_CODEC_SDATAIN0 1 2 33_J ACZSDIN0 8
0402 SDATA_IN
23
LINE1_L
16 HDA_CODEC_SDATAOUT 5 24
C SDATA_OUT LINE1_R C
14
LINE2_L
16,24 HDA_CODEC_RST# 11 15
RESET# LINE2_R
10 32 HPOUT_L R385 1 75_J 2 0402
16 HDA_CODEC_SYNC SYNC HPOUT_L HP1_JACK_L 24
33 HPOUT_R 1 2
HPOUT_R R386 0402 HP1_JACK_R 24
6 75_J
16 HDA_CODEC_BITCLK BCLK
41 H_SPKL- 24
C212 SPK_OUT_L-
1 2 NC_22P_50V_K 24 AUD_EAPD# 47 40 H_SPKL+ 24
0402_NPO EAPD SPK_OUT_L+
44 H_SPKR- 24
TP78 26MIL 1AUD_SPDIF_OUT SPK_OUT_R-
AUD_PC_BEEP 48
SPDIFO SPK_OUT_R+
45 H_SPKR+ 24
C219
1 R269 2 ACZ_SPKR_R 2 1 Trace width>15 AUD_PC_BEEP 12 20
16 HDA_SPKR PCBEEP MONO_OUT
47K_J 0402 0.1U_10V_K mils
0402_X5R
1

4 31 MIC1_VREFO_L 24
1

R378 C220 PD# MIC1_VREFO_L 30


MIC1_VREFO_R MIC1_VREFO_R 24
100P_50V_J 29
4.7K_J AUD_VREF MIC2_VREFO R375
0402_NPO 27
2

VREF
0402 13 SENSE_A 1 2 39.2K_F HP_JACK_JD# 24
2

SENSEA 0402
28 18
LDO_CAP SENSEB
0.1U_10V_K

C377 SENSE_A
1

10U_10V_M C216 C378 42 19 AUD_JDREF R376


10U_10V_M PVSS1 JDREF
0805_X5R 43 1 2 20K_F EXT_MIC_JD# 24
R379 0_J PVSS2
1 2 0402 0805_X5R 26 35 AUD_CBN C218 1 2 2.2U_10V_M
0402_X5R

19,24 OP_SD#
2

1
AVSS1 CBN 0603_X5R 0402
37 36 AUD_CBP
49 AVSS2 CBP R377
R380 THERMALPAD
24 MUTE_POP# 1 NC_0_J 2 0402 7 34
DVSS2 CPVEE 20K_F

2
ALC269Q-VB2-GR C376 0402

2
null 2.2U_10V_M
B B
0603_X5R

1
GND_AUDIO PGND GND_AUDIO
GND_AUDIO

GND_AUDIO

C710 0.1U_6.3V_K
R274 1 2 0_J R275 1 2 0_J 1 2
0603 0603
R273 1 2 0_J R271 1 2 0_J 0402_X5R

0603 0603

PGND
GND_AUDIO GND_AUDIO

A A

CCPBG
Audio Codec ALC269Q
Title

Size Document Number Rev


A3 M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 23 of 44


5 4 3 2 1
5 4 3 2 1

5
R381 1 0_J 2 0805 INTSPKL+_CON 1
23 H_SPKL+
R382 1 0_J 2 0805 INTSPKL-_CON 2 SMDFIX1 FOX_HS6204E-LH
23 H_SPKL-
R383 1 0_J 2 0805 INTSPKR+_CON 3
23 H_SPKR+ HEADER CONN_4P
R384 1 0_J 2 0805 INTSPKR-_CON 4 SMDFIX2
23 H_SPKR- JSPK1

6
1

1
D C226 C227 C228 C229 D
+5VALW +15V_ALW 1000P_50V_K 1000P_50V_K 1000P_50V_K 1000P_50V_K
0402_X7R 0402_X7R 0402_X7R 0402_X7R

2
1

1
+3VALW R283 R276

NC_2M_J 2M_J
0402 0402
BFT Test Point for Speaker (BOTTOM side)

2
R278

1
tpc60b_100 TP87 1 INTSPKL+_CON
R277 1 2 MUTE_POP#
MUTE CONTROL tpc60b_100 TP88 1 INTSPKL-_CON

3
510K_J
D 10K_J tpc60b_100 TP89 INTSPKR+_CON
0402 1

2
D12 Q9 0402
1N4148W MUTE_POP 1 BSS138LT1G tpc60b_100 TP90 1 INTSPKR-_CON
G S

1
19,23 OP_SD# 2 1 C318

2
D 0.1U_10V_K
Q10 0402_X5R

2
1 BSS138LT1G
G S

2
16,23 HDA_CODEC_RST# R279 1 2 100K_J
23 MIC1_VREFO_L
0402 23 MIC1_VREFO_R
C D13 C

4
3
1N4148W
24 AUD_EAPD# 2 1 RP1
2.2K
EXTERNAL MICROPHONE
0402_4P2R
EMI BEAD

1
2
A_CN1
0_J 1
23 EXT_MIC_L R23 1 0402 2 1K_J R284 1 2 0603 2
6
23 EXT_MIC_R R24 1 0402 2 1K_J 1 2 3
R286 0603 4
0_J 5
23 EXT_MIC_JD#

HP CONN

1
C230 C231 EARPHONE CONN_6P

1
VR5 100P_50V_J 100P_50V_J SINGATRON_2SJ-C351-019
0402_NPO 0402_NPO

2
NC_0_J
R282 1 2 0603

NC_MLVS0603M04_VR

2
Q11A null
2N7002DW
null
3 4 GND_AUDIO
D

23 HP1_JACK_R
GND_AUDIO
5 G

null
1

2N7002DW
B S B
2 G Q11B

D
HEADPHONE
6

AC_HP_R_1 R287 1 0_J 2 0603 AC_HP_R_CON


MUTE_POP# AC_HP_L_1 R288 1 0_J 2 0603 AC_HP_L_CON A_CN2
23 MUTE_POP#
1
3

AC_HP_L_CON 2
D Q12A 6
2N7002DW AC_HP_R_CON 3
5 G null 4
S FOR EMI BEAD 5
23 HP_JACK_JD#
4
2

EARPHONE CONN_6P

1
G

VR6 SINGATRON_2SJ-C351-018
23 HP1_JACK_L 6 1
GND_AUDIO
D

1
Q12B C232 C233
2N7002DW 470P_50V_K 470P_50V_K
null NC_MLVS0603M04_VR 0402_X7R 0402_X7R

2
null
R289 1 2 0603

NC_0_J
GND_AUDIO GND_AUDIO GND_AUDIO

A A

CCPBG
MIC & Audio Jack
Title

Size Document Number Rev


Custom M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 24 of 44


5 4 3 2 1
5 4 3 2 1

D D

+5VRUN +5VRUN_HDD +3VRUN +3VRUN_HDD

R392
NC_0_J
1.5A 1 2
0.8A R290 1 2 0603

0_J

1
C234 C235
0805 NC_10U_6.3V_M NC_0.1U_10V_K
0603_X5R 0402_X5R

2
C C
Reserved

CN9
C236 1 2 0.01U_10V_K 0402_X7R SATA_TXP0_C 2 1
15 SATA_TXP0 TX GND_2M_S_1
C238 1 2 0.01U_10V_K 0402_X7R SATA_TXN0_C 3 4
15 SATA_TXN0 TX# GND_2M_S_4
C237 1 2 0.01U_10V_K 0402_X7R SATA_RXN0_C 5 7
15 SATA_RXN0 RX# GND_2M_S_7
C239 1 2 0.01U_10V_K 0402_X7R SATA_RXP0_C 6
15 SATA_RXP0 RX
11
+3VRUN_HDD GND_1M_P_4
8 12
V_3.3_1 GND_2M_P_5
+5VRUN_HDD
0.8A 9
10
V_3.3_2 GND_2M_P_6
13
V_3.3_3_PC
17
GND_2M_P_10
14
1.5A 15
V_5.0_7_PC
19
V_5.0_8 GND_1M_P_12
16
18 V_5.0_9 23
1

CAP9 P_RESERVE_11 PTH1


24
1

1
+ NC_47U_10V_3.5x2.8x1.9 D14 C240 C282 C243 C244 C245 PTH2
20
0.1U_16V_M 10U_10V_M 10U_10V_M 33P_50V_J 33P_50V_J V_12_13_PC
TEPSLB21A476M8R SSM34APT 21
0402_X5R V_12_14
null 0805_X5R 0805_X5R 0402_NPO 0402_NPO 22
2

2
B V_12_15 B
1

SATA CONN_22P
FOX_LD2722F-S8KL6H

SATA HDD CONN.

A A

CCPBG
Title
SATA HDD
Size Document Number Rev
A3 M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 25 of 44


5 4 3 2 1
5 4 3 2 1

RGB routing
Terminal Resistor Filter Circuit (1 pole) ESD Protection Circuit 1. from SCH to the first 150 ohm resistor: 12 mils(min. 6 mils spacing )
2. from the first 150 ohm res. to the second 150 ohm resistor: 7 mils
75R-100MHZ_0603 +3VRUN
L11 3. from the second 150 ohm resistor to connector: 4 mils
TB160808B750
RED_VGA CRT_R_CON CRT_R_CON 4. spacing minimum 6 mils, 30 mils spacing is recommended
8 RED_VGA
D D
5. R,G,B should be length matched to 200 mils, max. length is 8400 mils

3
D15

1
6. R,G,B signals should be ground referenced
R291 1 2

1
C246 C247
150_F 10P_50V_J_N 22P_50V_J null BAV99W
0402 0402_NPO 0402_NPO VGA CONN_15P

2
+5VRUN D_SHIFT_+5VRUN FOX_DZ11A91-NB211-9H
CN10
6
CRT_R_CON 1 11

2
7
75R-100MHZ_0603 +3VRUN D10 CRT_G_CON 2 12 DDC_DAT_CON
L12
TB160808B750 SSM24PT 8
GREEN_VGA CRT_G_CON CRT_G_CON F1 CRT_B_CON 3 13 HSYNC_CON
8 GREEN_VGA
2 1 CRT_+5VRUN 9

1
3

1
D16 C335 4 14 VSYNC_CON
1

0.1U_16V_M 6V-0.25A_1206 CRT_DET# 10

1
R292 1 2 0402_X5R C315 C336 5 15 DDC_CLK_CON

2
1

1
C248 C249 1206L025 0.1U_16V_M 1U_10V_K
150_F 10P_50V_J_N 22P_50V_J null BAV99W 0402_X5R 0402_X5R

17

16
0402 0402_NPO 0402_NPO
2

2
75R-100MHZ_0603 +3VRUN
L13
TB160808B750
BLUE_VGA CRT_B_CON CRT_B_CON GND_VGA1
C
8 BLUE_VGA C

3
D17
1

R293 1 2 R406 1 2 NC_0_J


1

1
C250 C251 1206
150_F 10P_50V_J_N 22P_50V_J null BAV99W
0402 0402_NPO 0402_NPO
2

2
GND_VGA1
Place ESD Diodes Near D-Sub Conn.

The 150 Ohm resistors near VGA connector and


minimizing length to filter. The filters to VGA
connector maximum distance 800 mils.

+3VRUN

1
B C253 +3VRUN B
10U_10V_M null
Level Shifter for DDC BUS 0805_X5R NC_BAV99PT

5
U13
R393
2
2 4 1 2 HSYNC_CON R364 1NC_470_J 2 0402 CRT_DET# 3
8 HSYNC_VGA 19 MB_CRT_DET#
+3VRUN +3VRUN CRT_+5VRUN 1
1OE#
39_J

2
NC7SZ125P5 C316 D26

3
1

1
0402 C332 NC_1000P_50V_M R281
NC_33P_50V_J 0402_X7R 0_J

2
0402_NPO 0402

2
1

1
R296 R297 R298 R299

3K_J 3K_J 2.2K_J 2.2K_J


2

0402 0402
2

1
G

+3VRUN
1 6 DDC_CLK_CON
8 VGA_DDC_CLK
S

C254
Q13B
G

10U_10V_M
2N7002DW 4 3 DDC_DAT_CON 0805_X5R
8 VGA_DDC_DAT
2

5
S

null U14
R394
2 4 1 2 VSYNC_CON
Q13A 8 VSYNC_VGA
2N7002DW
A 1OE#
39_J A
null NC7SZ125P5
3
1

0402
1
C333
NC_33P_50V_J
0402_NPO
CCPBG
2

Title
VGA Connector (D-Sub)
Size Document Number Rev
A3 M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 26 of 44


5 4 3 2 1
5 4 3 2 1

USB_PWR0

1
CAP3 C260
150U_6.3V_R + 470P_50V_K
D R305 1 2 0402 6TPE150MAZB 0402_X7R D

2
0_J

2
SUS_ON
19,38,40,41 SUS_ON

5
CN13
USB_PWR0 L21 1 VCC PTH1
4 3 USB_PN0_C 2 7
14 USB_PN0 V- NPTH1
+5VALW USB_PP0_C
U24
1.5A 14 USB_PP0 1
1206
2 3 V+ NPTH2
8
4 GND PTH2
4 5 USB_OC#0 NC_90R-100MHZ_0R35
EN(EN#) OC# USB_OC#0 14
3 6 USB RECEPTACLE_4P

6
3

1
IN_2 OUT_1 D20
2 7 FOX_UB11193-C1304-4H
IN_1 OUT_2 R304
1 8 1 2 0402 NC1

1
GND OUT_3 C263 0_J
1

C261 C262 null G545B1P8U 0.1U_16V_K NC2


0.1U_16V_K 1U_16V_K 0402_X7R NC_RSB12JS2

6
0402_X7R 0603_X5R
2

USB_PWR1

C C

1
CAP2 C255
150U_6.3V_R + 470P_50V_K
R300 1 2 0402 6TPE150MAZB 0402_X7R

2
0_J

5
SUS_ON USB_PWR1 CN11
L19 1
+5VALW
1.5A 4 3 USB_PN1_C 2
VCC PTH1
7
14 USB_PN1 V- NPTH1
U25 1 2 USB_PP1_C 3 8
14 USB_PP1 V+ NPTH2
4 5 USB_OC#1 1206 4
EN(EN#) OC# USB_OC#1 14 GND PTH2
3 6 NC_90R-100MHZ_0R35
2 IN_2 OUT_1 7 USB RECEPTACLE_4P

6
3

1
IN_1 OUT_2 D18
1 8 FOX_UB11193-C1304-4H
1

GND OUT_3 C258 R301 1 2 0402 NC1


1

C256 C257 null G545B1P8U 0.1U_16V_K 0_J


0.1U_16V_K 1U_16V_K 0402_X7R NC2
2

0402_X7R 0603_X5R NC_RSB12JS2


2

6
USB_PWR2

B B

1
CAP7 C259
SUS_ON 150U_6.3V_R + 470P_50V_K
R302 1 2 0402 6TPE150MAZB 0402_X7R

2
USB_PWR2 0_J
1.5A

5
+5VALW CN12
U26 L20 1 VCC PTH1
4 5 USB_OC#2 4 3 USB_PN2_C 2 7
EN(EN#) OC# USB_OC#2 14 14 USB_PN2 V- NPTH1
3 6 1 2 USB_PP2_C 3 8
IN_2 OUT_1 14 USB_PP2 V+ NPTH2
2 7 1206 4 PTH2
IN_1 OUT_2 NC_90R-100MHZ_0R35
GND
1 8
1

GND OUT_3 C278 USB RECEPTACLE_4P

6
1

1
C279 C275 null G545B1P8U 0.1U_16V_K D19 FOX_UB11193-C1304-4H
0.1U_16V_K 1U_16V_K 0402_X7R R303 1 2 0402 NC1
2

0402_X7R 0603_X5R 0_J


2

NC2
NC_RSB12JS2

6
A A

CCPBG
Title
USB Connector x 3
Size Document Number Rev
Custom M9F1 0.1

Date: Wednesday, March 17, 2010 Sheet 27 of 44


5 4 3 2 1
5 4 3 2 1

+3VRUN

2
R285 NC_0_J USB_VCC6
R309 0603 +LED_VCC

32
0_J 1 2
CN15
0603

LVDS Conn.
1
F4 30 SMDFIX2
500mA 1 2 USB_VCC6 29 36

1
D C265 C324 28 NPTH2 D
6V-0.5A_1206 0.1U_16V_M 33P_50V_J 27

1
C270 C271 C272 0402_X5R

DUMMY PAD1
SMD1206P050TF 0402_NPO 26 37

2
10U_10V_Y 1U_10V_Y 470P_50V_K 25
0805_Y5V 0402_Y5V 0402_X7R 24

2
23
22
21
20 34
C266 1 2 NC_3.3P_25V_C 19

SMDFIX4
9 LVDS_CLKIN+ 0201_COH 18
9 LVDS_CLKIN- 17
C267 1 2 NC_3.3P_25V_C 16
9 LVDS_RXIN2+ 0201_COH 15
9 LVDS_RXIN2- 14
C268 1 2 NC_3.3P_25V_C 13
0201_COH 12
9 LVDS_RXIN1+
WEBCAM & DMIC 9 LVDS_RXIN1-
C269 1 2 NC_3.3P_25V_C
11
10 33

9
CN14 0201_COH 9

SMDFIX3
9 LVDS_RXIN0+
1 SMDFIX1 9 LVDS_RXIN0- 8
R308 1 0_J 2 0402 USB_PP6_F 2 7
14 USB_PP6 +LCDVCC 9 LDDC_DAT_EDID
R307 1 0_J 2 0402 USB_PN6_F 3 6
14 USB_PN6 9 LDDC_CLK_EDID

DUMMY PAD2
USB_VCC6 4 R312 1 2 INV_BRADJ 5 38
9 LCD_BLCTL
5 4
23 DMIC_DAT R412 1 22_J 2 0402 DMIC_DAT_F 6 POWER_CLOSE_GAP_0402 3
23 DMIC_CLK R413 1 22_J 2 0402 DMIC_CLK_F 7 R313 1 0_J 2 0805 +LCDVCC_C 2 NPTH1
35
8 SMDFIX2 1
SMDFIX1
1

1
C C382 C383 C326 HEADER_8P C273 C274 C325 C

10
180P_50V_J 180P_50V_J 33P_50V_J FOX_HS6108E-LH 0.1U_16V_M 10U_6.3V_M 33P_50V_J FPC CONN_30P

31
0402_NPO 0402_NPO 0402_NPO 0402_X5R 0603_X5R 0402_NPO FOX_GS12301-1011A-9H
2

2
MGND
Close to CN14
R310 1 0_J 2 0402
BFT Test Point for Camera (BOTTOM side)
tpc40t_75 TP147 USB_PP6_F
1
MGND LCD Core Power
tpc40t_75 TP148 1 USB_PN6_F +LCDVCC

tpc40t_75 TP149 1 USB_VCC6

tpc40t_75 TP150 1 DMIC_DAT_F

1
C276 C277
tpc40t_75 TP151 DMIC_CLK_F
Inrush 1500mA 4.7U_6.3V_K 0.1U_6.3V_K
1
normal 230mA 0603_X5R 0402_X5R

2
tpc40t_75 TP152 1
+3VRUN

U15
MGND 8 1
IN5 IN1
7 2

1
C281 IN4 OUT
6 3 LCD_LVDDEN 9
B
4.7U_6.3V_K 5 IN3 EN 4 B
IN2 GND
0603_X5R 9

2
THERMAL PAD
G5281RC1U_V0.1

+5VRUN
LED Backlight Power
1

+3VRUN
NC_0.01U_25V_M

R372
1

100K_J C372
0402
0402_X7R 2 Q29
2

2
2

S +LED_VCC
C331
G
NC_0.1U_10V_K 1 R373 2 1
1

+3VRUN 100K_J 0402 D


0402_X5R
FDN340P
3
3

null
5

U22 D
5

U23 1 Q30 R337 1 NC_0_J 2 0805 L14 +LED_VCC


19 BL_OFF# 2N7002.215 120R-100MHZ_0603
1 4 INV_ENABLE 1
19,20 LIDIN#
4 INV_ENABLE_1 2 G S null EBMS160808A121
1

2
2 C373 F6 C264 C280
9 LCD_BLEN
2

NC7SZ08P5 NC_0.47U_6.3V_M R374 1 2 0.1U_16V_M 0.1U_16V_M


3

NC7SZ08P5 null 0402_X5R 100K_J 0402_X5R 0402_X5R


3

1
A null 0402 6V-0.75A_1206 A
1206L075THYR
2

R315 1 NC_0_J 2 0402


R317 1 NC_0_J 2 0402

CCPBG
Title
LVDS & WEBCAM
Size Document Number