Department of Electrical and Electronics Engineering

Reg. No. :
MANIPAL INSTITUTE OF TECHNOLOGY, MANIPAL
(A Constituent Institute of Manipal University, Manipal)

FOURTH SEMESTER B.E. DEGREE MAKEUP EXAMINATION

(REVISED CREDIT SYSTEM: 2007)
15 July 2009
DIGITAL ELECTRONIC CIRCUITS (ELE 208)
Time: 3 hours Max. Marks: 50
Note : Answer any FIVE full questions.
Missing data, if any, may be suitably assumed.

1A. Consider a circuit where 4 input lines are used to represent a 4 bit binary number with A
as MSB and D as LSB. The binary inputs are fed to a logic circuit that produces a HIGH
output only when the binary number is greater than 01102 = 610. Implement this circuit
using NAND gates only. (04)

1B. Using Tabular method obtain a minimal sum expression for the following Boolean function.
f(w,x,y,z) = ∏M(0,2,3,4,5,12,13) + d(8,10) (06)

2A. Convert the number 56AB expressed in Hex to its equivalent gray code. (02)

2B. Perform 2’s complement multiplication of -6 x 7. (03)

2C. Find the minimal product-of-sums expression for the following logical expressions.
(i) F1(A,B,C,D) = ( 0,2,8,9,11,13,15) , ( 10, 14)
(ii) F2 (A,B,C,D) = ( 0,2,3,4,8,9,10,14) (05)

3A. Implement full adder with two half adders and residual gate. (03)

3B. Using VEM technique simplify the following expression

F(A,B,C,D,E)= Σm(0,2,4,5,8,9,12,13,17,24,25,27) + d(3,6,10,11,19,28,31) where E is the MEV (07)

4A. Construct an 8 bit binary adder using 74283. (03)

4B. Design and implement a combinational circuit that will work as follows:

S1 S0 Z

0 0 X plus Y

0 1 X plus Y1 plus 1

1 0 X and Y

1 1 X xor Y (07)

5A. Explain any three characteristics of digital ICs which are used to compare the performance. (03)

5B. Sketch a circuit to generate a 50 kHz clock signal with duty cycle 50% from a 20 MHz
signal. (03)

5C. Design an 4 bit self correcting ring counter whose states are 1110, 1101, 1011, 0111 using
universal shift register. (04)

6A. Construct the state diagram (Moore machine) for a sequential circuit that will detect the (04)

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 Department of Electrical and Electronics Engineering

serial input sequence X=010110. When the complete sequence has been detected, then
cause output Z to go high. Overlapping 010110 patterns can occur. Also draw the ASM
chart.

6B. Design a synchronous counter to count the sequence 000-010-100-001-011-000 using

positive edge triggered MN flip-flop whose function table is given below, using minimal
combinational circuit.

M N Qn+1

0 0 1

0 1 Q

1 0 Q

1 1 0 (04)

6C. What are the basic components of ASM charts?Explain. (02)

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