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Abstract Static converters design has to ensure that in Recently, a new structure 3L-SNPC (Stacked NPC)
all specific operating conditions the junction was developed [9-10]. This converter is a
temperature of power devices does not exceed the combination between 2 well-known 3L concepts (3L-
admitted limits. The junction temperature of power SC and 3L-NPC) and it improves the static
devices is a direct consequence of conduction and
conversion.
switching losses. The unequal distribution of losses
among the semiconductors represents one major This paper calculates and compares the losses in
disadvantage for 3L-SC (Stacked Cells) and 3L-NPC power devices between three 3L topologies: 3L-SC,
(Neutral Point Clamped) converters. The paper studies 3L-NPC and 3L-SNPC. The structures are composed
the loss distribution problem for 3L-SC and 3L-NPC by IGBT modules type Eupec FF200R33KF2C, and
topologies and proposes the 3L-SNPC (Stacked NPC) the clamp diodes are equivalent to the IGBT
converter to overcome this drawback. A numeric modules’ diodes. The switching states and
calculus method for the total losses in switches was commutations of the converters are analyzed and
developed in order to compare the analyzed structures. their influence on the balancing of losses within the
The 3L-SNPC converter allows the natural doubling of
converter is explained.
the apparent switching frequency and leads to a better
balancing of total losses. A numeric calculus method for total losses in switches
was elaborated to compare the studied structures. The
Keywords: Three-level converters, Power losses, analytic expressions for medium and effective currents
Voltage source converter. in conduction and switching states were also
calculated. A validation of these expressions was made
using PSIM simulations. The analysis made on the 3L-
1. INTRODUCTION
SC and 3L-NPC topologies proved that the losses in
Multilevel structures have been studied for over 25 middle side power devices (3L-SC) and the losses in
years and they represent an intelligent solution to inner switches (3L-NPC) increase simultaneously with
connect serial switches [1]. The first developed the reducing of the modulation index. This leads to the
topology consisted in a serial connection of single- increase of the junction temperature in power devices,
phase inverters with DC separate sources [2]. This which limits the converters output power and the
structure was followed by a stacked commutation switching frequency, especially at zero speed
cells concept in order to obtain a multilevel operating. The paper shows that 3L-SNPC structure
conversion (SC – Stacked Cells) [3-4]. Following the has more degrees of freedom and allows a better
SC structure, a new multilevel NPC (Neutral Point balancing of losses in power devices.
Clamped) topology was developed [5]. This is the
most popular multilevel conversion structure. The 2. POPULAR THREE-LEVEL STRUCTURES
3L-NPC converter are considered a particular way of
implementing the 3L-SC topology. The role of the 2.1. Three-Level SC Converter
middle switches in the 3L-SC structure is taken by
the inner switches and by the 2 clamp diodes. Later, The 3L-SC structure is made of 6 switches disposed
another invention [6] introduced the concept of the on three sides (Fig.1). Each switch is capable to
multilevel converter with flying-capacitors (FC – support a voltage equal to VDC/2. The exterior sides
Flying Capacitor). In the range of low and moderate are made of 2 switches serially connected and the
switching frequencies (200Hz – 1kHz), the 3L-NPC middle side is composed by 2 switches opposite
converter is especially advantageous because of the connected. The switches form 3 commutation cells
required flying-capacitor size, which is inversely controlled with D1, D2 and D3 duty cycles: cell 1 (S1-
proportional to the switching frequency. The 3L-NPC S1c), cell 2 (S2-S2c) and cell 3 (S3-S3c). A sinusoidal
structure performances were improved by developing PWM strategy was used in order to emphasize the
the 3L-ANPC (Active NPC) converter [7-8]. constraints applied to 3L-SC converter [9].
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Annals of the University of Craiova, Electrical Engineering series, No. 32, 2008; ISSN 1842-4805
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Annals of the University of Craiova, Electrical Engineering series, No. 32, 2008; ISSN 1842-4805
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VDC/2 VDC/2
Sd2 Sd1 Sd2 Sd1
Sr
O1+ P O2+ P O 1+
0 0
O1 - O2 - O1 -
Sr
N N
-VDC/2 -VDC/2
0 Ts 0 Ts
S1 S1
S1c S1c
S2 S2
S2c S2c
S3 S3
S3c S3c
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Output
Switching Switch Sequence mode when PF=1 and M=0.95 [Fig.7(b)]. In this
Voltage case, the total losses in the most stressed switches are
State S1 S1c S2 S2c S3 S3c
(vAO)
reduced with 20% in comparison with the other
-VDC/2 N 0 1 0 1 0 1
studied structures, without any additional
O1- 0 0 0 1 1 0 semiconductor expense.
O2- 0 1 1 0 0 1
0
O1+ 0 1 1 0 0 0
O2+ 1 0 0 1 1 0
VDC/2 P 1 0 1 0 1 0
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The expressions for conduction losses depend on the where, AswX, BswX, CswX and vdef – constants taken from
RMS load current (I). The paper presents an example the IGBT’s characteristics; ǻsw – ratio between the
to calculate the conduction losses in T1 transistor switching interval and the switching period for
from the S1 switch (3L-SC, 3L-NPC and 3L-SNPC). swX
semiconductor device; I avg swX
and I rms – average
The modulation function for T1 is sinusoidal:
and RMS values of the switched current through X
fT1 x M sin x , x >0,S @ (5) semiconductor, fs – switching frequency and vsw –
switched voltage.
The T1 transistor is in conduction during [T, S]
The expressions for switching currents also depend
interval. As a result, the average and RMS values of
on the commutation intervals and on the RMS load
the conduction current through T1 semiconductor can
current (I). The paper presents an example to
be written:
calculate the switching losses in T1 transistor from
1
S the S1 switch (3L-SC, 3L-NPC and 3L-SNPC). This
conT1
I avg ³ 2 I sinx T f T 1 x dx transistor switches on [T, S] interval. As a result, the
2S (6)
T average and RMS values of the switching current
I 2 M through T1 semiconductor can be written as follows:
>S T cos T sinT @
4 S S
swT 1 1
I avg ³ 2 I sinx T dx
1
S 2S
(12)
³
conT 1 2 T
I rms 2 I sinx T f T 1 x dx
2S (7) I 2
T
1 cosT
M ª 4 1 º 2S
I «1 cos T cos2 T »
2S ¬ 3 3 ¼ S
1
³ 2
swT 1
For the other switches, the conduction losses are I rms 2 I sinx T dx
2S
similarly calculated but the modulation functions and T (13)
the conduction intervals differ from a switch to 1 § sin2T ·
another for each structure. I ¨S T ¸
2S © 2 ¹
4.2. Switching losses
For the other switches, the switching losses are
The IGBTs designers deliver the characteristics for similarly calculated but the commutation intervals
the consumed energy at the turning off Eoff(IC) and differ from a switch to another for each structure.
the consumed energy at the turning on Eon(IC). These
characteristics depend on the switched voltage (vdef) 5. CONCLUSIONS
and on the switched current IC. For an entire
switching period, the total energy absorbed by a In this paper the distribution of losses among the
semiconductor device at vdef corresponds to the sum semiconductors in the three-level SC and NPC
of these energies: converters has been investigated. The analysis shows
Evdef I C Eon I C Eoff I C (8) an unequal distribution, which severely limits the
output power of the converter. The 3L-SC and 3L-
This sum (8) can be approximated with a parabola NPC concepts were extended to the 3L-SNPC
with AswX, BswX and CswX coefficients: concept, in order to overcome this drawback. A
numeric calculus method for total losses in switches
Evdef I swX swX
AswX BswX I avg swX
C swX I rms 2
(9) was elaborated to compare the studied structures and
the analytic expressions for average and effective
The following law of proportionality is used to take currents in conduction and switching states were also
into account the real commutation voltage (vsw) for calculated. A validation of these expressions has been
transistors: made using PSIM simulations.
v sw The 3L-SNPC converter has more degrees of
Evdef v sw , I swX v def
Evdef I swX (10) freedom and can be controlled with different PWM
strategies. The sinusoidal PWM strategy described in
For a semiconductor device that switches at fs on 'sw the paper presents new switching states and
interval, the switching losses can be written as commutations that enable a substantial improvement
follows: of the unequal distribution. The performances of this
PWM strategy have been compared with other 3L
v sw §
PswX fs swX swX
¨ AswX ' sw BswX I avg C swX I rms
v def ©
·¸¹ (11)
2
structures. The total losses in 3L-SNPC converter are
not smaller, but a better balancing of losses is
obtained. The 3L-SNPC topology allows the natural
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doubling of the apparent switching frequency, Inverters”, IEEE Power Electronics Specialist
similarly with the 3L-FC concept. This represents an Conference, 1992, pp.397-403.
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does not have flying-capacitors. level voltage source inverters applying active
NPC switches, Proc. IEEE PESC, Vancouver,
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