Summer 12 Solution

MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION
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(ISO/IEC - 27001 - 2005 Certified)
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SUMMER – 12 EXAMINATIONS
Subject Code: 12188 Model Answer
Q.1 Attempt Any Five.
a. Block diagram of basic digital communication system - 2 marks.
Block Explanation- 2 marks

It consist of following block
1) Information source- it may be in analog forming. Output of microphone gives analog signal. And
if source is computer data then it is a digital form.
2) Source encoder- the source encoder converts the signal produced by the information source into
DataStream. If i/p signal is analog it can be converted in to digital form using a to d converter. If the
i/p to the source encoder is a stream of symbols it can be converted into a stream of 1s and 0s using
some coding mechanism.
3) Channel Encoder- if we have to encode the information covertly, even if errors are introduced in
the medium. We need to put some additional bits in the source, so that additional information can be
used to detect and coolest the errors, this process of adding bits is done by channel encoder. In
channel encoding redundancy is introduced so that at the receiving end the redundancy is introduced
so that at the receiving end redundant bit can be used for error detection and error correction.
4) Modulator- here the modulation is done for transferring the signal, so that the signal I can be
transmitted through the medium easily.
5) Channel-it is the medium through winch the o/p of modulator along with some noise is
transmitted and gives to demodulator. This channel is called discrete channel because its input as well
as o/p both are in discrete nature.
6) Demodulator- it performs inverse operation than that of modulator.
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7) Channel decoder- it checks the received bits and also detect and correct the errors, using
additional data introduced by channel encoder.
8) Source decoder-it converts the bit stream in to actual information, here digital to analog
conversion is done if the symbols are coded in to is and os at the source decoder the bits are
converted in to symbols.
9) Information sink-here the information sink absorbs the original information.
Q.1b) Statement of sampling theorem - 2 marks.

it states that a continuous time signal x(t) can be completely represented in its sampled form,
frequency of the information x(t). [fs≥2w]
Nyquist rate- 2 marks.
It states that the maximum sampling rate for a signal x(t) is 2 w samples per second having maximum
frequency of wh2 is called newts rate
Q.1C) Comparison between ask with FSK (any 4 points 4 marks).
Parameter Ask FSK
Variable characteristic Amplitude Frequency
Bandwidth requirement Less More
Noise immunity Low High
Error probability High Low
Bitrate Suitable up to 100 birts/see Suitable up to above
Nature of wave form
Q.1d) 1) Bit rate- 2marks

It’s the number of bit transmitted or sent one second .its unit is bits per second. If bit duration is
‘tb’then bit rate will be 1/tb
2) Baud rate- 2 marks.
Baud is the unit of signaling speed or the rate of symbol transmission or it indicates the rate at which
a signal level changes over a given period of time.
Q.1e) Advantages of TDMA over FDMA (any 4 points 4 marks).

1) In TDMA since only one station is present at any given time so the crosstalk will avoided this is
present in FDMA.
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2) The entire channel band which can be allocated to signal channel at given instant of time so the
data transmission speed is high.
3) TDMA by default can work well with digital; therefore it can be easily used for digital data
transmission.
4) As only one channel is Bing transmitted at time it is not necessary to separate out various
channels at the receiver.
5) in the TDMA since only one station present at any given time, the generation of inter symbol
interference will not take place .
Q.1 f) Application of S. S. modulation- (any 4 points – 4 marks.)
1) In combating the intentional interference or jamming.
2) In rejecting the unintentional interference from some other user.
3) To avoid the self-interference due to multipath propagation.
4) In low probability of intercept (LPI) signals.
5) In obtaining the message privacy.
Q.1 g) Frequency hopping-
Principle of operation frequency hopping system. (Principle 1 mark)
In this system the data is used to modulate. A carrier the data modulated carrier is then randomly
hopped from one frequency to the other.
Type of frequency hopping - (3 marks-1½ for each.)
Depending on the rate of frequency hopping, there are two types.
1) Slow frequency hopping.
2) Fast frequency hopping.
Slow frequency hopping-
In slow frequency hopping the symbol rate Rs of the MFSK signal is an integer multiple of the hop
rate Rn that means several symbols are transmitted corresponding to each frequency hop.
Each frequency hop: → several symbols
Here frequency hopping takes place slowly.

Fast frequency hopping-
In this hop rate Rn is an integer multiple of the MFSK symbol rate rs
It means during the transmission of the one symbol the carrier frequency will hop several time.
Each symbol transmission: → several frequencies hops so here frequency hopping takes place at fast
rate.
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Q.2 Attempt any two.

a) Block diagram of PCM transmitter – 3 marks
Explanation of Blocks: - 3 marks.

1) Band limited filter: The analog signal x(t) is passed through band limiting low pass filter,
having cutoff frequency fc= W Hz, where “W” is maximum frequency of x(t) it will eliminate
the possibility of aliasing error.
2) Sample and Hold circuit: The output of the filter is connected to sample and hold circuit and
other input for this block is carrier signal having sampling frequency fs≥2W. So at the output
flat top PAM is generated.
3) Quantizer: Flat top PAM signals are input for quantizer for quantization. It is the process of
approximation or rounding the value of respective sample in to a finite number this will use to
reduce the data bits, the combined effect of sampling and quantization produces quantized
PAM signal at output of qunatizer block
4) A to D converter (Encoder): The quantized PAM pulses which are analog in nature are
applied to an encoder circuit which is basically the binary A to D converter; here each
quantization level is converted to an N bit digital word. Where N can be 8, 16, 32.
5) Parallel to serial converter: For transmission of PCM signal through wire, a serial
communication is used in that bit by bit transmission is there, but the output of A to D
converter is parallel so to convert that parallel output to a stream of bits the output is
connected to parallel to serial converter.
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Waveforms: 2 marks
Q.2 b) Draw and explain block diagram of PSK transmitter.

Block diagram of BPSK transmitter with waveforms: (4 marks)
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Explanation of blocks:- (4 marks)

1) Bipolar NRZ encoder: The binary digital signal 0 and 1 is converted in to a bipolar signal
using NRZ encoder which generates 1 when unipolar data is “1” and -1 when unipolar data is
“0”. It is applied to a multiplexer called balanced modulator.
2) Balanced modulator: Its one input is output is bipolar NRZ encoder and other input is carrier
signal √2 Ps Cos ώct and the output of balanced modulator is BPSK signal which is given by
VBPSK= b(t) √2Ps Cos (ώct+Θ)
So when d(t)=1, so b(t)= 1 so
VBPSK= b(t) √2Ps Cos (ώct+Θ)
When d(t)=0 so b(t)= -1 so
VBPSK= - √2Ps Cos (ώct+Θ)= √2 Ps sin (ώct+Θ)
So using BPSK modulator we change phase of the carrier between 00 and 1800, for input bit 1
and 0 respectively.
Q.2C) State the need of multiplexing. Explain TDM technique with relevant diagram.
Need of multiplexing 2 Marks
In the application like telephony there are large numbers of users involved. It is not possible to lay a
separate pair of wires from each subscriber to the other entire entire subscriber; this is very expensive
and practically impossible.
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In the Process of multiplexing two or more individual signals are transmitted over a single
communication channel. Here we used medium as a coaxial cable or an optical fiber cable because of
multiplexing bandwidth utilization is possible.
Time division multiplexing: (definition 1 mark)
It is a process that allows several channels to share the entire bandwidth of the link instead of sharing portion
of bandwidth as in FDM.
(Diagram 2½ marks and explanation 2½ marks)
IN SYNCHRONUS TDM DATA units from each input connection is collected in to a frame. If we have ‘n’
connection a frame is divided in to `n` time slots and one slot is allowed for each unit. One for each input line,
if the duration of input is T , the duration of each slot is T/n and the duration of each frame is T.
The data rate of the output link must be n times the data rate of a connections to th flow of data.
In dig. Data rate of the link is three times. The data rate of the connection , the duration of a unit on a
connection is 3 times that of the time slot.
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Q.3 (a) Attempt any TWO
a) List advantages and disadvantages of digital communication. State Shannon-Hartley theorem for
channel capacity.
Advantages of digital communication (Any 2 points -2 marks)
 Noise Immunity
 Digital signals are better suited than analog signals for procession and combining using
technique called multiplexing.
 Digital transmission systems are more resistant to analog systems to additive noise because
they use signal regeneration rather than signal amplification.
 Digital signals are simpler to measure and evaluate than analog signals.
 In digital systems transmission errors can be corrected and detected more accurately.
 Using data encryption only permuted receivers can be allowed to detect the transmission data.
 Wide dynamic range.
 Because of the advances of IC technologies and high speed computers, digital communication
systems are simpler and cheaper.
 Digital communication is adaptive to other advance branches of data processing such as

digital.
Disadvantages of Digital Communication (Any 2 points- 2 marks)
 The transmission of digitally encoded analog signals requires significantly more bandwidth.
 Digital transmission requires precise time synchronization between the clocks in the
transmitter and receiver.
 Digital transmission systems are incompatible with older analog transmission systems.
Shannon-Hartely theorem for channel capacity
 The capacity of a channel with bandwidth B and additive Gaussian band limited white
noise is (2 marks for statement)
C=B log2 (1+S/N) bits/sec (2 marks for equation)
Where,
S & N are the average signal power and noise power respectively at the output of channel
N=ηB if the two sided power spectral density of the noise is η/2 watts/Hz)
B= channel bandwidth
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Q.3 (b) Draw and explain B.D. of Delta modulation and explain slope overload and granular noise
occurred in DM.
(Any of the transmitter OR receiver is written then marks should be given)
Delta modulation transmitter (2 marks for diagram)
(2 marks for explanation)
 In fig(1) the input analog is sampled and converted to PAM signal, which is compared with
the output of DAC.
 The output of DAC is a voltage equal to regenerated magnitude of the previous sample, which
was stored in the up-down counter as a binary number.
 The up-down counter is incremented or decremented depending on whether the previous

sample is larger or smaller than the current sample.
 The up-down counter is clocked at a rate equal to the sample rate. Therefore up-down counter
is updated after each comparison.
 Initially, the up-down counter is zeroed, and the DAC is outputting 0V. The first sample is
taken, converted to a PAM signal, and compared with zero volts.
 The output of comparator is a logic 1 condition (+V), indicating that the current sample is
larger in amplitude than the previous sample.
 On the next clock pulse, the up-down counter is incremented to count of 1. The DAC now
outputs a voltage equal to the magnitude of the minimum step size (resolution).
 With the input signal shown, the up-down counter follows the input analog signal up until the
output of the DAC exceed the analog sample; then the up-down counter will begin counting
down until the output of DAC drops below the sample amplitude.
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Delta modulation Receiver (2 marks for diagram)
 The receiver is almost identical to the transmitter except for the comparator.
 As the logic 1s and 0s are received, the up-down counter is incremented or decremented
accordingly. The output of the DAC in the decoder is identical to the output of the DAC in the
transmitter.
 With delta modulation each sample requires the transmission of only one bit; therefore the bit
rates associated with the delta modulation are lower than conventional PCM systems.
Slope overload noise (2 marks)
 When the analog input signal changes at a faster rate than the DAC can maintain. The
slope of the analog signal is greater than the delta modulator can maintain is called slope
overload.
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 Increasing the clock frequency reduces the probability of slope overload occurring.
Another way to prevent slope overload is to increase the magnitude of the minimum step
size.
Granular noise (2 marks)
 When the original analog input signal has relatively constant amplitude, the reconstructed
signal has variations that were not present in the original signal. This is called granular noise.
 Granular noise can be reduced by decreasing step size.
Q.3 C) Draw B.D. of QAM receiver and explain in detail.

(4 marks for diagram)
 Fig above shows a block diagram of an 8-QAM receiver.
 The power splitter directs the input 8-QAM signal to the I and Q product detectors and the
carrier recovery circuit.
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 The carrier recovery circuit reproduces the original reference oscillator signal. The incoming
8-QAM signal is mixed with the recovered carrier in the I product detector and with a
quadrature carrier in the Q product detector.
 The output of the product detectors are 4-level PAM signals that are fed to the 4 to 2 level
analog-to-digital converters (ADCs).
 The outputs from the I channel 4-to-2 level converter are the I and C bits, whereas the outputs
form Q channel 4-to-2 level converter are the Q and C bits.
 The parallel to serial logic circuit converts the I/C and Q/C bit pairs to serial I,Q and C output
data streams.
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(4 marks)
(Any relevant explanation for above diagram should also be considered and given
marks)
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Q.4 (a) Draw and explain PWM transmitter.
(4 marks for diagram)
 The block diagram of above fig. can be used for the generation of PWM as well as PPM.
 A saw tooth generates a saw tooth signal frequency f s, therefore the saw tooth signal in this
case is a sampling signal. It is applied to the inverting terminal of the same comparator.
 The modulating signal x(t) is applied to the non-inverting terminal of the same comparator.
 The comparator output will remain high as long as the instantaneous amplitude of x(t) is
higher than that of the ramp signal.
 This gives rise to a PWM signal at the comparator output as shown in waveform below.
 The leading edges of PWM signal are always generated at fixed time instants. However the
occurrence of its trailing edges will be dependent on the instantaneous amplitude of x (t).
 Therefore this PWM signal is said to be trail edge modulated PWM.
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Q.4 (b) Draw and explain DPSK receiver.
(4 marks)
 Differential phase shift keying (DPSK) is an alternative form of digital modulation where
the binary input information is contained in the difference between two successive signaling
elements rather than the absolute phase.
 Fig. above shows block diagram and timing sequence for a DBPSK (DPSK) receiver.
 The received signal is delayed by one bit time, then compared with the next signaling element
in balanced modulator.
 If they are the same, a logic 1 (+ voltage) is generated. If they are different, a logic 0 (-
voltage) is generated.
 If the reference phase is incorrectly assumed, only the first demodulated bit is in error.
Differential encoding can be implemented with higher than binary digital modulation
schemes, although the differential algorithms are much more complicated than for DBPSK.
 The primary advantage of DBPSK is the simplicity with which it can be implemented. With
DBPSK no recovery circuit is needed.
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Q.4 C) List error detection methods in digital communication and explain any one method in
detail with example.
Error detection methods (2marks for names of error detection method)
 Redundancy Checking
 Vertical Redundancy Checking (VRC)
 Checksum
 Longitudinal Redundancy Checking (LRC)
 Cyclic Redundancy Check (CRC)

(2 marks for explanation of method and 4 marks for example (with any other data) for any one
method described below)
1) Vertical Redundancy Check (VRC): VRC is probably the simplest error-detection scheme
and is generally referred to as character parity or simple parity. With character parity, a single
parity bit is added to each character to force the total number of logic 1s in the character,
including the parity bit, to be either an odd number (odd parity) or an even number (even
parity).
Example: (example for odd parity should also be considered and given marks)
As shown in example above, the message consists of total 8 bits i.e b1 to b8. Bits b1 to b7 are used
for ASCII code of the character and bit b8 is used for parity bit. For example ASCII code of K is
1101001. This contain even number of 1s. Hence the 8th parity bit has 0 values
2) Longitudinal Redundancy Check (LRC): LRC is a redundancy error detection scheme that
uses parity to determine if a transmission error has occurred within the message and therefore
called ad message parity. b0 from each character in the message is XORed with b0 from all
other characters in the message. Similarly, b1,b2, and so on are XORed with their respective
bits from all the characters in the message.
As shown in the example below the message blocks are arranged in the form of rows and
columns. And then parity bits are calculated for each column as shown.( logic 1 if number of
1s are odd and logic 0 if number of 1s are even). And then the entire block generated with
parity is transmitted with data message as shown.
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3) Cyclic Redundancy Check (CRC): With CRC the entire data stream is treated as long
continuous binary number. In this method, a sequence of redundant bits, called the CRC or the
CRC remainder, is appended to the end of the unit so that the resulting data unit becomes
exactly divisible by a second, predetermined binary number.
At its destination, the incoming data unit is divided by the same number. If at this step there is
no remainder, the data unit assume to be correct and is accepted, otherwise it indicate that data
unit has been damaged in transmission and therefore must be rejected
The redundancies bits are used by CRC are derived by dividing the data unit by a
predetermined divisor. The remainder is the CRC.
Sender
A polynomial should be selected according to the following rule:-
1. It should not be divisible by x.
2. It should be divisible by x+1.
001
4) Checksum: In this method each character has a numerical value assigned to it. The
characters within a message are combined together to produce an error-checking character
(checksum), which can be as simple as the arithmetic sum of the numerical values of all the
characters in the message.
The checksum is appended to the message end of the message. The receiver replicates the
combining operation and determines its own checksum. The receiver’s checksum is compared
to the checksum appended to the message, and if they are same, it is assumed that no
transmission errors have occurred.
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Q. 5.a) i) Compare PAM and PWM (4 pts.)

(Any four points are considerable. Each point contains 1 Mark)
PAM PWM
1) It is called as pulse amplitude modulation It is called as pulse with modulation. Pulse

duration modulation or pulse length modulation
2) In this modulation, the amplitude of In this modulation the width of the constant
carrier of the constant width, constant – position pulse is varied according to the
position pulse is varied according to the amplitude of the analog signal at the time
amplitude of the sample of analog signal. sampling
(i.e. modulating signal)
3) The PAM scheme is as shown below The PWM scheme is as shown below
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4) The maximum amplitude of analog signal The maximum amplitude of analog signal
produces highest pulse and the minimum produces widest pulse and the minimum analog
analog signal amplitude produces shortest signal amplitude produces narrowest pulse
pulse.
5) Noise immunity is less Noise immunity is high
6) This scheme is not suitable for long This scheme can be used efficiently for long
distance communication distance communication
7) The required transmitted power varies The transmitted power varies with the width of
with the amplitude of the pulses. the pulses
8) Require bandwidth is low Require bandwidth is high
9) Complex circuit for generation & Easy circuit for generation & detection
detection
Q.5.a) ii) List four advantages of pulse modulation over continues wave modulation
(Each point carries 1Mark)
1) CW modulation translates message from baseband to pass band where as pulse modulation
translates message from analog form to discrete form. Hence message remains in baseband
form.
2) The performance of pulse modulation is very good in presence of noise, as compare to the
CW modulation techniques.
3) Due to better noise performance, less signal power is sufficient to cover large area of
communication.
4) This technique is most preferred for communication between space ships & earth. While CW
techniques are used in radio & TV broadcasting.
Q.5.b) Explain hamming code with suitable Example.
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Ans.[Explanation 4 marks, example 4marks. Marks should be given for any appropriate
assumed data]
The hamming codes are error detecting and correcting codes used for avoiding the transmission errors in
synchronous data streams. The hamming codes are forward Error Correcting codes (FEC) which requires
addition of overhead bits to the message bits. These extra bits are called as hamming bits which are inserted
into message bits at random locations and the location must be known to sender as well as receiver. The
combination of message bit and hamming bit is called as hamming codes. To calculate the number of
redundant hamming bits necessary for a given message length, a relationship between message bits and
hamming bits must be established. As shown in fig below a data unit contains message bits and n hamming bits
to form m+n data unit.
To identify
which bit is in
error, n hamming bits
must be able to
indicate m+n+1
different code. of the m+n codes, one code indicate that no errors have occurred, and the remaining m+n codes
indicate the bit position where an error has occurred. Therefore,m+n bit position must be identified with n bits.
Since n bits can produce 2ndifferent codes, 2n must be equal to or greater than m+n+1. Therefore, the number of
hamming bits is determined by the following expression:
2n m+n+1
Where, n= number of hamming bits
M= number of message bits
A seven bit ASCIIcharacter requires four hamming bits as 2 4> 7+4+1. Hence ASCII data with hamming bits
requires 11 bits transmission per ACII character.
For example:
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[Explanation 4 marks and example 4 marks, any relevant data assumed by student should be given
marks]
Hamming codes are basically linear block codes. it is an error correcting code. The parity bits are inserted in
between the data bits as shown below.
D7 D6 D5 P4 D3 P2 P1
7bi 6bit 5bit 4bit 3bit 2bit 1bit 7-bit hamming code
t
Where D-data bits and P- parity bits
The hamming coded data is then transmitter. At the receiver it is coded to get the data back.
The bits (1, 3, 5, 7),(2,3, 6, 7) and (4, 5, 6,7) are checked for even parity( or odd parity), if all the 4-bit groups
mentioned above possess the even parity (or odd parity) then the received code word is correct but if the parity
is not matching then error exist. Such error can be located by forming a three bit number out of three parity
checks. This process can be well explained by following example,
For example: Suppose a 7-bit hamming code is received as 1110101 and parity used is assumed to be even
.hence we can detect and correct the code as
Step1: Received 7bit hamming code is applied to hamming code format as
D7 D6 D5 P4 D3 P2 P1
1 1 1 0 1 0 1
Step2: Check bits for P4 bit
i.e. P4 D5 D6 D7
0 1 1 1 = odd parity hence error
So, P4=1
Step 3: check bits for P2bit
i.e. P2 D3 D6 D7
0 1 1 1 = odd parity hence error
So, P2=1
Step 4: check bits for P1 bit
i.e. P1 D3 D5 D7
1 1 1 1 = even parity hence no error
So, P1=0
Hence the error word is P4 P2 P1 E=
1 1 0
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Step 5: decimal equivalent of 110 is 6 hence 6thbit is incorrect so invert it and the correct code word will be,
D7 D6 D5 P4 D3 P2 P1
1 0 1 0 1 0 1
Hence by using this method we can detect as well as correct the error in the transmitted coed word.
But it can locate a single bit error and fails in detecting the burst error.
Q.5 C) Define FDM. Draw and Explain block diagram of FDM.
(Definition with diagram 2 marks)
Ans. Frequency Division Multiplexing (FDM) is based on the idea that number of signals can share the
bandwidth of a common communication channel. The multiple signals to be transmitted over this channel are
each used to modulate a separate carrier. Each carrier is on a different frequency. The modulated carrier are
then added together to form a single complex signal that is transmitted over the single channel. The spectrum
of the FDM signal is as shown below.
(Block diagram of multiplexer and demultiplexer FDM; 3 marks; and 3 marks for explanation)
Block diagram of multiplexer of FDM:
Fig shows a general block diagram of FDM system. Each signal to be transmitted is fed to modulator circuit.
The carrier for each modulation fc is on a different frequency. The carrier frequencies are equally spaced from
one another over a specific frequency range. Each input signals given portion of the bandwidth. Another
standard modulation like AM, SSB, FM or PM can be done.
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(Explanation 3 marks)
The modulator output having side band information are added together in a linear mixer in which all the
signals are simply added together algebraically. The resulting output signal is composite of all carriers
containing their modulation. This signals transmitted over single communication channel.
Block diagram of de multiplexer of FDM:
The receiving portion of FDM is as shown below. A receiver picks up the signal and demodulates it. This is
sent to a group of band pass filter. Each centered on one of the carrier frequencies. Each filter passes only its
channel and rejects all other.
A channel demodulator then recovers each original input signal. The example of FDM system is Telemetry,
telephone and FM stereo.
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Q.6 Attempt any Four.
A) Draw the block diagram of DPCM.
[Each fig 2 marks. Any relevant diagram should be considered and given marks]
DPCM transmitter
DPCM receiver
Q.6 b) Describe the ASCII code in brief.
[Any relevant description should be given 2 marks; table / examples contain 2 marks]
Ans: ASCII is the standard character set for source coding the alphanumeric character set that humans
understand but computer do not (computer only understand 1s and 0s). ASCII is a seven-bit fixed-
length character set. With the ASCII code, the least-significant bit (LSB) is designated b0 and the
most-significant bit (MSB) is designated b7 as shown here:
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b7 b6 b5 b4 b3 b2 b1 b0
MSB LSB
Direction of Propagation
The terms least and most significant are somewhat of a misnomer because character codes do not
represent weighted binary numbers and, therefore, all bits are equally significant. Bit b7 is not part of
the ASCII code but is generally reserved for an error detection bit called parity bit.
With character codes, it is more meaningful to refer to bits by their order than by their positions; b0 is
the zero-order bit, b1 is first-order bit, b7 the seventh- order bit, and so on. However with serial data
transmission, the bit transmitted first is generally called the LSB. With ASCII, the lower order bit (b0)
is transmitted first. ASCII is probably the code most often used in data communication network today.
Q.6 c) Explain the concept of WDM.
(Explanation 3 marks for any 3 points, diagram 1 mark)
 WDM is referred to as wave-division multiplexing.
 WDM involves the transmission of multiple digital signals using several wavelengths without
their interfacing with one another
 WDM is a technology that enables many optical signals to be transmitted simultaneously by a

single fiber cable.
 WDM is accomplished by modulating injection laser diodes that are transmitted highly
concentrated light waves at different wavelengths (i.e., at different optical frequencies).
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 WDM is coupling light at two or more discrete wavelengths into and out of an optical fiberEach
wavelength is capable of carrying vast amounts of information in either analog or digital form,
and the information can already be time or frequency-division multiplexed.
 The carrier with WDM is in essence a wavelength rather than a frequency.
 The wavelength spectrum used for WDM is in the region of 1300 or 1500 nm.
 Figure of wavelength division multiplexing is shown below
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Q.6 d) Compare slow frequency and fast frequency hopping.
[Any four relevant points is considered and 1 mark should be given to each point]
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Sr. Slow frequency hopping Fast frequency hopping
no.
1 In this technique, more than one symbols are In this, more than one frequency hops are required
transmitted per frequency hop. to transmit one symbol.
2 Chip rate is equal to the symbol rate. Chip rate is equal to the hop rate.
3 Symbol rate is higher than the hop rate. Hop rate is higher than the symbol rate.
4 Same carrier frequency is used to transmit one or One symbol is transmitted over multiple carriers in
more symbols. different hops.
5 A jammer can detect this signal if the carrier A jammer cannot detect this signal because one
frequency in one hop is known. symbol is transmitter using more than one carrier
frequencies.
Q.6 e) Draw and explain Spread Spectrum Modulation system.
[Relevant Diagram should be given 2 marks, Explanation 2 marks].
Ans. There are some applications where it is necessary for the communication system to resist external
interference and to make it difficult for unauthorized recievers to receive the message being transmitted. Such
type of communication can be achived by technique called Spread Spectrum Modulation. In this technique, the
spectrumof the transmitted data is increased intentionally by adding a psudeo random signal (i.e. special code)
so that it appears as the noise to unauthorized user, without affecting the original message signal.
The blcok diagram of the ssm system is as shown below. (2 marks)
The binary
information sequence is input to the channel encoder on transmitter side. The channel encoder encodes this
input sequence according to some error control coding technique. The coded sequence is then given to the
modulator. The modulator gets pseudo-random or pseudo-noise (PN) sequence from pseudo-random pattern
generator. This pseudo-noise sequence spreads the signals randomly over the wide frequency band. The signal
at the output of modulator is the spread spectrum modulated signal. The signal is then transmitted over some
channel.
At the receiver the demodulator gets the coded signal back from the spread spectrum signal. For this purpose
the demodulator requires the same pseudo-noise sequence which was used at the transmitter end. Hence the
pseudo-random pattern generator at the transmitter and receiver side operates in synchronization with each
other. The channel decoder at the receiver then gets the binary information sequence back.
27
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Thus the receiver can detect the transmitted spread spectrum signals only if it knows the pseudo-noise
sequence. For any arbitrary receiver is difficult to know the pseudo-noise sequence since it appears like noise.
The pseudo-noise sequence at the modulator is used with the PSK modulation to shift the phase of the PSK
signal pseudo-randomly. Such technique is called direct sequence (DS) spread-spectrum modulation. Is it also
called pseudo-noise (PN) spread modulation. When the pseudo-noise sequence in the modulator is used in
conjunction with M-ary FSK to shift the frequency to FSK signal pseudo randomly, the techniques is called
frequency hopped (FH) spread spectrum method.
Q.6 f) Describe PN Sequence in brief.
(Fig. 2 marks, relevant explanation 2 marks)
Ans. The PN sequence, also known as pseudo-noise or pseudo random sequence is a noise like high
frequency signal. This signal is binary signal looks like random pulses. The sequence is not
completely random but it is generated by well-defined logic. The same logic is use at the transmitter
as well as receiver. It can be generated by a shift register and the combinational logic circuit. The
generalized block diagram of PN sequence generator scheme is as shown below.
The shift register consists of ‘m’ flip-flops. The data of one flip flop is given to the next flip flop whenever
clock pulse is applied. The output of the flip flop is given to the logic circuit. Depending upon the output of the
flip flops the output of the logic circuit is decided. This logic circuit output is given as input to the first flip flop
of shift register. The PN sequence is generated at the output of the last flip flop in the shift register. At each
pulse of the clock the state of the flip flop is shifted to the next flip flop and logic circuit output is shifted in the
first flip flop.
The PN sequence generate at the output of the flip-flop repeated after 2 m digits. This is because the shift
register will have 2m states. Those states start repeating after 2 m, hence output sequence will also repeats after
2m bits. 2m is also called period of the output sequence.
Logic circuits are nothing but mod-2 adders. If shift registers enters into zero state, it will not come out of it
and output sequence will be of zero only. To prevent this problem, the zero states of the shift registers are not
allowed. Therefore total number of states of m-state feedback register will be 2 m-1. Therefore the output of PN
sequence will also have period of 2m-1 bits.
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MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION

Block Explanation- 2 marks

Q.1b) Statement of sampling theorem - 2 marks.

Parameter Ask FSK

Variable characteristic Amplitude Frequency

Bandwidth requirement Less More

Noise immunity Low High

Error probability High Low

Bitrate Suitable up to 100 birts/see Suitable up to above

Nature of wave form

Q.1d) 1) Bit rate- 2marks

Q.1e) Advantages of TDMA over FDMA (any 4 points 4 marks).

Here frequency hopping takes place slowly.

Q.2 Attempt any two.

Explanation of Blocks: - 3 marks.

Q.2 b) Draw and explain block diagram of PSK transmitter.

Explanation of blocks:- (4 marks)

VBPSK= b(t) √2Ps Cos (ώct+Θ)

So when d(t)=1, so b(t)= 1 so

VBPSK= b(t) √2Ps Cos (ώct+Θ)

When d(t)=0 so b(t)= -1 so

VBPSK= - √2Ps Cos (ώct+Θ)= √2 Ps sin (ώct+Θ)

Need of multiplexing 2 Marks

(Diagram 2½ marks and explanation 2½ marks)

 Wide dynamic range.

 Digital communication is adaptive to other advance branches of data processing such as

Shannon-Hartely theorem for channel capacity

(2 marks for explanation)

 The up-down counter is incremented or decremented depending on whether the previous

(2 marks for explanation)

 Granular noise can be reduced by decreasing step size.

Q.3 C) Draw B.D. of QAM receiver and explain in detail.

(4 marks for explanation)

 Fig above shows a block diagram of an 8-QAM receiver.

(4 marks for explanation)

 Therefore this PWM signal is said to be trail edge modulated PWM.

(4 marks for explanation)

Error detection methods (2marks for names of error detection method)

 Vertical Redundancy Checking (VRC)

 Longitudinal Redundancy Checking (LRC)

 Cyclic Redundancy Check (CRC)

Q. 5.a) i) Compare PAM and PWM (4 pts.)

1) It is called as pulse amplitude modulation It is called as pulse with modulation. Pulse

5) Noise immunity is less Noise immunity is high

8) Require bandwidth is low Require bandwidth is high

Q.5.b) Explain hamming code with suitable Example.

Where, n= number of hamming bits

M= number of message bits

Step1: Received 7bit hamming code is applied to hamming code format as

Step2: Check bits for P4 bit

0 1 1 1 = odd parity hence error

Step 3: check bits for P2bit

0 1 1 1 = odd parity hence error

Step 4: check bits for P1 bit

1 1 1 1 = even parity hence no error

Hence the error word is P4 P2 P1 E=

Q.5 C) Define FDM. Draw and Explain block diagram of FDM.

(Definition with diagram 2 marks)

Block diagram of multiplexer of FDM:

Block diagram of de multiplexer of FDM:

A) Draw the block diagram of DPCM.

Q.6 b) Describe the ASCII code in brief.

Q.6 c) Explain the concept of WDM.