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DIFFERENTIATION OF MATERIALS
All the materials can be mainly classified into three types depending on the
energy gap between the valence band and the conduction band in their atomic
structure. They are:
• Conductors
• Semi conductors
• Insulators
The variation of the energy gap can be shown by the following diagram:
ENERGY DENSITY:
If represents the number of free electrons per cubic meter whose energies lie in
the energy interval dE, and is the density of electrons in this interval then the
relation between these terms can be given as:
= (1)
It is assumed that there are no potential variations within the metal. Hence there
must be same number of electrons in each cubic meter of the metal. That is the
density in space is a constant. However, within each unit volume of metal there will be
electrons having all possible energies. This distribution of energy is expressed by .
= ( ) ( ) (2)
, where N (E) is the density of states in the conduction band and ( ) is the probability
that the state with energy E is occupied by an electron. It is called Fermi Dirac
function.
1
( )=
1+e
, where k: Boltzmann constant in eV/0K.
T: Temperature in 0Kelvin
EF: Fermi level or characteristics energy for the crystal in eV.
E: Energy level occupied by an electron in eV.
2 2
=2 (1.60 × 10 ) =2
ℎ ℎ
, which is called the effective density of states function in the conduction band.
( / ]
= − ) exp[−( − )/
∞
On simplification,
= [−( − )/ ]
, where
2 2
=2 (1.60 × 10 ) =2
ℎ ℎ
exp[−( − )/ ] = exp[−( − )/ ]
+ −2
= exp
Taking the logarithm of both sides,
+ −2
ln =
Hence
+
− = ln
2 2
If the effective masses of electron and hole are equal,
=
Then, the Fermi level,
+
=
2
Extrinsic semi conductor:
• In n-type semi conductor, a donor impurity is added.
• Each donor atom donates one free electron available in the conduction band.
The donor energy level corresponding to the donor impurity added is just below
the conduction band.
• This donor level is indicated as and its distance is 0.01 eV, below the
conduction band in Ge, while it is 0.05 eV below that in Si.
• Due to abundant free electrons, the probability of occupying the energy level by
the electrons towards the conduction band is more.
• So, in n-type material, the Fermi level EF shifts towards the conduction band.
But it is below the donor energy level.
If is the concentration of donor ions,
≅
= exp[−( − )/ ] ⇒ = e[ ( )/ ]
ln =( − )
= − ln
So, the Fermi level EF shifts towards the conduction band in n-type semi
conductor.
• As per similar reason, the Fermi level shifts towards the valence band in p-type
semi conductor. It lies above the acceptor energy level.
• The doped material is always electrically neutral as the total no. of electrons is
equal to the total no. of protons, after the addition of impurity.
If is the concentration of donor ions,
≅
= exp[−( − )/ ]
= e[ ( )/ ]
ln = −( − )
ln =( − )
= + ln
So, the Fermi level EF shifts towards the valence band in p-type semi conductor.
DRIFT CURRENT:
When a small electric field is applied across a semi conductor bar, the holes
move in the direction of the applied field where as the electrons move in the direction
opposite to that of the electric field. This combined effect of the movement of holes and
electrons constitute an electric current, which is known as drift current.
The drift current density due to free electrons is given by:
= µ A/cm
And the drift current density due to holes is given by:
= µ A/cm
, where
= number of free electrons/cm
= number of free holes/cm
µ = mobility of electrons in cm /V − s
µ = mobility of holes in cm /V − s
DIFFUSION CURRENT:
Diffusion is a process of movement of carriers from a region of high
concentration to a region of low concentration. In addition to drift current there exists a
current component in a semiconductor due to non uniform concentration of holes and
electrons. Therefore the charge carriers have the tendency to move from the region of
higher concentration to a region of lower concentration. Thus a movement of charge
carriers takes place resulting in a current known as diffusion current.
∝
, where is the diffusion current density due to holes.
=−
, where is the diffusion constant for holes (m /s).
The negative sign indicates that the concentration gradient is negative with the
increasing value of x.
For n-type semi conductors the current density is given by:
=−
EINSTIEN’S RELATION:
There exists a fixed relation between mobility and diffusion constant known as
Einstein’s relation.
It states that at a fixed temperature, the ratio of diffusion constant to the mobility is a
constant.
= =
, where
is the diffusion constant for holes
is the diffusion constant for electrons (m /s).
is the mobility of holes
is the mobility of electrons
And is the Voltage Equivalent Temperature.
= =
, where
k is Boltzmann constant in eV/ 0 K = 8.62× 10 eV/ 0 K.
k is Boltzmann constant in J/0 K = 1.38× 10 J/0 K.
PROBLEMS:
1) Find the resistivity of intrinsic silicon at ° if intrinsic concentration of
silicon at ° is . × per while = = .
Sol: The given values are, = 1.5 × 10 /
1.5 × 10
= /
10
= 1300
−
= 500 .
−
= +
= 1.5 × 10 [1300 + 500] × 10 × 1.6 × 10
= 0.0000432 (Ω − )
1
=
1
= = 2314.8148 (Ω − )
0.000432
=
9 2192.982 ×
× 10 =
1.2 2.5 × 10
= 8.55 × 10 = 0.855
The length of the bar.
DIFFUSION LENGTH:
The average distance travelled by a hole before recombination is known as diffusion
length and is denoted by .
=
, where is the diffusion coefficient of hole and is the carrier life time.
CONTINUITY EQUATION
Consider the infinitesimal element of volume of area A and length dx within which the
average hole concentration is p. if is the mean
life time of the holes, then / equals the holes per
second lost by recombination per unit volume. If q
is the charge of the electron, then, because of the
recombination, the number of coulombs per
second decreases within the volume is given by:
/
If g is the thermal rate of generation of electron - hole pairs per unit volume, the no. of
coulombs per second increases within the volume is given by: g
In general, the current will vary with distance within the semiconductor. As shown in
the figure, the current entering the volume at x is I and leaving at + is + , the
no. of coulombs per second decreases within the volume is given by: dI
Because of the three effects enumerated above, the hole density must change with
time, and the total no. of coulombs per second increases within the volume is given by
/ .
Since the charge must be conserved,
=− + − (1)
The hole current is the sum of diffusion current and drift current.
=− + µ (2)
, where is the electric field intensity within the volume.
If the semi conductor is in thermal equilibrium with its surroundings and is subjected
to no applied fields, the hole density will attain a constant value . Under these
conditions, = 0 and / = 0, so that,
= (3)
This equation indicates the rate at which holes are generated thermally just equals the
rate at which the holes are lost because of recombination under equilibrium
conditions. Combining (1),(2) and (3), the equation of conservation of charge or
continuity equation is obtained.
− ( )
=− + −µ
If we are considering holes in the n-type material, the subscript n is added to p and .
Also, since p is a function of both t and x.
− ( )
=− + −µ
−
=−
By solving, we get,
− = e
[where A = − ]
(, where is the carrier concentration during steady irradiation)
−
0=− +
−
=
On solving, we get,
− = e + e
, where and are constants.
= ( ) = diffusion length for holes
Case (iii): Concentration varies sinusoidally with time and with zero electric field.
Let ( , ) = ( )e (angular phasor notation)
The equation becomes:
( ) ( )
( )=− +
1+
=
At = 0,
HALL EFFECT
When a transverse magnetic field B is
applied to a specimen (thin strip of metal
or semi conductor) carrying current I, an
electric field E is induced in a direction
perpendicular to both I and B. At
equilibrium, the electric field
intensity, E, due to Hall Effect must
exert a force on the carrier of charge q,
which balances the magnetic force,
=
where : drift velocity
In an n-type semi conductor, the current is carried by electrons and these electrons
will be forced downward towards side 1 which becomes negatively charged with
respect to side 2.
=
J: Current density : Charge density
Also,
= =
Combining above relations, we get-
= = = =
Hall coefficient,
1
=
So that,
=
*The Hall Effect is positive for p-type semiconductor and negative for n-type semi conductor.
The conductivity ( ) and mobility ( ) are related by the equation,
= or =
and =
PN JUNCTION:
Operation:
Under forward bias condition, the potential, the depletion region and the
applied positive potential repels the internal potential barrier disappear.
holes in P-type region so that the holes
move towards the junction and the
applied negative potential repels the
electrons in the N-type region and the
electrons move towards the junction.
Eventually, when the applied potential
is more than the internal barrier
Operation:
Under reverse bias condition the holes which form the majority carriers of the
P-side move towards the negative terminal of the battery and electrons which form the
majority carrier.
Hence, the width of the depletion region which is depleted of mobile charge
carrier increases. Thus, the electric field produced by applied reverse, is in the same
direction as the electric field of the potential barrier.
Hence, the resultant potential barrier is
increased which prevents the flow of majority
carriers in both direction. But a small current
flows, which is because of the minority carriers
on either sides of the junction.
Band structure:
The energy E0 represents the potential energy of the electrons at the junction.
The contact difference of potential: (expression for E0):
− = −
2
− = −
2
Adding the above two equations, we get
= + = −( − )−( − )
We know that,
= ln
Also,
= −
Therefore,
− = ln
− = ln
− = ln
= ln − ln − ln
= ln
= ln
E is expressed in electron volts; k has dimensions of electron volts per degree Kelvin.
V0 is expressed in volts.
= = ln
= ln
= ln
We have, =
Similarly =
⇒ = ln (1)
= ln
Note: V0 depends only upon the equilibrium concentrations and not at all upon the
charge density in the transition region.
So, finally,
= ln = ln
(ii)Peak inverse voltage: It is the maximum reverse voltage that can be applied to the
PN junction. If the voltage across the junction exceeds PIV, under reverse bias
condition, the junction gets damaged.
(iii) Maximum power rating: It is the maximum power that can be dissipated at the
junction without damaging the junction. Power dissipation is the product of voltage
across the junction and the current through the junction.
( − )
=
Substituting the hole diffusion current density
( − )
− =
−
=
Since,
′ (0) = −
′
=
′ ( )= +
, where and are constants.
= ( ) = diffusion length for holes
′
Substituting following conditions we can solve the constants and . Since cannot
become infinity as → ∞, = 0. at = 0, the injected concentration is ′ (0).
⇒ = ′ (0)
Hence,
′ ( )= ′
(0)
= −
′
=− (0)
′
= (0)
( )= ( (0) − )
Let the thermal equilibrium hole concentration of the p-material be . If the applied
voltage is V, then the junction potential = −
Since the electric field is high across the junction, the drift current is high. The
diffusion current is also high due to high concentration gradient. We have
=− + µ
Since we are subtracting two large values, we obtain a small difference. Hence
= µ
From Einstein’s relation
= =−
Across the junction, the concentration varies from to (0) and the junction voltage
varies from 0 to .
( )
=−
(0) 1 1
ln =− =− ( − )
(0) = e (2)
LAW OF JUNCTION
Consider,
= Thermal equilibrium hole concentration on p-side
= Thermal equilibrium hole concentration on n-side.
From equation (1) of energy band diagram,
= ln
= e
Substituting the above equation in (1) of the current components of PN diode, we get,
(0) = e
= e −
= e −1
(0) = e −1
= (0) + (0)
= e −1 + e −1
= e −1
, where
= +
= (0) + (0) = e −1
= e −1
If the reverse bias voltage is very large, e can be neglected and hence, = − .
If the carrier generation and recombination in the space- charge region are
considered, the general equation of the diode current is approximately given by:
= e −1
= =
11,600
, where is the volt equivalent of temperature i.e. thermal voltage.
k is Boltzmann’s constant (1.38× 10 J/K)
q is the charge of electron (1.602× 10 C)
T is the temperature of diode junction (0K) = (0C+273 0C)
Therefore at reverse bias voltage,
= e −1
If ≫ , then e ≪1
Therefore, ≈ − it is valid as long as external voltage is below the break down value.
= e −1
V. In the case of reverse bias, if the reverse voltage − ≫ , then e can be neglected
and so reverse current is − and remains constant independent of V.
Cut-in voltage:
• In the forward characteristics, it is seen that initially forward current is small
as long as the bias voltage is less than the barrier potential, current increases
rapidly.
• The voltage at which diode current starts increasing rapidly is called cut-in
voltage. It is denoted by .
• Below this voltage, current is less than 1% of maximum rated value of diode
current.
The values of cut in voltage of silicon is greater than that of germanium because, the
value of η is equal to 2 until the voltage level reaches to 1 V so that the current will not
rise. When the voltage is greater than 1 V the η value is equal to 1 so that the current
value rises to a greater extent.
= e −1 (1)
−
= exp (2)
Semiconductor m η (V)
Germanium 2 1 0.785
Silicon 1.5 2, 1 1.21
From (1), dropping the unity in comparison with the exponential, we find, for constant
I
1 [ −( + )]
= − =
Consider a diode operating at room temperature just beyond the threshold voltage .
Then
mV
−2.1 for Germanium
= ℃
mV
−2.3 for Silicon
℃
Diode resistance:
The static resistance R is defined as the ratio of / of the voltage to current. At any
point of the volt-ampere characteristics the value of the resistance R is equal to the
reciprocal of the slope of a line joining the operating point to the origin. The static
resistance varies widely with V and I and is not useful parameter.
e −1
e ( + )
= = = =
For a reverse bias greater than a few tenths of a volt ≫ 1, g is extremely small and
r is very large.
On the other hand forward bias greater than a few tenths of a volt, ≫ and
≈
*** Q: (a) What is diffusion length (L)?
(b) A Diode operating at 300 k at a forward voltage of 0.4 V carries a current
of 10 mA when voltage is changed to 0.42 V the current becomes thrice.
Calculate the value of reverse leakage current and η for the diode (Assume VT
= 26 mV).
(S-2 Sup Aug ’08) (4+12)
Sol: (a)
• When radiation falls on one side of an n-type semi conductor, some of the photons
break the covalent bonds and generate new electron hole pairs near the surface
x=0.
• Since electrons and holes are generated in pairs, equal number of holes and
electrons are injected at x=0.
• When the excess minority carriers (holes) generated is very small compared to the
electron concentrations, and then the condition is known as low level injection.
• Under this condition, the drift current due to holes can be neglected and the hole
current is due to the diffusion alone.
• As the holes diffuse and move deeper, they recombine with electrons resulting in
decrease in concentration.
• The average distance travelled by a hole before recombination is known as diffusion
length and is denoted by LP. It is given by
=
Where, is the diffusion coefficient of hole and is known as carrier life time.
From Einstein’s relation,
=
=
(b) Given that
V1 =0.4, I1 =10 mA
And at V2=0.42 V, I2 =2 I1=20 mA
Now
= e −1
.
10 × 10 =I e η× −1
.
20 × 10 =I e η× −1
.
10 × 10 = e η×
.
20 × 10 = e η×
.
1 e ×
= .
2
e ×
Taking logarithms on both sides we have
16.153 15.384 1
= ln 2 + ⇒ = 0.6931
(16.153 − 15.384)
= ⇒ ∴ =
This current exists for A.C. only.
For D.C., voltage is not changing with time. For D.C., capacitance is open circuit.
=
is the permittivity of the semi conductor.
=
Double integrating the above equation both sides,
=
Therefore,
=
2
At = ,
= (1)
2
= = (2)
∴ =
The depletion width, w is given by:
2 ( − ) +
=
The capacitance due to reverse bias varies with the reverse bias voltage. This property
of voltage variable capacitance with the reverse bias appears in varactors, vari-caps or
volta-caps.
Consider P-material in one side of the diode is heavily doped in comparison with the
N-side. Since the holes move from the P to the N-side, the hole current ≈ (0).
The excess minority charge Q existing on the N-side:
∞
= (0)e = (0)
[ (0)]
= = (1)
The hole current crossing the junction into the N-side with x=0 is:
(0)
(0) =
∴ (0) =
Therefore,
=
, where,
= is the diode conductance.
∴ =
≈ 10 1000 pF
A PN junction diode operated in reverse bias only is called a zener diode. Zener
breakdown mechanism dominates in these devices. It is also used as a voltage
regulator.
Applications:
• In voltage regulator circuits
• In clipping and clamping circuits
• In wave shaping circuits
• Switching operation
Advantages:
• Smaller size, cheaper and has long life and rugged.
• Provides good regulation over a wider range of currents.
Drawbacks:
• Power loss associated with arsenic for light and heavy load current and poorer
efficiency.
• Output voltage depends upon the breakdown voltage of zener diode.
Working principle:
• From the V-I characteristics drawn above, it is seen that at first forward current
rises sharply as applied voltage is increased, where it would have rises slowly
for an ordinary PN junction diode (dashed line).
• As the forward bias is increased beyond this point, the forward current drops to
the point B. This is called Valley Voltage.
• At B, the current starts to increase once again very rapidly, as bias is increased
further. Beyond this point, the characteristics resemble ordinary diode.
• The tunnel diode exhibits dynamic resistance between A and B.
• The levels to which the energy states are occupied by electrons on either side of
the junctions are shown by dotted lines.
• When the bias is zero, these lines are at the same height. Unless energy is
imparted to the electrons from some external source, the energy possessed by
the electrons on N side of the junction is insufficient to make them jump over
the energy barrier, to reach the P-side.
• Quantum mechanics show that there is a finite probability for the electrons to
tunnel through the junction to reach the other side provided; there are allowed
empty energy states in the p-side of the junction at the same energy level.
• Hence, forward current is zero. When a small forward bias is applied, the
energy level of the p-side is lower as compared with the N-side.
• Electrons in the conduction band of the N-side see empty energy level on the P-
side.
• Hence, tunneling from N-side to P-side takes place. Tunneling in other direction
is not possible because the valence band electrons on the P-side are now
opposite to the forbidden energy gap on N-side.
• When the forward bias is raised beyond this, tunneling will decrease.
Applications:
• It is used as an ultra-high speed switch with switching speed of the order of ns
or ps.
• As logic memory storage device.
• As microwave oscillator.
• In relaxation oscillator circuit.
• As an amplifier.
Disadvantages:
• Voltage range over which it can be operated is 1V or less.
• Being a two terminal device, there is no isolation between the input and output
circuit.
Advantages:
• Low noise
• Ease of operation
• High speed
• Low power
• I-V diagram for a diode an LED will begin to emit light when the on-voltage is
exceeded. Typical on voltages are 2-3 Volts.
• Like a normal diode, the LED consists of a chip of semiconducting material
impregnated, or doped, with impurities to create a p-n junction.
• As in other diodes, current flows easily from the p-side, or anode, to the n-side, or
cathode, but not in the reverse direction.
• Charge-carriers—electrons and holes—flow into the junction from electrodes with
different voltages. When an electron meets a hole, it falls into a lower energy level,
and releases energy in the form of a photon.
• The wavelength of the light emitted, and therefore its color, depends on the band
gap energy of the materials forming the p-n junction.
• In silicon or germanium diodes, the electrons and holes recombine by a non-
radiative transition which produces no optical emission, because these are indirect
band gap materials. The materials used for the LED have a direct band gap with
energies corresponding to near-infrared, visible or near-ultraviolet light.
Multi-color LEDs:
• The energy emitted from an LED will be of the form E= nhv where n = 1, 2, 3…,
h is plank’s constant and v = C/λ where C is velocity of light and λ is
wavelength.
• Which implies that energy emitted is related to λ, and λ depends on doping of
the LED.
• That is the color of the emitted light depends on the composition and
condition of the semiconducting material used, and can be infrared,
visible, or ultraviolet.
(Q) Draw the block diagram of RPS. (S-3 Sup Aug ’08) (5+2+5+4)
• The DC power supply finds use in many of our day-to-day applications. For
example devices such as radio, stereo amplifier, calculator, computer, etc. require
DC power supply.
• In India electrical power comes from a 230 V, 50 Hz AC power system. Hence for
operating devices that work with DC voltage, we must convert the power supply
AC voltage to DC voltage.
• The DC power supply is one which converts the AC voltage to DC voltage it
consists of the following elements: The transformer, rectifier, filter and voltage
regulator. The block diagram of power supply is shown in figure.
• Transformer is used to step down the AC voltage to suit the desired value, that
is if the required voltage is 12 V, one can use a step down transformer that
reduces 230 V r.m.s AC primary voltage to 15 V r.m.s and is given to rectifier
circuit.
• Rectifier is used to convert AC to pulsating DC. The output of the rectifier is
then applied to the filter vary with time and is known as rippled DC.
• Filter, filters the ripples (or) variations.
• Regulators: The output of filter is given to the voltage regulator. This regulator is
used to keep the DC voltage constant inspite of load and input voltage variations.
RECTIFIERS:
= sin
Working:
1. When the input voltage is given to the transformer, it changes the input voltage
into the required voltage and appears as across the transformers secondary
coil.
2. During positive half cycle, the diode is forward biased and it allows the flow of
current through the load resistance.
3. During negative half cycle, the diode gets reverse biased and prevents the current
flow through the diode and load resistance. Thus, the negative half cycles are
blocked (or) suppressed. Therefore, negative half cycles are not shown in output
wave.
4. The output is not a steady D.C but only a pulsating D.C having ripple frequency
equal to that of the input voltage frequency. Since only half cycle of the input
wave is utilized, it is called half wave rectifier.
= ∫∝ sin ∝ ∝ +∫ 0 ∝
= |−cos ∝|
= [−1 − 1] = =
= (2)
= (3)
R M S Value of current ( ):
1
= ( )
2
1
= ( sin ) ∝+ 0.
2
= sin
2
1 − cos 2 1 − cos 2
= since sin =
2 2 2
= (1 − cos 2 )
4
= ( − 0)
4
=
4
= (4)
= (5)
=
+
=
1+
Form Factor:
= 2 =
2
∴ = 1.57
Ripple factor:
Γ=
′ ′
Γ= = (1)
where I and V are the instantaneous AC component of the current and voltage
respectively
Current is given by
′
= +
′
= −
I′ = ∫ ( ( )− )
= ∫ ( ( )− )
= ∫ ( ( )−2 ( )+ )
The first term of the integral becomes simply. I of the total wave, since
∫ ( ) = by definition, the second term under the integral is
(−2 ) = −2
I′ = −2 +I
I′ = −I (2)
Γ= = −1 (3)
= 2
Γ= −1
Γ= −1
Hence Γ= (1.57) − 1
= 1.21
This result indicates that the RMS ripple voltage exceeds the DC output voltage and
shows that half wave rectifier is relatively poor for converting AC to DC.
Efficiency:
= × 100
= × 100
= .
= ( + )
.
=
( + )
1
=
1+
1
=
1+
0.48
=
1+
On neglecting we get
If ≫ then = 40.8% which means that only 40.8% of AC input power is converted
in to DC power in the load, rest exist as AC power in the load.
( )= ( )
×
( )
= =
( ) ( ) ×
= ; =
2
=
× 2
√2
But, = ( + )
=
( + )
2√2
0.286
=
1+
= 28.6%
Regulation:
It is a measure of deviation in the nominal value of the output voltage with respect
to variation in the load current. It is defined as the ratio in the output voltage under
variation of load current to the full load voltage i.e. open circuit voltage. It is expressed
as
( ) ( )
Regulation =
( )
(Or) + + . =
As, = ( )
= ( )
( ) − ( ) −
=
( )
As, = =
+
−
( ) − ( ) +
=
( )
+
1−
+
=
+
% Regulation ≅ × 100
PIV is the maximum voltage to which the diode is subjected to. This potential
is called as peak inverse voltage. It occurs during half cycle when the diode is non
conducting. Consequently, PIV for a diode in a half wave rectifier is is to be
considered when selecting a diode for a power.
• Output power is low because power delivers only for half the time.
• Due to pulsating output elaborate filtering is required.
Q) A HWR circuit supplies 100 mA D.C to a 250 Ω load find the D.C output
voltage, PIV rating of a diode and the r.m.s. voltage for the transformer
supplying the rectifier. (S-1 Reg Jun ’09) (S-2 Reg Jun ’08) (8+8)
78.54
= =
= 55.53 V
√2 √2
Q) A voltage of 200 cosωt is applied to HWR with load resistance of 5 kΩ. Find the
maximum DC current component, R.M.S. current, ripple factor, TUF and rectifier
efficiency. (S-2 Reg Jun ’09) (S-4 Reg Jun ’08) (16)
Sol: Given peak voltage Vm = 200 V
Peak current
=
+ +
Neglect the values of forward resistance and winding resistance then the equation
becomes
= = 200/5000 = 0.04
The dc current is obtained as
= = 0.04/ = 0.0127
π
The rms value of current is obtained as
= 0.04/2 = 0.02
=
2
Ripple factor: The ratio forms value of ac component to the dc component in the output
is known as ripple factor.
dc output power
= = = = = 40.6%
ac input power ,
2
• The full wave rectifier conducts during both positive and negative half cycles of
input AC supply. In order to rectify both the half cycles of AC input, two diodes are
used in this circuit. The diodes feed a common load with the help of a center tap
transformer.
• The AC voltage is applied through a suitable power transformer with proper turns
ratio. The full wave rectifier circuit is shown in figure.
• Consider a positive half cycle of AC input voltage in which terminal A is positive and
terminal B negative. The diode will be forward biased and hence will conduct.
While diode will be reverse biased and will not conduct. This is illustrated in the
figure.
Figure.
• The diode supplies the load current, i.e. = . This current flows through
upper half of secondary winding while the lower half of secondary winding of the
transformer carries no current since diode is reverse biased and acts as a open
circuit.
• In the next half cycle of AC supply the circuit will be appeared as shown in figure.
Diode is forward biased and is reverse biased. The diode conducts being
forward biased, while does not, being reverse biased. The diode supplies the
load current i.e., = . Now the lower half of the secondary winding carries the
current but the upper half does not.
Figure
• It is noted that the load current flows in the both the half cycles of AC voltage and
in the same direction through the load resistance. Hence we get rectified output
across the load.
• The load current is sum of individual diode currents flowing in corresponding half
cycles. The individual diode currents and the load currents are shown in the figure.
• Thus the following rectifier circuit essentially consists of two half wave rectifier
circuits. Working independently (working in alternate half cycles of AC) of each
other but feeding a common load. The output load currents are still pulsating DC
and not pure DC.
Average current( ):
1
= ∝ (1)
2
where ∝=
= sin ∝ , 0 <∝< ∴ =
=− sin ∝, ≤∝≤ 2
1
= sin ∝ ∝+ − sin ∝ ∝
2
∝
2
= [− cos ∝] − [− cos ∝]
2 0
+2
=
On substituting , we get
2
=
+
2
= for full wave rectifier (2)
For half wave rectifier it is and full wave rectifier is the combination of two half
wave circuits acting alternately in two half cycles of input.
The load current flows in both half cycles. In the period ≤ ≤ 2 , the waveform is
sinusoidally, except that it is inverted in polarity,
1
= (∝)d ∝
2
Since two half wave rectifiers are similar in operation we can write
2
= ( sin ∝) ∝
2
∝
since, sin ∝=
1 1 − cos 2 ∝
= ∝
2
1
= [1 − cos 2 ∝] ∝
2
1 2∝
= [∝] −
2 0 2 0
1
= ( − 0)
2
1
= ( )
2
=
√2
Form factor:
, =
= √2
2
= 1.11
Ripple factor:
Ripple factor, = −1
=
√2
2
=
= √2 −1
2
= −1
√2 2
= −1
8
= 0.482
As compared to the value of half wave rectifier, it shows that the ripple factor has
dropped from 1.21 to 0.482 i.e. < . Therefore the output of full wave rectifier
is a better DC than that of half wave rectifier.
Efficiency:
= × 100
2 4
= . = =
Since, the current in the secondary side of FWR is in opposite directions. Therefore
there is no problem due to DC saturation of flux in the core of the transformer. In a
FWR the average TUF is found by considering the primary and secondary windings
separately.
DC power delivered to theload
TUF =
AC power rating of secondary
2
=
√2 √2
2
8
= = = 0.812
2
The secondary of the transformer is feeding two half wave rectifiers separately. These
two half wave rectifiers will work independently of each other but feed a common load.
= 2 × 0.287 = 0.574
( ) ( )
Regulation =
( )
As, = ( )
2
= ( )
2
( ) − ( ) −
=
( )
2 2
As, = =
+
2 2
−
( )− ( ) +
=
( )
2
+
1−
+
=
+
% Regulation ≅ × 100
• This is voltage across the diode during non conduction period let us take the case
when the diode is conducting and is not conducting. We can assume a very
small voltage drop across .
• So voltage across the point C is same as that of point A i.e., the voltage of point B
is(−2 ) with respect to point A. i.e., the peak voltage that occurs across is
and at the same time peak voltage from centre point D on secondary side to top
point A of the secondary also .
The maximum voltage across diode D = voltage difference between point C and poimt B = 2V
≪ ( )
We can note that PIV for a diode in half wave circuit in . Whereas PIV for diode in
full wave circuit is 2 .
Q: Determine: (S-4, Sup Nov’09) (S-1 Sup Aug ’08) (S-1 Reg Jun ’08) (16)
Sol: (a)
Given values are RL =100 Ω
No of turns in the primary coil = 5
No of turns in the secondary coil =1
T he voltage across the primary coil = 230 V
Hence the voltage across the secondary coil = 230/5=46 V
The r.m.s voltage across the coil = =46 V
The peak voltage = = × √2 =46√2 = 65.05 V
The dc voltage across the output
=
2
=
=2 × 65.05/ = 41.41 V.
(b) Peak Inverse Voltage: It is defined as the max reverse voltage that a diode can
withstand without destroying the junction. The peak inverse voltage across the
diode is the peak of the negative half cycle. For a full wave rectifier PIV =2 =2 ×
65.05=130.1V
2
dc output power
= = = = = 81.2%
ac input power ,
√2
Bridge rectifier:
(b) A rectifying system in rectifier type AC meters, such as voltmeter in which the AC
voltage under measurement is first converted into DC and measured with conventional
meter. In this system, the rectifying elements are copper oxide type (or) Selenium type.
The bridge rectifier circuit is essentially a full wave rectifier circuit, using four
diodes, forming the four arms of an electrical bridge. To one diagonal of the bridge, the
ac voltage is applied through a transformer if necessary, and rectified DC voltage is
taken from the other diagonal of the bridge. The main advantage of this circuit is that
it does not require a center tap on the secondary winding of the transformer.
Consider the positive half of the AC input voltage. The point A of the secondary
becomes positive. The diodes D1 and D2 will be forward biased, while D3 and D4
reverse biased. The diodes D1 and D2 conduct in series with the load and the current
flows as shown in the figure.
In the next half cycle, the polarity of AC voltage reverse hence point B becomes
positive. Diodes D3 and D4 are forward biased while D1 and D2 are reverse biased. Now
the diodes D3 and D4 conduct in series with the load and the current flows as shown
in the figure. It is seen that in both cycles of AC the load current is flowing in the same
direction, hence we get a full wave rectified output.
Q: Derive all the necessary parameter of bridge rectifier. (S-3, Sup Nov’09) (16)
The bridge rectifier circuit, being basically a full wave rectifier circuit all the
characteristics discussed previously for a full wave circuit using two diodes, are the
characteristics if a bridge rectifier circuit. The relation between Im, the maximum value
and the load current and , remains same as derived earlier for the full wave
rectifier circuit.
2
= and =
√2
The expression for will change slightly; this will be clear from the equivalent circuit
as shown in the figure. Total resistance = + +
=2 +
In each half cycle two diodes conduct simultaneously. Hence maximum value of load
current is
=
2 +
• = =
• = . =
( )
• = ( +2 )=
• =
• % = 81.2%
• = 0.48
The reverse voltage appearing across the reverse biased diodes is 2 but the two
diodes are sharing it. Hence PIV rating of the diode is and not 2 .
• The current in both the primary and secondary of the power transformer flows for
the entire cycle and hence for a given power output, power transformer of a small
size and less cost may be used.
• No centre tap is required in the transformer secondary. Hence, whenever possible,
AC voltage can directly be applied to the bridge.
• The current in the secondary of the transformer is in opposite direction in two half
cycles. Hence, net DC component flowing is zero which reduces the losses and
danger of saturation.
• Due to pure alternating current in secondary of the transformer, the transformer
gets utilized effectively and hence the circuit is suitable for applications where large
powers are required.
• As two diodes conduct in series, in each half cycle, inverse voltage appearing
across the diodes get shared. Such a peak reverse voltage appearing across the
diode is called peak inverse voltage rating of diode.
• The efficiency is high.
= ⟹ = × √2 = 20 × √2 = 28.28 V
√2
Hence
2 2 × 28.28
= = = 18 V
DC load current
18
= =
= 90.03 mA
200
For a bridge rectifier peak inverse voltage PIV = = 28.28 V
Q: Compare : HWR, center tapped FWR & Bridge rectifier. (S-1, Sup Nov’09) (6)
Comparison of rectifier circuits:
2. Number of 1 2 4
diodes
3. Average DC 2
2
current( )
4. Average DC
voltage( ) 2 2
5. R.M.S.
Current( )
2 √2 √2
6. D.C. power
output( ) 4 4
7. A.C. power
output( ) ( + + ) ( + + ) ( +2 + )
4 2 2
8. Maximum
rectifier 40.6% 81.2% 81.2%
9. efficiency ( )
Ripple factor ( )
1.21 0.482 0.482
Maximum load
10. current( )
+ + + + 2 + +
12. Transformer
utilization factor 0.287 0.693 0.812
13. Ratio of
rectification 0.812 0.812 0.812
1 1 2 cos
= + sin −
2 , , … ( + 1)( − 1)
The lowest angular frequency present in this expression is that of the primary source
of the AC power. Except for this single term of angular frequency , all other terms in
the final expression are even harmonics of the power frequency.
The expression for the output of the full wave rectifier may be derived from the above
equation. By recalling that the full wave rectifier consists two half wave circuits which
are so arranged that one circuit conducts during one half cycle and the second
operates during the second half cycle. It is clear that the currents are functionally
related by the expression (∝) = (∝ + ). The total current = + attains the form
2 4 cos
= −
( + 1)( − 1)
We observe that the fundamental angular frequency has been eliminated from the
equation. The lowest frequency in the output being 2 , a second harmonic term. This
offers a definite advantage in the effectiveness of filtering of the output. A second
desirable feature of the full wave circuit is the fact that the current pulses in the two
halves of the transformer winding are in such directions that the magnetic cycle
through which the iron of the core is taken is essentially that of an alternating
current. This eliminates any DC saturation of the transformer core, which would give
rise to additional harmonics in the output.
FILTERS:
• Filter is a general term used for separation of different components which are
mixed together. So filter means an electrical filter which separates different
frequency components (i.e., AC and DC).
• The output from a rectifier is the pulsating (containing AC and DC components)
unidirectional current. The pulsations are to be reduced i.e., undesirable AC
components should be reduced and the output must be made very close to the
unidirectional (pure DC) current. This means, most of the ripple content must be
reduced to the least possible value, because most of the electronic circuits require
pure DC.
• To obtain pure DC a filter circuit is used to remove the AC component of rectifier
output and allow only DC component to reach the load. Therefore, a filter circuit is
used in between the rectifier and the load.
• Generally inductors and capacitors are used for filtering, because of their opposite
frequency characteristics. Inductive reactance = decreases with higher
frequencies. An inductor opposes AC component and allows DC component.
• On the other hand a capacitor permits AC component and opposes the DC
component through it. In addition, L and C filtering action depends on whether
they are connected in series (or) parallel with the load.
Types of filters:
In terms of their function, filters are broadly classified into two categories namely
• Figure shows the RC coupling circuit. A pulsating D.C voltage is applied to the
circuit; capacitor will change to the steady D.C level, which is the average voltage.
The steady D.C component is blocked. Therefore, it cannot appear across the load
resistance . However the AC component appears across .
• The reason is that the AC voltage allows the capacitor to produce charge and
discharge current through . It may be noted that the zero axis of the AC voltage
output corresponds to the average level of the pulsating DC voltage input
• The voltage across the capacitor is the steady DC component of input only because
the variations of AC components are symmetrical. When increases from 20 V to
30 V this effect on charging C, since the variation from the axis neutralize each
other.
• After a period of time, depending upon RC time constant. C will charge to the
average value of the pulsating D.C voltage applied i.e., 20 V here.
• Although capacitor is charged to average D.C level, when the pulsating input
varies above and below this level, the charge and discharge current produces
voltage corresponding to the fluctuations of the input.
• When increases above average level, C takes on charge, producing charging
current through . Though the charging current may be too small to effect the
voltage across C appreciably, the drop across large can be practically equal
to AC component of input voltage along RC time constant is needed for good
coupling.
• A high pass filter does the opposite; allowing the high frequency component of the
applied voltage to develop voltage across the output load resistance, while the low
frequency components are attenuated in the output.
Examples:
Figure
• The capacitor starts charging at point B, where exceeds the capacitor voltage,
which is slightly less than .
• So from B onwards the capacitor starts charging again and gets charged to .
• The capacitor voltage is same as the output voltage as it is in parallel with .
• It can be see that the diode conducts only from point B till capacitor gets charged
back to . Thus diode conducts only for part of the positive half cycle.
• From point A to B, the diode remains non conducting and conducts only for the
period from B to C.
When the diode is non-conducting the capacitor supplies the load current. As
the time required by the capacitor is very small to charge while its discharging time
constant is very large, the ripple in the output gets reduced considerably.
• Immediately when power is turned on, the capacitor C gets charged through forward
biased diode to , during first quarter cycle of the rectified output voltage. In the
next quarter cycle from the capacitor starts discharging through .
• Once capacitor gets charged to , the diode becomes reverse biased and stops
conducting. So during the period from , the capacitor C supplies the load
current.
• In this circuit, the two diodes are conducting in alternate half cycle of the rectifier
circuit.
• The diodes are not conducting for the entire half cycle but only for a period of the
half cycle. During which the capacitor is getting charged.
• When the capacitor is discharging through the load resistance both the diodes
are nonconducting. The capacitor supplies the load current.
• As the time required by capacitor to charge is very small and it discharge very
slowly due to large time constant, the ripple in the output gets reduced
considerably.
• Though the diode conducts partly the load current gets maintained due to the
capacitor. This filter is very popularly used in practice.
Figure
It is known mathematically that the r.m.s value of such a triangular
wave form is = . During the time period , the capacitor C is discharging
√
through the load resistance . The charge lost is,
= =
Integration gives average (or) DC value
Hence,
=
+ =
2
Normally ≫
+ = = ,
, where =
×
∴ = = =
2 2 2
But
=
2 1
∴ Ripple factor = = × Since =
2√3 2√3
∴ Ripple factor = for full wave.
√
∴ Ripple factor =
• From the expression of the ripple factor, it is clear that increasing the value of
capacitor C, the ripple factor gets decreased. Thus, the output can be made
smoother, reducing the ripple content by selecting large value of capacitor.
• However, very large value of capacitor cannot be used, because larger the value of
capacitor, larger is the initial charging current. This may exceed the current rating
of the diodes in the rectifier. Otherwise the diodes used must be of higher values of
current rating, which increases the cost.
• For high currents the capacitor filter is not used in an unregulated supply, because
of the excessive large values of capacitance required to provide a quality output.
• Therefore for high load currents inductive filter is used. The property of inductor is
to oppose the current flowing through it.
• This property is used in an inductor filter. As a result any sudden changes that
might occur in a circuit without an inductor are smoothed with the presence of
inductor in the circuit.
• We know that the impedance of inductance is proportional to frequency ( = ).
• Therefore impedance of the inductance increases with increase in frequency.
Because of this, the inductance offers high impedance to higher harmonics and
filters them.
• Therefore we can neglect higher harmonics and consider only the DC term and
second harmonics for analysis.
Figure (a) shows circuit diagram while figure (b) shows the current waveform
obtained by using choke filter with full wave rectifier.
The Fourier series expansion of a full wave rectified sine wave shown in figure is:
= − cos 2 − cos 4
= − cos 2 − cos 4
Neglecting higher order harmonics we get
= − cos 2 (1)
While second harmonic component represents A.C component (or) ripple present and
can be written as
= for a. c component
Now = + 2 ; | |= +4
∅ = tan
The ripple present is the second harmonic component has a frequency of 2 . Hence,
while calculations, the effective inductive reactance must be calculated at 2 hence
represented as 2 in the above expression.
= − cos(2 − ∅)
The negative ∅ indicates that current lags the voltage due to inductive circuit.
Q: Derive the ripple factor of Inductor filter. (S-2, Sup Nov’09) (16)
Expression for the ripple factor:
=2
2 4
= − cos(2 − ∅)
3 +4
4
=
3√2 +4
4
3√2 +4
Ripple factor, r = =
2
=
√ ( )2
2 1
=
3√2 + (2 )2
2 1
=
3√2 2
2
1+
4
If ≫ 1,
2
Then, Γ= =
3√2 2 2√3
For supply frequency 50 Hz,
Γ=
1333
From the above equation we find that the ripple factor value is low for low values of
load resistance (i.e., for heavy load currents)
(Q)Describe the terms capacitor input filter and inductor input filter.
Capacitor input filter: The Π-filter is called as capacitor input filter, the Π filter consists of
a C filter followed by a LC-filter.
Inductor input filter: The LC filter or choke input filter is called as inductor input filter,
the inductor input filter consists of a L filter followed by a C filter.
• In L filter the ripple factor is directly proportional to the load resistance and in C
filter the ripple factor is inversely proportional to .
• If we combine the above two filters, then the ripple factor becomes almost
independent of load resistance.
• For a small value of L the capacitor charges up to maximum value at which the
diodes cut-off. This allows only short pulses of current like in C filter for which
there is no mathematical expression for input voltage. Current is smoothed and
made to flow for large period.
• At some inductance value known as critical inductance, conducts to result in a full
wave output.
• This is also called a choke input filter as the filter element looking from the rectifier
side is an inductance L. The DC winding resistance of the choke is . The circuit is
shown in figure.
• The basic requirement of the filter circuit is that the current through the choke may
be continuous and interrupted.
• An interrupted current through the choke may develop a large back E.M.F which
may be in excess of PIV rating of the diode and/or maximum voltage rating of the
capacitor C.
• This back E.M.F is harmful to the diodes and capacitor.
• To eliminate the back E.M.F developed across choke, the current through it must be
maintained continuous.
• This is assured by connecting a bleeder resistance, across the output terminals.
The analysis of the choke input filter circuit is based on the following assumptions.
Since the filter elements, L and C are having reasonably large values, the
reactance of the inductance L at 2 i.e., =2 is much larger than . Also the
reactance is much larger than the reactance of C, at 2 as
1
=
2
Let = ∥ =
The input voltage to the choke input filter is the output voltage of the full wave
rectifier, having the waveform as illustrated in figure. Using Fourier series, the input
voltage can be written as
42 4
= −
cos2 − cos4
3 15
= The maximum value of half secondary voltage of the transformer.
• The first term , in the Fourier series indicate the DC output voltage of the
rectifier.
• While the remaining terms ripple. The amplitude of the lowest ripple component,
which is the second harmonic component of the supply frequency is while the
amplitude of the fourth harmonic component, is .
• The amplitude of the fourth harmonic is just one-fifth (or) 20% of the amplitude of
second harmonic. The higher harmonic will have still less amplitude compared to
the amplitude of the second harmonic component.
• Hence, all harmonics, except the second harmonic can be neglected.
2
=
+
= ∥
2
across the load = = ×
+
2 ( )
( ) = =
1+ 1+
Normally is much less than , i.e, ≪
2
≈ ≈ ( )
Thus the choke input filter circuit gives approximately constant DC voltage across the
load.
The impedance of the filter circuit for second harmonic component of input at 2 will be
1
= + 2 + ∥
2
But ≪ , and 2 ≫ as per assumptions
Hence | | ≈ 2
Second harmonic component of the current in the filter circuit, will be
4 4
= 3 ≈ 3
2
Second harmonic voltage across the load is
1 1
= × ∥ ≈ ×
2 2
1
≪
2
4
1 3 1
= × = ×
2 2 2
4
= =
3 4 3
= =
√2 3√2
Hence the Ripple factor is given by
Ripple factor =
1
= ×
3√2 2
1+
1
= 1+
6√2
1
Ripple factor Γ ≈
6√2
Multiple L- section filter:
Further improvement in ripple factor can be achieved by connecting two (or) more LC
sections shown in figure. The following assumptions are made to analyse the circuit:
1. Reactances of all inductors are much greater than the reactance of capacitor.
2. Reactance of last capacitor is small compared to load resistance.
2 4
= − cos2
3
4
( ) =
3 √2
, where is the reactance between A & B
√2
( ) =
3
√2
( ) =
3
√2
( ) =
3
√2
( ) =
√2( )
Γ= =
3
The main advantage of multiple LC section filter is that the drop across series
inductor is very high and so the output is reduced.
(Q) What is the function of a bleeder resistor? (S-3 Sup Aug ’08) (5+2+5+4)
Bleeder resistor:
It is assumed that the either one of the diode will conduct always in the full
wave rectifier i.e. current is not zero at any time. The incoming current consists of two
components
i)
=
ii) a sinusoidal varying current components with peak value . The negative peak of
ac current must always be less than dc, i.e √2Irms we know that for a LC filter Irms
√ √
= Hence √2 × ≤ i.e. = where = critical inductance
At no load, i.e. when RL =∞, the Lc is also∞. To overcome this bleeder resistor RB is
connected parallel to RL. Hence, a minimum current is always flowing for optimum
operation of inductor. It improves voltage regulation of supply by acting as preload on
the supply. It provides safety by acting as a discharging path for capacitor.
Normally used for single phase, Used in poly phase rectifier systems
8 high voltage, fixed load employing mercury as rectifiers.
applications.
1 1
The ripple factor Γ = The ripple factor Γ ≈
9 4√3 6√2
The net D.C output from filter fed The net D.C output from filter fed
from full wave rectifier is from full wave rectifier is
10 1 2
= − ( ) = ×
4 +
where = ∥
CLC filter (or) filter:
This is capacitor input filter followed by an L section filter. The ripple rejection
capability of filter is very good.
=
2
=
Q) Derive the ripple factor of Π- Filter with neat sketch.
5700
Γ≈
, where and are in µF, L in Henry and in Ω.
To obtain pure D.C to the load, more sections may be used one filter another, such
a filter using more than one section is called multiple π-section filter. The figure
shows multiple section filters.
(Q) Why do we need filters in a power supply? Under what condition we shall prefer
to a capacitor filter? (S-3 Sup Aug ’08) (5+2+5+4)
Sol) Necessity of filters: The output of a rectifier contains dc component as well as ac
component. Filters are used to minimize the undesirable ac i.e. ripple leaving only dc
component. As in full wave rectifier there is 48% of ac component present in output,
some of applications cannot tolerate this. The output of the rectifier is fed as input to
the filter. The output of the filter is not a perfect dc, but it also contains small ac
components. Some important filters are
The property of a capacitor is that it allows ac component and blocks dc component. The
operation of the capacitor filter is to short the ripple to ground but leave the dc to appear
at output when it is connected across the pulsating dc voltage. Hence capacitor filter is
preferred.
VOLTAGE REGULATORS:
• In an unregulated power supply, the output voltage changes whenever the input
voltage (or) load changes.
• An ideal regulated power supply is an electronic circuit designed to provide a
predetermined DC voltage which is independent of the load current and
variations in the input voltage.
• A voltage regulator is an electronic circuit that provides a stable DC voltage
independent of the load current, temperature and AC line voltage variations.
Load regulation:
The load regulation is the change in the regulated output voltage when the load
current is changed from minimum (no load) to maximum (full load).
Consider the block diagram of the regulator circuit shown in the figure.
= −
= load voltage with no load current
= load voltage with full load current
The load regulation is often expressed as percentage by dividing the LR by full load
voltage and multiplying result by 100.
−
% = × 100
From the figure, the graph of load current against the load voltage is called regulation
characteristics of a power supply. The ideal value of load regulation is zero. Lesser the
regulation, better is the performance of regulator. The regulation characteristics are
shown in figure.
Basic voltage regulator:
The basic voltage regulator in its simplest form consists of
i. Voltage reference,
ii. Error amplifier
iii. Feedback network
iv. Active series (or) shunt control element
• The voltage reference generates a voltage level which is applied to the comparator
circuit, which is generally error amplifier.
• The second input to the error amplifier is obtained through feedback network.
Generally using the potential divider, the feedback signal is derived by sampling
the output voltage.
• The error amplifier converts the difference between the output sample and the
reference voltage into an error signal.
• This error signal in turn controls the active element of the regulator circuit, in
order to compensate the change in the output voltage.
• Such an active element is generally a transistor. Thus the output voltage of the
regulator is maintained constant.
• The heart of any voltage regulator circuit is a control element. If such a control
element is connected in shunt with the load, the regulator circuit is called shunt
voltage regulator. The figure shows the block diagram of shunt regulator circuit.
• The unregulated input voltage , tries to provide the load current. But part of the
current is taken by the control element, to maintain the constant voltage across
the load.
• If there is any change in the load voltage, the sampling circuit provides a feedback
signal with the reference voltage and generates a control signal which decides the
amount of current required to the shunted to keep the load voltage constant.
• For example, if the load voltage increases, then the comparator circuit decides the
control signal based on the feedback information, which draws increased shunt
current value.
• Due to this, the load current decreases and hence the load voltage decreases to
its normal. Thus control element maintains the constant output voltage by
shunting the current, hence the regulator circuit is called voltage shunt regulator
circuit.
• As seen from the block diagram, only part of the load current required to be
diverted passes through the control element.
• Thus, the control element is low current, high voltage rating component. The
efficiency depends on the load current .
• Hence shunt regulators are not preferred for varying load conditions.
• Thus, the control element which regulates the load voltage, based on the control
signal is in series with the load and hence the circuit is called series voltage
regulator circuit.
• In series regulators, the entire current passes through the control element and
hence the control element is high current, low voltage rating component.
• As input current and load current are same, the efficiency depends on output
voltage.
• It provides good regulation than shunt regulators. It can be used for fixed voltage
as well as variable voltage requirements.
• To compensate for the drop across the control element, input voltage must be
atleast 2 to 3 V more than output voltage.
Comparison of shunt and series regulators:
2. Only small current passé through the 2. The entire load current always
control element which is required to be passes through control element.
diverted to keep output constant.
4. The control element is low current high 4. The control element is high current
voltage rating component. low voltage rating component.
7. Not suitable for varying load conditions, 7. Preferred for fixed as well as variable
preferred for fixed voltage application. voltage applications.
(b)
= – = − (1)
We know that the relation between the base, emitter, collector currents and it is equal
to
IE = IB + IC
As IB is very small value it can be neglected hence the above equation becomes IE ≈ IC
The load current flowing through the output loop is obtained as
6.7
= = = 3.7 mA
2 × 10
Hence the equation (1) becomes
= − = − = − (let I = I )
3.85 3.85 × 10
= 3.7 − = 3.7 × 10 − = 3.68 mA
100 100
A resistance is connected in series with zener diode to limit the current. For proper
operation the input voltage must be greater than the zener diode breakdown voltage.
Note that zener diode operates in the reverse breakdown region.
The analysis of zener diode as voltage regulator can be carried out in three ways. They
are:
i. The input and the resistor fixed.
ii. Fixed and variable
iii. Fixed and variable
Fixed and :
The circuit diagram of zener voltage regulator with fixed and is shown in figure. If
the voltage across zener diode is less than the breakdown voltage of zener diode, then
the diode is in OFF condition. On the other hand if the voltage across zener diode is
greater than or equal to , then the diode is in ON condition. To find the voltage
across zener diode, first remove it from the network and calculate the voltage across
the open circuit.
= =
+
= +
= −
Since the load is variable, the voltage also varies. If the load resistance is
small then the voltage becomes less than and turns OFF the zener diode. The
minimum load resistance that will turn ON the zener diode is the value of when
= =
+
( + )=
( − )=
, =
( − )
= −
−
⇒ =
= −
= −
If is fixed then the maximum value of required to turn ON the zener diode can
be obtained as:
= =
+
( + )
=
= −
= +
= +
= +
When the input voltage and are variable, the value of current limiting resistor must
be properly selected. It has to satisfy the following requirements.
i. When the input voltage is minimum and the load current is maximum, sufficient
current must be supplied to keep the zener diode in breakdown region.
ii. When the input voltage is maximum and the load current is minimum, the zener
current must not decrease its maximum rated value.
According to the first requirement, when the input voltage is minimum and load
current is maximum, the zener diode current drops to a minimum. Since the input
voltage is minimum the current through resistor R is also minimum.
We have,
= −
= −
−
=
+
According to the second requirement, when the input voltage is maximum and the
load current is maximum, the zener current is maximum. This zener current must not
increase the maximum rated value. When the input voltage is maximum, the current
through R is maximum.
= −
−
⇒ =
+
Rectifier Regulator
1. Rectifier converts pure sinusoidal input 1. Regulator converts pulsating DC
into pulsating DC output. output into constant DC output.
3.The output voltage changes wrt load 3.The output voltage does not change wrt
current, input voltage and temperature. load current, input voltage and
temperature
4. The devices used in the rectifiers are 4. The devices used in regulators are
diodes. transistors, op - amps etc.
5. The examples are half wave, full wave 5. The examples are zener regulator,
and bridge. transistorized regulator etc.
6. Not provided with over load protection, 6. Provided with all sort of protections.
short circuit protection, thermal shut
down etc.
7. The input and output waveform is 7. The output waveform is
Introduction:
Q. Define a Transistor.
A junction transistor is a semi conductor device that can amplify electronic signals such as radio
and television signals. It is a very essential component in almost every electronic circuit (from the
simplest amplifier or oscillator to the most elaborate digital computer).
In olden days, the amplification was achieved by using vacuum tubes as an amplifier. Now-a-
days, the vacuum tubes are replaced by transistors because of the following advantages of
transistors:
Transistor:
The concept of transfer of resistance has given the name TRANSfer-resISTOR (TRANSITOR).
Emitter:
Base:
1. It is lightly doped to reduce the recombination, within the base so as to increase the collector
current.
2. It is small in size to facilitate the carrier in reaching the collector before its lifetime elapses.
Collector:
1. The collector is moderately doped to avoid chances of mesh formation even after taking the
carriers from emitter.
2. It is large in size to withstand the temperature generated at the collector.
Current Components:
A transistor can be connected in a circuit with three configurations. The current gain is
determined separately for the three different configurations.
Common base:
In the CB configuration, the output current is collector current , and the input current is the
emitter current , the amplification factor ( ) is given as:
Emitter efficiency,
It is the ratio of current of injected carriers at emitter base junction to total emitter current.
Transport factor :
It is the ratio of injected carrier current reaching at collector base junction to injected carrier
current at emitter base junction
It is the ratio of the negative of current due to injected carriers to the total emitter current
This equation for indicates that the collector current in the active region is essentially
independent of collector voltage and depends only upon the emitter current. To generalize the
equation of that stands for any voltage across we need to replace in the equation by the
current in a p-n diode. The generalized equation of is therefore given as,
The transistor alpha is the product of the transport factor and the emitter efficiency.
Transistor construction:
The transistor can be constructed using one of the five basic techniques and accordingly they
are classified as:
Grown type
Alloy type
Electro chemically etched type
Diffusion type
Epitaxial type
Epitaxial type:
“Epi” means upon and “taxis” means arrangement. In this technique a very thin, high impurity,
single crystal layer of silicon or germanium is grown on a heavily doped substrate of the same
material. This augmented crystal forms the collector on which the base and emitter may be
diffused.
We know that the net current crossing a junction equals the sum of the electron current
in the p-side and a hole current in the n-side, evaluated at the junction ( ).
For a p-n-p transistor, electrons are injected from the base region across the emitter
junction into a p-region which is large compared with the diffusion length.
This is the condition that exists in a diode. Hence the equation for current can be written as:
( )
* +
Voltage drop across emitter (collector) junction; positive for a forward bias, i.e., for
the p-side positive w.r.t. the n-side
Base width, m
* + * +
[ ] [ ]
( )
Consider (3),
At ,
( )
At ,
( )
( ) ( )
*( ) ( )+
*( ) ( )+
We know that,
( )
*( ) ( )+ * +
( )
* + ( ) ( )
( )
* +{ } ( )
( )
* + * +
, where
( )
Similarly, * + * +
, where
The dependence of the currents in a transistor upon the junction voltages, or vice versa, may
be obtained by using the below equation:
𝑁 [ xp ]
Base spreading resistance: The reference directions of current and voltages are shown in
the figure below. represents the voltage from collector to base terminals and it differs from
by the ohmic drops in the base and collector materials. As the base region is very thin, the
current which enters the base region across the junction areas must flow through a long
narrow path to reach the base terminal. The cross sectional area for the current flow in the
collector (or emitter) region is very much larger than that of in the base region. Hence, the
ohmic drop in the base alone is important. This DC ohmic base resistance 𝑟𝑏𝑏′ is called the
base spreading resistance and is indicated in the following figure:
The difference between and is due to the ohmic drop across the body resistances of the
transistor, particularly the base spreading resistance 𝑟𝑏𝑏′
The Ebers-moll model: The above two equations can determined from the circuit known as
ebers-moll model. The model is shown below for a p-n-p transistor. It involves two ideal
diodes placed back to back with reverse saturation currents – and – and two
independent current controlled current sources shunting the ideal diodes. For a p-n-p
transistor both and are negative so that – and – are positive values. Applying KCL
to the collector node of the following figure, we get,
𝑁 𝑁 [ xp ]
In the above two equations, the parameters 𝑁 𝐼 are related by the condition
𝐼 𝑁
From equations (3) and (4) we solve to get the junction voltages in terms of currents.
𝐼
[ ] 6
𝑁
[ ] 7
The common emitter characteristics are found by subtracting equations (6) and (7) and by
eliminating by using equation (5). The resulting equation can be simplified provided that the
following inequalities are valid.
𝑁
Finally, we get the equation as:
𝐼 𝐼
±
𝐼
, where
𝐼
𝐼 ≡ 𝑁 ≡ ≡
𝐼
Q. Explain the input and output characteristics of common base transistor configuration.
In this configuration, input is applied between emitter and base and output is taken from the
collector and base. Here, the base of the transistor is common to both input and output circuits
and hence the name common base configuration. Common base configurations for both NPN and
PNP transistors are shown in the figures below respectively.
Here,
The reverse saturation current is temperature sensitive and it doubles for every 10°C rise in
temperature. Since is negligibly small in most practical situations, we can approximately
𝐼
write, or 𝐼
For a transistor,
The relationships between currents and voltages of the transistor can be plotted graphically
which are commonly known as characteristics of transistor, which are used to understand the
behaviour of the transistor.
Input characteristics:
It is the curve between input current and input voltage at constant . The emitter
current is taken along Y-axis and emitter-base voltage along X-axis.
The following figure shows the input characteristics of a typical transistor in common base
configuration. From this characteristic we can observe the following important points.
After the cut-in voltage, (barrier potential, normally 0.7 V for Silicon and 0.3 V for
Germanium), the emitter current increases rapidly with small increase in emitter base voltage
.
It means that input resistance is very small. Because, input resistance is a ratio of change in
emitter-base voltage ( ) to the resulting change in emitter current at constant collector-base
voltage , this resistance is also known as dynamic input resistance of the transistor in CB
configuration.
𝑟 |
It can be observed that there is slight increase in emitter current ( ) with increase in . This is
due to change in the width of the depletion region in the base region in the reverse bias condition.
Early effect:
As shown in the above figure, when reverse bias voltage increases, the width of the depletion
region also increases, which reduces the electrical base width. This effect is early effect or base
width modulation.
There is less chance for recombination within the base region. Hence the transport factor ,
and also , increase with an increase in the magnitude of the collector junction voltage.
The charge gradient is increased within the base, and consequently, the current of minority
carriers injected across the junction increases.
It is the curve drawn between collector current and collector to base voltage at constant
emitter current . The collector current is taken along Y-axis and collector to base voltage along
X- axis.
For the operation in the active region, the emitter base junction is forward biased while
collector base junction is reverse biased.
In this region collector current is approximately equal to emitter current and the
transistor works as an amplifier.
If the emitter current is zero, the collector current is simply .
The region below the curve is known as cutoff region, where the collector current is
nearly zero and the collector –base and emitter-base junctions of a transistor are reverse biased.
The region to the left of is called saturation region. In the active region, the collector
current is essentially almost constant, and the graph is almost parallel to X-axis.
The collector current is almost independent on the collector base voltage and the transistor
can be said to work as constant current source. This provides very high dynamic output
resistance ( ).
|
𝐼
As increases also increases. Thus, depends upon input current but not on collector
voltage. Hence input current controls output current. Since transistor requires some current to
drive it, it is called current operating device.
A transistor breakdown occurs when the collector to base voltage, increases beyond certain
limit. Such breakdown is called punch through or reach through. The following figure shows the
potential barriers at the junctions of transistor at different biasing levels.
Fig(1) shows the potential barriers at the junctions for unbiased transistor.
In the absence of applied voltage the potential barriers at the junctions adjust themselves to
With these potential barriers the current does not flow through the junction. Fig(2) shows the
potential barriers of transistor when EB junction is forward biased and CB junction is reverse
biased.
The forward bias of EB junction reduces the EB potential barrier by | | and reverse bias of
CB junction increases the CB potential barrier by | |.
Punch through occurs at a fixed voltage (where ) between collector and base, and is not
dependent on circuit configuration. For a particular transistor the limit for maximum collector
voltage is determined by punch through or breakdown, whichever occurs at lower voltage.
The input is applied between base and emitter, and output is taken from collector and emitter.
Here, the emitter of transistor is common to both input and output circuits. The input voltage in
the CE configuration is the base-emitter voltage, and the output voltage is the collector emitter
voltage. The input current is and the output current is .
We know that,
( )
( )
( ) ( )
, where
Since is close to 1, is always greater than 1 and typically ranges from 20 to several
hundreds.
The leakage current in common emitter configuration is larger than that in common base
configuration. is the collector current which flows when the base emitter circuit is left open
and collector base junction is reverse biased.
Since is very small compared to , the above equation can be written as:
Input characteristics:
It is the curve drawn between input current and input voltage is taken along X-axis.
Observations:
𝑟 |
Output characteristics:
It is the curve between collector current and collector voltage , for various values of . These
characteristics are often called collector characteristics.
From the output characteristics we can see that change in collector-emitter voltage causes
the little change in the collector current for constant base current. Thus the output dynamic
resistance in CE configuration is high.
𝑟 |
𝐼
The output characteristics of common emitter configuration consists of three regions: active,
saturation and cutoff regions.
Active region:
The region where the curves are approximately horizontal is the active region of the CE
configuration. In the active region, the collector junction is reverse biased.
As is increased, the reverse bias increases. This causes depletion region to spread more in
base region than in collector region reducing the chances of recombination in the base.
This increases the value of . This early effect causes collector current to rise more sharply
with increasing in the active region of output characteristics of CE transistor.
For the same reason, CE output characteristics are sloping upwards, when compared to CB
output characteristics.
Saturation region:
If is reduced to a small value, then the collector base junction becomes forward biased. The
emitter base junction is already forward biased. Hence it is in saturation region, which is
indicated in the characteristics.
Cut-off region:
When the input base current is made equal to zero, the collector current is the reverse leakage
current .
Accordingly in order to cut off the transistor, it is not enough to reduce to 0, but the emitter
junction has to be slightly reverse biased.
Cut-off is defined as the condition where the collector current is equal to the reverse saturation
current and the emitter current is equal to zero.
The CE configuration is the only configuration which provides both voltage gain as well as
current gain greater than unity. In the case of CB configuration, current gain is less than unity
and in the case of CC configuration voltage gain is less than unity.
Power gain is the product of voltage gain and current gain. CE configuration provides voltage
gain nearly equal to voltage gain provided by CB configuration and current gain nearly equal to
the current gain provided by CC configuration. Thus the power gain of the CE amplifier is much
greater than the power gain provided by the other two configurations.
In a CE circuit the ratio of output resistance to input resistance is small, may range from 10 Ω to
100 Ω. This makes configuration ideal for coupling between various transistor stages. However, in
other connections, the ratio of output resistance to the input resistance is very large and hence
coupling becomes highly efficient due to large mismatch of resistance
The circuit diagram for determining the static characteristics of an NPN transistor in the common
collector configuration is shown below:
We have,
We know that
We know
Eq(3) shows that the dc current gain using CC configuration is . Since is large
compared to 1, we see that current gains of CE and CC are nearly same.
Input characteristics:
To determine the input characteristics, is kept at a suitable fixed value. The base collector
voltage is increased in equal steps and the corresponding increase in is noted. This is
repeated for different values of . Plots of versus for different values of are shown in the
following figure.
Output characteristics:
FET is a semiconductor device like a BJT, which can be used as an amplifier or a switch. In
BJT, the current is carried by both the electrons and holes; hence it is called Bipolar Junction
Transistor.
In FET, current is carried by only one type of charge particles either electrons or holes, hence
FET is called Unipolar Device.
It is a three terminal device named as Drain (D), Source (S) and Gate (G).
Out of these three terminals Gate terminal acts as a controlling terminal. In BJT, the output
current is controlled by the base current . Hence BJT is a current controlled device.
But infact the voltage applied between the gate and source ( ) controls the drain current .
Therefore, FET is a voltage controlled device. The name Field Effect is derived from the fact
that the output current flows is controlled by as electric field in the device by an externally applied
voltage between gate and source terminals.
Structure of JFET:
A small bar of extrinsic semi conductor material, n-type is taken and at its two ends, two
ohmic contacts are made which are drain and source terminals of FET.
Heavily doped electrodes of p-type material to form p-n junctions on each side of the bar. The
thin region between the two p gates is called the channel.
Since this channel is in the n-type bar, the FET is known as n-channel JFET. The electrons
enter the channel through the terminal called Source and leave through the terminal called Drain.
The terminals taken out from heavily doped electrodes of p-type material are called Gates.
Usually these electrodes are connected together and only one terminal is taken out which is
called Gate as shown in the figure below.
Unbiased JFET:
In the absence of applied voltage, JFET has gate channel junctions under no bias conditions. The
result is a depletion region at each junction. This is similar to the depletion region of diode under
no bias conditions. This depletion region which does not have any free carriers and therefore,
unable to support conduction through the region.
In JFET, the p-n junction between gate and source is always kept in reverse biased conditions.
Since the current in the reverse biased p-n junction is extremely small, practically zero.
The gate current in JFET is often neglected and assumed to be zero.
In the figure shown below, the voltage is applied between drain and source. Gate terminal
is kept open.
Due to the polarities of applied voltage, the majority carriers i.e. electrons start flowing from
the source to the drain. This flow of current makes the drain current,
The majority carriers move from the source to the drain through the channel. The width of this
channel can be controlled by varying the gate voltage.
When the drain voltage is applied, a drain current flows in the direction shown in the
above figure. The drain current causes a voltage drop along the channel.
This voltage drop reverse biases the p-n junctions and causes the depletion region to penetrate
into the channel.
The penetration depends on the reverse bias voltage. From the figure it can be observed that
the depletion region width is more at the drain side than at the source side.
This shows that the reverse bias is not uniform near the junction. It gradually increases from
drain side to source side.
JFET characteristics:
The relationships between current and voltage in a JFET can be plotted graphically which are
commonly known as characteristics of JFET. The important characteristics of JFET are
Drain characteristics
Transfer characteristics
Drain characteristics:
The following figure shows the drain characteristics of a n-channel JFET. The curves represent
relationship between the drain current and drain to source voltage for different values of
.The following characteristics can be observed from the plot.
When the channel is entirely open. But at the same time so there is no attractive
force for the majority carriers and hence drain current does not flow.
Pinch off:
At an at the applied small voltage the n-type bar acts as a simple semiconductor
resistor, and the current increases linearly with this increase in increases the voltage
drop across the channel.
This increases the reverse bias at gate-source junction and causes the depletion regions to
penetrate into the channel, reducing the channel width. This provides more opposition to the
increase in drain current
Thus the rate of increase in w.r.t. is now reduced. The curved shape in the plot
represents this characteristic.
At some value of drain current cannot be increased further, due to reduction in channel
width. At this point even if is increased the drain current reaches a constant saturation
value.
The voltage at which the current reaches its constant saturation value is called Pinch-off
Voltage.
| |
a : half the region of n-type material without considering channel width in meters
electronic charge
When a negative external bias, is applied between the gate and the source, the gate channel
junctions are further reverse biased, reducing the effective width of the channel available for the
conduction.
Because of this the drain current is reduced and pinch off voltage is reached at a lower drain
current than when It can be shown in the following figure:
Breakdown region:
It can be observed from the above figure that as the value of increases beyond pinch off
voltage the drain current remains constant, upto a certain value of
If we further exceed the voltage will be reached at which the gate channel junction breaks
down, due to avalanche effect.
At this point the drain current increases very rapidly, and the device may be destroyed.
The drain characteristics of JFET are divided into two regions: Ohmic region and Saturation
region. In the ohmic region, the drain current varies with and the JFET is said to behave as
a voltage variable resistance.
In the saturation region the drain current remains constant and does not vary with
Saturation in FET refers to the limiting value to drift velocity.
Thus the number of carriers crossing the channel per unit time is limited or saturated. To use
FET as an amplifier, it is operated in saturation region.
Cut-off:
In an n-channel JFET the more negative causes drain current to reduce and pinch-off
voltage to reach at a lower drain current. When is made sufficiently negative, is reduced to 0.
This is due to the widening of the depletion layer to a point where it completely closes the
channel. The value of at cutoff point is designated as
The pinch-off voltage is the value of the at which the drain current reaches a constant value
for a given value of
The cutoff voltage is the value of at which the drain current is 0. is 0 only when the
magnitude of is equal to or greater than the magnitude of
The following plot shows the drain characteristics of p-channel JFET. The curves are identical
except that voltage and have reversed polarities and current flows in the reverse
direction.
The following curves represent relationship between the drain current and gate to source
voltage
( )
( √ )
The point A at the bottom end of the curve on the axis represents and the point B at
the top end of the curve on the axis represents Thus the operating limits of JFET are:
The transfer characteristic curve can be developed from the drain characteristics curves by
plotting values of for the values of taken from the set of drain curves in the pinch off region.
Polarities of and are reversed than that of the characteristics of n-channel JFET.
Transconductance ( )
Input resistance and capacitance
Drain to source resistance ( )
Amplification factor (μ)
Transconductance: ( )
The transconductance (mutual conductance) is the change in the drain current for a given change
in the gate to source voltage ( ) with the drain to source voltage ( ) constant. Looking at the
below plot, it is clear that the transconductance is the slope of the curve. it has greater value near
the top of the curve than it does near the bottom. The transconductance is defined as:
The value of at any point on the transfer charateristic curve can be calculated using the below
equation:
[ ]
, where is the value of for
To find the expression for consider the equation,
[ ]
Differentiating the above equation w.r.t. ,
[ ]
[ ]
Hence,
Units:
mS (millisiemen) or mA/V.
If a reverse bias voltage is applied externally to the gate, the reverse bias will further increase
and hence increase the penetration of the depletion layer which reduces the width of the
conducting portion of the channel.
As the width of the conducting portion of the channel reduces, the number of electrons flowing
from source to drain reduces and hence the current flowing from drain to source reduces.
If the reverse bias voltage to the gate is increased further, the depletion regions will increase
more and more and a stage will come when the width of the depletion regions will be equal to the
original width of the channel, leaving zero width for conducting portion of the channel.
This prevents the current flow from drain to source and this will cut off the drain current.
When the gate is shorted to source, there is minimum reverse bias between gate and source
junction, making depletion region width minimum and conducting channel width maximum.
In this case maximum possible drain current flows and this is the maximum possible drain
current in JFET. Hence, we can say that the gate to source voltage controls the current flowing
through channel and FET is also referred to as voltage controlled current source.
The major difference between FET and MOSFET is that it has no p-n junction structure; instead
the gate of MOSFET is insulated from the channel by a silicon dioxide layer. Due to this the
input resistance of MOSFET is greater than that of FET.
Depletion MOSFET:
On the application of drain to source voltage, and keeping gate to source voltage to zero by
directly connecting gate terminal to the source terminal, free electrons are attracted towards the
positive potential of drain terminal.
This establishes current through the channel to be denoted as at .
If negative voltage is applied, the negative charges on the gate repel conduction electrons from
the n-channel from the channel, and attract holes from the p-type substrate.
This results in the recombination of repelled electrons and attracted holes.
The level of recombination between electrons and holes depends on the magnitude of the
negative voltage applied at the gate.
This recombination reduces the number of free electrons in the n-channel for the conduction,
reducing the drain current.
Hence, due to recombination, n-channel is depleted of some of its electrons, thus decreasing
the channel conductivity.
Greater the negative voltage given to the gate, greater is the depletion of the n-channel
electrons. The level of drain current will reduce with increasing negative bias for
For positive values of the positive gate will draw additional electrons from the p-type
substrate due to reverse leakage current and establish new carriers through the collisions
between accelerating particles.
Because of this, as gate to source voltage increases in positive direction, the drain current also
increases as shown in the figure below:
The application of a positive gate to the source voltage has enhanced the level of free carriers in
the channel compared to that encountered with . For this reason, the region of positive
gate voltages on the drain or transfer characteristics is referred to as enhancement region and the
region between cutoff and the saturation levels of referred to as depletion region.
Symbols of E-MOSFET:
Construction of UJT:
A UJT is a three terminal device, having two layers. It consists of a slab of lightly doped n-
type silicon material.
The two base contacts are attached to both the ends of this n-type surface.
These are denoted as and respectively.
A p-type material is used to form a p-n junction at the boundary of the aluminum rod (p-
type) and silicon slab (n-type).
The third terminal called emitter terminal is taken out from this aluminum rod.
The n-type is lightly doped while p-type is heavily doped. In general construction, the
emitter terminal is closer to than .
Symbol of UJT:
Consider UJT with supply connected. With i.e. emitter diode is not conducting ,
Then the voltage drop across can be obtained using potential divider rule.
The voltage is called intrinsic standoff voltage because it keeps the emitter diode reverse
biased for all the emitter voltages less than
Principle of operation:
Case 1:
As long as is less than the p-n junction is reverse biased. Hence emitter current will not
flow. Thus UJT is said to be OFF.
Case 2: >
The diode drop is generally between 0.3 to 0.7 V. hence we can write,
When becomes equal to or greater than the p-n junction becomes forward biased and current
flows. The UJT is said to be ON.
Characteristics of UJT:
The characteristics of UJT are can be divided into three regions: Cut-off region, Negative
resistance region, Saturation region.
Cut-off region:
The emitter voltage is less than and the p-n junction is reverse biased. A small amount of
reverse saturation current flows through the device, which is negligibly small of the order of
This condition remains till the peak point is reached.
When the emitter voltage becomes equal to the p-n junctions becomes forward biased and
starts flowing. The voltage across the device decreases in this region with an increase in
Saturation region:
Beyond the valley point, the device is driven into Saturation region. The voltage corresponding to
valley point is called valley voltage . Further decrease in voltage does not take place. The
characteristic is similar to that of normal p-n diode in this region.
The pulse signal required to drive the digital circuits can be obtained from a single stage oscillator
circuits using devices like a unijunction transistor. The main application of a UJT is that it can be
used as a relaxation oscillator. The UJT relaxation oscillator gives non-sinusoidal output. The
circuit diagram of UJT relaxation oscillator is shown below:
The resistances and are called biasing resistances which are selected such that they are
lower than interbase resistances and . The resistance and capacitance decide the
oscillating rate. The value of is so selected that the operating point of UJT remains in the
negative resistance region.
Operation:
Capacitor gets charged through the resistance towards supply voltage . As long as the
capacitor voltage is less than peak voltage is less than peak voltage , the emitter appears as an
open circuit.
, where
When the capacitor voltage exceeds the voltage , the UJT fires. The capacitor starts
discharging through and where is internal bias resistance. The capacitor discharges
through Due to the design of this discharge is very fast, and it produces a pulse across .
When the capacitor voltage falls below i.e. , the UJT gets turned OFF. The capacitor
starts charging again.
The discharge time is controlled by and the charging time is controlled by the time constant
.
Oscillating frequency,
It is a four layer three terminal device in which the end P-layer acts as anode, the end N-layer acts
as cathode P-layer nearer to cathode acts as gate. As leakage current in silicon is very small
compared to germanium, SCRs are made of silicon but not germanium.
Characteristics of SCR:
SCR acts as a switch when it is forward biased. When the gate is kept open, i.e., gate current
operation of SCR is similar to PNPN diode. When the amount of reverse bias applied
to is increased. So, the break over voltage is increased. When > the amount of reverse
bias applied to is decreased and thereby decreasing the break over voltage. With very large
Applications of SCR:
SCR is used in
Relay control
Motor control
Phase control
Heater control
Battery chargers
Inverters
Regulated power supplies
Static switches
The operation of SCR can be explained in a very simple way by considering it in terms of two
transistors, called as the two transistor version of SCR. An SCR can be split into two parts and
displaced mechanically from one another but connected electrically. Thus the device may be
considered to be constitute by two transistors and connected back to back.
We have
( )
[ ]
[ ]
From the above equation if [ ] , then , i.e. the anode current suddenly reaches a
very high value approaching infinity. Therefore, the device suddenly triggers into ON state from
the original OFF state. This characteristic of this device is called its regenerative action.
SCR parameters:
Forward break over voltage : It is the voltage above which the SCR enters the conduction
region. The forward breakdown voltage is dependent on the gate bias.
Holding current It is that value of current below which the SCR switches from the
conduction state to the forward blocking state.
Latching current This is the minimum current flowing from anode to cathode when SCR goes
from OFF to ON state and remains in ON sate even after gate bias is removed. It is slightly greater
than holding current.
Reverse breakdown voltage It is the reverse voltage above which the reverse breakdown
occurs, breaking and junctions.
Maximum ON state voltage: It is the maximum value of the voltage appearing across SCR during
the conduction. Typically it is 1 V to 1.5 V.
Critical rate of rise of voltage: In many applications an a.c supply voltage is used with the SCR.
Because of junction capacitances inside the SCR, it is possible for a rapidly changing supply
voltage to trigger the SCR. To avoid such false triggering, the anode rate of change of voltage must
not exceed the critical rate of voltage rise . The negative gate current improves
value. It can also be improved by using snubber circuit as shown in the figure. It consists of a RC
circuit. The rate of anode voltage rise depends on the load resistance as well as the time constant
of the RC circuit.
Critical rate of rise of current: Another important parameter of SCR is a critical rate of current
rise. If the anode current tries to rise faster than this, a local hot spots will be formed near the
gate connection due to high current density. This causes the junction temperature to rise above
the safe limit and SCR may be damaged permanently. We know that, an inductor opposes
changing current, connecting inductor in series with SCR, as shown in figure reduces the rate of
current rise. Typical value of rating of SCR is 100 A/μs.
Minimum gate trigger current ( ): the minimum value of gate current which can trigger
SCR is defined as .
Maximum gate current It is the peak value of gate current which must not be exceeded
to avoid damage to the SCR.
Gate power loss It is the mean power loss due to gate current between the gate and the main
terminal.
Turn ON time The time required by SCR to reach full conduction after triggering is called
turn ON time. It consists of:
Turn OFF time it is the time required from the zero current point to the time when the SCR
regains its full blocking voltage in positive direction after the application of reverse voltage across
it. Typically, the turn OFF time of SCR is of the order of 10 – 50 μsec. For high frequency SCRs it
is 10 – 20 μsec. For satisfactory operation of the circuit, circuit turn OFF time must always be
greater than the turn OFF time of the SCR.
BJT BIASING:
The transistor can be operated in three regions: cut-off, active and saturation by
applying proper biasing conditions as shown in table.
When we bias the transistor we establish a certain current and voltage conditions for
the transistor. These conditions are known as operating conditions or dc operating
point or quiescent point. The operating point shifts with changes in transistor
parameters such as as transistor parameters are temperature dependent,
the operating point also varies with changes in temperature.
DC EQUIVALENT MODEL:
Consider a common emitter circuit shown in figure. The transistor in the figure is
biased with a common supply such that the base emitter junction is forward biased
and the collector base junction is reverse biased, i.e. transistor is in the active region.
In the absence of ac signal, the capacitors provide very high impedance, i.e., open
circuit. Therefore, the equivalent circuit for common emitter amplifier becomes, as
shown in figure.
Applying Kirchhoff’s voltage law to the collector circuit shown in the figure.
We get,
115
Is the voltage drop across and and is the collector to emitter voltage. if we
arrange the terms in equation (1) as
………………..
And compare this equation of straight line , Where m is slope of the line and
c is the intercept on y –axis, then we can draw a straight line on the graph of versus
which is having slope and Y-intercept to determine the two points on the
line we assume and
Now, if we draw the characteristic curve for this value of then intersection of this
curve and dc load line is the operating point. This is the fixed point on the
characteristics, so it is called quiescent point or Q point. For different values of , we
have different intersection points such as P,Q and R. all these points are quiescent
points.
The operating point can be selected at three different positions on the dc load line:
near saturation region, near cut-off region or at the center, i.e., in the active region.
Refer above figure. The selection of operating point will depend on its application.
When transistor is used as an amplifier, the Q point should be selected at the center of
the dc load line to prevent any possible distortion in the amplified output signal. This
is well- understand by going through following cases.
Case 1:
Case 2:
Case 3:
Biasing circuit is designed to fix a Q-point at point Q as shown in figure. The output
signal is sinusoidal waveform without any distortion. Thus point Q is the best point.
117
BIAS STABILIZATION:
The biasing circuit should be designed to fix the operating point or Q point at the
center of the active region. But only fixing of the operating point is not sufficient. While
designing the biasing circuit, care should be taken so that the operating point will not
shift into an undesirable region(i.e. into cut-off or saturation region)
Two important factors are to be considered while designing the biasing circuit which
are responsible for shifting the operating point.
I) Temperature:
1) The flow of current in the circuit produces heat at the junctions.
This heat increases the temperature at the junctions. We know that the
minority carriers are temperature dependent. The increase with the
temperature. The increase in the minority carriers increases the leakage
current
The increase in further raises the temperature at the collector junction and the
same cycle repeats. This excessive increase in shifts the operating point into the
saturation region, changing the operating condition set by biasing circuit.
The increase in the collector current increases the power dissipated at the collector
junction. This in turn further increases the temperature of the junction and hence
increases the collector current.
118
II) Transistor current gain (β): There are changes in the transistor parameters among
different units of the same type, same number, this means if we take two
transistors of same type (construction, parameters specified) and use them in
the circuit, there is change in the β value in actual practice. The biasing circuit
is designed according to the required β value. But due to the change in β from
unit to unit the operating point may shift. The figure shows the common emitter
output characteristics for two transistors of the same type. The dashed
characteristics are for a transistor whose β is much larger than that of the
transistor represented by the solid curves.
1. The emitter – base junction must be forward biased and collector – base
junction must be reverse biased i.e. the transistor should be operated in the
middle of the active region.
2. The circuit design should be provide a degree of temperature stability.
3. The operating point should be made independent of the transistor parameters.
119
1. Stabilization technique
2. Compensation technique
The figure (a) shows the fixed bias circuit. It is the simplest dc bias configuration. For
the dc analysis we can replace capacitor with an open circuit because the reactance of
a capacitor for dc is The dc equivalent of fixed bias circuit is
shown in figure (b).
CIRCUIT ANALYSIS:
Base circuit:
Collector circuit:
We now consider the collector circuit as shown in figure (d). applying Kirchhoff’s
voltage law to the collector circuit we get,
120
It is important that to note that since the base current is controlled by the value of
and is related to by a constant , the magnitude of is not a function of the
resistance . Changing to any level will not affect the level of as long as we
remain in the active region of the device. However, the charge in will change the
value of .
Emitter voltage
Similarly
In this circuit,
And
Thus stabilization of operating point is very poor in the fixed bias circuit.
CIRCUIT ANALYSIS:
Base circuit:
…………………… (1)
We have
…………….
Note that the only difference between the fixed-bias configurations is the term .]
or
122
Since
Collector circuit:
We now consider the collector circuit as shown in the figure. Applying KVL
to the collector circuit we have,
CIRCUIT ANALYSIS:
Base circuit:
Let us consider the base circuit as shown in figure.
Voltage across is the base voltage Applying the voltage divider theorem to find
123
Collector circuit:
Now, let us consider the collector circuit as shown in figure.
Voltage across can be obtained as,
Base circuit:
Let us consider base circuit of figure. Applying voltage law to the base circuit we get,
124
Now that the only difference between the equation for and that obtained for the fixed
bias configuration is the term . Thus we can say that the feedback path results in
reflection of the resistance to the input circuit.
Collector circuit:
Applying Kirchhoff’s voltage law to the collector circuit we get,
STABILITY FACTORS:
In order to compare the stability provided by different biasing
circuits, one term is called stability factor, which indicates degree of change in
operating point due to variation in temperature.
STABILIZATION FACTORS:
Since there are three variables which are temperature dependent, we
can define three stability factors as below:
Ideally stability factor should be perfectly should be zero to keep operating point
stable.
Practically stability factor should have the value as minimum as possible. Thermal
stability of a circuit is assessed by deriving a stability factor S.
Stability factor S:
For common emitter configuration collector current is give as
or
125
Stability factor :
and
Stability factor :
Stability factor S:
127
Collector to base bias provides lesser stability factor than for the fixed bias circuit.
Hence this circuit provides better stability than fixed bias circuit.
Stability factor :
We know
.
If S is small is still smaller .If we provide stability against variations we get
stability against variations also.
Stability factor :
Stability factor :
Stability factor is given by
We know that,
From equation we can see that lower the value of S, lower is the value of Thus as we
reduce s towards unity, we minimize the change of with respect to both, & .
Stability factor
Where
Therefore
COMPENSATION TECHNIQUES:
Since tracks with respect to temperature, it is clear from equation (2) that
will be insensitive to variations in .
When changes with temperature, also changes, to cancel the change in , one
diode is used in this circuit for compensation as shown in figure. The voltage at is
now
.
Substituting in this equation (3) we get,
If the diode which is used in this circuit is of the same material and type as transistor,
the voltage across the diode will have same temperature coefficient -2.5mv/°c as the
base to emitter voltage
From figure
We know
Substituting the value of we get
if we get .
Thermistor compensation:
This method of transistor compensation uses temperature
sensitive resistive elements, thermistors rather than diodes or transistors. It has a
negative temperature coefficient, its resistance decreases exponentially with
increasing temperature.
Slope of this curve = .
is the temperature coefficient for thermistor and the slope is negative &thermistor
has negative temperature coefficient NTC. Figure shows thermistor compensation
technique. As shown in figure
is replaced by thermistor in self bias circuit .With
increase in temperature , decreases. This voltage drop
is nothing but the voltage at the base with respect to
ground. Hence decreases which reduce .This
behaviour will offset the increase in collector current with
temperature.
THERMAL RUNAWAY:
The maximum average power which a transistor can dissipate
depends upon the transistor construction and may lie in the range from a few mill
watts to 200W .The maximum power that the collector to base junction can withstand.
For silicon transistor this temperature in the range of 150°to 225°C. And for
135
Thermal Resistance:
The steady state temperature rise at the collector junction is proportional to the
power dissipated at the junction
=junction temperature in °C
=ambient temperature in °C
=power dissipated in watts at the collector junction
=constant of proportionality
Thermal stability:
As the reverse saturation current for both silicon and germanium increases about 7%
we can write,
As , and are positive equation 6 provides that the square bracket is negative.
1. A charged particle having charge thrice that of an electron and mass twice that
of an electron is accelerated through a potential difference of 50 V before it
enters a uniform magnetic field of flux density of 0.02 Wb/m2 at an angle of 25°
with the field. Find
(a) The velocity of the charged particle before entering the field,
(b) Radius of the helical path, and
(c) Time of one revolution. (S-1, Sup Nov’09) (16), (S-3 Sup Aug ’08) (16)
Sol: Given the charge of the particle is, Q = 3q and mass of the particle is M = 2m
i) The velocity of the charged particle before entering the field is
2 6 6 × 1.6 × 10 × 50 m
= = = = 5.14 × 10
2 2 × 9.1 × 10 s
2 2 2 4 × 9.1 × 10
= = = = 1.19 × 10 sec
3 0.02 × 3 × 1.6 × 10
2. (a) What is deflection Defocusing? Give the reasons of defocusing. (S-2, Sup
Nov’09) (4)
(b) Compare: Electrostatic deflection and magnetic deflection. (S-2, Sup Nov’09)
(6)
(c) An electron beam is deflected of 10° degrees when it traverses in
uniform magnetic field, 3 cm wide, having a density of 0.6 mT. Calculate:
6. For the given display area longer The shorter tubes can be built for the
tubes are necessary. given display area.
7. For greater sensitivity, if is reduced, Though is reduced, more brightness
the brightness of the spot also and resolution of spot can be achieved.
reduces.
8. The scheme is used for the general The scheme is preferred for the TV and
purpose oscilloscopes. radar.
Electron gun:
•
It produces a focused beam of
electrons.
• It consists of indirectly heated
cathode, a control grid, a
focusing anode and an
accelerating anode.
• The control grid is at a
negative potential with
respect to cathode, the two
anodes are maintained at a high positive potential with respect to cathode.
• These two anodes act as an electro static lens to converge the electron beam at a
point on the screen.
• The control grid encloses the cathode and consists of a metal cylinder with a tiny
circular opening to keep the electron beam small in size.
Deflection plates:
• The electron beam has to pass through the horizontal and vertical deflection plates
before it strikes the screen.
• When no voltage is applied to the vertical deflection plates, the electron beam
produces a spot of light at the centre of the screen.
• If the upper plate is positive with respect to the lower plate, the electron beam is
deflected upwards.
2
We know that =
200
= = = 40000 V
5 × 10
1.60 × 10 × 40000 m
= = = 7.04 × 10
9.11 × 10 sec
i) For V0 = 0
= ; =
V = (7.04 × 1015) (0.5×10-9) = 3.52×106 msec
2 2 × 1.6 × 10 × 200 m
= = = 9.38 × 10
9.1 × 10 sec
b) Time taken by the electron to travel from plate A to plate B can be calculated from
the average velocity of the electron in transit. The average velocity is
= 5 × 10 = 5 × 10
2
The distance travelled by the electron
= = 5 × 10 + = 5 × 10
2 6
0.799 × 10
Therefore the time, = = = 1.816 × 10
44 × 10
The total time of transit of electron from cathode to anode = 1× 10-9 + 1.816 × 10-7 =
1.826×10-7 s
10. What are the front panel controls of CRO? Explain. (S-3
Reg Jun ’08) (16)
Sol: C.R.O. Operation: Typical front-panel controls
1. On–off switch.
2. INTENS. This is the intensity control connected to the grid G to control the beam
intensity and hence the brightness of the screen spots. Don’t run the intensity too
high, just bright enough for clear visibility. Always have the spot sweeping left to
right or the beam may “burn” a hole in the screen.
3. FOCUS allows you to obtain a clearly defined line on the screen.
4. POSITION allows you to adjust the vertical position of the waveform on the screen.
(There is one of these for each channel).
5. AMPL/DIV. is a control of the Y (i.e. vertical) amplitude of the signal on the screen.
(There is one of these for each channel).
6. AC/DC switch. This should be left in the DC position unless you cannot get a signal
on-screen otherwise. (There is one of these for each channel).
7. A&B/ADD switch. This allows you to display both input channels separately or to
combine them into one.
8. +/- switch. This allows you to invert the B channel on the display.
9. Channel A input
10. Channel B input
11. X POSITION: It allows adjusting the horizontal position of the signals on the
screen.
12. LEVEL: This allows you to determine the trigger level; i.e. the point of the waveform
at which the ramp voltage will begin in time base mode.
13. ms/μs: This defines the multiplication factor for the horizontal scale in time base
mode.
14. MAGN: The horizontal scale units are to be multiplied by this setting in both time
base and xy modes. To avoid confusion, leave it at x1 unless you really need to
change it.
15. Time/Div: This selector controls the frequency at which the beam sweeps
horizontally across the screen in time base mode, as well as whether the
oscilloscope is in time base mode or xy (x VIA A) mode.
This switch has the following positions:
(a) X VIA A: In this position, an external signal connected to input A is used in place
of the internally generated ramp. (This is also known as xy mode.)
(b) .5, 1, 2, 5, etc. Here the internally generated ramp voltage will repeat such that
each large (cm) horizontal division corresponds to .5, 1, 2, 5, etc. ms. or μs
depending on the multiplier and magnitude settings.
The following controls are for triggering of the scope, and only have an effect in timebase
mode.
16. A/B selector. This allows you to choose which signal to use for triggering.
17. -/+ will force the ramp signal to synchronize its starting time to either the
decreasing or increasing part of the unknown signal you are studying.
18. INT/EXT: This will determine whether the ramp will be synchronized to the signal
chosen by the A/B switch or by whatever signal is applied to the EXT. SYNC.
Input.
19. AC/TV selectors. I’ve never figured out what this does; find whichever position
works.
20. External trigger input
11. Analyze the motion of an electron under perpendicular electric and magnetic
fields.
(S-4 Reg Jun ’08) (16)
Sol: PERPENDICULAR ELECTRIC AND MAGNETIC FIELDS
• The directions of the fields are as shown in the figure; the magnetic field is directed
along the Y axis, and the electric field as directed along negative X axis.
• The force of an Electron due to electric field is directed along positive X axis.
• Any force due to the magnetic field is always normal to B, and hence lies in a plane
parallel to XZ plane.
• Thus there is no force along the Y direction.
=0 = =
= =
≡ ≡
= −
(1)
=
(2)
If the first equation is differentiated and combined with equation (2), we get
=− =−
This linear differential Equation with constant coefficients is readily solved for .
Substituting this Expression for in Equation 1, this Equation can be solved
for .
= =0
So, = sin = − cos
By integrating the Expressions, we get
= (1 − cos )
= − sin
Suppose = and ≡
Then, = (1 − cos ) = ( − sin )
ln =( − )
= − ln
So, the Fermi level EF shifts towards the conduction band in n-type semi
conductor.
• As per similar reason, the Fermi level shifts towards the valence band in p-type
semi conductor. It lies above the acceptor energy level.
• The doped material is always electrically neutral as the total no. of electrons is
equal to the total no. of protons, after the addition of impurity.
If is the concentration of donor ions,
≅
= exp[−( − )/ ]
= e[ ( )/ ]
ln = −( − )
ln =( − )
= + ln
So, the Fermi level EF shifts towards the valence band in p-type semi conductor.
=
(1)
Where is the electrostatics barrier potential that exists on both sides of the
junction.
Thermal equilibrium hole concentration on p-side.
= (0)
(2)
Where, (0) = hole concentration on n-side near the junction; V = applied forward
bias voltage
From equations (1) and (2),
(0) =
(0) =
(0) =
Therefore, the total hole concentration in ‘n’ region at the junction varies with applied
forward bias voltage ’V’ as given by the above expression.
1
( )=
1+
Where K: Boltzmann constant in eV/0k.
T: Temperature in 0Kelvin
: Fermi level or characteristics energy for the crystal in eV.
E: Energy level occupied by an electron in eV.
• The Fermi level EF indicates the probability of occupancy of an energy level by
an electron
5. Explain in detail PN junction energy band diagram of a PN diode. (S-2, 4 Reg Jun
’09) (16)
Sol: A P-N junction is formed by placing p and n type materials in intimate contact on an
atomic scale.
• The Fermi level EF is closer to the conduction band edge ECN in the n type material
and closer to the valence band edge EVP in the p-side.
Band structure: The energy E0 represents the potential energy of the electrons at the
junction.
Department of Electronics and Communication Engineering Ramachandra College of Engineering – ELURU
EDC Question Bank 11
R10 JNTU: Kakinada II-Year B. Tech Electronic Devices and Circuits
148
− = −
2
Adding the above two equations, we get
= + = −( − )−( − )
We know that =
Also, = −
Therefore,
− =
− =
− =
= − −
= =
E is expressed in electron volts; k has dimensions of electron volts per degree Kelvin.
V0 is expressed in volts
Note: V0 depends only upon the equilibrium concentrations and not at all upon the
charge density in the transition region.
So, finally,
= =
6. (a) Explain about semiconductor, Insulator & Conductor with neat sketch.
(b) State the Einstein relationship for semiconductor.
(c) State Pauli’s exclusion principle.
(S-4, Sup Nov’09) (S-3 Reg Jun ’09)(S-3 Sup Aug ’08)(S-4 Reg Jun ’08) (6+5+5)
Sol: a) Conductor:
b) Einstein relationship:
• The drift current density is proportional to the mobility (µ) while diffusion current
density is proportional to the diffusion constant (D).
• There exists a fixed relation between these two constants which is called Einstein
relationship.
= =
Where T is the temperature in Kelvin and
k is the Boltzmann’s constant = 8.62×10-5 eV/K
c) Pauli’s exclusion principle:
• It states that no two electrons in an electronic system can have set of quantum
numbers n, l, ml, ms.
• This means that no two electrons may occupy the same quantum state is called
Pauli’s exclusion principle.
8. (a) What is diffusion length (L)? (S-2 Sup Aug ’08) (4+12)
(b) A Diode operating at 300 k at a forward voltage of 0.4 V carries a current
of 10 mA when voltage is changed to 0.42 V the current becomes thrice.
Calculate the value of reverse leakage current and η for the diode (Assume
VT = 26 mV).
Sol: (a)
• When radiation falls on one side of an n-type semi conductor, some of the photons
break the covalent bonds and generate new electron hole pairs near the
surface x=0.
• Since electrons and holes are generated in pairs, equal number of holes and
electrons are injected at x=0.
• When the excess minority carriers (holes) generated is very small compared to the
electron concentrations, and then the condition is known as low level injection.
• Under this condition, the drift current due to holes can be neglected and the hole
current is due to the diffusion alone.
• As the holes diffuse and move deeper, they recombine with electrons resulting in
decrease in concentration.
• The average distance travelled by a hole before recombination is known as diffusion
length and is denoted by LP. It is given by
=
Where, is the diffusion coefficient of hole and is known as carrier life time.
Now = −1
.
10 × 10 =I e × −1
.
20 × 10 =I e × −1
In forward bias condition 1<< ev/ηVT, neglecting 1
.
10 × 10 =I e ×
.
20 × 10 =I e ×
.
1 ×
=
2 .
×
Taking logarithms on both sides we have
16.153 15.384
= 2+
1
= 0.6931
(16.153 − 15.384)
η = 1.109 hence I0 = 9.45 nA
2 Number of diodes 1 2 4
3 No load DC 2 2
output
4 Peak inverse 2
voltage
7 Ratio of
rectification 0.812 0.812 0.812
8 Ripple frequency
f 2f 2f
Maximum
9 efficiency 40.6% 81.2% 81.2%
10 Average current /2 /2
12 Peak factor 2 √2 √2
(b) Given values are = 20 V; = 200 Ω
For a bridge rectifier
2
=
= ⟹ = × √2 = 20 × √2 = 28.28 V
√2
Hence
2 2 × 28.28
= =
= 18 V
18
DC load current = = = 90.03 mA
200
For a bridge rectifier peak inverse voltage PIV = = 28.28 V
2. Derive the ripple factor of Inductor filter. (S-2, Sup Nov’09) (16)
Sol:
= −1
1 2
= = sin ( )+ 0 ( ) =
2 2
= = =
If the values of diode forward resistance and transformer secondary winding resistance
are also taken into consideration, then
2
= − ( + )
I = =
(r + r ) + (r + r ) +
= + (2 ) = +4
V
Therefore, for the ac component =
+4
2 4 cos(2 − )
Therefore, the resulting current i is given by, = − where
3 +4
2
= tan
The ripple factor, which can be defined as the ratio of the rms value of the ripple to the
dc value of the wave, is
√ 2 1
Γ= = ×
3√2
1+
4
If ≫ 1, then a simplified expression for Γ is
Γ=
3√2
In case the load resistance is infinity, i.e. the output is an open circuit, and then the
ripple factor is
2
Γ= = 0.471
3√2
This is slightly less than the value 0.482. The difference being attributable to the
omission of higher harmonics as mentioned. It is clear that the inductor filter should
only be used where is consistently small.
3. Derive all the necessary parameter of bridge rectifier. (S-3, Sup Nov’09) (16)
Sol: The bridge rectifier circuits are mainly used as:
(a) A power rectifier circuit for converting AC power to DC power supply.
(b) A rectifying system in rectifier type AC meters, such as voltmeter in which the AC
voltage under measurement is first converted into DC and measured with conventional
meter. In this system, the rectifying elements are copper oxide type (or) Selenium type.
In the next half cycle, the polarity of AC voltage reverse hence point B becomes
positive. Diodes D3 and D4 are forward biased while D1 and D2 are reverse biased. Now
the diodes D3 and D4 conduct in series with the load and the current flows as shown
in the figure. It is seen that in both cycles of AC the load current is flowing in the same
direction, hence we get a full wave rectified output.
Expressions for various parameters:
Ripple factor: The ratio forms value of ac component to the dc component in the
output is known as ripple factor.
= =
√
Γ = − 1 = 0.812
Efficiency: The ratio of DC output power to AC input power is known rectifier efficiency (η).
( )
DC output power 8
= = = = = 0.812 = 81.2%
AC input power ( )
√
The maximum efficiency of a bridge rectifier is 81.2%.
Transformer utilization factor (TUF): The average TUF in a full wave rectifying circuit by
considering the primary and secondary winding separately and it gives a value of
0.693.
Form factor:
RMS value of the output voltage √
Form factor = = = = 1.11
Average value of the output voltage 2√2
Peak factor:
Peak value of the output voltage
Peak factor = = = √2
RMS value of the output voltage /√2
2
For full wave rectifier = =
+
2
+ =
(Or) + =
2
= − ( )
− = ( )
4. Determine: (S-4, Sup Nov’09) (S-1 Sup Aug ’08) (S-1 Reg Jun ’08) (16)
(a) DC output voltage (b) PIV (c) Rectification efficiency of the given
circuit.
dc output power
= = = = = 81.2%
ac input power ,
√
Hence efficiency of a full wave rectifier = 81.2%.
5. (a) Draw the circuit diagram of HWR. Explain its working. What is the
frequency of ripple in its output?
(b) A HWR circuit supplies 100 mA D.C to a 250 Ω load find the D.C output
voltage, PIV rating of a diode and the r.m.s. voltage for the transformer
supplying the rectifier. (S-1 Reg Jun ’09) (S-2 Reg Jun ’08) (8+8)
Sol: a) Half wave rectifier:
•
A half wave Rectifier is a circuit, which converts
an ac voltage into a pulsating dc voltage using
only one half cycle of the applied ac voltage.
• It uses one diode which conducts during one
half cycle of the applied ac voltage.
• During the positive half cycle of the input voltage, diode D1 becomes forward
biased and conducts.
• The load current flows through D1 and the voltage drop across RL will be equal to
the input voltage.
• During the negative half cycle of the input voltage, diode D1 becomes reverse
biased and remains OFF
Ripple factor: The ratio forms value of ac component to the dc component in the
output is known as ripple factor.
= −I (r + r )
= =
(r + r ) + (r + r ) +
1 1
= sin = (1 − cos2 )
2 4
=
2
= − 1 = 1.21
From this we observe that 1.21% of average voltage is present in dc so the half wave
rectifier is not useful practically.
b) Given values are Idc = 100 mA; RL = 250 Ω
= = 100 × 10−3 × 250 = 25 V
= ( ) = 25 = 78.54 V
78.54
= = = 55.53 V
√2 √2
6. A voltage of 200 cos ωt is applied to HWR with load resistance of 5 kΩ. Find the
maximum DC current component, R.M.S. current, ripple factor, TUF and rectifier
efficiency. (S-2 Reg Jun ’09) (S-4 Reg Jun ’08) (16)
Sol: Given peak voltage Vm = 200 V
Peak current =
+ +
Neglect the values of forward resistance and winding resistance then the equation
becomes
= = 200/5000 = 0.04
dc output power
= = = = = 40.6%
ac input power ,
7. Derive the ripple factor of capacitor filter. (S-3 Reg Jun ’09) (S-4 Sup Aug ’08) (16)
Sol:
= =
+ + + +
RMS value at the load resistance can be calculated as
1 1
= sin = (1 − cos2 )
2
=
√2
√
Γ = − 1 = 0.812
From the cut-in point to cut-out point, whatever charge acquires is equal to
the charge the capacitor has lost during the period of non-conducting that is from
the cut-out point to the next cut-in point.
The charge it has acquired = , ×
The charge it has lost is = ×
, × = ×
If the value of the capacitor or RL is very large then T2 is assumed to be half of
time period.
1
= =
2 2
Then , =
With the assumptions made above the ripple waveform will be triangular and the
rms value of the ripple
,
, =
2√3
Therefore , =
4√3
=
Hence the zener current is
= – = − (1)
We know that the relation between the base, emitter, collector currents and it is equal
to
= +
As IB is very small value it can be neglected hence the above equation becomes IE ≈ IC
The load current flowing through the output loop is obtained as
6.7
= = = 3.7 mA
2 × 10
Hence the equation (1) becomes
= − = − = − (let I = I )
3.85 3.85 × 10
= 3.7 − = 3.7 × 10 − = 3.68 mA
100 100
9. Derive the ripple factor of Π- Filter with neat sketch. (S-2 Sup Aug ’08) (16)
Sol:
Ripple factor: The ratio forms value of ac component to the dc component in the
output is known as ripple factor.
, = ( ) − ( )
= −1
1 2
= = sin ( )+ 0 ( ) =
2 2
= = =
I = =
(r + r ) + (r + r ) +
√
= − 1 = 0.812
√2 ×
Then the current through LC filter is
√2 × ×
Output voltage, =
c) Bleeder resistor:
ii) A sinusoidal varying current components with peak value . The negative
peak of ac current must always be less than dc, i.e √2Irms we know that
Inductor input filter: The LC filter or choke input filter is called as inductor input
filter, the inductor input filter consists of a L filter followed by a C filter.
current flows through D2 and the voltage drop across RL will be equal to the input
voltage.
Ripple factor: The ratio forms value of ac component to the dc component in the
output is known as ripple factor.
By using this need for center tap can be avoided. In this there are 4 diodes connected
to form a bridge. The ac input voltage is applied to diagonally opposite ends of the
bridge. The load resistance is connected between the other two ends of bridge.
For the positive half cycle of input ac voltage, D1 and D3 conduct, whereas
diodes D2 and D4 do not conduct. The conducting diodes will be in series through the
RL. so the load current flows through RL.
For the positive half cycle of input ac voltage, D1 and D3 do not conduct,
whereas diodes D2 and D4 conduct. The conducting diodes will be in series through
the RL. so the load current flows through RL.
Ripple factor: The ratio forms value of ac component to the dc component in the outpt
is known as ripple factor.
1. With a neat sketch explain the drain source characteristics & transfer
characteristics of depletion type MOSFET. (S-1, 3 Sup Nov’09) (16)
Sol: Depletion MOSFET:
Construction of n-channel depletion type MOSFET:
• The basic construction of n-channel depletion type MOSFET is shown below.
• Two highly doped n-regions are diffused into a lightly doped p-type substrate.
• The two highly doped n-type regions acts as source and drain. In some cases substrate is
internally connected to the source terminal.
• The source and drain terminals are connected through metallic contacts to n-doped
regions linked by an n-channel.
• The gate is also connected to a metallic contact surface but remains insulated from the n-
channel by a very thin layer of dielectric material, silicon dioxide .
• Thus, there is no direct electrical connection between the gate terminal and the channel of
a MOSFET, increasing the input impedance of the device.
Operation of n-channel depletion type MOSFET:
• On the application of drain to source voltage, and keeping gate to source voltage to
zero by directly connecting gate terminal to the source terminal, free electrons are attracted
towards the positive potential of drain terminal.
• This establishes current through the channel to be denoted as at .
• If negative voltage is applied, the negative charges on the gate repel conduction electrons
from the n-channel from the channel, and attract holes from the p-type substrate.
• This results in the recombination of repelled electrons and attracted holes.
• The level of recombination between electrons and holes depends on the magnitude of the
negative voltage applied at the gate.
• This recombination reduces the number of free electrons in the n-channel for the
conduction, reducing the drain current.
• Hence, due to recombination, n-channel is depleted of some of its electrons, thus
decreasing the channel conductivity.
• Greater the negative voltage given to the gate, greater is the depletion of the n-channel
electrons. The level of drain current will reduce with increasing negative bias for
• For positive values of the positive gate will draw additional electrons from the p-type
substrate due to reverse leakage current and establish new carriers through the
collisions between accelerating particles.
• Because of this, as gate to source voltage increases in positive direction, the drain current
also increases as shown in the figure below:
p-channel depletion type MOSFET: The construction of the p-channel depletion type
MOSFET is exactly opposite of that of n-channel depletion type MOSFET. Here, the substrate
is of n-type regions and the drain and source regions are of p-type. The drain and transfer
characteristics are as shown:
Department of Electronics and Communication Engineering Ramachandra College of Engineering – ELURU
EDC Question Bank 29
R10 JNTU: Kakinada II-Year B. Tech Electronic Devices and Circuits
166
2. Explain the operation of SCR during forward & Reverse bias (S-2, Sup Nov’09)
(16)
A: SILICON CONTROLLED RECTIFIER:
The basic structure and circuit symbol of SCR is shown below:
Characteristics of SCR:
The characteristics of SCR are shown below.
SCR acts as a switch when it is forward biased.
When the gate is kept open, i.e., gate current
operation of SCR is similar to PNPN
diode. When the amount of reverse bias
applied to is increased. So, the break over
voltage is increased. When the
amount of reverse bias applied to is
decreased and thereby decreasing the break
over voltage. With very large positive gate
current break over may occur at a very low voltage such that the characteristics of
SCR may is similar to that of ordinary PN diode. As the voltage at which SCR is
switched ON can be controlled by varying the gate current it is commonly called
controlled switch. Once SCR is turned ON, the gate loses control, i.e., the gate cannot
be used to switch OFF the device. One way to turn the device OFF is by lowering the
anode current below the holding current by reducing the supply voltage below
holding voltage keeping the gate open.
Applications of SCR:
SCR is used in
• Relay control
• Motor control
• Phase control
• Heater control
• Battery chargers
• Inverters
• Regulated power supplies
• Static switches
ratio of change in the gate – source voltage to the drain current at constant drain –
source voltage. It is also denoted by .
4. Derive an Eber’s Moll equation for a transistor. (S-1 Reg Jun ’09) (S-2 Sup Aug ’08) (16)
A: Detailed study of currents in a transistor:
• We know that the net current crossing a junction equals the sum of the electron current
in the p-side and a hole current in the n-side, evaluated at the junction ( ).
• For a p-n-p transistor, electrons are injected from the base region across the emitter
junction into a p-region which is large compared with the diffusion length.
• This is the condition that exists in a diode. Hence the equation for current can be
written as:
Consider (3),
At ,
At ,
We know that,
, where
Similarly,
, where
Here,
The reverse saturation current is temperature sensitive and it doubles for every 10°C rise
in temperature. Since is negligibly small in most practical situations, we can
approximately write, or
The value of is close to 1.
For a transistor,
It can be observed that there is slight increase in emitter current ( ) with increase in . This
is due to change in the width of the depletion region in the base region in the reverse bias
condition.
Early effect:
FIGURE
As shown in the above figure, when reverse bias voltage increases, the width of the
depletion region also increases, which reduces the electrical base width. This effect is early
effect or base width modulation.
Consequences of early effect:
• There is less chance for recombination within the base region. Hence the transport factor
, and also , increase with an increase in the magnitude of the collector junction voltage.
• The charge gradient is increased within the base, and consequently, the current of
minority carriers injected across the junction increases.
Output characteristics:
It is the curve drawn between collector current and collector to base voltage at constant
emitter current . The collector current is taken along Y-axis and collector to base voltage
along X- axis.
The output characteristics has three basic regions:
Region Emitter base junction Collector base junction
Active Forward biased Reverse biased
Cut-Off Reverse biased Reverse biased
Saturation Forward biased Forward biased
As increases also increases. Thus, depends upon input current but not on collector
voltage. Hence input current controls output current. Since transistor requires some current
to drive it, it is called current operating device.
Punch through (reach through) effect:
A transistor breakdown occurs when the collector to base voltage, increases beyond
certain limit. Such breakdown is called punch through or reach through. The following
figure shows the potential barriers at the junctions of transistor at different biasing levels.
• Fig(1) shows the potential barriers at the junctions for unbiased transistor.
• In the absence of applied voltage the potential barriers at the junctions adjust themselves
to
• With these potential barriers the current does not flow through the junction. Fig(2) shows
the potential barriers of transistor when EB junction is forward biased and CB junction is
reverse biased.
• The forward bias of EB junction reduces the EB potential barrier by and reverse bias
of CB junction increases the CB potential barrier by .
• When reverse voltage at CB junction increases beyond certain limit, effective base width
becomes zero and the transition region spreads completely across the base to reach the
emitter junction.
• As a result, emitter and collector are effectively shorted.
• This results in large increase in emitter current resulting in breakdown. The magnitude of
should be maintained at safe limit in order to avoid punch through.
Difference between avalanche breakdown and punch through:
Punch through occurs at a fixed voltage (where ) between collector and base, and is
not dependent on circuit configuration. For a particular transistor the limit for maximum
collector voltage is determined by punch through or breakdown, whichever occurs at lower
voltage.
6. Derive the analytical expression for transistor characteristics. (S-3 Reg Jun ’09) (16)
A: The dependence of the currents in a transistor upon the junction voltages, or vice
versa, may be obtained by using the below equation:
represents the drop across the collector junction and is positive if the junction is
forward biased. The subscript N for in the above equation shows that the transistor is
in the normal manner. As there is no essential reason that constrains us from using a
transistor in inverted manner i.e., interchanging the roles of the emitter junction and
collector junction the above equation can be now written as,
Here is the inverted common base current gain and is the emitter junction reverse
saturation current, and is the voltage drop from p-side to n-side at the emitter junction
and is positive for forward biased emitter.
Base spreading resistance: The reference directions of current and voltages are shown
in the figure below. represents the voltage from collector to base terminals and it
differs from by the ohmic drops in the base and collector materials. As the base region
is very thin, the current which enters the base region across the junction areas must flow
through a long narrow path to reach the base terminal. The cross sectional area for the
current flow in the collector (or emitter) region is very much larger than that of in the base
region. Hence, the ohmic drop in the base alone is important. This DC ohmic base
resistance is called the base spreading resistance and is indicated in the following
figure:
The difference between and is due to the ohmic drop across the body resistances of
the transistor, particularly the base spreading resistance
The Ebers-moll model: The above two equations can determined from the circuit known
as ebers-moll model. The model is shown below for a p-n-p transistor. It involves two
ideal diodes placed back to back with reverse saturation currents and and two
independent current controlled current sources shunting the ideal diodes. For a p-n-p
transistor both and are negative so that and are positive values. Applying
KCL to the collector node of the following figure, we get,
of in the above equation gives eq(1). As the base spreading resistance is neglected, the
difference between and is neglected. In the following figure the dependent current
sources can be eliminated from this figure provided By making the base
width much larger than the diffusion length of minority carriers in the base, all minority
carriers will recombine in the base and non will survive to reach the collector. Under
these conditions, transistor action ceases and will simply have two diodes placed back to
back. Hence, it is clear that it is impossible to construct a transistor by simply connecting
two separate diodes back to back.
In the above two equations, the parameters are related by the condition
Since the sum of three currents must be zero, the base current is given by:
The common emitter characteristics are found by subtracting equations (6) and (7) and by
eliminating by using equation (5). The resulting equation can be simplified provided
that the following inequalities are valid.
, where
7. (a) Write the reason why the ICO value is negative for NPN transistor & ICO
value is positive for NPN transistor.
(b) Define base spreading resistance. (S-4 Reg Jun ’09) (10+6)
A: a) means the reverse saturation current. The current is due to the flow of
minority charge carriers. When we consider the PNP transistor, consists of holes
moving from left to right and electrons crossing in the opposite direction. In the base,
which is n-type, holes are the minority charge carriers. In the collector, which is p –
type, electrons are the minority charge carriers. As the collector is doped more heavily
than base the influence of negative charge carriers will be more in the PNP transistor.
So is negative in a PNP transistor.
Whereas in the NPN transistor, consists of electrons are moving from left to
right and holes crossing in the opposite direction. In the base, which is p – type, holes
are minority charge carriers. In the collector, which is n – type, holes are minority
charge carriers. As the collector doped more heavily than base the influence of positive
charge carriers will be more in NPN transistor. So is positive in a NPN transistor.
b) Base spreading resistance: To complete the equivalent circuit, we must take into
account the ohmic resistances of three transistor regions. Since base region is very
thin, the base current passes through a region of extremely small cross section. Hence
this resistance , called the base spreading resistance, is very large, and may be of
order of several hundreds of ohms. On the other hand, the collector and emitter ohmic
resistances are in few ohms, and may be usually neglected. If the external connection
to the base is designated by B, then between the fictitious internal base node B’ and B
we must place a resistance . If the base spreading resistance could be neglected so
that B and B’ coincided, the circuit would be identical to hybrid model.
8. (a) Why we call FET as a voltage controlled device?
(b) Write about the broad classification of FET.
(c) Draw the circuit symbol of p-Channel, n-Channel FET. (S-1 Sup Aug ’08)
(4+6+6)
A: a) FET as voltage controlled device:
• If a reverse bias voltage is applied externally to the gate, the reverse bias will further
increase and hence increase the penetration of the depletion layer which reduces the width
of the conducting portion of the channel.
• As the width of the conducting portion of the channel reduces, the number of electrons
flowing from source to drain reduces and hence the current flowing from drain to source
reduces.
• If the reverse bias voltage to the gate is increased further, the depletion regions will
increase more and more and a stage will come when the width of the depletion regions will
be equal to the original width of the channel, leaving zero width for conducting portion of
the channel.
• This prevents the current flow from drain to source and this will cut off the drain current.
When the gate is shorted to source, there is minimum reverse bias between gate and
source junction, making depletion region width minimum and conducting channel width
maximum.
• In this case maximum possible drain current flows and this is the maximum possible
drain current in JFET. Hence, we can say that the gate to source voltage controls the
current flowing through channel and FET is also referred to as voltage controlled current
source.
b) FET means Field Effect Transistor. FET is an voltage controlled unipolar device. The FETs
are categorised as:
1. Junction field effect transistor (JFETs)
2. Metal Semiconductor Field Effect transistors (MESFETs)
3. Metal Oxide Semiconductor Field Effect Transistors (MOSFETs)
Junction field effect transistor (JFETs) and Metal Semiconductor Field Effect
transistors (MESFETs) are further classified into two types as, n – channel
JFET/MESFET and p – channel JFET/MESFET and further classified into two types
as depletion mode MOSFET and enhancement mode MOSFET.
In JFET, there is a direct electrical connection between the gate terminal and
the channel of a JFET. On the other hand, in MOSFETs, the gate is insulated from the
channel b a very thin layer of dielectric material, silicon dioxide (SiO2). Thus, in
MOSFETs, there is no direct electrical connection between the gate terminal and the
channel. Due to this extra layer the input resistance of MOSFET is very very high.
The MOSFETs can be used in place of resistors in a circuit, so that circuits
containing only MOSFETs can be designed. The MOSFET, compared to BJTs, can be
made very small. Since digital circuits can be designed using only MOSFETs, with
essentially no resistors or diodes are required, high – density VLSI circuits, including
microprocessors and memories, can be fabricated using MOSFETs. The MOSFET has
made possible the hand – held calculator and the powerful personal computer.
MOSFETs can be used in analog circuits.
c) Symbol of n – channel JFET
The above figure shows the structure and symbol of n – channel JFET. A small bar of
extrinsic semiconductor material, n type is taken and at its two ends, two ohmic
contacts are made which are the drain and source terminals of FET. Heavily doped
electrodes of p type material form p – n junctions on each side of the bar. The thin
region between the two p gates is called the channel. Since this channel is in the n
type bar, the FET is known as n – channel JFET.
The electrons enter the channel through the terminal called source and leave through
the terminal called drain. The terminals taken out from heavily doped electrodes of p
type material are called gates. Usually, these electrodes are connected together and
only one terminal is taken out, which is called gate.
Symbol of p – channel JFET
The device could be made up of p – type bar with two n type gates as shown in the
figure. Then this will be p – channel JFET. This principle of working of n – channel
JFET and p – channel JFET is similar; the only difference being that in n – channel
JFET the current is carried by electrons while in p – channel JFET, it is carried by
holes.
9. With a neat sketch explain the drain source characteristics & transfer
characteristics of enhancement type MOSFET. (S-3 Sup Aug ’08) (16)
A: n-channel Enhancement MOSFET:
Symbols of E-MOSFET:
n – channel p – channel
Large signal current gain It is the ratio of the negative of current due to injected
carriers to the total emitter current
This equation for indicates that the collector current in the active region is essentially
independent of collector voltage and depends only upon the emitter current. To generalize
the equation of that stands for any voltage across we need to replace in the
equation by the current in a p-n diode. The generalized equation of is therefore given as,
Sol: (a) To operate the transistor as an amplifier, it must be biased with proper DC
voltage. If it is properly biased the output signal is faithful reproduction (faithful
reproduction means the output is replica of the input signal with some amplification
factor) of the output signal. If the transistor is not properly biased with correct DC
voltage on the input and output it can go into saturation or cutoff, when an input AC
signal is applied. As a result the output signal is clipped one side. That is the output
signal is not a faithful reproduction of the input signal. In this case output is distorted.
To avoid distortion the operating point should be relocated the collector
characteristics.
DC load line:
The values of VCC and RC are fixed and and are dependent on RB
Applying KVL to the above circuit at the collector we have
The straight line represented by AB is called dc load line. The coordinates of the end
point A are obtained by substituting in the above equation. Then
The coordinates of the end point A are obtained by substituting in the above
equation. Then . Hence the dc load line can be drawn if the values of
and are known.
The point is located at the middle of the dc load line i.e. exactly in between the
saturation and cut-off regions. In order to get the faithful amplification the point
must be in the active region.
(b) Given values are = 50; = 150; = 0.6 V;
2. (a) Find the collector current and collector to emitter voltage for the given
circuit as shown in below figure: (S-2, Sup
Nov’09) (10)
(b) Can the value of stability factor be less than unity? Explain briefly. (6)
b) The stability factor can’t be less than 1 because for the following conditions
The formula for stability factor is
This means that as the value of increases the value of decreases so that the
value of S will be less than 1, but according to the formula as
increases the value of increases. This means that always the value of is directly
proportional to . So the value of S will be always greater than 1 only.
3. (a) What is the use of biasing?
(b) Draw the dc equivalent model.
(c) The circuit as shown in the below figure has fixed bias using NPN
transistor. Determine the value of base current, collector current, and
collector to emitter voltage. (S-3, Sup Nov’09) (S-3, 4 Sup Aug ’08) (4+4+8)
c)
4. In a CE germanium transistor, find Q - point for the circuit of potential divider bias
arrangement with R2 = RC = 5 kΩ, RE = 1 kΩ and R1 = 40 kΩ.
(Assume ) (S-4, Sup Nov’09) (16)
Sol: Given values are
2.18-0.440=3.37 V
Hence the quiescent point is
Fixed bias:
• This form of biasing is also called base bias. The single power
supply is used for both collector and base of transistor. The dc
analysis of the circuit yields the following equations
VCC = IBRB + VBE;
Since this equation is independent current , and the stability factor given in
As β is very large quantity, the stability is also very large hence poor stability.
Collector-to-base bias:
• However, a larger Ic causes the voltage drop across resistor Rc to increase, which
in turn reduces the voltage across the base resistor Rb.
• A lower base-resistor voltage drop reduces the base current Ib, which results in
less collector current Ic.
• Because an increase in collector current with temperature is opposed, the
operating point is kept stable.
• Stability factor for this circuit is given as
Self bias:
6. Briefly explain fixed bias with Emitter Feedback. Also find the stability of this
bias.
(S-2 Reg Jun ’09) (16)
Sol: Fixed bias with emitter feedback:
Merits: The circuit has the tendency to stabilize operating point against changes in
temperature and β-value.
Demerits: In this circuit, to keep IC independent of β the following condition must be
met: which is approximately the case if
• As β-value is fixed for a given transistor, this relation can be satisfied either by
keeping RE very large or making RB very low.
• If RE is of large value, high VCC is necessary. This increases cost as well as
precautions necessary while handling.
• If RB is low, a separate low voltage supply should be used in the base circuit.
Using two supplies of different voltages is impractical.
• In addition to the above, RE causes ac feedback which reduces the voltage gain
of the amplifier.
Usage:
• The feedback also increases the input impedance of the amplifier when seen from
the base, which can be advantageous.
• Due to the above disadvantages, this type of biasing circuit is used only with
careful consideration of the trade-offs involved.
7. In a germanium transistor CE amplifier biased by feedback resistor method, VCC =
20 V, VBE = 0.2 V, β = 100 and the operating point is chosen such that VCE = 10.4
V and IC = 9.9 mA, determine the value of RB and RC. (S-3 Reg Jun ’09) (16)
Sol: Given values are VCC = 20 V, VBE = 0.2 V, β = 100, VCE = 10.4 V, IC = 9.9
mA
To determine
By writing KVL to the output loop equation we have
To determine
By writing KVL to the output loop equation we have
8. A transistor with β = 50; VBE = 0.7 V, VCC = 22.5 V, and RC = 5.6 kΩ is used in
biasing circuit shown below. It is designed to establish the quiescent point at VCE
= 12 V, IC = 1.5 mA and stability factor S < 3. Find the value of resistor RE1, R1
and R2. (S-4 Reg Jun ’09) (16)
Sol: Given values are β = 50; = 0.7 V, = 22.5 V, = 5.6 kΩ; = 12 V, = 1.5
mA
To determine :
By writing to the collector loop we have
Let us consider IC≈ IE, substitute this value in above equation we have
RE = 1.4 kΩ
To determine Stability factor,
Also we know that for a good voltage divider, the value of resistor R2 = 0.1β = 0.1 x 50 1.4 103
= 7 kΩ
R1 = 5.17 kΩ
Hence
DC load line
(1)
When ,
When , = 16/(5 103) = 3.2 mA
Hence the DC load line is
=6V
Hence the operating point = (6 V, 2 mA)
10. If the various parameters of a CE amplifier which uses the self bias method are VCC
= 12 V, R1 = 10 kΩ, R2 = 5 kΩ, RC = 1 kΩ, Re = 2 k and β = 100, find
(a) The coordinates of the operating point, and
(b) The stability factor, assuming the transistor to be of silicon. (S-3 Reg Jun ’08)
(16)
Sol: Given values are
The straight line represented by AB is called dc load line. The coordinates of the end
point A are obtained by substituting in the above equation. Then
The coordinates of the end point A are obtained by substituting in the above
equation. Then . Hence the DC load line can be drawn if the values of
and are known.
The Q point is located at the middle of the dc load line i.e. exactly in between the
saturation and cut-off regions. In order to get the faithful amplification the Q point
must be in the active region.
b)
Given values are RB = 400 kΩ; RC = 2 kΩ; RE = 1 kΩ; β =100; VCC =20 V
Applying KVL to the input loop we have
Let the transistor be silicon
1. A transistor used in a CC Circuit as shown in the figure below has the following
set of h parameters: (S-1, 2, 3, 4 Sup Nov’09) (S-1, 3 Reg Jun ’09) (S-1, 3 Sup Aug ’08)
hic = 2 kΩ, hfc = – 51, hrc = 1, hoc = 25 × 10−6.
Find the values of input and output resistances, current and voltage gains of the
amplifier stage. Use the approximate analysis.
Input impedance = 1
=2 103 + 51 1 5 103 = 257 kΩ
Voltage gain
Output impedance
2. (a) Draw the low frequency hybrid equivalent circuit for CE & CB amplifier.
(b) Give the approximate h-parameter conversion formulae for CB and CC
configuration in terms of CE.
(c) Give the advantages of h-parameter analysis.
(d) Give the procedure to form the approximate h - model from exact h -
model of amplifier. (S-2, 4 Reg Jun ’09) (S-2, 4 Reg Jun ’08) (4+6+3+3)
Ans: a) For Common emitter configuration For common Base configuration
b)
Symbol Conversion formula
c) Advantages of h – parameters:
Department of Electronics and Communication Engineering Ramachandra College of Engineering – ELURU
EDC Question Bank 53
R10 JNTU: Kakinada II-Year B. Tech Electronic Devices and Circuits
190
Since , this voltage may be neglected in comparison with the voltage drop
across provided that is not too large.
To conclude, if the load resistance is small it is possible to neglect the
parameter and and obtain the approximate equivalent circuit. It can be shown
that if the error in calculating , , , and for CE configuration is
less than 10%.
Voltage gain,
Output impedance
4. Derive the expressions for voltage gain, current gain, i/p impedance, o/p
impedance of CE amplifier, using exact & approximate model. (S-4 Sup Aug
’08) (16)
A: Expressions for voltage gain, current gain, i/p impedance, o/p impedance of CE
amplifier, using exact model:
Current gain : It is the current gain taking into account the source resistance,
if the model is driven by the current source instead of voltage source. It is given by
And hence
Input impedance : As shown in the figure, is the input resistance looking into
the amplifier input terminals (1, 1’). It is given by
Hence
Substituting
In the above equation we have
Substituting
We get,
From this equation we can note that input impedance is a function of the load
impedance.
Voltage gain : It is the ratio of output voltage to the input voltage . It is given
by
Power gain : It is the ratio of average power delivered to the load , to the input
power. Output power is given as
Since the input power is the operating power gain of the transistor is
defined as
Expressions for voltage gain, current gain, i/p impedance, o/p impedance of CE
amplifier, using approximate model:
Now, see how can we modify this model so as to make the analysis simple without
greatly sacrificing accuracy ?
Since is in parallel with RL if , then hoe may be neglected. If we
neglect hoe, the collector current Ic is given by . under these conditions the
magnitude of the voltage of the generator in
the emitter circuit is,
By neglecting
5. (a) Write a short notes on millers theorem. (S-1 Reg Jun ’08)
(b) Analyze a single stage transistor amplifier using h – parameters. (S-1 Reg Jun ’08)
A: a) Consider an arbitrary circuit configuration with N distinct nodes 1, 2, 3… N. Let the
node voltages be , where and N is the ground node or reference
node. Nodes 1 and 2 are interconnected with impedance .designate the ratio
by K, which in the sinusoidal steady state will be a complex number and more
generally will be a function of Laplace transform variable . We shall now see that the
current drawn from through can be obtained by disconnecting terminal 1 from
and by bridging an impedance from to ground, as indicted in figure.
The current is given by
Let us apply the above theorem to the grounded cathode stage, taking interelectrode
capacitances into account. Terminal N is the cathode whereas nodes 1 and 2 are the
grid and plate, respectively. Then represents the capacitive reactance between grid
and plate, or , and represents the voltage gain between input and
output. If plate – circuit resistance, and , then, in the mid – band
region, . Shunting the input terminals of the amplifier is an effective
impedance , as shown
b)
Current gain : It is the current gain taking into account the source resistance,
if the model is driven by the current source instead of voltage source. It is given by
And hence
Input impedance : As shown in the figure, is the input resistance looking into
the amplifier input terminals (1, 1’). It is given by
Hence
Substituting
In the above equation we have
Substituting
We get,
From this equation we can note that input impedance is a function of the load
impedance.
Voltage gain : It is the ratio of output voltage to the input voltage . It is given
by
Power gain : It is the ratio of average power delivered to the load , to the input
power. Output power is given as
Since the input power is the operating power gain of the transistor is
defined as
Input impedance,
Voltage gain,
Output impedance