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Design considerations of a single-stage LED lamp driver with power factor

correction

Conference Paper · November 2011

DOI: 10.1109/EPECS.2011.6126799

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 Design Considerations of a Single-Stage LED Lamp
Driver with Power Factor Correction
Mokhtar Ali1, Mohamed Orabi1, Mahrous E. Ahmed1 and Abdelali El Aroudi2
1
APEARC, South Valley University, Aswan 81542
2
Universitat Rovira i Virgili, Tarragona, Spain

Abstract- Light emitting diodes (LEDs) with their current
performances have become the most convenient solution to
replace conventional lighting sources. LEDs are current driven
devices with low equivalent dynamic resistance. This causes
instabilities and bifurcations in the driver. Therefore, this paper
provides the analysis and design considerations of the stability
boundaries of the LED lamp model in comparison with resistive
loads. Single stage power factor correction converters are cost
effective solution to drive LED lamps with a near unity power
factor and high efficiency. Unfortunately the single stage
converters suffer from two main problems: the increased voltage
stresses and bifurcations during line cycle. The proposed LED
lamp driver is based on a modified SEPIC converter which is
well known by its reduced voltage stresses. If the system is
operated in discontinuous conduction mode (DCM), the input
current will follow automatically the input voltage profile. This
paper describes the fast-scale instability in a power-factor-
correction (PFC) modified SEPIC converter operating in DCM
for driving LED lamps. This work provides a convenient mean of
designing a high performance LED lamp driver and predicting
stability boundaries which can facilitate the selection of practical
parameters values for maintaining stable operation. In this
paper, it will be shown that, with improper choice of system
parameters, the converter can suffer from fast-scale instability
for some intervals of time during the line cycle. Simulation
results of exact cycle-by-cycle system equations are presented to
demonstrate the effectiveness of the proposed design method.
Then, a laboratory prototype is built to verify the feasibility of
the proposed LED lamp driver and design considerations.
Keywords- discontinuous conduction mode; LEDs; modified
SEPIC; fast-scale instability.
I. INTRODUCTION
Rapid advances in material and manufacturing technologies
have made the light emitting diodes (LEDs) the most
convenient choice for lighting sources [1-2]. Lighting sources
represent approximately 20 % of the total electrical energy
consumed in the world [3]. According to [4] and [5], the LED
lamp offers many advantages such as: extremely long life, c.
100.000 hours, which is more than 10 times that of compact
fluorescent lamp (CFL), extreme robustness as there are no
glass components or filaments, no external reflector, a
modular construction, relatively high efficacy, no Ultra-Violet
(UV) or Infra-Red (IR) output and they can be dimmed
smoothly from full output to off.
The characteristics of LEDs are the same as conventional
PN junction. In Figure 1, the I-V (current-voltage)
characteristics of a resistive load and an LED load are
depicted [6]. LEDs have a much smaller equivalent dynamic
resistance than an equivalent resistive load. Typically the
operating current of the high brightness white (HBW) LED
ranges from 200 to 700 mA. The typical drive voltage is about
2.5 V to 4 V. The illumination produced by a LED is
relatively weak, so strings of LEDs are connected in series
and/or parallel to increase the flux [7]. The voltage of a series
of LED is the voltage drop of individual LED times the
number of LED in series. The current of a series of LED in
parallel is the sum of the LED currents of all the strings.
Fig. 1. I-V characteristics of resistive load and LED load.
Nowadays, a topic of interest in this context is the design of
the electronic driver in order to take the advantages of LEDs
performances. The LED brightness is strongly dependent on
its current so an efficient control is needed to regulate the LED
current. The driver takes the universal input voltage 90 V to
230 V rms and delivers it to the LED lamp which operates
with DC current. The driver not only performs the unity power
factor correction but also regulates the LED current. The size,
the life time and the cost are also other concerns of the driver.
The driver must be in a small size and with the lowest
permissible cost and highest performance.
Single stage power factor correction (PFC) topologies are
the most suitable converters for lighting applications as they
have only one active switch, high efficiency, a near unity
power factor, one control loop and smaller size than two
stages topologies [8]. Unfortunately, single stage AC/DC
converters suffer from their high voltage stresses and
bifurcations [9-10]. Recently, studies of the dynamical
behavior of switching power converter circuits have revealed
the possibilities of various kinds of bifurcation behavior. It has
been observed that the peak current can increase by a
significant percentage when fast-scale instabilities occur in
some intervals of the mains cycle. Thus, the study of such between the equivalent resistance at the operating point and
instability problems has a practical motivation. the dynamic resistance, much higher the former than the latter.
The modified SEPIC converter for driving LED lamp is Therefore, the most accurate approximation is the one
shown in Fig. 2. This converter is known by its advantage for consisting of a threshold voltage and a dynamic resistance in
lower voltage stresses [11-12]. Therefore, the proposed LED series, as shown in Figure 3.
lamp driver in this paper is based on the modified SEPIC
converter. The system offers the benefits of: low voltage
stress, Vc1 which is controlled by the ratio L1/L 2, single switch,
small magnetic components and high power factor.

Fig. 3. Approximate equivalent circuits of LED load.

Fig. 2.The modified SEPIC LED lamp driver.
LEDs are current driven devices with a low dynamic
resistance that affects the driver stability. The system suffers
from bifurcations during line cycle. This paper provides the
analysis and design considerations of the stability boundaries
of the LED lamp model in comparison with resistive loads.
Also, it describes the fast-scale instability in PFC modified
SEPIC converter operating in DCM for driving LED lamps
applications.
In Section II, the modeling of LED lamp is introduced. In
section III, the fast scale instability of single stage converters
is described. Section IV gives the description of the control
loop. The state equations used in the simulation for resistive
and LED load are given in Section V. Section VI gives the
performance of the proposed driver and the stability
boundaries for the design. Simulation and experimental results
to verify the validation of the proposed driver and design
method are presented in Section VII. Finally, some
conclusions are given in the last section.
Then, the LED load current-voltage model would be the
following:
= + (2)
where VD is the forward voltage drop of the LED, is the
dynamic resistance, is the LED forward current and is
the threshold voltage. Considering the whole string in series,
the expression for the output voltage is the same, but
multiplied by the number of LEDs in series:
= + = + (3)
where is the entire string output voltage and N is the
number of LEDs in series.
Linear interpolation of the Cree® XLamp® MC-E LED
current-voltage characteristics is shown in Fig. 4. Table I gives
the values of and that will be used later in the
simulation.

II. LED LAMP MODELLING

In this section, it will be shown that the LED characteristics

cause fast-scale instability problems. HB-LEDs are usually
low power devices, ranging from 1 W to 5 W at current levels
ranging from 200 mA up to 700 mA while performing
nowadays luminous efficiencies more than 100 lm/W at 350
mA. The current-voltage characteristics shown in Fig. 1 can be
approximated by the following equation:

= (1) Fig. 4. Linear interpolation of LED load.

TABLE I
where a and b are independent parameters. FEED FORWARD C URRENT AND V OLTAGE VALUES
This exponential relationship explains the low dynamic ID ( mA) Vo ( V) RD ( Ω) Vγ ( V)
resistance of LED at working conditions. The devices chosen
for the modeling is Cree® XLamp® MC-E LED [13]. The 100 2.85
simplest linear model takes into account only the equivalent 200 3
resistance of the device at the nominal operating point [14]. 300 3.15
1.07 2.8
This is a valid method only if the load is working in a narrow 400 3.35
range around the nominal point. Otherwise, this approximation 500 3.4
yields to unacceptable errors due to the great difference 600 3.43
 III. FAST SCALE INSTABILITY O F MODIFIED SEPIC PFC
CONVERTER
In normal operation, the modified SEPIC converter operates
with a variable duty cycle that allows the input current to
follow the input voltage in a resistor emulator approach.
Computer simulations show that for a certain range of
parameters, fast-scale instability may occur within a line
cycle. Figure 5 shows a bifurcation free waveform. An
example for which the fast-scale instability occurs at the
switching scale during the line cycle is shown in Fig. 6. Figure
7 shows the FFT spectrum of the inductor L1 current
waveform. It is clear that this current has a high THD.
IV. THE CONTROL LOOP DESCRIPTION
One of the main advantages of DCM operation is the simple
controller at which the current is naturally taking the input
voltage profile. The control of the driver, which is shown in
Fig. 8, uses a simple PWM scheme, in which a control voltage
vcon is compared with a sawtooth signal to generate a PWM
signal to drive the controlled switch. The modulator sawtooth
signal is expressed by
( )= +( − ) (4)
where Vl and Vu are its lower and upper voltage limits, and T is
its period which is also the switching period. The PWM
signal is high when vcon > vramp, and is low otherwise. The
control voltage vcon is derived from a voltage feedback loop.

= − − (5)

where Vref is the reference output voltage, Kv is the feedback

gain, and Voffset is a DC voltage that gives the required steady
state duty cycle D that can be expressed as follows

= + ( − ) . (6)

Fig. 5. Inductor L 1 current with input voltage 90 V rms and gain K =0.01.
Stable bifurcation free behavior

Fig. 8. Schematic of the current controller.

V. STATE EQUATIONS FOR SIMULATION WITH RESISTIVE

AND LED LOAD

When the modified SEPIC converter operates in DCM, three

switch states are possible during a switching cycle, namely,
State A: when S1 is on, D2 is on and D1 is off.
State B: when S1 is off, D2 is on and D1 is on.
State C: when S1 is off, D2 is off and D1 is off.

The state equations corresponding to the previous state are

Fig. 6. Inductor L 1 current with input voltage 90 V rms and gain K =0.02.
Fast-scale instability. Ẋ= + () for state A
Ẋ= + ( ) for state B
Ẋ= + ( ) for state C
(7)
where vin (t) is the rectified input voltage, and the state vector
is defined as follows

(8)
=

Fig. 7. FFT spectrum of the L1 inductor current corresponding to Fig. 6.

 and B1, B2, B3 are given from
⎡ ⎤ 0
⎢ ⎥ 0 (10)
= = ⎢0⎥ , =
⎢0⎥ 0
(a) ⎣0⎦ 0
The above state equations, in conjunction with the control
equations discussed earlier, will be used in the simulation
study for the resistive load.

(b) B. With LED load:

In the case of a LED load, the matrices A1, A2, A3 are as
follows
⎡− 0 0 0 ⎤
(c) ⎢ ⎥
⎢ 0 + 1
− − 0 ⎥
⎢ ⎥
=⎢ 1 ⎥
⎢ 0 − 0 0 ⎥
⎢ ⎥
⎢ 0 ⎥
0 0 −
⎣ ⎦
1
(d)
⎡ − − − − ⎤
Fig. 8. Circuit configurations in the DCM. ⎢ ⎥
(a) state A, (b) State B, (c) State C, (d) Inductor L 1 and L2 currents ⎢− −
1
( +

) 0 − ⎥

⎢ ⎥
A. With resistive load: =⎢ ⎥
1
In the case of a purely resistive load, the matrices A1, A2, A3 ⎢ 0 0 0 ⎥
are given by ⎢ ⎥
⎢ −
− 0 − ⎥
⎡− 0 0 0⎤ ⎣ ⎦
⎢ ⎥
⎢ 0 + 1
− 0⎥ ( )
⎢ ⎥ where F5 = ( and F6 = 1 − .
=⎢ 1 ⎥ )
⎢ 0 − 0 0⎥ 0 0 0 0
⎡0 0 0 0 ⎤
⎢ ⎥ ⎢ ⎥
⎢ 0 0 − 0⎥ = ⎢0 0 0 0 ⎥
⎣ ⎦ ⎢0 0 0 − − ⎥
1 ⎣ ⎦
⎡ − − − ⎤ − (11)
⎢ ⎥ and the vectors B1, B2, B3 are the same as in Eq 10.
⎢− −
1
( +

) 0 − ⎥ For LED load, the above state equations, in conjunction with

⎢ ⎥ the control equations discussed in section IV, will be used in
=⎢ ⎥
1 the simulation study to find the boundary of stable operation.
⎢ 0 0 0 ⎥
⎢ ⎥
⎢ − 1 ⎥ VI. P ERFORMANCE O F THE MODIFIED SEPIC
− 0 − CONVERTER AS LED LAMP DRIVER
⎣ ⎦
A. Stability boundaries
0 0 0 0 Since we are primarily concerned with system stability in
⎡0 0 0 0 ⎤
⎢ ⎥ relation to the time varying input voltage, we focus our
= ⎢0 0 0 0 ⎥ attention on the dynamical behavior of the system subject to
⎢0 0 0 − ⎥ input voltage variation. Our simulation is based on the state
⎣ ⎦ equations derived above. After the transient period, we capture
(9) the steady-state time-domain waveforms of the inductor
current and output voltage. The circuit parameters used in our
( )
where F1= ( , F2 = , F3 = + + simulations are shown in Table II.
) From the above analysis, the effect of feedback gain on the

and F4 =1 − . converter stability is determined in terms of the rms value of
the input voltage. The analysis was made for both the resistive
load and for LED load. Figure 9 shows the boundary between
stable and unstable regions. It is found that the critical value of
the parameter Kv for the system to be stable depends on
whether the LED is modeled with its equivalent circuit or with
only a pure resistance.
Fig. 9.Stability boundary in terms of feedback gain Kv versus input voltage for
resistive load and LED load.
TABLE II
CIRCUIT PARAMETERS USED IN SIMULATION AND
EXPERIMENTS
Line Frequency 50 Hz
Input Voltage 90-230 V rms
Switching Frequency 75 kHz
Inductance L1 160 µH
Inductance L2 80 µH
Capacitance C 1 82 µF
Capacitance C 2 180 µF
B. Voltage stresses as compared with other single stage PFC
converters
One of the main advantages of the modified SEPIC
converter is its lower voltage stresses than the conventional
one. The value of the stress is only dependent on the ratio of
L1 / L2. An analysis is done to judge which ratio is optimum in
Fig. 10. It is found that there is a great change between ratio of
1 and 2, but there is a bit difference between 2, 3 and 4. The
selected ratio is 2. Figure 11 shows the change in percentage
reduction of voltage stress compared with conventional SEPIC
converter as a function of input voltage. This ensures the
feasibility of modified SEPIC converter as a low voltage stress
single stage PFC converter.
Fig. 10. Influence of L1 / L2 on percentage reduction in voltage stress of using
modified SEPIC converter and using conventional SEPIC at 90 V input.
C. The power factor of the proposed LED lamp driver
The modified SEPIC converter operating in DCM behaves
as a resistor emulator so the input current follows the input
voltage naturally with only one control loop. Figure 12 shows
the power factor of the proposed LED lamp driver with the
supply input voltage. The power factor of the converter is
high and in all cases is above 0.9 and therefore it meets the
standards such as IEC 1000-3-2.
Fig. 11. The percentage reduction in voltage stress of using modified SEPIC
converter and using conventional SEPIC versus the rms value of the input
voltage.
Fig. 12. The power factor of the converter versus the rms value of the input
voltage.
D. The efficiency of the driver
The advantages of the modified SEPIC converter mentioned
earlier also give it a higher efficiency. Figure 13 shows the
efficiency of the proposed converter with LED lamp power at
input voltage of 90 and 220 V rms. It is shown that it is a
convenient solution in low power application. Its efficiency is
high also in higher power levels but the increased current
stress with increased load power reduces its appropriated at
such levels.
Fig. 13. The efficiency of the proposed LED lamp driver versus LED power.
VII. EXPERIMENTAL V ERIFICATION OF THE DESIGN
A prototype of the proposed LED lamp driver has been
built to confirm the results presented in last section. It is an
example of LED street lighting lamp of 60 W and 500 mA
LED current. Figure 14 shows a schematic of the experimental
circuit. The design rules provided in last section are used.
Figure 15 shows the L1 inductor current together with the
input voltage for 90 and 220 V rms values of the input voltage.
It is clear that the system is free from bifurcation and fast-
scale instabilities. Figure 16 shows the corresponding input
current and the input voltage.
Fig. 14. Schematic of the experimental circuit.
(a)
(b)
Fig. 15 The inductor L1current waveform with the input voltage
a) at supply voltage 200 V rms. b)at supply voltage 90 V rms.
(a)
(b)
Fig. 16 The measured input voltage (with a scale of 1/100) and the input
current (1 A Ω):
a) at supply voltage 90 V rms. b) at supply voltage 150 V rms
VIII. CONCLUSIONS
In this paper the design considerations of a single-stage
high efficiency LED lamp driver with power factor correction
has been proposed. The proposed driver is based on a
modified SEPIC converter operating in DCM. The modeling
of LED lamp and the theoretical analysis for stability
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boundaries of the proposed driver with comparison with
resistive load have been described in details. An example for
LED lighting has been designed and tested using numerical
simulations and experimental measurements from a laboratory
prototype. The experimental results and the numerical
simulations have been correspondingly shown to verify the
feasibility of the proposed scheme and validated the proposed
design considerations for LEDs lighting applications. It has
been found that high power factor and high efficiency can be
achieved with only a single stage with low THD.
ACKNOWLEDGEMENT
This work was partially supported by the Spanish {\em
Ministerio de Ciencia e Innovación} under grant DPI2010-
16481 and the Egyptian ministry of Science, Egyptian science
and technology development funds (STDF project No 346).
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