Nanopores Manufacture Using The Controlled Dielectric Breakdown

Technique.

Summary— This article presents the fabrication of a
system intended for the creation of solid state nanopores
using the controlled dielectric breakdown technique. It
analyzes how the nanopore is physically created, the
electric circuit construction for its control, the
appropriate handling of the materials and the software
in charge of controlling and analyzing the creation of the
nanopores.
Index terms— solid state nanopores, creation, silicon
nitride, DAQ, /ACC/, DNA and RNA sensor, (Ag/AgCI),
KCL..
SiNx is used. After placing the SiNx layers we proceed to
the photolithography process. Photoresist coating is placed
evenly while using UV light to eliminate the desired
sections. Then, the reactive ion etching technique is applied
to contact the plasma ions with the wafer, eliminating the
previously UV illuminated section. A KOH coating is added
to obtain a highly anisotropic etching and to generate a
particular angle in the silicon wafer which act as a guide [3].

I. INTRODUCTION

The solid state nanopores are nanometric scale pores

fabricated on a thin membrane (chip) made out of inorganic
materials such as Silicon Nitrate (SiNx). [1] They are
frequently used for characterizing or distinguishing
biomolecules (DNA, RNA or proteins) by passing electrical
signals at the moment of translocation of these molecules.
[2]. Traditionally solid state nanopores are created by
applying the transmission electron microscopy technique
TEM, which consists in sculpting the nanopores through
high-energy particle beams concentrated in an specific spot;
however, there is another more expensive method that
consists of using ion beams, this one has the ability of
creating nanopores with a precision of 1nm [2]. . H. Kwok, This process produces a SiNx chip as seen on figure 1. In
et al. They present an alternative technique for making solid this project a 30 nm of thickness, 0.05x0.05 mm window
state nanopores through a dielectric controlled breakdown in size, 3mm diameter NORCADA chip will be used. The basic
a solution, undergoing an electric potential difference. This idea for the creation of the nanopore in the SiNx chip is
technique lowers the nanopore manufacturing costs since it shown in Figure 2.
holds the possibility of a complete automation, it also lowers In order to generate the dielectric breakdown in the
the costs for circuit construction. This technique also makes membrane and to obtain the nanopore, the silicon nitride
easy replication possible with a precision of creation to sub chip must be immersed in KCL solution with a determined
nanometric scale. [2]. concentration and pH. (Revise section 3.1 Cells and
electrodes treatment description). When applying electric
II. Theoretical Foundation potential difference to both sides of the chip (transmembrane
potential) a 0.4-1V/nm electric field will be generated inside
The silicon nitride chip (SiNx), where the nanopore is going the SiNx film [2]. These numbers can be obtained using the
to be drilled, is manufactured in a process of many stages. following equation.
First it is just a 200 nm of thickness silicon wafer, then a thin
layer of silicon nitride is added (to both sides of the chip)
through low pressure chemical vapor deposition (LPCVD)
with the purpose of creating low stress. To find a good
balance between sensitivity and sturdiness a 10 to 30 nm

Electric field equation that describes a constant potential difference SIGNO throughout the SinX film thickness (L). [2]
The potential difference is made through a DC power supply and the passage of electric current is controlled by an
amperemeter with a sensitivity range of nA (nanoamperes).

IMAGEN

The potential difference is going to generate an ion concentration on the membrane walls, which will allow the
production of leakage currents through it. The electrons transit in tunnel effect assisted by traps and are produced by
redox reactions on the surface or by field ionization of incorporated ions. The leakage current will therefore will
depend of the structural defects of the material. A concentration of traps produced by the induced electric field is
generated as well as a highly localized path that will yield and create the nanopore. [2]

IMAGEN

In the potential drop of the whole system SIGNO is the contribution of:

FORMULA

Figura 4. Nanopore created by waste removal in the dielectric, allowing the pass of ions. [2]

The summation of the potential drop of electrodes, the KCI solution and the membrane. It is
important to emphasize that the is not necessarily symmetric in both compartments. [4] SINGO
of SIGNO is small since it has an electrochemically big area. [4] SIGNO of KCI has a small drop
of potential because of the high conductivity of electrolytes (CI-) and (K+). Therefore, the
electric field lines throughout the pore get closer:

IMAGEN FORMULA

Where Vpol is the polarization voltage. The pore resistance has two main factors, the internal
cylinder formed in the membrane and its access resistance. This last one becomes increasingly
significant if L (membrane distance) is less or equal in magnitude.

IMAGEN

Figure 5. Display of nanopore transverse cylindrical area of solid state (geometric idealization)
crossed by electric field lines. [4]

At first instance, the membrane internal cylindric resistance (see figure 5) is modeled as follows.

FORMULA

The resistance is inversely proportional to its transversal section (A= area), proportional to its
length (L) and to the environment resistivity (p). if it is thought that the nanopore is not a
uniform cylinder