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4, OCTOBER 2000
Abstract—Part I of this paper set sets forth theory and algo- current phasors to determine the impedance to the fault loca-
rithms for adaptive fault detection/location technique, which is tion, and both suffers from errors mentioned in many papers
based on Phasor Measurement Unit (PMU). This paper is Part II [10]–[13]. For example, the one-terminal data method needs to
of this paper set. A new timing device named “Global Synchronism
Clock Generator, GSCG” including its hardware and software de- make some assumptions for ground condition; the two-terminal
sign is described in this paper. Experimental results show that the impedance based method usually needs accurate and synchro-
synchronized error of rising edge between the two GSCGs clock is nized measurements for extracting the phasors. These problems
well within 1 ps when the clock frequency is below 2.499 MHz. The are completely solved by the proposed adaptive technique pre-
measurement results between Chung-Jeng and Chang-Te 161 kV sented in the paper.
substations of Taiwan Power company by PMU equipped with
GSCG is presented and the accuracy for estimating parameters In Part I, theory and algorithms of an adaptive transmission
of line is verified. The new developed DFT based method (termed line fault detection/location technique are presented. The adap-
as Smart Discrete Fourier Transform, SDFT) and line parameter tive fault detection/location technique uses synchronized fun-
estimation algorithm are combined with PMU configuration to damental voltage and current phasors at both ends of transmis-
form the adaptive fault detector/locator system. Simulation results sion line, and of course, requires an extremely accurate common
have shown that SDFT method can extract exact phasors in the
presence of frequency deviation and harmonics. The parameter timing reference. In the past, it was difficult to precisely syn-
estimation algorithm can also trace exact parameters very well. chronize the sampling at the ends of transmission lines due to
The SDFT method and parameter estimation algorithm can the lack of a common timing reference. At an early stage, it
achieve accuracies of up to 99.999% and 99.99%, respectively. usually adopts broadcast signal as timing reference, or utilizes
The EMTP is used to simulate a 345 kV transmission line of telecommunication technique to transmit remote data to the con-
Taipower System. Results have shown that the proposed technique
yields correct results independent of fault types and is insensitive trol center. However, these introduce new problems i.e. there
to the variation of source impedance, fault impedance, and line will exist multi-path effects or it needs to precisely determine
loading. The accuracy of fault location estimation achieved can be the delay of communication channel and to correctly compen-
up to 99.9% for many simulated cases. The proposed technique sate for this delay. Now, using the accurate timing signal pro-
will be very suitable for implementation in an integrated digital vided by Global Positioning System (GPS) as common time
protection and control system for transmission substations.
base for measuring instruments located at both ends of line, we
Index Terms—Discrete Fourier transforms (DFT), fault detec- can highly promote the accuracy of synchronized measurements
tion/location index, phasor measurement unit (PMU). and reduce the cost of equipment greatly. Because of low fre-
quency of the timing signal of GPS, it can not be used as sam-
I. INTRODUCTION pling signal directly. This means that a timing device is needed
to do frequency multiplication/division task. We will present the
B. GSCG Configuration
In order to reduce settling time, frequency jitter, and steadys-
tate errors, we design a new timing device named “Global Syn-
chronism Clock Generator (GSCG)” whose timing error could
remain within that of satellite’s receiver. The block diagram
and actual implementation of GSCG are shown in Fig. 1(b) and
(c), respectively. The vital core of GSCG is a microprocessor
based phase locked loop (PLL). The PLL consists of time-error
counter, microprocessor, digital-adjustable oscillator, and fre-
quency divider. The time-error counter compares the difference
between 1 Hz signals generated by GPS and frequency divider
(divided by ). Then, the error quantity is sent to micropro-
cessor, and is processed with the time marked data provided by
GPS receiver herein. Microprocessor uses a P–I type (propor-
tional and integral) control program to correct the error quantity
in sampling clock. Concurrently, microprocessor will transmit
the clock signal to another frequency divider (divided by ),
and from there the accurately synchronized clock output goes
to two A/D converters. The digital-adjustable oscillator is con-
trolled by voltage provided by the microprocessor. Its output
frequency is a function of the control voltage. The important
merits of PLL utilized in GSCG are that it adopts close-loop
feedback control scheme, and uses a gain-programmable oscil-
lator. Hence, the new designed GSCG is a completely digitized
timing device, its speed is very fast and is quiet suitable for the
applications of computer relaying. Besides, the very low cost for
constructing the GSCG is another one of several merits of our
Fig. 1. The configuration of phasor measurement unit based on GPS and its
actual implementation. design, for example, the crystal oscillator utilized in our GSCG
costs merely 32 NT$ (about 1 US$). Moreover, another im-
various facts mentioned above through the EMTP generated portant advantage of GSCG is its ability to automatically com-
data. Simulation results will be presented Section III. Finally, pensate unsynchronization error by software built in micropro-
Section IV is the conclusions. cessor. From our investigations, the frequency drift of GSCG
can be controlled within 0.1 PPM and the error of rising edge
II. IMPLEMENTATION OF PHASOR MEASUREMENT UNIT of two GSCGs clock is able to remain within 1 s (equiv-
alent to 0.0126 phase difference at 60 Hz). These facts certify
A. PMU Configuration the synchronism between two PMUs when they are used to mea-
As mentioned in Part I, the phasor approach is quite attractive sure phasors at different ends of transmission line.
as long as all of the algorithm assumptions are met and phasor
quantities are estimated accurately. It is widely recognized that C. Laboratory Test
two-terminal based fault detectors/locators are subject to errors In order to demonstrate the accuracy of PMU without the ef-
coming from unsynchronized sampling clock. Use of a timing fects of CTs and CCVTs, we have performed lots of laboratory
signal from GPS can greatly reduce or eliminate such errors. tests. Selected results will be presented in this paper. At first,
In this paper, we proposed an extremely accurate con- we input a sinusoidal signal to the A/D converter
figuration for measuring phasors by virtue of Phasor Mea- terminals of two different PMUs directly. The computed am-
surement Units (PMU) technique, whose configuration is plitudes and phases of the test signal by two PMUs are shown
illustrated in Fig. 1(a). The GPS receiver provides 7 pps (one in Fig. 2(a) and (b), respectively. The aim of the upper half of
pulse-per-second) signal and a time marker, which are sent to Fig. 2(a) is to exhibit the ability for tracing variation trend mea-
GSCG and microprocessor respectively. The 1 pps signal will sured by both PMUs. The data are output per one-cycle. It is
be utilized to process the frequency multiplication/division task clearly seen that both measured results are traced very well.
in the GSCG, and then GSCG provides synchronized sampling From Fig. 2, it can be seen that the difference between the two
pulses to the A/D converter. The measured 3 voltages and computed amplitudes remains within 0.03%, and the computed
1138 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 15, NO. 4, OCTOBER 2000
Positive-sequence parameters:
/km
H/km
F/km
*Conductance is neglected in the simulation.
Both ends of the line are replaced by Thevenin’s equiva-
lent impedance with an angle different than that of the line
impedance, and are shown in the followings:
Sending End:
line-to-line
Receiving End:
line-to-line
In our simulation cases, except for investigating the effects
of unsynchronized measurements and power flow capacity
variations, the phasor quantities for voltage and current at re-
ceiving bus were intentionally shifted ten degrees (same value
as Ref. [5]). The total time of simulation is (m-sec),
and the data sampled at sampling rate of 1.92 kHz (32 times
60 Hz). The moving data window contains thirty-two measured
data per cycle, and which are initiated from the simulation start. Fig. 4. Test signal: v(t) = cos(wt): simulated frequency = 59.5 Hz;
sampling frequency = 960 Hz.
We first conduct performance evaluation for SDFT algorithm
and transmission parameter estimation algorithm, and then
fault detection/location index. The error of using the proposed
fault location index, , is expressed as a percentage of the total
line length, i.e.
error EstimatedTotal
Location Actual Location
Line Length
(1)
Fig. 6. The ability of the proposed estimation algorithm to trace line parameter
variations. Fig. 7. Detecting the occurrence of single-phase ground fault whose fault
index is D = 0:8.
TABLE I
STATISTICAL RESULTS OF THE RELIABILITY EVALUATION OF THE PROPOSED
RELAYING UNDER VARIOUS PERMANENT INTERNAL FAULTS
TABLE II
SIMULATION RESULTS OF THE SECURITY EVALUATION OF THE FAULT
DETECTOR UNDER VARIOUS RERMANENT EXTERNAL FAULTS
Fig. 8. Detecting the occurrence of b–c phase ground fault whose fault index
and fault resistance are D = 0:8 and R = 10 k
, respectively.
and were identical to zero before the fault event, and hence
the fault index will be an indefinite value. When the measured
post-fault data were fetched in the algorithm, the computed
and values quickly deviated from zero, finally reaching stable
values (in this case, the absolute values ,
). The location index abruptly converged
to 0.8. As mentioned above, the fault detection performance of
the proposed algorithm is well suited for any type of fault events.
Another simulation case is shown in Fig. 8. This case is a –
phase ground fault case, whose fault resistance and fault loca-
tion are set at 10 k and 80 km, respectively. While this case
is a high fault resistance case, Fig. 8 clearly shows that the pro-
posed index once again provides excellent performance for fault
detection. The security performance of the fault detector has also been
A lot of cases of all possible faults on the protected line were examined with respect to various external fault locations and
simulated. Using the generated data, the reliability, security and intermittent disturbance (for example, switching of power-com-
responsibility of the fault detector were also checked. With re- pensated capacitors). For permanent external faults, the security
spect to five different thresholds of index , for example, we of the fault detector achieved can be up to 100% for these simu-
have performed 756 tests of internal fault events to evaluate the lated cases, whose results are summarized in Table II. Using the
reliability of the fault detector. The results are summarized in EMTP generated data, the responsibility of the fault detector
Table I. The fault detector is regarded as failures to trip when it was also checked. From the simulation results, it is observed
takes over the specified decision-limited periods. There are three that the tripping decision time of the fault detector is relative
specified decision-limited periods, i.e. 1-cycle, 1.2-cycle, and insensitive to the fault type and fault locations. For the most of
1.5 cycle, are chosen as restraint periods for the simulation tests. the tested cases, the maximum time for tripping decision takes
In these tests, it is clearly seen that larger threshold of index only about one-third cycle even under extreme proximal fault
is chosen, the more reliability of the fault detector possesses. events. From our investigations, it has been found that the fault
When the threshold of is set at 0.0285, for example, the relia- detector indeed provides an excellent performance in the fault
bility of the fault detector can achieve even high to 100.0% and detection.
98.41% with respect to 1.5-cycle and 1-cycle decision-limited Besides, the implementation cost for the proposed PMU, in-
periods, respectively. From the shown table, it is observed that cluding Pentium® II-300 PC, DSP card, Data Acquisition Card
the relaying scheme can indeed achieve an extremely high level (PCL-818HG), 12-bit A/D converter, GPS Receiver, and other
of reliability. necessary devices, is approximately $3125. This means that the
1142 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 15, NO. 4, OCTOBER 2000
Fig. 9. Effects of fault type and fault location on index accuracy. Fig. 10. Index accuracy of a-phase ground fault under different resistance
situations.
Fig. 12. Effects of two-terminal timing accuracy for various fault types.
Fig. 15. Comparison between DFT and SDFT for a-phase ground fault under
frequency-floating and system noise-added conditions.
Fig. 18. Effects of fault incidence angle on fault location accuracy under
different fault events.
IV. CONCLUSION
The adaptive PMU based approach to accurately detecting/lo-
cating faults on an EHV/UHV transmission line is presented.
selected as the fault event in this case. For simplicity, we will
Fault location index as well as computed factors and
consider herein only one fault location, i.e., (p.u.).
can serve as fault detector and locator simultaneously. The pro-
Fig. 17(a) shows the detection performance of the proposed
posed index does not need any assumption, so it is a very robust
technique under various line loading conditions described
index. The proposed SDFT algorithm is also a recursive, fast,
above. The results of Cases 1–3 are put in Fig. 17(a) for
and stable algorithm that can be applied in the field of computer
comparison. It is observed that the technique can provide an
relaying. The parameter estimation algorithm is also proposed
excellent and stable performance for detecting fault occurrence
to solve the uncertainty of line parameters. This algorithm can
under different line loading conditions. Fig. 17(b) shows the
use the measured data on both ends of line to on-line correct
sensitivity of the proposed technique with respect to these test
line-parameter variations due to environmental change and var-
cases. For the fault events considered, it can be clearly seen that
ious system operating situations. The performance of parameter
the proposed technique will give extremely accurate results.
estimation algorithm has been verified with the data generated
This means that each curve of the errors of the technique versus
by EMTP. Simulation results show that this algorithm can trace
sampling step falls approximately within 0.2% from 2 cycles
parameter variations very well. Hardware errors, system noises,
after occurrence of fault. The proposed technique is least
harmonics, and system frequency fluctuation problem have been
sensitive to the effects of pre-fault loading. In our laboratory,
considered in this paper. A special filtering technique so-called
the authors have run many simulation cases with respect to
the SDFT method has been developed to solve such problems
different fault events. From such investigations, it has been
mentioned above. The performance of the SDFT method for
found that the proposed technique indeed provides an excellent
extracting true system frequency and fundamental phasors has
performance in the fault detection and location.
been verified. The accuracy of both SDFT method and param-
9) Effects of Fault Incidence Angle: As we known, when
eter estimation algorithm achieved can be up to 99.999% and
faults occur near voltage maximum and near voltage zero, the
99.99%, respectively. The accuracy of fault location estima-
higher frequency transients and DC offsets will take place in a
tion achieved can be up to 99.9% for many simulated cases. A
transmission line; and thereby will cause large difficulty in the
high performance phasor measurement unit (PMU) is designed
fault location method. This means that the burden of filtering
and implemented in the paper. Combining robust fault detec-
will increase largely and might need a more delicate method to
tion/location index, parameter estimation algorithm, the SDFT
reject such transients and to extract true fundamental phasors
method, and the well-designed PMU, the proposed technique
utilized in fault location algorithm. In practice, the fault inci-
will be an adaptive, high performance, and low-cost fault detec-
dence angle, however, cannot be predicted in advance. H. Y. Li,
tion/location technique.
et al. [13] have utilized one-cycle Fourier window in their pro-
tection algorithm to investigate the effects of the fault incidence
angle. They found that the protection algorithm may be unable ACKNOWLEDGMENT
to recognize the fault under the condition that post-fault and pre- The authors are thankful to C.-S. Chen for his editing assis-
fault information exist simultaneously in the sampling window. tance. Also they are thankful to Dr. J.-S. Yang at Power Research
In our technique, however, we adopt the moving data window to Institute of Taiwan Power Company for his technical advice.
sample data, and hence the proposed algorithm is more insensi-
tive to the problem mentioned above. This fact has been demon-
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