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Keywords: Indirect matrix converter, four-leg inverter, stand- link [2]. Both DMC and IMC give the same of input/output
alone unbalanced load, carrier-based PWM, SVPWM. performance and maximum voltage transfer ratio.
Nevertheless, as compared to DMC, the IMC has some
Abstract significant advantages. For example, the IMC provides the
zero dc-link current commutation. Therefore, the complex
In this paper, a control strategy for a four-leg indirect matrix multi-step commutation is avoided. Furthermore, the IMC
converter under unbalanced load condition is described. The needs the simpler clamp circuit for overvoltage protection.
four-leg indirect matrix converter can synthesise any desired
three-phase line-to-neutral voltage. In order to obtain the In [3], a WECS based on a doubly fed induction generator
reference output voltage under unbalanced load condition, the (DFIG) fed by a DMC is presented. The topology for a grid-
control strategy for four-leg indirect matrix converter is based connected system using DFIG and IMC topology is also
on the decomposition of the output voltages and currents into proposed in [4]. To supply both single-phase and three-phase
positive, negative and zero sequence components. The AC loads, a neutral connection is necessary to control each
classical proportional-integral (PI) controllers are applied to phase voltage independently. Therefore, the four-leg MC has
control the d, q components in synchronously rotating frame been selected because it can handle the neutral current which
in all three sequences. In this paper, a carrier-based PWM is is caused by unbalanced load. The four-leg DMC topology is
also introduced to generate PWM signals because this method proposed in [5] for mobile generation system where a stand-
is easily to implement compared with SVPWM method. alone load with neutral connection is required. The four-leg
Finally, simulation results are shown to verify the feasibility IMC, an alternative to four-leg DMC, is introduced in [6].
of proposed control scheme.
In this paper, the control strategy for the four-leg IMC with
1 Introduction unbalanced load is presented. The control strategy is based on
the decomposition of the three-phase output voltages and
The development of renewable energy resources has been currents into the positive, negative and zero sequence [7].
dynamic over the last decade. The integration of wind power Therefore, the d, q components of each sequence in the
into the electrical grid or stand-alone load has been synchronously rotating frame become dc signals. The inner
intensively developed in recent years because of its current loop and the outer voltage loop controller are
economical and environmental potentials. Conventionally, the implemented to obtain the output reference voltages. Once
back-to-back converter is investigated for wind energy these reference voltages are determined, the carrier-based
conversion system. However, this converter has some PWM is applied to generate the gate signals. As compared to
drawbacks such as: high weight with large dimensions and the modulation method based on 3-D space vector PWM,
low reliability due to the available of energy storage which is proposed in [6], the carrier-based PWM is simpler
component, the poor power factor and harmonic distortion at and easily implemented.
input side. Recently, the wind energy conversion system
(WECS) based on the matrix converter (MC) has been 2 The four-leg IMC topology
proposed. The MC provides some advantages such as
sinusoidal input and output current waveforms, controllable
input power factor, bidirectional power flow and high
reliability.
Dc-link voltage
FC FC , p
FB.n FA, z FB , z FC , z
FA,n
FA FA, p
FB FB , p
FC .n
Fig. 2. Control strategy of four-leg IMC with unbalanced
load. Fig. 3. The decomposition of symmetrical components from
the unbalanced component.
Conventionally, the close-loop control strategy designed for
balanced three-phase loads is based on the control of d, q In synchronously rotating reference frame, the d, q
components in synchronously rotating frame. These components of positive sequence are dc quantities and rotate
components are obtained by transform from stationary frame counter-clockwise. And the d, q components of negative
to synchronously rotating frame. When the three-phase loads sequence also are dc quantities and rotate clockwise. The d, q
are balanced, the d, q components in the synchronous frame is components in each sequence are obtained by using Park and
dc quantities and the 0 component is zero quantity. Clark transformation.
Otherwise, the unbalanced output voltage makes the ripple in
the d, q components with the frequency 2ω. The 0 component 3.2 Control strategy
also is affected by the oscillation at frequency ω. It should be After decomposition into symmetrical components and
noted that ω is the fundamental angular frequency of output projection into synchronously rotating reference frame, the
voltage. The PI controller is not be applied when the d, q voltages and currents are regulated by using inner current
components are not dc quantities. To solve this problem, the loop controller and outer voltage loop controller. The voltage
unbalanced output voltages and currents have to be control loop is implemented by using PI controller in order to
transformed to the symmetrical components: the positive, regulate the voltage magnitude in a stable manner. The
negative and zero sequence. The control strategy of four-leg
desired output voltages are compared with the measured ⎡v A( ref ) ⎤ ⎡ v A, p ( ref ) + v A, n ( ref ) + v A, z ( ref ) ⎤
output voltages, and their errors are input of the PI ⎢ ⎥ ⎢ ⎥
controllers. The outputs of the these PI controller are the ⎢vB ( ref ) ⎥ = ⎢ vB , p ( ref ) + vB , n ( ref ) + vB , z ( ref ) ⎥ (3)
⎢ ⎥ ⎢ ⎥
⎣vC ( ref ) ⎦ ⎣ vC , p ( ref ) + vC , n ( ref ) + vC , z ( ref ) ⎦
reference output currents: i*dq,p, i*dq,n, i*dq,z. The reference
output currents are compared with the respective measured
output currents. The current regulator outputs are vdq,p, vdq,n, The reference output voltages are the input of the carrier-
vdq,z. To ensure good tracking performance of the output based PWM block, which is described in the next section. The
voltage, the reference output voltage are obtained by adding outputs of this block are the signals that drive the four-leg
the decoupling voltage components to the vdq,p, vdq,n, vdq,z. inverter.
Figs. 4-6 show the inner current loop controller and outer
voltage loop controller in positive, negative and zero
sequence, respectively. The reference output voltages in 4 Modulation technique for four-leg IMC
positive, negative and zero sequences are determined by
As mentioned above, the indirect matrix has two stages such
( )( )
vd , p ( ref ) = K p + K i / s id* , p − id , p + vd , p + ω L f iq , p as rectifier and inverter stage. Two stages are controlled
independently. The rectifier stage is controlled based on the
vq , p ( ref ) = (K p + K / s ) (v
i
*
d,p )
− vd , p + vq , p − ω L f id , p information of input phase voltage. The detail of SVPWM
approach for rectifier control was described in previous
vd , n ( ref ) = (K p + K / s ) (v
i
*
d,p − vd , p )+vd ,n − ω L f iq , n literature [2]. The four-leg inverter stage is controller based
(2)
= (K + K / s ) (v )+v on the reference output voltage. As compared to the
vq , n ( ref ) p i
*
d,p − vd , p q,n + ω L f id , n
conventional SVPWM of three-leg inverter, the modulation
vd , z ( ref ) = (K p + K / s) (v
i
*
d, p − vd , p )+vd ,n
for the four-leg inverter has sixteen switching state vectors.
The development of the three-dimension SVPWM for four-
vq , z ( ref ) = (K p + K / s) (v
i
*
d, p − vd , p )+vq,n
leg inverter has been proposed in [8]. However, the problems
such as determining the sector wherein the reference voltage
where, Kp, Ki are the proportional and integral gains of PI vector is located and the duty-ratio calculation induce the
controller. computation burden. Another approach modulation for four-
leg inverter is based on the carrier-based PWM. In [9], we
presented the comprehensive relationship between SVPWM
and carrier-based PWM method.
4.1 Carrier-based PWM modulation
In carrier-based PWM method, the modulation signals are
Fig. 4.The voltage and current regulation in positive sequence compared with triangular carrier signal to generate the gating
signals without complex calculation. It is assumed that the
carrier signal is symmetrical triangular signal with the peak
±Vi, where Vi is the magnitude of the line-to-neutral input
voltage.
(
vmax = max v A( ref ) , vB ( ref ) , vC ( ref ) ) (12)
3 ⎡
+ Re ⎢Vz I z
2 ⎣
(e jωo t
+e ) ⎜⎝ e
− jωo t ⎛ j (ωo t +ϕ z )
+e
−( jωo t +ϕ z ) ⎞ ⎤
⎟ / 2⎥
⎠ ⎦
(
vmid = mid v A( ref ) , vB ( ref ) , vC ( ref ) ) (13) The balanced three-phase input voltage can be described by
the rotating space vector vi
is the average dc-link voltage, which is generated by
)
Vdc
rectifier stage control.
2
3
(
vi = va + vb e j 2π 3 + vc e j 4π 3 = Vi e jωi t (17)
4.2 Switching pattern and commutation problem Hence, the input current is obtained as follows
1 j (ω t +ϕ )
ii = ⎛⎜ v p i p e i p + vnin e j (ωi t +ϕn ) + vz iz e j (ωi t ) ⎞⎟
The switching patterns of rectifier stage and inverter stage are Vi ⎝ ⎠
usually arranged in order to minimize the commutation losses 1 ⎛ j (ωi t − 2ωo t +ϕ p ) 1 ⎞
in the rectifier side and safety operation. While the rectifier + ⎜ v pin e + v z iz e j (ωi t − 2ωo t ) ⎟ (18)
Vi ⎝ 2 ⎠
stage is commutating, the inverter stage could be operated in 1⎛ j (ωi t + 2ωo t +ϕ p ) ⎞
+ v z iz e j (ωi t + 2ωo t ) ⎟
1
zero vectors. There is no continuity of the dc-link current ⎜ vni p e
Vi ⎝ 2 ⎠
during the commutation of rectifier stage. So the switching
losses of the rectifier stage are reduced and the multi-step
commutation is no need by this arrangement. Fig. 8 shows the As can be seen in (18), the input current contents three
switching pattern of the four-leg IMC when the carrier-based components with frequencies ωi, ωi-2ωo and ωi+2ωo, where
PWM method is applied. We can see that the dc-link voltage ωi and ωo are the fundamental frequency of input current and
switches from vac to vab when the dc-link current is zero, output current, respectively. The additional components (ωi-
therefore the zero dc-link current commutation is ensured. 2ωo and ωi+2ωo) cause the input current distortion.
5 Simulation results and discussion
Fig. 9. The input/output waveforms of four-leg IMC with Fig. 11. The input/output waveforms of four-leg IMC in the
balanced load (a) input currents and its FFT (b) Output case of unbalanced load and unbalanced desired output
current and neutral current (c) Output voltages. voltages.
Fig. 10. The input/output waveforms of four-leg IMC in the Fig. 12. The input/output waveforms of four-leg IMC in the
case of unbalanced load and balanced desired output voltages. case supplying single phase load.
The simulations are carried out to verify the proposed output phase currents into positive, negative and zero
method. The simulation process is performed using Psim 9.0 sequence. The proposed control strategy can be applied to the
software. The system is simulated with the balanced three- WECS fed by four-leg IMC to supply both single phase and
phase input voltage (line-to-neutral input voltage Vi=100V, three-phase load. The distortion of the input current, which is
frequency fi=60 Hz). The three-phase load is inductive load caused by the unbalanced load, is analysed. The carrier-based
and the output frequency is (fo=50Hz). The frequency of the PWM method for four-leg IMC is presented to overcome the
carrier signal is chosen as 10 kHz. The LC input filter is drawbacks of SVPWM method. The simulation results are
designed with value L=1.4mH, C=25uF. The parameter of show to verify the feasibility of proposed control scheme.
output filter is L = 5mH.
The input/output waveforms under balanced load condition Acknowledgements
are shown in Fig. 9. The parameters of load and the desired
three-phase output voltages are: RA=RB=RC=10Ω and This work was partly supported by the NRF grant funded by
vA=50cos(100πt), vB=50cos(100πt-2π/3), vC=50cos(100πt- the Korea government (MEST) (No. 2010-0025483) and the
4π/3). From Fig. 9, we can see that the sinusoidal input/output Network-based Automation Research Center (NARC) funded
currents are obtained and the neutral current is almost zero by the Ministry of Knowledge Economy.
due to the balanced load. The fast Fourier transform (FFT) of
the input current in Fig. 9(a) shows the input current contains References
only the fundamental frequency.
The simulation results of second test are shown in Fig. 10. [1] A. Weinstein, J. Rodriguez, J.C. Clare, L. Empringham,
For this test, the load are RA=RB=10Ω, RC=20Ω, and the P. W. Wheeler, "Matrix converters: a technology
desired output voltage are balanced: vA=50cos(100πt), review,", IEEE Transactions on Industrial Electronics,
vB=50cos(100πt-2π/3),vC=50cos(100πt-4π/3). Fig. 10(a) vol.49, no.2, pp.276-288, (2002).
shows the input currents and its FFT. We can see that the [2] F. Schafmeister, H. Ertl, J.W. Kolar, S.D. Round, "Novel
input currents are distorted due to the unbalanced output Three-Phase AC–AC Sparse Matrix Converters,", IEEE
current. Fig. 10(b) shows the outputs current and neutral Transactions on Power Electronics, vol.22, no.5,
current. While the resistance of phase C increases twice and pp.1649-1661, (2007).
the desired output voltage are balanced, therefore the current [3] G. Asher, G. Tobar, J. Clare, R. Cardenas, R. Pena, P.
of phase C decreases twice. In this case, the phase and the Wheeler, "Stability Analysis of a Wind Energy
magnitude of the neutral current are same as those of phase C. Conversion System Based on a Doubly Fed Induction
Fig. 10(c) shows the sinusoidal balanced output voltages can Generator Fed by a Matrix Converter," IEEE
be achieved even though under the unbalanced conditions. Transactions on Industrial Electronics, vol.56, no.10,
The performance of currents and voltages at input/output pp.4194-4206, (2009).
sides for unbalanced load are shown in Fig. 11, in the case [4] E. Reyes, J. Clare, P. Wheeler, R. Cardenas, R. Pena, "A
RA=RB=10Ω, RC=20Ω, vA=50cos(100πt), vB=50cos(100πt- Topology for Multiple Generation System With Doubly
2π/3), vC=20cos(100πt-4π/3). In this case, both of load and Fed Induction Machines and Indirect Matrix Converter,",
desired output voltage are unbalanced to demonstrate that IEEE Transactions on Industrial Electronics , vol.56,
three output voltages are controlled independently. The output no.10, pp.4181-4193, (2009).
voltages shown in Fig. 11(c) are well regulated. [5] J. Clare, P. Wheeler, R. Cárdenas, R. Peña,
The input/output waveforms are shown in Fig. 12 for the case "Experimental Validation of a Space-Vector-Modulation
three output voltage are in phase vA=50cos(100πt), Algorithm for Four-Leg Matrix Converters,", IEEE
vB=25cos(100πt), vC=10cos(100πt). It is equivalent that the Transactions on Industrial Electronics, vol.58, no.4,
four-leg IMC supplies to the single phase load. Fig. 12(b) and pp.1282-1293, (2011).
(c) show the output currents and output voltages, respectively. [6] Fan Yue, J. Clare, P. Wheeler, "A Novel Four-leg Matrix
We can see that three phase output current and voltage are in Converter," IEEE 32nd Annual Conference on Industrial
phase and the neutral current is equal the sum of three output Electronics,, pp.2694-2699, 6-10 Nov. (2006)
currents. [7] H. Camblong, I. Vechiu, O. Curea,"Transient Operation
The input current and output current have fundamental of a Four-Leg Inverter for Autonomous Applications
frequency of 60 Hz and 50Hz, respectively. Therefore, two With Unbalanced Load,", IEEE Transactions on Power
components with frequencies fi − 2 f 0 = 40Hz and Electronics, vol.25, no.2, pp.399-407, (2010).
[8] R. Zhang, V.H Prasad, D. Boroyevich, F.C. Lee, "Three-
fi + 2 f 0 =160 Hz present in the input current, which are dimensional space vector modulation for four-leg
shown in Figs. 10(a)-12(a) in the case of unbalanced load. voltage-source converters," IEEE Transactions on
Power Electronics, vol.17, no.3, pp.314-326, (2002).
6 Conclusions [9] Hong-Hee Lee, Tuyen D. Nguyen "Carrier-based PWM
Method for Four-Leg Very Sparse Matrix Converter",
This paper introduces how to control the four-leg IMC under IEEE 8thInternational Conference on Power Electronics,
unbalanced load condition. The proposed four-leg IMC can ECCE Asia, pp.1703-1710, (2011).
generate any desired output voltages based on the
decomposition of the unbalanced output phase voltage and