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5 4 3 2 1

D
H61H2-M12 Rev : 1.0 ECS CONFIDENTIAL
D

TABLE OF CONTENTS REVISION HISTORY:


Page Index Page Index Rev Date Notes
------- ------------------------ ------- ------------------------ ------ -------------- ---------------------------------------------------------------------------------
1 Cover Page 26 PCIE LAN AR8151-B/AR8152-B
P61G V1.0 2011/04/07 RED_PCB P/N : 15-Y97-011001 (GE1) / 15-Y97-011000 (CHUANYI)
2 Block Diagram 27 Power Delivery BOM P/N : 81-605-Y97100
3 CPU - DMI/FDI/PEG 28 Power Sequence, Reset Diagram
EC35 change to EC-cap 1000U-6.3DL
4 CPU - MISC 29 Clock Distribution
EC1, EC4 from 100uF change to 220uF
5 CPU - DDR3
Del RT1, RT3, R137, R180 ( Not need compensation of temperature ).
C
6 CPU - PWR/GND C

7 DDR3 - CH_A_DIMM1 For 5VSB Inrush Current : R102 from 100k change to 33k.

8 DDR3 - CH_B_DIMM3 Select TACH0_GPIO17 to decide COM .

9 VCore & VAXG-UP1625


H61H2-M12 VA 2011/05/04 Black_PCB P/N : 15-EC7-010010
10 VCore & VAXG- UP6281 BOM P/N : 81-605-EC7000/81-605-EC7001(10/100 ; GiGA)

11 DC/DC CPUVTT-UP1525 / VCCSA PCB Size change to 225*170 mm


12 DC/DC VDIMM/DDR_VTT/5VDUAL Del DVI
13 Front Panel,FAN,PowerConn,GND,104
Vcore 減少一相
14 PCH - DMI/PCI/PE/USB
VIN 電容減少一顆
15 PCH - SATA / CLK
LAN change to Atheros 8152/8151/8161
B 16 PCH - MISC, Strap Function B

17 PCH - DP/VGA/FDI Codec change to VT1705CE.

18 PCH - PWR USB Power use fuse & Jumper.

19 PCH - GND H61H2-M12 V1.02011/07/12 Black_PCB P/N : 15-EC7-011000/15-EC7-011001


BOM P/N :
20 Slot - PCI-EX16/PCI-EX1
PCB Size change to 225*170 mm
21 COM&PS2
22
23
USB/SATA/SPI
SIO-F71808A
RD : Jayson
24 AUDIO VT1705/ALC662(CHIP) LAYOUT :
25 AUDIO VT1705/ALC662(PANEL) EMI :
A A

NOTE: Elitegroup Computer Systems


Design by 428971_428971_Sugar_Bay_and_BromolowWS_PDG_Rev_0_8.pdf,
Title
428880_428880_Cougar_Point_Desktop_Ballout_Mech_Package_Rev1p0.zip Cover Page
Size Document Number Rev
Custom H61H2-M12 1.0
Date: Wednesday, July 13, 2011 Sheet 1 of 29
5 4 3 2 1
5 4 3 2 1

PCH-GPIO function
---------------------------------------------------------
Pin Name Power Well Usage Default Status
---------------------------------------------------------
GPIO71 VCC3 GPI
GPIO22 VCC3 GPI
GPIO38 VCC3 GPI
D D
GPIO39 VCC3 GPI
GPIO48 VCC3 GPI
GPIO21 VCC3 GPI DDR3 Channel A
GPIO36 VCC3 GPI
Sandy Bridge DDR3
PCI-E X16
GPIO37 VCC3 GPI
Desktop Processor
1333MHz/1066MHz
GPIO16 VCC3 Reserve for TPM GPI Socket H2 DDR3 Channel B Total Max 8GB
GPIO49 VCC3 Reserve for TPM GPI
GPIO0 VCC3 F_AUDIO Detect GPI
GPIO33 VCC3 ME Enable/Disable GPO
GPIO34 VCC3 pull-up GPI
GPIO13 3VSB PME GPI

FDI

DMI
GPIO24 3VSB SKTOCC GPO
GPIO57 3VSB Board ID(CRB_0.7) GPI
GPIO61 3VSB TPM_LPCPD GPI
GPIO15 3VSB Down Voltage for DIMM GPO
C C
GPIO48 VCC3 Down Voltage for DIMM GPI
PCI-E X1
Jack 3 in 1

AUDIO CODEC: (Delete) SPDIF OUT


VT1705CE
F_AUDIO
LAN:
Cougar RTL8105E-VL/
Point Chipset RTL8111E-VL
3Gbps RJ-45 & USB2.0 x2
SATA 2.0
B B

USB2.0 x2Ports
VGA

F_USB 2 Headers
DVI-D

SIO-GPIO function
--------------------------------------------------------- SIO:
Pin Name Power Well Usage Default Status
--------------------------------------------------------- F71808A
PIN23 5VSB Power LED GPIO25/LEDVCC/WDTRST#
A A
PIN22 5VSB Power LED GPIO24/LEDVSB
Pin Name Usage
Pin Name Usage Elitegroup Computer Systems
Pin Name Usage Title
Pin Name Usage Block Diagram
Size Document Number Rev
Custom H61H2-M12 1.0
Date: Wednesday, July 13, 2011 Sheet 2 of 29
5 4 3 2 1
5 4 3 2 1

CPUA
CPUB

PEG_RX_P0 B11
BALLMAP_REV=1.4 C13 PEG_TX_P0
20 PEG_RX_P0
PEG_RX_N0 B12 PEG_RX_0 PEG_TX_0 C14 PEG_TX_N0
PEG_TX_P0 20 BALLMAP_REV=1.4
20 PEG_RX_N0 PEG_RX#_0 PEG_TX#_0 PEG_TX_N0 20
20 PEG_RX_P1 PEG_RX_P1 D12 E14 PEG_TX_P1 PEG_TX_P1 20 FDI_FSYNC0 AC5 AC8 FDI_TX_P0 FDI_TX_P0 17
PEG_RX_1 PEG_TX_1 17 FDI_FSYNC0 FDI_FSYNC_0 FDI_TX_0
20 PEG_RX_N1 PEG_RX_N1 D11 E13 PEG_TX_N1 PEG_TX_N1 20 FDI_LSYNC0 AC4 AC7 FDI_TX_N0 FDI_TX_N0 17
PEG_RX#_1 PEG_TX#_1 17 FDI_LSYNC0 FDI_LSYNC_0 FDI_TX#_0
20 PEG_RX_P2 PEG_RX_P2 C10 G14 PEG_TX_P2 PEG_TX_P2 20 AC2 FDI_TX_P1 FDI_TX_P1 17
PEG_RX_N2 C9 PEG_RX_2 PEG_TX_2 G13 PEG_TX_N2 FDI_TX_1 AC3 FDI_TX_N1
20 PEG_RX_N2 PEG_RX#_2 PEG_TX#_2 PEG_TX_N2 20 FDI_TX#_1 FDI_TX_N1 17
20 PEG_RX_P3 PEG_RX_P3 E10 F12 PEG_TX_P3 PEG_TX_P3 20 AD2 FDI_TX_P2 FDI_TX_P2 17
D
PEG_RX_N3 E9 PEG_RX_3 PEG_TX_3 F11 PEG_TX_N3 FDI_FSYNC1 AE5 FDI_TX_2 AD1 FDI_TX_N2 D
20 PEG_RX_N3 PEG_RX#_3 PEG_TX#_3 PEG_TX_N3 20 17 FDI_FSYNC1 FDI_FSYNC_1 FDI_TX#_2 FDI_TX_N2 17
20 PEG_RX_P4 PEG_RX_P4 B8 J14 PEG_TX_P4 PEG_TX_P4 20 FDI_LSYNC1 AE4 AD4 FDI_TX_P3 FDI_TX_P3 17
PEG_RX_4 PEG_TX_4 17 FDI_LSYNC1 FDI_LSYNC_1 FDI_TX_3
20 PEG_RX_N4 PEG_RX_N4 B7 J13 PEG_TX_N4 PEG_TX_N4 20 AD3 FDI_TX_N3 FDI_TX_N3 17
PEG_RX_P5 C6 PEG_RX#_4 PEG_TX#_4 D8 PEG_TX_P5 FDI_TX#_3
20 PEG_RX_P5 PEG_RX_5 PEG_TX_5 PEG_TX_P5 20
20 PEG_RX_N5 PEG_RX_N5 C5 D7 PEG_TX_N5 PEG_TX_N5 20 FDI LINK AD7 FDI_TX_P4 FDI_TX_P4 17
PEG_RX_P6 A5 PEG_RX#_5 PEG_TX#_5 D3 PEG_TX_P6 FDI_TX_4 AD6 FDI_TX_N4
20 PEG_RX_P6 PEG_RX_6 PEG_TX_6 PEG_TX_P6 20 FDI_TX#_4 FDI_TX_N4 17
20 PEG_RX_N6 PEG_RX_N6 A6 C3 PEG_TX_N6 PEG_TX_N6 20 AE7 FDI_TX_P5 FDI_TX_P5 17
PEG_RX_P7 E2 PEG_RX#_6 PEG_TX#_6 E6 PEG_TX_P7 FDI_INT AG3 FDI_TX_5 AE8 FDI_TX_N5
20 PEG_RX_P7 PEG_RX_7 PEG_TX_7 PEG_TX_P7 20 17 FDI_INT FDI_INT FDI_TX#_5 FDI_TX_N5 17
20 PEG_RX_N7 PEG_RX_N7 E1 E5 PEG_TX_N7 PEG_TX_N7 20 AF3 FDI_TX_P6 FDI_TX_P6 17
PEG_RX_P8 F4 PEG_RX#_7 PEG_TX#_7 F8 PEG_TX_P8 1 2 FDI_COMP AE2 FDI_TX_6 AF2 FDI_TX_N6
20 PEG_RX_P8 PEG_RX_8 PEG_TX_8 PEG_TX_P8 20 V_CPUVTT FDI_COMPIO FDI_TX#_6 FDI_TX_N6 17

PEG
20 PEG_RX_N8 PEG_RX_N8 F3 F7 PEG_TX_N8 PEG_TX_N8 20 AE1 AG2 FDI_TX_P7 FDI_TX_P7 17
PEG_RX_P9 G2 PEG_RX#_8 PEG_TX#_8 G10 PEG_TX_P9 ER36 24.9-1-04 FDI_ICOMPO FDI_TX_7 AG1 FDI_TX_N7
20 PEG_RX_P9 PEG_RX_9 PEG_TX_9 PEG_TX_P9 20 FDI_TX#_7 FDI_TX_N7 17
20 PEG_RX_N9 PEG_RX_N9 G1 G9 PEG_TX_N9 PEG_TX_N9 20
PEG_RX_P10 H3 PEG_RX#_9 PEG_TX#_9 G5 PEG_TX_P10
20 PEG_RX_P10 PEG_RX_10 PEG_TX_10 PEG_TX_P10 20
20 PEG_RX_N10 PEG_RX_N10 H4 G6 PEG_TX_N10 PEG_TX_N10 20
PEG_RX_P11 J1 PEG_RX#_10 PEG_TX#_10 K7 PEG_TX_P11 AB7 AH1 DIMM_DQ_CPU_VREF_B
20 PEG_RX_P11 PEG_RX_11 PEG_TX_11 PEG_TX_P11 20 RSVD_04 SB_DIMM_DQVREF DIMM_DQ_CPU_VREF_B 8
20 PEG_RX_N11 PEG_RX_N11 J2 K8 PEG_TX_N11 PEG_TX_N11 20 AD37 AH4 DIMM_DQ_CPU_VREF_A
PEG_RX_P12 K3 PEG_RX#_11 PEG_TX#_11 J5 PEG_TX_P12 AG4 RSVD_05 SA_DIMM_DQVREF DIMM_DQ_CPU_VREF_A 7
20 PEG_RX_P12 PEG_RX_12 PEG_TX_12 PEG_TX_P12 20 RSVD_08
20 PEG_RX_N12 PEG_RX_N12 K4 J6 PEG_TX_N12 PEG_TX_N12 20 AJ29 AT11
PEG_RX_P13 L1 PEG_RX#_12 PEG_TX#_12 M8 PEG_TX_P13 AJ30 RSVD_10 RSVD_15 AP20
20 PEG_RX_P13 PEG_RX_13 PEG_TX_13 PEG_TX_P13 20 RSVD_11 RSVD_14
20 PEG_RX_N13 PEG_RX_N13 L2 M7 PEG_TX_N13 PEG_TX_N13 20 AJ31 AN20
PEG_RX_P14 M3 PEG_RX#_13 PEG_TX#_13 L6 PEG_TX_P14 AV34 RSVD_12 RSVD_13 AU10
20 PEG_RX_P14 PEG_RX_14 PEG_TX_14 PEG_TX_P14 20 RSVD_19 RSVD_17
20 PEG_RX_N14 PEG_RX_N14 M4 L5 PEG_TX_N14 PEG_TX_N14 20 AW34 AY10
PEG_RX_P15 N1 PEG_RX#_14 PEG_TX#_14 N5 PEG_TX_P15 RSVD_21 RSVD_22
20 PEG_RX_P15 PEG_RX_15 PEG_TX_15 PEG_TX_P15 20
20 PEG_RX_N15 PEG_RX_N15 N2 N6 PEG_TX_N15 PEG_TX_N15 20 P35
PEG_RX#_15 PEG_TX#_15 P37 RSVD_43
P39 RSVD_44
DMI_RX_P0 W5 V7 DMI_TX_P0 R34 RSVD_45
14 DMI_RX_P0 DMI_RX_0 DMI_TX_0 DMI_TX_P0 14 RSVD_46
DMI_RX_N0 W4 V6 DMI_TX_N0 DMI_TX_N0 14 R36
14 DMI_RX_N0 DMI_RX#_0 DMI_TX#_0 RSVD_47
C DMI_RX_P1 V3 W7 DMI_TX_P1 DMI_TX_P1 14 R38 AF4 C
14 DMI_RX_P1 DMI_RX_1 DMI_TX_1 RSVD_48 RSVD_07
DMI_RX_N1 V4 W8 DMI_TX_N1 DMI_TX_N1 14 R40 AB6
14 DMI_RX_N1 DMI_RX#_1 DMI_TX#_1 RSVD_49 RSVD_03
DMI_RX_P2 Y3 Y6 DMI_TX_P2 AE6
DMI
14 DMI_RX_P2 DMI_RX_2 DMI_TX_2 DMI_TX_P2 14 RSVD_06
DMI_RX_N2 Y4 Y7 DMI_TX_N2 DMI_TX_N2 14 AJ11
14 DMI_RX_N2 DMI_RX#_2 DMI_TX#_2 RSVD_09
DMI_RX_P3 AA4 AA7 DMI_TX_P3 DMI_TX_P3 14
14 DMI_RX_P3 DMI_RX_3 DMI_TX_3
DMI_RX_N3 AA5 AA8 DMI_TX_N3 DMI_TX_N3 14
14 DMI_RX_N3 DMI_RX#_3 DMI_TX#_3 A38 D38
AU40 NCTF_01 RSVD_27 C39
P3 P8 AW38 NCTF_02 RSVD_26 C38
P4 PE_RX_0 PE_TX_0 P7 C2 NCTF_03 RSVD_25 J34
R2 PE_RX#_0 PE_TX#_0 T7 D1 NCTF_04 RSVD_31 N34
R1 PE_RX_1 PE_TX_1 T8 NCTF_05 2 OF 10 RSVD_41
PE_RX#_1 PE_TX#_1 These signals are
GEN

T4 R6
PE_RX_2 PE_TX_2 available for Workstation only
T3 R5
U2 PE_RX#_2 PE_TX#_2 U5 SKT_H2_CRB
U1 PE_RX_3 PE_TX_3 U6
PE_RX#_3 PE_TX#_3
ER25 24.9-1-04
V_CPUVTT 1 2 PEG_COMP B5
PEG_ICOMPO
R
Q

C4
B4 PEG_RCOMPO
PEG_COMPI 1 OF 10

SKT_H2_CRB

SHORT B4 & C4 TOGETHER, ROUTE AS A SINGLE 4MIL TRACE TO RQ.


1 ROUTE B5 TO RQ. 1 AS A SEPERATE 12MIL TRACE. CPU(104)
CPU_SUBASSY_STEEL
B B

11-018-115124 SOCKET.CPU..LGA 1155P


SMD..G/F...BLACK.ACA-ZIF-096-P02....
LEAD-FREE(RoHS/HF).LOTES

1228'10 Jayson :
Part number modified。
20-800-005111 SUBASSY.STEEL....LGA 1155P.....W/BACK
PLATE.ACA-ZIF-082-P23
....LEAD-FREE(RoHS/HF).LOTES

A A

01D201-000060 PCH ES0


Elitegroup Computer Systems
Title
CPU - DMI/FDI/PEG
Size Document Number Rev
Custom H61H2-M12 1.0
Date: Wednesday, July 13, 2011 Sheet 3 of 29
5 4 3 2 1
5 4 3 2 1

1130'10
PECI 2 1 PECI_PCH pull high By Jayson Del,
PECI_PCH 15 CPUE
Pull high on Page11
R78 0-04-O
BALLMAP_REV=1.4
CK_CPU_100M_P W2 P33 VTT_SEL
15 CK_CPU_100M_P BCLK_0 VCCP_SELECT VTT_SEL 11
CK_CPU_100M_N W1 P34 VCCSA_VID
15 CK_CPU_100M_N BCLK#_0 VCCSA_VID VCCSA_VID 11
T2 VCCSA_SEN
D
VR_SVID_CK C37 VCCSA_SENSE VCCSA_SEN 11 D
9 VR_SVID_CK VIDSCLK
DRAM_PWROK 9 VR_SVID_DATAOUT VR_SVID_DATAOUT B37 A36 VCC_SEN
16 DRAM_PWROK VIDSOUT VCC_SENSE VCC_SEN 9
BC151 .1U-16VY-04-O 9 VR_SVID_ALERT_L VR_SVID_ALERT_L A37 B36 VSS_SEN
1 2 VIDALERT# VSS_SENSE VSS_SEN 9
GND
CPU_PWROK J40 AB4 VCCIO_SEN
16 CPU_PWROK UNCOREPWRGOOD VCCIO_SENSE VCCIO_SEN 11
ER26 2K-1-04 1.1V DRAM_PWROK AJ19 AB3 VSSIO_SEN
SIO_PCIRST2_L 1 2 CPU_RST_L F36 SM_DRAMPWROK VSSIO_SENSE VSSIO_SEN 11
23 SIO_PCIRST2_L RESET#
ER27 1K-1-04 BC76 .1U-16VY-04-O L32 VCCAXG_SEN
1 2 1 2 PM_SYNC E38 VCCAXG_SENSE M32 VSSAXG_SEN VCCAXG_SEN 9
GND GND 15 PM_SYNC PM_SYNC VSSAXG_SENSE VSSAXG_SEN 9
23 PECI PECI J35
CATERR_L E37 PECI L39 H_TDO 1
CATERR# TDO STP31
9 VR_HOT_L VR_HOT_L H34 L40 H_TDI 1 STP26
CPU_THERMTRIP_L G35 PROCHOT# TDI M40 H_TCK 1
15 CPU_THERMTRIP_L THERMTRIP# TCK STP27
L38 H_TMS 1 STP29
H_SKTOCC_L AJ33 TMS J39 H_TRST_L 1
9,23 H_SKTOCC_L SKTOCC# TRST# STP22
PROC_SEL K32 K38 H_PRDY_L 1 STP24
V_1P5_SM 17 PROC_SEL PROC_SEL PRDY# K40 H_PREQ_L 1
PREQ# STP23
DIMM_VREF_CPU AJ22 E39 FP_RST_L
SM_VREF DBR# C40 XDP_H_CLK_DP 1 FP_RST_L 13,16
CFG H L DESCRIPTION RSVD_001 STP4

2
D40 XDP_H_CLK_DN 1 STP3
0 reserved reserved reserved R97 1 CFG_0 H36 RSVD_002
STP1 CFG_0
1 reserved reserved reserved 100-1-04 STP8 1 CFG_1 J36 H40 1 STP15
2 NORMAL REVERSE PEGLANE REVERSAL[0], X16 1 CFG_2 J37 CFG_1 BPM#_0 H38 1
STP16 CFG_2 BPM#_1 STP14

1
3 reserved reserved reserved DIMM_VREF_CPU STP9 1 CFG_3 K36 G38 1 STP13
4 reserved reserved reserved 1 CFG_4 L36 CFG_3 BPM#_2 G40 1
STP20 CFG_4 BPM#_3 STP12
5 * * PEOFGSEL[0] STP25 1 CFG_5 N35 G39 1 STP11
CFG_5 BPM#_4

1
6 * * PEOFGSEL[1] STP19 1 CFG_6 L37 F38 1 STP5
7 reserved reserved reserved R98 C33 1 CFG_7 M36 CFG_6 BPM#_5 E40 1
STP17 CFG_7 BPM#_6 STP6
8 reserved reserved reserved 100-1-04 .1U-16VY-04 STP21 1 CFG_8 J38 F40 1 STP10
CFG_8 BPM#_7

2
C 9 reserved reserved reserved STP18 1 CFG_9 L35 C
CFG_9

1
10 reserved reserved reserved STP28 1 CFG_10 M38 B39
11 reserved reserved reserved 1 CFG_11 N36 CFG_10 RSVD_024 J33
STP30 CFG_11 RSVD_030
12 reserved reserved reserved GND GND 1 CFG_12 N38 L34
STP33 CFG_12 RSVD_037 V_CPUVTT
13 reserved reserved reserved STP32 1 CFG_13 N39 L33
14 reserved reserved reserved 1 CFG_14 N37 CFG_13 RSVD_036 K34
STP34 CFG_14 RSVD_033
15 reserved reserved reserved STP35 1 CFG_15 N40 H_TRST_L RN2 1 2 51-8P4R-O
1 CFG_16 G37 CFG_15 N33 H_TMS 3 4
STP7 CFG_16 RSVD_040
CFG_[0..17] HAVE INTERNAL PULL-UPS STP2 1 CFG_17 G36 M34 H_TDI 5 6
CFG_17 RSVD_039 H_TCK 7 8
AT14 AV1
RSVD_016 RSVD_018 AW2
change test point for internal PU Jack05/25 RSVD_020
CFG[5:6]: AY3 GND
11=DEFAULT X16, RSVD_023 L9
PCIE CONFIG SEL0 SEL1 H7 RSVD_038 J9
01=2X8,
RSVD_028 RSVD_032 EDS P68/132 has internal PU Jack05/25
* 1 X 16 1 1 10=RESERVED, H8 K9
2X8 0 1 RSVD_029 RSVD_034
00=X8,X4,X4
L31
RSVD_035
J31 V_CPUVTT
RSVD_050 K31
RSVD_053
5 OF 10 AD34
RSVD_051 AD35 CATERR_L R73 1 2 1K-04-O CATERR_L,
RSVD_052 CPU_THERMTRIP_L
VR_HOT_L R133 1 2 51-04 Pull Up Resistor

Power Down Sequencing Circuit SKT_H2_CRB


2010 MoW05 Remove

BC185 .1U-16VY-04-O
CPU_PWROK 1 2
B B
3VSB
TO VRD FOR S0->S5
2

VR_EN VR_EN 9 GND


R231
10K-04
C

2
1

1 2 B QN7 C39 V_1P8_SFR


R230 1K-04 2N3904-S 2.2U-6VY-06-O
C

R236 10K-04 PROC_SEL R110 2 1 2.2K-04


E

SLP3_L 1 2 B QN8
11,16,23 SLP3_L
2N3904-S BC187 2 1 .1U-16VY-04
GND GND FROM VRD
E

GND

DMI/FDI termination voltage:


GND DC coupled: TX/RX to VCC ISF sampled high
DC coupled: TX/RX TO VSS IF sampled low
AC COUPLED: TX set to VCC/2, RX set to VSS regardless of this strap

CPU_PWROK

20100927
2

A Del By Andy lu R216 A


1K-04
1

GND
Elitegroup Computer Systems
Title
CPU - MISC
Size Document Number Rev
Custom H61H2-M12 1.0
Date: Wednesday, July 13, 2011 Sheet 4 of 29
5 4 3 2 1
5 4 3 2 1

Pay Attention to CPUD


CPUC This Part!

M_DATA_A0 AJ3
BALLMAP_REV=1.4 AV27 M_MA_A0 M_DATA_B0 AG7
BALLMAP_REV=1.4 AK24 M_MA_B0
M_DATA_A1 AJ4 SA_DQ_0 SA_MA_0 AY24 M_MA_A1 M_DATA_B1 AG8 SB_DQ_0 SB_MA_0 AM20 M_MA_B1
M_DATA_A2 AL3 SA_DQ_1 SA_MA_1 AW24 M_MA_A2 M_DATA_B2 AJ9 SB_DQ_1 SB_MA_1 AM19 M_MA_B2
M_DATA_A3 AL4 SA_DQ_2 SA_MA_2 AW23 M_MA_A3 M_DATA_B3 AJ8 SB_DQ_2 SB_MA_2 AK18 M_MA_B3
M_DATA_A[0..63] M_DATA_A4 AJ2 SA_DQ_3 SA_MA_3 AV23 M_MA_A4 M_DATA_B4 AG5 SB_DQ_3 SB_MA_3 AP19 M_MA_B4
D 7 M_DATA_A[0..63] SA_DQ_4 SA_MA_4 SB_DQ_4 SB_MA_4 D
M_DATA_A5 AJ1 AT24 M_MA_A5 M_DATA_B5 AG6 AP18 M_MA_B5
M_DQS_A_P[0..7] M_DATA_A6 AL2 SA_DQ_5 SA_MA_5 AT23 M_MA_A6 M_DATA_B6 AJ6 SB_DQ_5 SB_MA_5 AM18 M_MA_B6
7 M_DQS_A_P[0..7] SA_DQ_6 SA_MA_6 SB_DQ_6 SB_MA_6
M_DATA_A7 AL1 AU22 M_MA_A7 M_DATA_B7 AJ7 AL18 M_MA_B7
M_DQS_A_N[0..7] M_DATA_A8 AN1 SA_DQ_7 SA_MA_7 AV22 M_MA_A8 M_DATA_B13 AL7 SB_DQ_7 SB_MA_7 AN18 M_MA_B8
7 M_DQS_A_N[0..7] SA_DQ_8 SA_MA_8 SB_DQ_8 SB_MA_8
M_DATA_A9 AN4 AT22 M_MA_A9 M_DATA_B9 AM7 AY17 M_MA_B9
M_MA_A[0..15] M_DATA_A10 AR3 SA_DQ_9 SA_MA_9 AV28 M_MA_A10 M_DATA_B11 AM10 SB_DQ_9 SB_MA_9 AN23 M_MA_B10
7 M_MA_A[0..15] M_DATA_A11 AR4 SA_DQ_10 SA_MA_10 AU21 M_MA_A11 M_DATA_B15 AL10 SB_DQ_10 SB_MA_10 AU17 M_MA_B11
M_BS_A[0..2] M_DATA_A12 AN2 SA_DQ_11 SA_MA_11 AT21 M_MA_A12 M_DATA_B12 AL6 SB_DQ_11 SB_MA_11 AT18 M_MA_B12
7 M_BS_A[0..2] M_DATA_A13 AN3 SA_DQ_12 SA_MA_12 AW32 M_MA_A13 M_DATA_B8 AM6 SB_DQ_12 SB_MA_12 AR26 M_MA_B13
M_CS_A_L[0..1] M_DATA_A14 AR2 SA_DQ_13 SA_MA_13 AU20 M_MA_A14 M_DATA_B14 AL9 SB_DQ_13 SB_MA_13 AY16 M_MA_B14
7 M_CS_A_L[0..1] M_DATA_A15 AR1 SA_DQ_14 SA_MA_14 AT20 M_MA_A15 M_DATA_B10 AM9 SB_DQ_14 SB_MA_14 AV16 M_MA_B15
M_CKE_A[0..1] M_DATA_A16 AV2 SA_DQ_15 SA_MA_15 M_DATA_B16 AP7 SB_DQ_15 SB_MA_15
7 M_CKE_A[0..1] M_DATA_A17 AW3 SA_DQ_16 M_DATA_B17 AR7 SB_DQ_16
M_ODT_A[0..1] M_DATA_A18 AV5 SA_DQ_17 AW29 M_WE_A_L M_DATA_B18 AP10 SB_DQ_17 AR25 M_WE_B_L
7 M_ODT_A[0..1] M_DATA_A19 AW5 SA_DQ_18 SA_WE# AV30 M_CAS_A_L M_DATA_B19 AR10 SB_DQ_18 SA_CK[2] AK25 M_CAS_B_L
M_CLK_A_P[0..1] M_DATA_A20 AU2 SA_DQ_19 SA_CAS# AU28 M_RAS_A_L M_DATA_B20 AP6 SB_DQ_19 SA_CK[1] AP24 M_RAS_B_L
7 M_CLK_A_P[0..1] M_DATA_A21 AU3 SA_DQ_20 SA_RAS# M_DATA_B21 AR6 SB_DQ_20 SA_ODT[2]
M_CLK_A_N[0..1] M_DATA_A22 AU5 SA_DQ_21 M_DATA_B22 AP9 SB_DQ_21
7 M_CLK_A_N[0..1] M_DATA_A23 AY5 SA_DQ_22 AY29 M_BS_A0 M_DATA_B23 AR9 SB_DQ_22 AP23 M_BS_B0
M_DATA_A24 AY7 SA_DQ_23 SA_BS_0 AW28 M_BS_A1 M_DATA_B24 AM12 SB_DQ_23 SB_BS_0 AM24 M_BS_B1
M_DATA_A25 AU7 SA_DQ_24 SA_BS_1 AV20 M_BS_A2 M_DATA_B25 AM13 SB_DQ_24 SB_BS_1 AW17 M_BS_B2
M_DATA_A26 AV9 SA_DQ_25 SA_BS_2 M_DATA_B26 AR13 SB_DQ_25 SB_BS_2
M_WE_A_L M_DATA_A27 AU9 SA_DQ_26 M_DATA_B27 AP13 SB_DQ_26
7 M_WE_A_L M_CAS_A_L M_DATA_A28 AV7 SA_DQ_27 AU29 M_DATA_B28 AL12 SB_DQ_27 AN25
7 M_CAS_A_L M_RAS_A_L M_DATA_A29 AW7 SA_DQ_28 SA_CS#_0 AV32 M_DATA_B29 AL13 SB_DQ_28 SB_CS#_0 AN26
7 M_RAS_A_L M_DATA_A30 AW9 SA_DQ_29 SA_CS#_1 AW30 M_CS_A_L0 M_DATA_B30 AR12 SB_DQ_29 SB_CS#_1 AL25 M_CS_B_L0
M_DATA_A31 AY9 SA_DQ_30 SA_CS#_2 AU33 M_CS_A_L1 M_DATA_B31 AP12 SB_DQ_30 SB_CS#_2 AT26 M_CS_B_L1
M_DATA_A32 AU35 SA_DQ_31 SA_CS#_3 M_DATA_B32 AR28 SB_DQ_31 SB_CS#_3
DDR3 CH.A M_DATA_A33 AW37 SA_DQ_32 M_DATA_B33 AR29 SB_DQ_32
M_DATA_A34 AU39 SA_DQ_33 M_DATA_B34 AL28 SB_DQ_33
C C
DDR3_DRAMRST_L M_DATA_A35 AU36 SA_DQ_34 AV19 M_DATA_B35 AL29 SB_DQ_34 AU16
7,8 DDR3_DRAMRST_L M_DATA_A36 AW35 SA_DQ_35 SA_CKE_0 AT19 M_DATA_B36 AP28 SB_DQ_35 SB_CKE_0 AY15
M_DATA_A37 AY36 SA_DQ_36 SA_CKE_1 AU18 M_CKE_A0 M_DATA_B37 AP29 SB_DQ_36 SB_CKE_1 AW15 M_CKE_B0
M_DATA_A38 AU38 SA_DQ_37 SA_CKE_2 AV18 M_CKE_A1 M_DATA_B38 AM28 SB_DQ_37 SB_CKE_2 AV15 M_CKE_B1
M_DATA_A39 AU37 SA_DQ_38 SA_CKE_3 M_DATA_B39 AM29 SB_DQ_38 SB_CKE_3
M_DATA_A40 AR40 SA_DQ_39 M_DATA_B40 AP32 SB_DQ_39
M_DATA_B[0..63] M_DATA_A41 AR37 SA_DQ_40 M_DATA_B41 AP31 SB_DQ_40
8 M_DATA_B[0..63] SA_DQ_41 SB_DQ_41
M_DATA_A42 AN38 AV31 M_DATA_B42 AP35 AL26
M_DQS_B_P[0..7] M_DATA_A43 AN37 SA_DQ_42 SA_ODT_0 AU32 M_DATA_B43 AP34 SB_DQ_42 SB_ODT_0 AP26
8 M_DQS_B_P[0..7] SA_DQ_43 SA_ODT_1 SB_DQ_43 SB_ODT_1
M_DATA_A44 AR39 AU30 M_ODT_A0 M_DATA_B44 AR32 AM26 M_ODT_B0
M_DQS_B_N[0..7] M_DATA_A45 AR38 SA_DQ_44 SA_ODT_2 AW33 M_ODT_A1 M_DATA_B45 AR31 SB_DQ_44 SB_ODT_2 AK26 M_ODT_B1
8 M_DQS_B_N[0..7] SA_DQ_45 SA_ODT_3 SB_DQ_45 SB_ODT_3
M_DATA_A46 AN39 M_DATA_B46 AR35
M_MA_B[0..15] AN40 SA_DQ_46 AR34 SB_DQ_46
8 M_MA_B[0..15]
M_DATA_A47
SA_DQ_47 Del DIMM0 for always populate M_DATA_B47
SB_DQ_47 Del DIMM0 for always populate
M_DATA_A48 AL40 M_DATA_B48 AM32
M_BS_B[0..2] M_DATA_A49 AL37 SA_DQ_48 AY25 DIMM1 first Jack 05/13 M_DATA_B52 AM31 SB_DQ_48 AL21 DIMM1 first Jack 05/13
8 M_BS_B[0..2] M_DATA_A50 AJ38 SA_DQ_49 SA_CK_0 AW25 M_DATA_B55 AL35 SB_DQ_49 SB_CK_0 AL22
M_CS_B_L[0..1] M_DATA_A51 AJ37 SA_DQ_50 SA_CK#_0 AU24 M_DATA_B51 AL32 SB_DQ_50 SB_CK#_0 AL20
8 M_CS_B_L[0..1] M_DATA_A52 AL39 SA_DQ_51 SA_CK_1 AU25 M_DATA_B54 AM34 SB_DQ_51 SB_CK_1 AK20
M_CKE_B[0..1] M_DATA_A53 AL38 SA_DQ_52 SA_CK#_1 AW27 M_CLK_A_P0 M_DATA_B49 AL31 SB_DQ_52 SB_CK#_1 AL23 M_CLK_B_P0
8 M_CKE_B[0..1] M_DATA_A54 AJ39 SA_DQ_53 SA_CK_2 AY27 M_CLK_A_N0 M_DATA_B53 AM35 SB_DQ_53 SB_CK_2 AM22 M_CLK_B_N0
M_ODT_B[0..1] M_DATA_A55 AJ40 SA_DQ_54 SA_CK#_2 AV26 M_CLK_A_P1 M_DATA_B50 AL34 SB_DQ_54 SB_CK#_2 AP21 M_CLK_B_P1
8 M_ODT_B[0..1] M_DATA_A56 AG40 SA_DQ_55 SA_CK_3 AW26 M_CLK_A_N1 M_DATA_B56 AH35 SB_DQ_55 SB_CK_3 AN21 M_CLK_B_N1
M_CLK_B_P[0..1] M_DATA_A57 AG37 SA_DQ_56 SA_CK#_3 M_DATA_B57 AH34 SB_DQ_56 SB_CK#_3
8 M_CLK_B_P[0..1] M_DATA_A58 AE38 SA_DQ_57 M_DATA_B58 AE34 SB_DQ_57
M_CLK_B_N[0..1] M_DATA_A59 AE37 SA_DQ_58 M_DATA_B59 AE35 SB_DQ_58
8 M_CLK_B_N[0..1] M_DATA_A60 AG39 SA_DQ_59 AW18 DDR3_DRAMRST_L M_DATA_B60 AJ35 SB_DQ_59
M_DATA_A61 AG38 SA_DQ_60 SM_DRAMRST# M_DATA_B61 AJ34 SB_DQ_60
M_DATA_A62 AE39 SA_DQ_61 M_DATA_B62 AF33 SB_DQ_61
M_DATA_A63 AE40 SA_DQ_62 M_DATA_B63 AF35 SB_DQ_62
B
M_WE_B_L SA_DQ_63 AV13 SB_DQ_63 AN16 B
8 M_WE_B_L M_CAS_B_L SA_DQS_8 AV12 SB_DQS_8 AN15
8 M_CAS_B_L M_RAS_B_L M_DQS_A_P0 AK3 SA_DQS#_8 M_DQS_B_P0 AH7 SB_DQS#_8
8 M_RAS_B_L M_DQS_A_P1 AP3 SA_DQS_0 M_DQS_B_P1 AM8 SB_DQS_0
M_DQS_A_P2 AW4 SA_DQS_1 M_DQS_B_P2 AR8 SB_DQS_1
M_DQS_A_P3 AV8 SA_DQS_2 M_DQS_B_P3 AN13 SB_DQS_2
DDR3 CH.B M_DQS_A_P4 AV37 SA_DQS_3 AU12 M_DQS_B_P4 AN29 SB_DQS_3 AL16
M_DQS_A_P5 AP38 SA_DQS_4 SA_ECC_CB_0 AU14 M_DQS_B_P5 AP33 SB_DQS_4 SB_ECC_CB_0 AM16
M_DQS_A_P6 AK38 SA_DQS_5 SA_ECC_CB_1 AW13 M_DQS_B_P6 AL33 SB_DQS_5 SB_ECC_CB_1 AP16
M_DQS_A_P7 AF38 SA_DQS_6 SA_ECC_CB_2 AY13 M_DQS_B_P7 AG35 SB_DQS_6 SB_ECC_CB_2 AR16
SA_DQS_7 SA_ECC_CB_3 AU13 Desktop dosen't support SB_DQS_7 SB_ECC_CB_3 AL15 Desktop dosen't support
SA_ECC_CB_4 AU11 SB_ECC_CB_4 AM15 ECC
ECC
M_DQS_A_N0 AK2 SA_ECC_CB_5 AY12 M_DQS_B_N0 AH6 SB_ECC_CB_5 AR15
M_DQS_A_N1 AP2 SA_DQS#_0 SA_ECC_CB_6 AW12 M_DQS_B_N1 AL8 SB_DQS#_0 SB_ECC_CB_6 AP15
M_DQS_A_N2 AV4 SA_DQS#_1 SA_ECC_CB_7 M_DQS_B_N2 AP8 SB_DQS#_1 SB_ECC_CB_7
M_DQS_A_N3 AW8 SA_DQS#_2 M_DQS_B_N3 AN12 SB_DQS#_2
M_DQS_A_N4 AV36 SA_DQS#_3 AN28 SB_DQS#_3
M_DQS_A_N5 AP39 SA_DQS#_4 DDR_0 M_DQS_B_N4
M_DQS_B_N5 AR33 SB_DQS#_4 DDR_1
M_DQS_A_N6 AK39 SA_DQS#_5 M_DQS_B_N6 AM33 SB_DQS#_5
M_DQS_A_N7 AF39 SA_DQS#_6 M_DQS_B_N7 AG34 SB_DQS#_6
SA_DQS#_7 3 OF 10 SB_DQS#_7 4 OF 10

SKT_H2_CRB SKT_H2_CRB
DDR3 CH.A DDR3 CH.B

A A

Elitegroup Computer Systems


Title
CPU - DDR3
Size Document Number Rev
Custom H61H2-M12 1.0
Date: Wednesday, July 13, 2011 Sheet 5 of 29
5 4 3 2 1
5 4 3 2 1

1.05V/1.00V 1.5V
MAX 112A MAX 8.5A MAX 4.5A MAX 35A
VCORE CPUF VCORE V_CPUVTT CPUG V_1P5_SM VAXG CPUH CPUI CPUJ

A17
BALLMAP_REV=1.4 AM27 AV11
BALLMAP_REV=1.4 G8
A12
BALLMAP_REV=1.4 F32 M13
BALLMAP_REV=1.4 AJ13
VBALLMAP_REV=1.4
A23 VSS_001 VSS_091 AM3 AV14 VSS_181 VSS_271 H1
A13 VCC_001 VCC_082 F33 VCCIO_34 VDDQ_01 AJ14 AB33 A26 VSS_002 VSS_092 AM30 AV17 VSS_182 VSS_272 H17
A14 VCC_002 VCC_083 F34 A11 VDDQ_02 AJ23 AB34 VCCAXG_01 A29 VSS_003 VSS_093 AM36 AV3 VSS_183 VSS_273 H2
A15 VCC_003 VCC_084 G15 A7 VCCIO_01 VDDQ_04 AJ24 AB35 VCCAXG_02 A35 VSS_004 VSS_094 AM37 AV35 VSS_184 VSS_274 H20
A16 VCC_004 VCC_085 G16 AA3 VCCIO_02 VDDQ_05 AR20 AB36 VCCAXG_03 AA33 VSS_005 VSS_095 AM38 AV38 VSS_185 VSS_275 H23
A18 VCC_005 VCC_086 G18 AB8 VCCIO_03 VDDQ_06 AR21 AB37 VCCAXG_04 AA34 VSS_006 VSS_096 AM39 AV6 VSS_186 VSS_276 H26
A24 VCC_006 VCC_087 G19 AF8 VCCIO_04 VDDQ_07 AR22 AB38 VCCAXG_05 AA35 VSS_007 VSS_097 AM4 AW10 VSS_187 VSS_277 H29
A25 VCC_007 VCC_088 G21 AG33 VCCIO_05 VDDQ_08 AR23 AB39 VCCAXG_06 AA36 VSS_008 VSS_098 AM40 AW11 VSS_188 VSS_278 H33
D D
A27 VCC_008 VCC_089 G22 AJ16 VCCIO_06 VDDQ_09 AR24 AB40 VCCAXG_07 AA37 VSS_009 VSS_099 AM5 AW14 VSS_189 VSS_279 H35
A28 VCC_009 VCC_090 G24 AJ17 VCCIO_07 VDDQ_10 AU19 AC33 VCCAXG_08 AA38 VSS_010 VSS_100 AN10 AW16 VSS_190 VSS_280 H37
B15 VCC_010 VCC_091 G25 AJ26 VCCIO_08 VDDQ_11 AU23 AC34 VCCAXG_09 AA6 VSS_011 VSS_101 AN11 AW36 VSS_191 VSS_281 H39
B16 VCC_011 VCC_092 G27 AJ28 VCCIO_09 VDDQ_12 AU27 AC35 VCCAXG_10 AB5 VSS_012 VSS_102 AN14 AW6 VSS_192 VSS_282 H5
B18 VCC_012 VCC_093 G28 AJ32 VCCIO_10 VDDQ_13 AU31 AC36 VCCAXG_11 AC1 VSS_013 VSS_103 AN17 AY11 VSS_193 VSS_283 H6
B24 VCC_013 VCC_094 G30 AK15 VCCIO_11 VDDQ_14 AV21 AC37 VCCAXG_12 AC6 VSS_014 VSS_104 AN19 AY14 VSS_194 VSS_284 H9
B25 VCC_014 VCC_095 G31 AK17 VCCIO_12 VDDQ_15 AV24 AC38 VCCAXG_13 AD33 VSS_015 VSS_105 AN22 AY18 VSS_195 VSS_285 J11
B27 VCC_015 VCC_096 G32 AK19 VCCIO_13 VDDQ_16 AV25 AC39 VCCAXG_14 AD36 VSS_016 VSS_106 AN24 AY35 VSS_196 VSS_286 J17
B28 VCC_016 VCC_097 G33 AK21 VCCIO_14 VDDQ_17 AV29 AC40 VCCAXG_15 AD38 VSS_017 VSS_107 AN27 AY4 VSS_197 VSS_287 J20
B30 VCC_017 VCC_098 H13 AK23 VCCIO_15 VDDQ_18 AV33 T33 VCCAXG_16 AD39 VSS_018 VSS_108 AN30 AY6 VSS_198 VSS_288 J23
B31 VCC_018 VCC_099 H14 AK27 VCCIO_16 VDDQ_19 AW31 T34 VCCAXG_17 AD40 VSS_019 VSS_109 AN31 AY8 VSS_199 VSS_289 J26
B33 VCC_019 VCC_100 H15 AK29 VCCIO_17 VDDQ_20 AY23 T35 VCCAXG_18 AD5 VSS_020 VSS_110 AN32 B10 VSS_200 VSS_290 J29
B34 VCC_020 VCC_101 H16 AK30 VCCIO_18 VDDQ_21 AY26 T36 VCCAXG_19 AD8 VSS_021 VSS_111 AN33 B13 VSS_201 VSS_291 J32
C15 VCC_021 VCC_102 H18 B9 VCCIO_19 VDDQ_22 AY28 T37 VCCAXG_20 AE3 VSS_022 VSS_112 AN34 B14 VSS_202 VSS_292 K1
C16 VCC_022 VCC_103 H19 D10 VCCIO_20 VDDQ_23 T38 VCCAXG_21 AE33 VSS_023 VSS_113 AN35 B17 VSS_203 VSS_293 K12
C18 VCC_023 VCC_104 H21 D6 VCCIO_21 T39 VCCAXG_22 AE36 VSS_024 VSS_114 AN36 B23 VSS_204 VSS_294 K13
C19 VCC_024 VCC_105 H22 E3 VCCIO_22 AJ20 T40 VCCAXG_23 AF1 VSS_025 VSS_115 AN5 B26 VSS_205 VSS_295 K14
C21 VCC_025 VCC_106 H24 E4 VCCIO_23 VDDQ_03 U33 VCCAXG_24 AF34 VSS_026 VSS_116 AN6 B29 VSS_206 VSS_296 K17
C22 VCC_026 VCC_107 H25 G3 VCCIO_24 U34 VCCAXG_25 AF36 VSS_027 VSS_117 AN7 B32 VSS_207 VSS_297 K2
C24 VCC_027 VCC_108 H27 G4 VCCIO_25 U35 VCCAXG_26 AF37 VSS_028 VSS_118 AN8 B35 VSS_208 VSS_298 K20
C25 VCC_028 VCC_109 H28 J3 VCCIO_26 U36 VCCAXG_27 AF40 VSS_029 VSS_119 AN9 B38 VSS_209 VSS_299 K23
C27 VCC_029 VCC_110 H30 J4 VCCIO_27 U37 VCCAXG_28 AF5 VSS_030 VSS_120 AP1 B6 VSS_210 VSS_300 K26
C28 VCC_030 VCC_111 H31 J7 VCCIO_28 U38 VCCAXG_29 AF6 VSS_031 VSS_121 AP11 C11 VSS_211 VSS_301 K29
C30 VCC_031 VCC_112 H32 J8 VCCIO_29 U39 VCCAXG_30 AF7 VSS_032 VSS_122 AP14 C12 VSS_212 VSS_302 K33
C31 VCC_032 VCC_113 J12 L3 VCCIO_30 U40 VCCAXG_31 AG36 VSS_033 VSS_123 AP17 C17 VSS_213 VSS_303 K35
C33 VCC_033 VCC_114 J15 L4 VCCIO_31 W33 VCCAXG_32 AH2 VSS_034 VSS_124 AP22 C20 VSS_214 VSS_304 K37
C34 VCC_034 VCC_115 J16 L7 VCCIO_32 W34 VCCAXG_33 AH3 VSS_035 VSS_125 AP25 C23 VSS_215 VSS_305 K39
C36 VCC_035 VCC_116 J18 N3 VCCIO_33 W35 VCCAXG_34 AH33 VSS_036 VSS_126 AP27 C26 VSS_216 VSS_306 K5
D13 VCC_036 VCC_117 J19 N4 VCCIO_35 W36 VCCAXG_35 AH36 VSS_037 VSS_127 AP30 C29 VSS_217 VSS_307 K6
D14 VCC_037 VCC_118 J21 N7 VCCIO_36 W37 VCCAXG_36 AH37 VSS_038 VSS_128 AP36 C32 VSS_218 VSS_308 L10
D15 VCC_038 VCC_119 J22 R3 VCCIO_37 W38 VCCAXG_37 AH38 VSS_039 VSS_129 AP37 C35 VSS_219 VSS_309 L17
D16 VCC_039 VCC_120 J24 R4 VCCIO_38 Y33 VCCAXG_38 AH39 VSS_040 VSS_130 AP4 C7 VSS_220 VSS_310 L20
D18 VCC_040 VCC_121 J25 R7 VCCIO_39 Y34 VCCAXG_39 AH40 VSS_041 VSS_131 AP40 C8 VSS_221 VSS_311 L23
D19 VCC_041 VCC_122 J27 U3 VCCIO_40 Y35 VCCAXG_40 AH5 VSS_042 VSS_132 AP5 D17 VSS_222 VSS_312 L26
C VCC_042 VCC_123 0.925V/0.85V VCCIO_41 VCCAXG_41 VSS_043 VSS_133 VSS_223 VSS_313 C
D21 J28 U4 Y36 AH8 AR11 D2 L29
D22 VCC_043 VCC_124 J30 MAX 8.8A U7 VCCIO_42 Y37 VCCAXG_42 AJ12 VSS_044 VSS_134 AR14 D20 VSS_224 VSS_314 L8
D24 VCC_044 VCC_125 K15 V8 VCCIO_43 Y38 VCCAXG_43 AJ15 VSS_045 VSS_135 AR17 D23 VSS_225 VSS_315 M1
VCC_045 VCC_126 V_SA VCCIO_44 VCCAXG_44 8 OF 10 VSS_046 VSS_136 VSS_226 VSS_316
D25 K16 W3 AJ18 AR18 D26 M17
D27 VCC_046 VCC_127 K18 VCCIO_45 AJ21 VSS_047 VSS_137 AR19 D29 VSS_227 VSS_317 M2
D28 VCC_047 VCC_128 K19 H10 SKT_H2_CRB AJ25 VSS_048 VSS_138 AR27 D32 VSS_228 VSS_318 M20
D30 VCC_048 VCC_129 K21 H11 VCCSA_01 AJ27 VSS_049 VSS_139 AR30 D37 VSS_229 VSS_319 M23
D31 VCC_049 VCC_130 K22 H12 VCCSA_02 AJ36 VSS_050 VSS_140 AR36 D39 VSS_230 VSS_320 M26
D33 VCC_050 VCC_131 K24 J10 VCCSA_03 AJ5 VSS_051 VSS_141 AR5 D4 VSS_231 VSS_321 M29
D34 VCC_051 VCC_132 K25 K10 VCCSA_04 AK1 VSS_052 VSS_142 AT1 D5 VSS_232 VSS_322 M33
D35 VCC_052 VCC_133 K27 K11 VCCSA_05 AK10 VSS_053 VSS_143 AT10 D9 VSS_233 VSS_323 M35
D36 VCC_053 VCC_134 K28 L11 VCCSA_06 AK13 VSS_054 VSS_144 AT12 E11 VSS_234 VSS_324 M37
VCC_054 VCC_135 1.8V VCCSA_07 VSS_055 VSS_145 VSS_235 VSS_325
E15 K30 L12 AK14 AT13 E12 M39
E16 VCC_055 VCC_136 L13 MAX 1A M10 VCCSA_08 AK16 VSS_056 VSS_146 AT15 E17 VSS_236 VSS_326 M5
E18 VCC_056 VCC_137 L14 M11 VCCSA_09 AK22 VSS_057 VSS_147 AT16 E20 VSS_237 VSS_327 M6
E19 VCC_057 VCC_138 L15 V_1P8_SFR M12 VCCSA_10 AK28 VSS_058 VSS_148 AT17 E23 VSS_238 VSS_328 M9
E21 VCC_058 VCC_139 L16 VCCSA_11 AK31 VSS_059 VSS_149 AT2 E26 VSS_239 VSS_329 N8
E22 VCC_059 VCC_140 L18 AK11
POWER AK32 VSS_060 VSS_150 AT25 E29 VSS_240 VSS_330 P1
E24 VCC_060 VCC_141 L19 AK12 VCCPLL_01 AK33 VSS_061 VSS_151 AT27 E32 VSS_241 VSS_331 P2
E25 VCC_061 VCC_142 L21 VCCPLL_02 7 OF 10 AK34 VSS_062 VSS_152 AT28 E36 VSS_242 VSS_332 P36
E27 VCC_062 VCC_143 L22 AK35 VSS_063 VSS_153 AT29 E7 VSS_243 VSS_333 P38
E28 VCC_063 VCC_144 L24 SKT_H2_CRB AK36 VSS_064 VSS_154 AT3 E8 VSS_244 VSS_334 P40
E30 VCC_064 VCC_145 L25 AK37 VSS_065 VSS_155 AT30 F1 VSS_245 VSS_335 P5
E31 VCC_065 VCC_146 L27 AK4 VSS_066 VSS_156 AT31 F10 VSS_246 VSS_336 P6
E33 VCC_066 VCC_147 L28 AK40 VSS_067 VSS_157 AT32 F13 VSS_247 VSS_337 R33
E34 VCC_067 VCC_148 L30 AK5 VSS_068 VSS_158 AT33 F14 VSS_248 VSS_338 R35
E35 VCC_068 VCC_149 M14 AK6 VSS_069 VSS_159 AT34 F17 VSS_249 VSS_339 R37
F15 VCC_069 VCC_150 M15 AK7 VSS_070 VSS_160 AT35 F2 VSS_250 VSS_340 R39
F16 VCC_070 VCC_151 M16 AK8 VSS_071 VSS_161 AT36 F20 VSS_251 VSS_341 R8
F18 VCC_071 VCC_152 M18 AK9 VSS_072 VSS_162 AT37 F23 VSS_252 VSS_342 T1
F19 VCC_072 VCC_153 M19 AL11 VSS_073 VSS_163 AT38 F26 VSS_253 VSS_343 T5
F21 VCC_073 VCC_154 M21 AL14 VSS_074 VSS_164 AT39 F29 VSS_254 VSS_344 T6
F22 VCC_074 VCC_155 M22 AL17 VSS_075 VSS_165 AT4 F35 VSS_255 VSS_345 U8
F24 VCC_075 VCC_156 M24 AL19 VSS_076 VSS_166 AT40 F37 VSS_256 VSS_346 V1
F25 VCC_076 VCC_157 M25 AL24 VSS_077 VSS_167 AT5 F39 VSS_257 VSS_347 V2
B B
F27 VCC_077 VCC_158 M27 AL27 VSS_078 VSS_168 AT6 F5 VSS_258 VSS_348 V33
F28 VCC_078 VCC_159 M28 AL30 VSS_079 VSS_169 AT7 F6 VSS_259 VSS_349 V34
F30 VCC_079 VCC_160 M30 V_SA V_1P5_SM V_1P8_SFR AL36 VSS_080 VSS_170 AT8 F9 VSS_260 VSS_350 V35
F31 VCC_080 VCC_161 AL5 VSS_081 VSS_171 AT9 G11 VSS_261 VSS_351 V36
VCC_081 6 OF 10 AM1 VSS_082 VSS_172 AU1 G12 VSS_262 VSS_352 V37
VSS_083 VSS_173 VSS_263 VSS_353
2

AM11 AU15 G17 V38


VSS_084 VSS_174 VSS_264 VSS_354
2

1
SKT_H2_CRB MC15 MC38 MC40 MC41 BC109 MC37 AM14 AU26 G20 V39
10U-6VX-08 10U-6VX-08 10U-6VX-08 10U-6VX-08 .1U-10VX-04 10U-6VX-08 AM17 VSS_085 VSS_175 AU34 G23 VSS_265 VSS_355 V40
VSS_086 VSS_176 VSS_266 VSS_356
1

AM2 AU4 G26 V5


VSS_087 VSS_177 VSS_267 VSS_357
1

2
AM21 AU6 G29 W6
AM23 VSS_088 VSS_178 AU8 G34 VSS_268 VSS_358 Y5
GND AM25 VSS_089 VSS_179 AV10 G7 VSS_269 VSS_359 Y8
GND GND VSS_090 VSS_180 VSS_270 VSS_360
A4 AY37
AV39 VSS_NCTF_01 B3 VSS_NCTF_03
VSS_NCTF_02 9 OF 10 VSS_NCTF_04 10 of 10
VAXG V_CPUVTT
MC34/MC107 move to Vaxg path as vendor 08/04 SKT_H2_CRB SKT_H2_CRB
GND GND GND GND
P
2

MC18
2

MC23
2

MC24
2

MC32
2

SC4
2

SC7
2

MC33
2

MC25
2

MC42
2

MC39
10U-6VX-08 10U-6VX-08-O 10U-6VX-08 10U-6VX-08 10U-6VX-08-X-O 10U-6VX-08-X-O SC5 10U-6VX-08 10U-6VX-08 10U-6VX-08 10U-6VX-08
100U-2V-9M-X-O
1

1
N

VCORE V_CPUVTT V_CPUVTT


GND 20101021 GND
Add By Andy lu
2

1
MC17 MC27 MC31 MC30 MC21 MC22 MC16 SC8 MC43 SC9 BC66 BC77 BC80 BC69 BC65
10U-6VX-08 10U-6VX-08-O 10U-6VX-08-O 10U-6VX-08 10U-6VX-08 10U-6VX-08 10U-6VX-08 10U-6VX-08-X-O 10U-6VX-08-O 10U-6VX-08-X-O .1U-16VY-04 .1U-16VY-04 .1U-16VY-04 .1U-16VY-04 .1U-16VY-04
1

2
A VCORE V_CPUVTT V_CPUVTT A
GND GND GND
P

P
2

MC19
2

MC20
2

MC26
2

SC2
2

SC1
2

MC44
2

MC36
1

1
BC91 BC85 BC86 BC68 BC83
10U-6VX-08 10U-6VX-08 10U-10VY-08-O 10U-10VY-08-X-O 10U-10VY-08-X-O SC3 10U-6VX-08 10U-6VX-08-O SC6 .1U-16VY-04 .1U-16VY-04 .1U-16VY-04 .1U-16VY-04-O .1U-16VY-04-O
100U-2V-9M-X-O 100U-2V-9M-X-O
Elitegroup Computer Systems
1

2
N

20100929 20101014 GND 20101014 GND 20101014 GND 20100929 Title


Change By Andy lu Add By Andy lu Add By Andy lu Add By Andy lu Change By Andy lu CPU - PWR
Size Document Number Rev
Custom H61H2-M12 1.0
Date: Wednesday, July 13, 2011 Sheet 6 of 29
5 4 3 2 1
A
B
C
D
198 79

0.75V
187 FREE1 RSVD 77 M_ODT_A1
FREE2 ODT1

MAX 1A
49 195 M_ODT_A0

V_SM_VTT
2 1 2 1 48 FREE3 ODT0
FREE4

GND
68
240 NC/PAR IN 53 ECC

V_1P5_SM
120 VTT NC/ERR OUT 167

ER54
ER55
VTT NC/TEST4

1K-1-04
1K-1-04

5
5

0.75V
239 39
VSS CB(0)

GND
2 1 235 40
VSS CB(1)

GND
232 45
229 VSS CB(2) 46
226 VSS CB(3) 158
VSS CB(4)
Desktop dosen't support

BC179
223 159
220 VSS CB(5) 164
217 VSS CB(6) 165

.1U-10VX-04
214 VSS CB(7)
211 VSS 7 M_DQS_A_P0
208 VSS DQS(0) 6 M_DQS_A_N0

DIMM_VREF_CA_A
205 VSS DQS*(0)
202 VSS 16 M_DQS_A_P1

5 M_CKE_A[0..1]
5 M_ODT_A[0..1]
VSS DSQ(1)

5 M_CLK_A_P[0..1]
5 M_CS_A_L[0..1]

5 M_CLK_A_N[0..1]
199 15 M_DQS_A_N1
166 VSS DSQ*(1)
VSS
M_DQS_A_P[0..7]

M_DQS_A_N[0..7]

163 25 M_DQS_A_P2
160 VSS DSQ(2) 24 M_DQS_A_N2
1 2 1 2 157 VSS DSQ*(2)
VSS

GND
154 34 M_DQS_A_P3
151 VSS DSQ(3) 33 M_DQS_A_N3
148 VSS DSQ*(3)

ER52
ER51
V_1P5_SM
145 VSS 85 M_DQS_A_P4

1K-1-04
1K-1-04
142 VSS DQS(4) 84 M_DQS_A_N4
2 1 139 VSS DQS*(4)

M_CKE_A[0..1]
M_ODT_A[0..1]

DIMM_VREF_CA_A 8
VSS
M_CS_A_L[0..1]

GND
136 94 M_DQS_A_P5

M_CLK_A_P[0..1]

M_CLK_A_N[0..1]
133 VSS DQS(5) 93 M_DQS_A_N5
130 VSS DQS*(5)
M_DQS_A_N[0..7]

VSS

BC171
127 103 M_DQS_A_P6
M_DQS_A_P[0..7] 5

VSS DSQ(6)
5

124 102 M_DQS_A_N6


121 VSS DSQ*(6)

.1U-10VX-04
20100929
119 VSS 112 M_DQS_A_P7
116 VSS DQS(7) 111 M_DQS_A_N7
113 VSS DQS*(7)
VSS

Short By Andy lu

4
4

110 43

DIMM_VREF_DQ_A
107 VSS DQS(8) 42
104 VSS DQS*(8)
101 VSS 125
98 VSS DM0/DQS9 126
95 VSS NC/DQS9*
92 VSS 134
89 VSS DM1/DQS10 135
86 VSS NC/DQS10*
83 VSS 143
80 VSS DM2/DQS11 144
47 VSS NC/DQS11*
44 VSS 152
VSS DM3/DQS12
DIMM_DQ_CPU_VREF_A
41 153
38 VSS NC/DQS12*
be tied directly to ground.

3
35 VSS 203
VSS DM4/DQS13
1.5V

32 204
29 VSS NC/DQS13*
VSS
S3 1.0A

26 212
VSS DM5/DQS14
MAX 15A

23 213
20 VSS NC/DQS14*
have any DDR3 Data Mask (DM) signals

pins of each DDR3 DIMM connector must


for either channel. As a result the DM[8:0]

VSS
The processor memory controller does not

2 1 2 1 17 221
14 VSS DM6/DQS15 222
11 VSS NC/DQS15*
V_1P5_SM

V_SM_VTT 8 VSS 230


V_1P5_SM

MC74
MC83

5 VSS DM7/DQS16 231


2 VSS NC/DQS16*
VSS
10U-6VX-08

197 161

10U-10VY-08
VDD DM8/DQS17
GND

2 1 2 1 194 162
VDD NC/DQS17*

GND
191
189 VDD 3 M_DATA_A0

Del DIMM1 for always populate DIMM2 first Jack 05/13


186 VDD DQ(0) 4 M_DATA_A1
CHANNEL A DIMMs

MC69

VDD DQ(1)
BC193

183 9 M_DATA_A2
182 VDD DQ(2) 10 M_DATA_A3
8,16,20,26 SMBCLK

3
3

VDD DQ(3)
10U-6VX-08
8,16,20,26 SMBDATA

179 122 M_DATA_A4


.1U-16VY-04
VCC3

2 1 176 VDD DQ(4) 123 M_DATA_A5


173 VDD DQ(5) 128 M_DATA_A6
5

170 VDD DQ(6) 129 M_DATA_A7


78 VDD DQ(7) 12 M_DATA_A8
MC76
M_DATA_A[0..63]

75 VDD DQ(8) 13 M_DATA_A9


VDD DQ(9)
SMBCLK

72 18 M_DATA_A10
SMBDATA

VDD DQ(10)
10U-6VX-08

69 19 M_DATA_A11
2 1 66 VDD DQ(11) 131 M_DATA_A12
VDD DQ(12)
M_BS_A[0..2]

65 132 M_DATA_A13
62 VDD DQ(13) 137 M_DATA_A14
DIMM_VREF_CA_A
DIMM_VREF_DQ_A

60 VDD DQ(14) 138 M_DATA_A15


MC82

57 VDD DQ(15) 21 M_DATA_A16


54 VDD DQ(16) 22 M_DATA_A17
VDD DQ(17)
10U-6VX-08

51 27 M_DATA_A18
236 VDD DQ(18) 28 M_DATA_A19
CH.A

VDDSPD DQ(19)
DIMM1

GND

140 M_DATA_A20
M_DATA_A[0..63] 5

67 DQ(20) 141 M_DATA_A21


L

VREFCA DQ(21)
M_BS_A[0..2]

1 146 M_DATA_A22
SA1

118 VREFDQ DQ(22) 147 M_DATA_A23


238 SCL DQ(23) 30 M_DATA_A24
H

237 SDA DQ(24) 31 M_DATA_A25


SA0

SA1 DQ(25)
GND

117 36 M_DATA_A26
SA0 DQ(26) 37 M_DATA_A27
2 1 M_BS_A2 52 DQ(27) 149 M_DATA_A28
M_BS_A1 190 BA2 DQ(28) 150 M_DATA_A29
71 BA1 DQ(29) 155
V_1P5_SM

M_BS_A0 M_DATA_A30
BA0 DQ(30) 156 M_DATA_A31
DQ(31)
BC172

M_CKE_A1 169 81 M_DATA_A32


M_CKE_A0 50 CKE1 DQ(32) 82 M_DATA_A33
CKE0 DQ(33) 87 M_DATA_A34
.1U-16VY-04

2 1 M_CS_A_L1 76 DQ(34) 88 M_DATA_A35


M_CS_A_L0 193 S1* DQ(35) 200 M_DATA_A36
S0* DQ(36)
2
201
2

M_DATA_A37
64 DQ(37) 206 M_DATA_A38
CK1/NU* DQ(38)
BC177

63 207 M_DATA_A39
185 CK1/NU DQ(39) 90 M_DATA_A40
184 CK0* DQ(40) 91 M_DATA_A41
.1U-16VY-04

2 1 CK0 DQ(41) 96 M_DATA_A42


M_MA_A0 188 DQ(42) 97 M_DATA_A43
M_MA_A1 181 A0 DQ(43) 209 M_DATA_A44
M_MA_A2 61 A1 DQ(44) 210 M_DATA_A45
A2 DQ(45)
BC183

M_MA_A3 180 215 M_DATA_A46


M_MA_A4 59 A3 DQ(46) 216 M_DATA_A47
M_MA_A5 58 A4 DQ(47) 99 M_DATA_A48
.1U-16VY-04

2 1 M_MA_A6 178 A5 DQ(48) 100 M_DATA_A49


M_MA_A7 56 A6 DQ(49) 105 M_DATA_A50
M_MA_A8 177 A7 DQ(50) 106 M_DATA_A51
M_MA_A9 175 A8 DQ(51) 218 M_DATA_A52
A9 DQ(52)
Title
BC180

Size

M_MA_A10 70 219 M_DATA_A53


Date:

M_MA_A11 55 A10/AP DQ(53) 224 M_DATA_A54


Custom

M_MA_A12 174 A11 DQ(54) 225 M_DATA_A55


.1U-16VY-04

2 1 M_MA_A13 196 A12 DQ(55) 108 M_DATA_A56


A13 DQ(56)
M_CLK_A_P1
M_CLK_A_P0

M_CLK_A_N1
M_CLK_A_N0

M_MA_A14 172 109 M_DATA_A57


M_MA_A[0..15]

M_MA_A15 171 A14 DQ(57) 114 M_DATA_A58


A15 DQ(58) 115 M_DATA_A59
MC75

168 DQ(59) 227 M_DATA_A60


74 RESET* DQ(60) 228 M_DATA_A61
192 CAS* DQ(61) 233 M_DATA_A62
.1U-16VY-04

Document Number

73 RAS* DQ(62) 234 M_DATA_A63


WE* DQ(63)
Wednesday, July 13, 2011

DDR3-240P-GY DDR3_1
M_MA_A[0..15] 5
M_WE_A_L

M_CAS_A_L
M_RAS_A_L

DDR3_DRAMRST_L

1
1

Sheet
H61H2-M12
7
M_WE_A_L

DDR3 - CH_A_DIMM1
GND
M_CAS_A_L 5
M_RAS_A_L 5
5

of
DDR3_DRAMRST_L

29
5,8

Rev
Elitegroup Computer Systems

1.0
A
B
C
D
A
B
C
D

0.75V
198 79
FREE1 RSVD

MAX 1A
187 77 M_ODT_B1
49 FREE2 ODT1 195 M_ODT_B0

V_SM_VTT
48 FREE3 ODT0
FREE4 68
240 NC/PAR IN 53 ECC
120 VTT NC/ERR OUT 167
VTT NC/TEST4

5
5

239 39
VSS CB(0)

GND
235 40
232 VSS CB(1) 45
229 VSS CB(2) 46
2 1 226 VSS CB(3) 158
VSS CB(4)
Desktop dosen't support

GND
223 159
220 VSS CB(5) 164
217 VSS CB(6) 165
VSS CB(7)

BC192
214
211 VSS 7 M_DQS_B_P0
208 VSS DQS(0) 6 M_DQS_B_N0

.1U-10VX-04
205 VSS DQS*(0)
202 VSS 16 M_DQS_B_P1

20100929
5 M_CKE_B[0..1]
5 M_ODT_B[0..1]
VSS DSQ(1)

5 M_CLK_B_P[0..1]
5 M_CS_B_L[0..1]

5 M_CLK_B_N[0..1]
199 15 M_DQS_B_N1

DIMM_VREF_CA_B
166 VSS DSQ*(1)
VSS
M_DQS_B_P[0..7]

M_DQS_B_N[0..7]

163 25 M_DQS_B_P2
160 VSS DSQ(2) 24 M_DQS_B_N2
VSS DSQ*(2)

Change By Andy lu
157
154 VSS 34 M_DQS_B_P3
151 VSS DSQ(3) 33 M_DQS_B_N3
148 VSS DSQ*(3)
145 VSS 85 M_DQS_B_P4
142 VSS DQS(4) 84 M_DQS_B_N4
139 VSS DQS*(4)

M_CKE_B[0..1]
M_ODT_B[0..1]
VSS
M_CS_B_L[0..1]
136 94 M_DQS_B_P5

M_CLK_B_P[0..1]

M_CLK_B_N[0..1]
133 VSS DQS(5) 93 M_DQS_B_N5

DIMM_VREF_CA_A 7
130 VSS DQS*(5)
M_DQS_B_N[0..7]

127 VSS 103 M_DQS_B_P6


M_DQS_B_P[0..7] 5

VSS DSQ(6)
5

124 102 M_DQS_B_N6


121 VSS DSQ*(6)
119 VSS 112 M_DQS_B_P7
116 VSS DQS(7) 111 M_DQS_B_N7
113 VSS DQS*(7)
VSS

4
4

110 43
107 VSS DQS(8) 42
104 VSS DQS*(8)
101 VSS 125
98 VSS DM0/DQS9 126
95 VSS NC/DQS9*
92 VSS 134
89 VSS DM1/DQS10 135
1 2 1 2 86 VSS NC/DQS10*
VSS

GND
83 143
80 VSS DM2/DQS11 144
47 VSS NC/DQS11*

ER56
ER53
V_1P5_SM

44 VSS 152

1K-1-04
1K-1-04 41 VSS DM3/DQS12 153
2 1 38 VSS NC/DQS12*
be tied directly to ground.

VSS

GND
35 203
VSS DM4/DQS13
1.5V

32 204
29 VSS NC/DQS13*
VSS
S3 1.0A

BC182 26 212
VSS DM5/DQS14
MAX 15A

23 213
20 VSS NC/DQS14*
have any DDR3 Data Mask (DM) signals

.1U-10VX-04
20100929
pins of each DDR3 DIMM connector must
for either channel. As a result the DM[8:0]

VSS
The processor memory controller does not

17 221
14 VSS DM6/DQS15 222
DIMM_VREF_DQ_B

11 VSS NC/DQS15*
VSS
Short By Andy lu

8 230
V_1P5_SM

5 VSS DM7/DQS16 231


2 VSS NC/DQS16*
197 VSS 161
VDD DM8/DQS17
GND

194 162
191 VDD NC/DQS17*
189 VDD 3 M_DATA_B0
186 VDD DQ(0) 4 M_DATA_B1
CHANNEL B DIMMs

183 VDD DQ(1) 9 M_DATA_B2


182 VDD DQ(2) 10 M_DATA_B3
7,16,20,26 SMBCLK

3
3

VDD DQ(3)
7,16,20,26 SMBDATA

179 122 M_DATA_B4


VCC3

VDD DQ(4)
DIMM_DQ_CPU_VREF_B

176 123 M_DATA_B5


173 VDD DQ(5) 128 M_DATA_B6
3
5

170 VDD DQ(6) 129 M_DATA_B7


78 VDD DQ(7) 12 M_DATA_B8
M_DATA_B[0..63]

75 VDD DQ(8) 13 M_DATA_B9


VDD DQ(9)
SMBCLK

72 18 M_DATA_B10
SMBDATA

69 VDD DQ(10) 19 M_DATA_B11


66 VDD DQ(11) 131 M_DATA_B12
VDD DQ(12)
M_BS_B[0..2]

65 132 M_DATA_B13
62 VDD DQ(13) 137 M_DATA_B14
DIMM_VREF_CA_B
DIMM_VREF_DQ_B

60 VDD DQ(14) 138 M_DATA_B15

Del DIMM3 for always populate DIMM4 first Jack 05/13


57 VDD DQ(15) 21 M_DATA_B16
54 VDD DQ(16) 22 M_DATA_B17
2 1 51 VDD DQ(17) 27 M_DATA_B18
236 VDD DQ(18) 28 M_DATA_B19
CH.B

VDDSPD DQ(19)
DIMM1

140 M_DATA_B20
V_SM_VTT
M_DATA_B[0..63] 5

67 DQ(20) 141 M_DATA_B21


MC84
H

VREFCA DQ(21)
M_BS_B[0..2]

1 146 M_DATA_B22
SA1

118 VREFDQ DQ(22) 147 M_DATA_B23


238 SCL DQ(23) 30 M_DATA_B24
H

237 SDA DQ(24) 31 M_DATA_B25


10U-10VY-08-O
SA0

2 1 117 SA1 DQ(25) 36 M_DATA_B26


SA0 DQ(26)
GND

37 M_DATA_B27
M_BS_B2 52 DQ(27) 149 M_DATA_B28
M_BS_B1 190 BA2 DQ(28) 150 M_DATA_B29
BA1 DQ(29)
BC178

M_BS_B0 71 155 M_DATA_B30


BA0 DQ(30) 156 M_DATA_B31
M_CKE_B1 169 DQ(31) 81 M_DATA_B32
M_CKE_B0 50 CKE1 DQ(32) 82 M_DATA_B33
.1U-16VY-04-O

CKE0 DQ(33) 87 M_DATA_B34


M_CS_B_L1 76 DQ(34) 88 M_DATA_B35
M_CS_B_L0 193 S1* DQ(35) 200 M_DATA_B36
S0* DQ(36)
2
201
2

M_DATA_B37
2 1 64 DQ(37) 206 M_DATA_B38
CK1/NU* DQ(38)
VCC3

GND

63 207 M_DATA_B39
185 CK1/NU DQ(39) 90 M_DATA_B40
184 CK0* DQ(40) 91 M_DATA_B41
CK0 DQ(41)
BC181

96 M_DATA_B42
M_MA_B0 188 DQ(42) 97 M_DATA_B43
M_MA_B1 181 A0 DQ(43) 209 M_DATA_B44
M_MA_B2 61 A1 DQ(44) 210 M_DATA_B45
.1U-16VY-04-O

M_MA_B3 180 A2 DQ(45) 215 M_DATA_B46


20100929

M_MA_B4 59 A3 DQ(46) 216 M_DATA_B47


M_MA_B5 58 A4 DQ(47) 99 M_DATA_B48
M_MA_B6 178 A5 DQ(48) 100 M_DATA_B49
M_MA_B7 56 A6 DQ(49) 105 M_DATA_B50
A7 DQ(50)
Change By Andy lu

M_MA_B8 177 106 M_DATA_B51


M_MA_B9 175 A8 DQ(51) 218 M_DATA_B52
A9 DQ(52)
Title

Size

M_MA_B10 70 219 M_DATA_B53


Date:

M_MA_B11 55 A10/AP DQ(53) 224 M_DATA_B54


Custom

M_MA_B12 174 A11 DQ(54) 225 M_DATA_B55


M_MA_B13 196 A12 DQ(55) 108 M_DATA_B56
A13 DQ(56)
M_CLK_B_P1
M_CLK_B_P0

M_CLK_B_N1
M_CLK_B_N0

M_MA_B14 172 109 M_DATA_B57


M_MA_B[0..15]

M_MA_B15 171 A14 DQ(57) 114 M_DATA_B58


A15 DQ(58) 115 M_DATA_B59
168 DQ(59) 227 M_DATA_B60
74 RESET* DQ(60) 228 M_DATA_B61
192 CAS* DQ(61) 233 M_DATA_B62
Document Number

73 RAS* DQ(62) 234 M_DATA_B63


WE* DQ(63)
Wednesday, July 13, 2011

DDR3-240P-GY DDR3_2
M_MA_B[0..15] 5
M_WE_B_L

M_CAS_B_L
M_RAS_B_L

DDR3_DRAMRST_L

1
1

Sheet
H61H2-M12
8
M_WE_B_L

DDR3 - CH_B_DIMM3
M_CAS_B_L 5
M_RAS_B_L 5
5

of
DDR3_DRAMRST_L

29
5,7

Rev
Elitegroup Computer Systems

1.0
A
B
C
D
5 4 3 2 1

VCORE
External Connection Load Line = DCR * R_DRP / (n *
Css connect from DAC to FBRTN for SS and Dynamic VID.
VCC VCC R_csn)
Tss = T_dynamic = V_DAC * Css / Iss, Vboot = 0

1
VCORE VCORE
V_CPUVTT V_CPUVTT Tss = (V_DAC - Vboot) * Css / Iss, Vboot ≠ 0 R_DRP R140 0-04 V_EAP = V_DAC - I_sum * D_DRP R127
+12V_4P +12V_4P 1 2 100-04
VCC3 VCC3 Iss = 200uA, if SETVID = Fast (01H)

2
1

1
BC129 1 2 33P-04 R131 1 2 1K-04 VCORE_VCCSENSE
VIN VIN Iss = 50uA, if SETVID = Slow (02H) R139 MC52
VAXG VAXG Css

1
5VSB 5VSB 3K-04 1U-16VX-06-O BC122

1
Css close to DAC BC136 .01U-25VX-04 BC131 .01U-04 R135 10K-04 R134 22-04 BC127 1000P-04 1000P-04-O

2
UG1 VCORE_VSSSENSE 1 2 1 2 1 2 1 2 1 2 BC118
10 UG1

2
LG1 V_DAC = SetVID + Offset 33P-04-O
10 LG1

2
D D
UG2 VCORE_VSSSENSE
10 UG2
LG2 V_IMON = I_sum * R_IMON BC137 1 2 1000P-04
10 LG2

1
I_sum = Io * DCR / (n * R_csn) VCORE_VSSSENSE BC114
PWM3 R144 1 2 18K-04 VCORE_VSSSENSE R119 1000P-04-O
10 PWM3
100-04

2
SPWM OCP set VCC R146 1 2 0-04-O VCORE_VCCSENSE
10 SPWM

2
1

1
PHASE1 Phase Frequency:
10 PHASE1
PHASE2 f_sw = 300 * (27k / RT)^0.83 ER41 1 2 33K-04 R128 BC124
10 PHASE2
PHASE3 4.7K-04 330P-04
10 PHASE3

2
RT = 25k -> f_sw = 300k Hz

2
PHASE_GT VCC R152 1 2 10-04 VCORE_TB
10 PHASE_GT
VOUT1 MC59 1 2 1U-10VY-06 Smaller R_TB make transient boost behavior easier triggered.
10 VOUT1
VOUT2 Larger C_TB make transient boost behavior sustain longer.
10 VOUT2
VOUT3
10 VOUT3
SPWM
VOUT_GT
10 VOUT_GT
R120 750-04

VCORE_COMP
4 VR_SVID_ALERT_L ALERT R171 10K-04 CSN 1 2 CS_N R107 1 2 1-04 VOUT1
SCLK PHASE_GT 1 2 R106 1 2 1-04 VOUT2

VCORE_RT

VCORE_FB
4 VR_SVID_CK

1
SDATA R_csn R105 1 2 1-04 VOUT3
4 VR_SVID_DATAOUT
RT3 NTC-10K-1-04-O BC119 RT1 R113

IMON

DAC
VRHOT R174 1-04 1 2 R154 82K-04-O NTC-10K-1-04-O 100K-04-O

EAP
4 VR_HOT_L .1U-16VX-04

1
VOUT_GT 1 2 R167 100K-04-O 1 2

2
4 VCC_SEN VCORE_VCCSENSE 1 2 BC111
4 VSS_SEN VCORE_VSSSENSE BC152 .1U-16VX-04 .1U-16VX-04-O

2
BC154 .1U-16VX-04-O 1 2 R121 1 2 82K-04-O
C VGT_VCCSENSE 1 2 SCS_N R168 750-04 PWM1 C

24

23

22

21

20

19

18

17

16

15

14

13
4 VCCAXG_SEN
4 VSSAXG_SEN VGT_VSSSENSE 1 2
R114 1 2 33K-04 PHASE1 1202'10 Jayson :

SPWM

IMON

DAC/SS

EAP

CSN
COMP

FB

FBRTN

TB
VOUT
VCC5

RT
VCORE_OK 1202'10 Jayson : R122 1 2 33K-04 PHASE2 Vendor 先預留不上.
16 VR_READY
Vendor 先預留不上. R115 1 2 33K-04 PHASE3
4 VR_EN ENPWR SCSP 25 12 CSP
SCSP CSP
1

1
4,23 H_SKTOCC_L H_SKTOCC_N BC156 SCSN 26 11 ISEN1 R116 1 2 20K-04 PHASE1 I_sense = (I_phase * Rds + VDC) / R_sense
.01U-25VX-04 R173 MC67 SCSN ISEN1
820-04 1U-16VX-06-O VGT_DAC 27 10 ISEN2 R123 1 2 20K-04 PHASE2
SDAC/SS ISEN2
2

2
VAXG
2

VGT_VSSSENSE R169 1 2 0-04 VGT_EAP 28 9 ISEN3 R117 1 2 20K-04 PHASE3


SEAP ISEN3
1

VGT_VSSSENSE 29 8
R184 SFBRTN ISNE4
0504'11 By Vendor
100-04 R181 1 2 1K-04 BC143 1 2 33P-04 VGT_FB 30 7 VCC
SFB PWM4
uT501
2

VGT_VCCSENSE VGT_COMP 31 6 PWM3


SCOMP PWM3 R124
BC157 1000P-04 R175 22-04 R158 10K-04 BC149 .01U-04 0.9V Enable
1

1 2 1 2 1 2 1 2 SIMON 32 5 ENPWR 2 1 V_CPUVTT


BC162 SIMON ENPWR
1

1000P-04-O PSI2 33 4 BOOT2


PS2/SVOUT BOOT2 1K-04
2

BC160 R182 560-04-O 1


33P-04-O VCC 1 2 VCORE_OK 34 3 UG2 BC120 R112 3 +12V_4P
VROK UG2
2

.1U-16VX-04 2.2-06 2 1130'10 By


1

R159 20K-04-O VAXG_OK 35 2 PHASE2 1 2 1 2 Jayson Modified


VGT_VSSSENSE R176 BC144 1 2 SVROK PHASE2 D12 BAT54C-S-O

LG1/SIMAX
18K-04 1000P-04 R177 0-04-O TM 36 1 LG2 R125 1 2 15K-04 VCC
TM LG2/IMAX
2

PS1/STB
1

PHASE1
1 2

VRHOT-
ALERT-

VBOOT

BOOT1
VAXG

SDATA

VCC12
2
1

TMAX
BC159 R183 VGT_VSSSENSE R111 1 2 1K-04

SCLK
1202'10

UG1
B B

1
1000P-04-O 100-04 1230'10 R160 4.7K-04 49
1 2 MC63 PGND Modified By Jayson
for uP1625P
2

R178 4.7K-04 2 1U-10VY-06

37

38

39

40

41

42

43

44

45

46

47

48
VCC3 1 2

R126 1 2 2.2-04

PSI1
+12V_4P

VBOOT

VRHOT
SDATA

ALERT
R157 1 2 4.7K-04-O

TMAX
SCLK
R153 10K-04-O MC49 1 2 1U-16VX-06
1

1130'10 By Jayson add. VCC PSI2 1 2 1202'10


Page23, H_SKTOCC_N has RT2 NTC-10K-1-04 R155 4.7K-04 R156 1230'10 R130 1 2 15K-04 VCC
1 2 1 2 4.7K-04
for uP1625P C36 1 210K-04-O LG1 R129 1 2 1K-04 Modified By Jayson
place pull high
2

resistor. RT Close to L7 C48 =220p PHASE1 1 2 1 2 D15 BAT54C-S-O


R148 1 2 56-04 1
V_CPUVTT R149 1 2 56-04 UG1 BC128 R132 3 +12V_4P
R147 1 2 56-04 .1U-16VX-04 2.2-06 2
0105'11: BOOT1
5VSB
Del R170 due to P23 R142 1 2 10K-04-O
has pulled up. VCC
VBOOT
2

R141 1 2 12K-04-O
R199 20100929 BC134 1 2 1000P-04 VBOOT:
D

4.7K-04-O
Q3
Change By Andy lu VCC -> VCORE / VAXG boot 1.1V
1

G 2N7002-S-O VCC R138 1 2 12K-04 GND -> VCORE / VAXG boot 0V


R137 1 2 12K-04
S

BC133 1 2 1000P-04
D

Q4
A H_SKTOCC_N G 2N7002-S-O A
S
2

MC70
1U-10VY-06-O
POR condition:VCC5 > 4.3V AND VCC12 > 9.5V AND ENPWR > 0.65V
Elitegroup Computer Systems
1

OCP condition:V_IMON > 1.3 * V_IMAX for total current


I_CSNx > 100uA for channel current
R196 Title
1 2 OVP condition:V_FB - V_EAP > 150mV DC/DC VCORE/VAXG UP1625
0-04 UVP condition:V_FB < 200mV Size Document Number Rev
Custom H61H2-M12 1.0
Date: Wednesday, July 13, 2011 Sheet 9 of 29
5 4 3 2 1
5 4 3 2 1

VIN
External Connection
VCC VCC
VCORE VCORE

1
VAXG VAXG MC13
+12V_4P +12V_4P R57 2.2-06 MF6 4.7U-16VY-08
UG1 1 2 G MN252-9MS
VCC3 VCC3 VCORE

2
VIN VIN L6

S
PIND-0.6UD
PHASE1 1 2
+12V_4P
ATX12V

D
9 UG1 UG1

1
9 LG1 LG1 R61 2.2-06 MF8 P3 4
D D
LG1 1 2 G MN252-6MS R66 3 +12V

1
9 UG2 UG2 1-06 SHORT PAD +12V

S
9 LG2 LG2 2 BC26

2 2
VOUT1 1 GND
.01U-04-O

2
9 PWM3 PWM3 GND

BC60
SPWM .01U-25VX-04 ATX-PW-4P2R
9 SPWM

1
9 PHASE1 PHASE1 VIN
9 PHASE2 PHASE2
9 PHASE3 PHASE3

1
9 PHASE_GT PHASE_GT MC2
R32 2.2-06 MF2 4.7U-16VY-08
UG2 1 2 G MN252-9MS
VIN

2
L5 +12V_4P

S
PIND-0.6UD L1 PIND-0.6UD-8X8
9 VOUT1 VOUT1 PHASE2 1 2 1 2
9 VOUT2 VOUT2 Idc=22A

1
9 VOUT3 VOUT3 DCR=1.9m ohm EC3 EC11 EC2

1
R35 2.2-06 MF4 P2 08-413-604322 + + +
9 VOUT_GT VOUT_GT LG2 1 2 G MN252-6MS R51
1-06 SHORT PAD

2
2 2
VOUT2
270U-16D-OS 270U-16D-OS 270U-16D-OS
BC48
C .01U-25VX-04 C

1
BC45 0504'11 Jayson :
R48 2.2-06 .1U-16VY-04
1 2 1 2 VIN VIN Cap Reduce EC10
VCORE
3

D4 U4

1
BAT54C-S MC10

1
1 8 UG3 R31 2.2-06 MF1 4.7U-16VY-08
BST DRVH UG3 1 2 G MN252-9MS + + + + +
2

2
PWM3 2 7 PHASE3 L4 EC20 EC16 EC17 EC18 EC19
IN SW

S
PIND-0.6UD 820U-2.5D6-OS 820U-2.5D6-OS 820U-2.5D6-OS 820U-2.5D6-OS 820U-2.5D6-OS

2
3 6 PHASE3 1 2
R41 2.2-06 OD PGND

D
+12V_4P 1 2 4 5 LG3
GND

VCC DRVL

1
R34 2.2-06 MF5 P1
LG3 1 2 G MN252-6MS R52
1

UP6281BSU8S 1-06 SHORT PAD

S
9

BC46

2 2
.1U-16VY-04 VOUT3
2

BC49
.01U-25VX-04 VAXG

1
+ +
EC25 EC24
B B
820U-2.5D6-OS 820U-2.5D6-OS

2
0504'11 Jayson :
0504'11 Jayson : DEL Phase 4
DEL Driver

BC95 VIN
R89 2.2-06 .1U-16VY-04
1 2 1 2
D
3

MC3
D10 U11 R72 2.2-06 MF9 4.7U-16VY-08
BAT54C-S UG_GT 1 2 G MN252-9MS
VAXG
2

1 8 UG_GT L7
BST DRVH
S

PIND-0.6UD
2

A SPWM 2 7 PHASE_GT PHASE_GT 1 2 A


IN SW
D

3 6
R94 2.2-06 OD PGND R87 2.2-06 MF10 R76 SP3
+12V_4P 1 2 4 5 LG_GT LG_GT 1 2 G MN252-6MS 1-06
GND

VCC DRVL SHORT PAD Elitegroup Computer Systems


S

2 2
1

UP6281BSU8S VOUT_GT
9

BC105 BC81 Title


.1U-16VY-04 .01U-25VX-04
DC/DC VCORE/VAXG UP6281
2

Size Document Number Rev


Custom H61H2-M12 1.0
Date: Wednesday, July 13, 2011 Sheet 10 of 29
5 4 3 2 1
5 4 3 2 1

External Connection
VCC VCC
VCC3 VCC3
V_CPUVTT V_CPUVTT VID Reference Voltage Selection Table
+12V_4P +12V_4P
VIN VIN
VID1 VID0 V_CPUVTT
+12V_4P
+12V_4P
VID0
0 0 SET0(1.2V*Rset0/Rt) = 1.0376V
4 VTT_SEL
D D

1
0 1 SET1(1.2V*Rset1/Rt) = 1.0588V

2
D3 R38
BAT54C-S 2.2-06
1 0 SET2(1.2V*Rset2/Rt) = 1.1152V

2
MC11 1U-16VX-06
1 2

3
BC47 .1U-16VX-04 1 1 SET3(1.2V*Rset3/Rt) = 1.1647V
2 1 ER15 34K-1-04
1 2
R45 1K-04

PHASE_CPUVTT
Rt 1 2 VCC

CSP_CPUVTT
LG_CPUVTT
VIN
R50 1K-04-O
1 2 VCC
VCC 20100929

1
R49 1K-04 20100929 MC8

21
20
19
18
17
16
1 2
Change By Andy lu 4.7U-16VY-08
Add By Andy lu

D
LG
GND
PHASE

VCC

CSP
RT

2
R54 10K-04 R47 2.2-06 MF3
1 15 CSN_CPUVTT 1 2 VCC UG_CPUVTT 1 2 G MN252-9MS
R55 100K-04 UG_CPUVTT 2 BOOT CSN 14 EN R53 4.7K-04
UG EN/PSM V_CPUVTT

S
1 2 CPUVTT_POK 3 13 VID1 1 2
4 POK VID1 12 VID0 L3
R58 1 2 560-04 R60 1 2 0-04 5 SS VID0 11 1 2 PIND-0.6UD
EAP COMP BC52 .01U-25VX-04 PHASE_CPUVTT 1 2

SET3
SET2
SET1
SET0
1

C BC53 C

FB

1
.1U-16VX-04 BC54 100P-04-O BC51 R59

1
1 2 U6 33P-04 10K-04 SP1 SP2
2

6
7
8
9
10

1
UP1525PQKFS R36 0-06 MF7 R46

2
LG_CPUVTT 1 2 G MN252-6MS 1-06 SHORT PAD SHORT PAD + +

2
EC15 EC14

2 2
820U-2.5D6-OS 820U-2.5D6-OS

2
2
V_CPUVTT BC42
33K-1-04 1 2 ER24 BC55 2200P-04 R64 0-04 R65 100-04 R37

1
31.6K-1-04 1 2 ER21 1 2 1 2 1 2 12K-04
30K-1-04 1 2 ER22

1
29.4K-1-04 1 2 ER23 .01U-25VX-04
R63 1K-04 BC40
1 2 VCCIO_SEN VCCIO_SEN 4 .1U-10VX-04
CSP_CPUVTT 2 1

2
BC57
1000P-04-O R39 750-04 BC43

2
VSSIO_SEN VSSIO_SEN 4 CSN_CPUVTT 1 2 .1U-16VY-04-O

1
D9 BAT54A-S-O
CPUVTT_POK 1
B +12V B
3 Rds(on) < 14m OHM,
4,16,23 SLP3_L 2 Follow CRB V0.7
Rds(on) = 6m OHM

8
VCCSA voltage selection 0511'11
VCCNS_REF +12V V_CPUVTT 3
Change By Jayson. +
1
VID +V_SA 2
-
2

0.925V U9A
0
2
ER29 OP358-S

4
0.85V 6.65K-1-04 R85
* 1

D
8

1
3VSB 10K-04
1

VCCSA_COMP 5 MN1 R69 R70 R71


1

+
7 G MN252-6MS-O 0-08 0-08 0-08
2

6 GND

2
-
1

R91 ER30 ER31 C32 U9B 20100929 07/20


10K-04 27.4K-1-04 3.92K-1-04 1U-16VX-06-O OP358-S
Short By Andy lu
4
1

C 1

R93 100-04-O
4 VCCSA_VID 2 1 B QN4 GND GND 0.925V/0.85V 0525'11 Jayson :
2N3904-S 20100929 GND V_SA
MAX 8.8A D13,R110,R114,R97,MN1先拿掉
2

By Andy lu R276,R277,R278 上件。


E

R95 2 1
1K-04-O R88 100-04
1

GND
1

+
R86 0-04-O EC22 MC12
GND 4 VCCSA_SEN 2 1 1000U-6.3DL 10U-10VY-08-O
2

A 20100929 A

GND GND
By Andy lu

0510'11 Jayson : Elitegroup Computer Systems


From OSC change to EC Cap
Title
DC/DC V_CPUVTT UP1525
Size Document Number Rev
Custom H61H2-M12 1.0
Date: Wednesday, July 13, 2011 Sheet 11 of 29
5 4 3 2 1
5 4 3 2 1

5VSB 5VSB +12V DIMM_5VDUAL


20100924 5VSB R241 4.7K-04
Change By Andy lu 1 2
5VSB

2
D22
From 3VSB to 5VSB 3VSB DIMM_5VDUAL BAT54C-S 08-413-604322

C
2
R246 10K-04 MS1 L12 Idc=22A
R239 1 2 B PIND-0.6UD-8X8 DCR=1.9m ohm
4.7K-04 DUAL_P 4 G2 D2 5 MC87 5VSB 1.5V@TDC 20A, MAX 25A

3
QN11 P 1U-16VX-06 20100929

E
1

1
2N3904-S 3 6 1 2 DIMM_VCC
DDR3
S2 D2
Change By Andy lu

1
D21 DIMM_VIN
D D
DUAL_N 2 G1 D1 7 BC195 BAT54C-S
+12V

1
.1U-16VY-04-O

2
N D1

1
1 S1 8 +

D
R240 4.7K-04 PWM2 MN6 MC85 EC32

3
5
1 2 B 1 2 NPSO8-S BC204 .1U-16VY-04 MN252-9MS 10U-10VY-08-O 560U-6.3D-OS
23 3VSBSW-

2
3 1 DIMM_BOOT 1 2 G

VCC
3VSB GND BOOT
R238 1K-04 QN9 VCC V_1P5_SM

C
E

S
2N3904-S R245 10K-04 2 UG_DIMM 1 2 UG_DIMM_R
1 2 B UGATE R232 0-06 L13 PIND-1.5UD-25A
8 PHASE_DIMM 1 2
QN10 PHASE

D
E

2
2N3904-S 7 1 2 MN5
COMP/OCSET ER61 20K-1-04 MN252-6MS R237
6 4 LG_DIMM 1 2 LG_DIMM_R G 1-06
FB LGATE R243 0-06
1207'10 Jayson :

1 1
2
20100924 APW7120-S
VCC Add By Jayson
Add By Andy lu for Down Voltage of DIMM R242 BC202
For Fintek SIO 4.7K-04-O 4700P-04

2
1
BC201
.1U-16VY-04-O ER64 4.42K-1-04

2
reserve for LG_DIMM refer to VCC Jack 06/22 15 GPIO48 2 1

ER63 1.5K-1-04
Rvdimm
16 GPIO15 2 1 ER62 1 2 562-1-04

1
ER65 Iocset=(40uA*Rocset-0.4V)/Rlowmos_dson=60A 0211'11 Jayson: + +
C 1K-1-04 Vgs=10V Rdson=3 mOHM EC31 EC29 C
Change to EC_Cap 1000U 1000U-6.3DL 820U-2.5D6-OS

2
V_1P5_SM

VCCNS_REF +12V
201001203
1

Ra Refer to page28
Change By Andy lu
1

BC191
1

ER45 .1U-16VY-04-O EC33 Del


Sd
3VSB_IO
2

3.9K-1-04 U13A R136


D
8

10K-04-O 5VSB VCC


2

V1.05_REF 3 MN4 V_1P5_SM V_1P5_SM


2

+
Rb 1 G MN252-20MS
1

1
2 5VSB_ATX
For Non-AMT
S

-
ER44 MC65 0.75V@1A RJ6

1
2.87K-1-04 OP358-S BC203 0-06(1-2)
U15
2

6.2A 2.5A ER59 .1U-16VY-04-O


2

2
10K-1-04 1 8
VIN Vcntl

1
2 7 ER34
GND Vcntl

1
1U-10VY-06 V_1P05_PCH V_1P05_ME 3 6 MC86 100-1-04-O
ER42 475-1-04 SR1 0-08-X-SH 4 REFEN Vcntl 5 BC205
Rt
20100929 VOUT Vcntl

C
1

1
2 1 1 2 10U-10VY-08-O .1U-16VY-04 QN3
Change By Andy lu

2
G
ER60 C48 B 2N3904-S-O
1

10K-1-04 1000P-04-O APL5336-S 3VSB_IO

9
1

Rc + 02-345-312910

E
2

1
EC30 MC50 SC14
2 1 1000U-6.3DL 10U-10VY-08 .1U-16VY-04-X-O V_SM_VTT ER35
15 GP_V1.05 Rb
2

1
402-1-04-O
B B
ER39 10K-1-04 MC34

2
1U-10VY-06-O

2
GP_V1.05:default OD-->1.05V + EC33
Low==>1.1V 100U-16DE
Vo=Vin*Rb/(Rt+Rb)-0.7
1215'10 Jayson : 3VSB IO Max=25mA
change to EC/100U
VCC3

1210'10 Jayson :
VCCNS_REF VCCNS_REF 3VSB_IO 先線路預留不上
VCC3 +12V
,SIO有內轉power.
R179 150-04 + EC23
1 2 100U-16DE-O 5VSB U7 3VSB
1

0211'11 Jayson :
1

ER46 I O From 105 change to 102 ohm


3.74K-1-04 U13B R143 IN OUT
201001020 let 3VSB up to 3.45V
C

D
8

1
10K-04-O
Change By Andy lu
2
1

D17 1P8_SFR_EN 5 MN3 ER20


2

+
BC155 R 431-S 7 G MN252-70MS A 102-1-04
ADJ
1

.1U-16VY-04-O MC66 6
S
2

2
-
ER47 EC10 + EC21
A

10K-1-04 1U-10VY-06-O OP358-S 100U-16DE ADJ1085-S 100U-16DE


2

1
2

1.6A ER19

V_1P8_SFR
Vo=1.25(1+Rb/Rt) 180-1-04
2

180/110
A A
1

+
EC27
USB3.0 W/S3 ADJ1085-S 02-349-085810 (TO-252)
1000U-6.3DL USB3.0 W/O S3 ADJ1086-S 02-347-086760 (SOT-223) Elitegroup Computer Systems
2

Title
DC/DC VDIMM/DDR_VTT/5VDUAL
Size Document Number Rev
Custom H61H2-M12 1.0
Date: Wednesday, July 13, 2011 Sheet 12 of 29
5 4 3 2 1
5 4 3 2 1

FRONT PANEL DIMM_5VDUAL 5VSB S0


G_LED1 L
S1
B
S3 S4 S5
B L L

External Connection G_LED2 H H L L L

2
VCC3 VCC G GB YB OFF OFF

1
3
5
7
R193 G_LED1X B:Blinking
RN11 4.7K-04 R192

C
2

2
SATA_LED1- 330-8P4R 1K-04
15 SATALED_L

1
R74 R205 G_LED1 1 2 B VCC

2
4
6
8
HWRST_L 1K-04 180-04 SPK
4,16 FP_RST_L -PWRBTN QN5 1
23 FP_PWRBTN_L 1

E
1

1
F_PANEL 2N3904-S R84
G_LED1 +HDD_LED 1 2 G_LED1X 5VSB 100-04 3
D 23 G_LED1 G_LED2 SATA_LED1- 3 4 G_LED2X 2 1 SPKOUT 4 3 D
23 G_LED2 R229 100-04 5 6 PWRBTN_ 1 2 -PWRBTN R75 4

C
2
HWRST_L 1 2 7 8 1K-04 H4X1-P2E-B

1
PCH_SPKR 9 R210 100-04 R194 G_LED2X PCH_SPKR 2 1 B BC89
16 PCH_SPKR

1
4.7K-04 R195 .1U-16VY-04-O

C
MC81 BC174 H5X2-P10E-B MC73 1K-04 QN2

E
1

2
1U-10VY-06 .1U-16VY-04-O 1U-10VY-06 G_LED2 1 2 B 2N3904-S

2
QN6

E
20101228 Jayson : 2N3904-S
change to 100 ohm

-12V VCC VCC3 VCC3 VCC +12V 5VSB_ATX VCC


POWER CONNECTOR 20101029 VCC
Add By Andy lu

1
External Connection

1
F_PANEL ATX_POWER + BC198
5VSB_ATX 5VSB_ATX 13 1 VCC EC34 .1U-16VY-04-O
3.3V 3.3V
+HDDLED

VCC3 VCC3 1 2
+MSGLED
14 2 1000U-6.3DL
-12V 3.3V

2
-12V -12V 15 3
GND GND

1
5VSB 5VSB 3 4 -ATX_PSON_SIO 16 4
17 PS_ON +5V 5 R235
VCC VCC GND GND
+12V +12V 5 6 18 6 10K-04 GND
GND +5V 3VSB 5VSB_ATX VCC3 +12V VCC
PWR

19 7
RST

GND GND

2
7 8 20 8 ATX_PWRGD
21 -5V PWROK 9
C C
+5V AUX5V

1
23 PSON_L -ATX_PSON_SIO 9 22 10 BC190 BC200 BC197 BC196 BC39
ATX_PWRGD 23 +5V +12V 11 BC199 .1U-16VY-04-O .1U-16VY-04-O .1U-16VY-04-O .1U-16VY-04-O .1U-16VY-04-O
23 ATX_PWRGD +5V +12V 20100929
24 12 .1U-16VY-04-O
GND 3.3V Change By Andy lu

2
For EMI.
ATX-PW-24P2R

TH8 TH8 TH8 TH8


FAN 1
2
H2
8
7
1
2
H3
8
7
1
2
H4
8
7
1
2
H5
8
7
4
+12V 3 6 3 6 3 6 3 6
External Connection 3
1214'10 Jayson : 4 5 4 5 4 5 4 5
change to 0.1U-04
+12V +12V 2

1
+12V VCC3 VCC RJ5
VCC VCC
4.7K-04(1-2) 1 BC56
.1U-16VY-04

2
CFAN_PWM1 Top Veiw
23 CFAN_PWM1
N
2

CFAN_TAC1 R189 D18


23 CFAN_TAC1 4.7K-04 1N4148-S TH8
H1
CPU_FAN SYS_FAN 1 8
P

R188 R185 100-04 2 7


1

27K-04 CFAN_PWM1 1 2 CFAN_PWM1_R 4 3 3 6


CFAN_TAC1 1 2 3 GPO 2 SENSE 4 5
2 SENSE 1 +12V
+12V +12V GND
2

1
R187 GND H3X1-P-W
B 0516'11 Jayson : B
1

10K-04 H4X1-P-W
EC28 + MC68 change Package
1

100U-16DE 1U-16VX-06-O
2

AUGND AUGND

PCB

PCH(104) ROM(104)
CLR_CMOS(1-2) BT(104) Y1(wire)

+
KTS
ECS LITHIUM BATTERY SPI-ROM-S-32M JP-WI-P6.25
CD2032
SMD 64M

JP-R CR2032

PCB-4layer 20-120-012242
A 5series PN:20-120-010851 A
PCB STACK: L1:TOP
L2:PWR 0214'11 Jayson :
PCH Heat Sink change to smaller.
L3:GND Elitegroup Computer Systems
L4:BOTTOM Title
Front Panel,FAN,PowerConn,GND,104
Size Document Number Rev
Custom H61H2-M12 1.0
Date: Wednesday, July 13, 2011 Sheet 13 of 29
5 4 3 2 1
5 4 3 2 1

For H61:USB Port 6/7/12/13 is disabled....From 440377 file

PCHA PCHB

BH8 BF15 DMI_TX_N0 D33 BF36 USB_N0 USB_N0 22


PAR AD0 3 DMI_TX_N0 DMI0RXN USBP0N
DEVSEL_L BH9 BF17 DMI_TX_P0 B33 BD36 USB_P0 USB_P0 22
DEVSEL# AD1 3 DMI_TX_P0 DMI0RXP USBP0P
PCI_33M_FB BD15 BT7 DMI_RX_N0 J36 BC33 USB_N1
15 PCI_33M_FB 1 PCILPCAID_RST_L AV14 CLKIN_PCILOOPBACK AD2 BT13
3 DMI_RX_N0
DMI_RX_P0 H36 DMI0TXN USBP1N BA33 USB_P1
USB_N1
USB_P1
22
22
F_USB2
STP40 PCIRST# AD3 3 DMI_RX_P0 DMI0TXP USBP1P
IRDY_L BF11 BG12 DMI_TX_N1 A36 BM33 USB_N2 USB_N2 22
IRDY# AD4 3 DMI_TX_N1 DMI1RXN USBP2N
20100910 1 PCH_PME_L AV15 BN11 DMI_TX_P1 B35 BM35 USB_P2 USB_P2 22
D STP39 PME# AD5 3 DMI_TX_P1 DMI1RXP USBP2P D
SERR_L BR6 BJ12 DMI_RX_N1 P38 BT33 USB_N3
Add By Andy lu STOP_L BC12 SERR# AD6 BU9
3 DMI_RX_N1
DMI_RX_P1 R38 DMI1TXN USBP3N BU32 USB_P3
USB_N3
USB_P3
22
22
F_USB1
For Test Point STOP# AD7 3 DMI_RX_P1 DMI1TXP USBP3P
PLOCK_L BA17 BR12 DMI_TX_N2 B37 BR32 USB_N4 USB_N4 22
PLOCK# AD8 3 DMI_TX_N2 DMI2RXN USBP4N
TRDY_L BC8 BJ3 DMI_TX_P2 C36 BT31 USB_P4 USB_P4 22
TRDY# AD9 3 DMI_TX_P2 DMI2RXP USBP4P
PERR_L BM3 BR9 DMI_RX_N2 H38 BN29 USB_N5
FRAME_L BC11 PERR# AD10 BJ10
3 DMI_RX_N2
DMI_RX_P2 J38 DMI2TXN USBP5N BM30 USB_P5
USB_N5
USB_P5
22
22
USBx2
FRAME# AD11 3 DMI_RX_P2 DMI2TXP USBP5P
BM8 DMI_TX_N3 E37 BK33
AD12 3 DMI_TX_N3 DMI3RXN USBP6N
BF3 DMI_TX_P3 F38 BJ33
AD13 3 DMI_TX_P3 DMI3RXP USBP6P
BN2 DMI_RX_N3 M41 BF31 20100921
AD14 3 DMI_RX_N3 DMI3TXN USBP7N
GNT0_L BA15 BE4 DMI_RX_P3 P41 BD31
GNT0# AD15 3 DMI_RX_P3 DMI3TXP USBP7P Changed By Andy lu
TP9 1 GNT1_L AV8 BE6 B31 BN27
1 GNT2_L BU12 GNT1#_GPIO51 AD16 BG15 1 2 DMI_COMP E31 DMI_IRCOMP USBP8N BR29 For USB
TP11 GNT2#_GPIO53 AD17 V_1P05_PCH DMI_ZCOMP USBP8P
TP10 1 GNT3_L BE2 BC6 BR26
GNT3#_GPIO55 AD18 BT11 R191 49.9-1-04 USBP9N BT27
AD19 BA14 CKG_DMI_N P33 USBP9P BK25 USB_N10
AD20 CLKIN_DMI_N USBP10N USB_N10 26
07/21 BL2 CKG_DMI_P R33 BJ25 USB_P10 USB_P10 26
REQ0_L BG5 AD21 BC4 CLKIN_DMI_P USBP10P BJ31 USB_N11
REQ1_L BT5 REQ0# AD22 BL4 USBP11N BK31 USB_P11
USB_N11
USB_P11
26
26
USBLAN
REQ2_L BK8 REQ1#_GPIO50 AD23 BC2 PEX1A_RX_N1 J20 USBP11P BF27
REQ2#_GPIO52 AD24 20 PEX1A_RX_N1 PERN1 USBP12N
REQ3_L AV11 BM13 PEX1A_RX_P1 L20 BD27
REQ3#_GPIO54 AD25 20 PEX1A_RX_P1 PERP1 USBP12P
BA9 PCIEx1_A PEX1A_TX_N1 F25 BJ27
AD26 20 PEX1A_TX_N1 PETN1 USBP13N
BF9 PEX1A_TX_P1 F23 BK27
AD27 20 PEX1A_TX_P1 PETP1 USBP13P
PCHINTA_L BK10 BA8 20100910 P20 3VSB
PCHINTB_L BJ5 PIRQA# AD28 BF8 R20 PERN2 R204 10K-04
20100910 PIRQB# AD29 Del By Andy lu PERP2
PCHINTC_L BM15 AV17 PCI bridge C22 BM43 USB_OC_L0 1 2
Del By Andy lu PCHINTD_L BP5 PIRQC# AD30 BK12 For PCI Bridge A22 PETN2 OC0#_GPIO59 BD41 USB_OC_L1
For PCI Slots PCHINTE_L BN9 PIRQD# AD31 H17 PETP2 OC1#_GPIO40 BG41 USB_OC_L2
PCHINTF_L AV9 PIRQE#_GPIO2 BN4 J17 PERN3 OC2#_GPIO41 BK43 USB_OC_L3
PIRQF#_GPIO3 C_BE0# 20100921 PERP3 OC3#_GPIO42
PCHINTG_L BT15 BP7 USB3.0 E21 BP43 USB_OC_L4
BR4 PIRQG#_GPIO4 C_BE1# BG2
Del By Andy lu B21 PETN3 OC4#_GPIO43 BJ41
C PCHINTH_L
PIRQH#_GPIO5 C_BE2# PETP3 OC5#_GPIO9
USB_OC_L5 07/21 C
BP13 PEX1B_RX_N4 For USB3.0 P17 BT45 USB_OC_L6
C_BE3# 20 PEX1B_RX_N4 PERN4 OC6#_GPIO10
20100909 PEX1B_RX_P4 M17 BM45 USB_OC_L7
20 PEX1B_RX_P4 PERP4 OC7#_GPIO14
1 OF 12 PCIEx1_B PEX1B_TX_N4 F18
Add By Andy lu 20 PEX1B_TX_N4 PETN4
PEX1B_TX_P4 E17
20 PEX1B_TX_P4 PETP4
LAN_RX_N6 N15
26 LAN_RX_N6 PERN5
U1CPT LAN_RX_P6 M15 BP25 ER49 22.6-1-04
26 LAN_RX_P6 PERP5 USBRBIAS#
LAN LAN_TX_N6 BC140 1 2 .1U-10VX-04 B17 BM25 USBRBIAS 1 2
26 LAN_TX_N6 PETN5 USBRBIAS
LAN_TX_P6 BC139 1 2 .1U-10VX-04 C16
26 LAN_TX_P6 PETP5
J15 BD38 CKG_DOT96_N
L15 PERN6 CLKIN_DOT_96N BF38 CKG_DOT96_P GND
A16 PERP6 CLKIN_DOT_96P
B15 PETN6
J12 PETP6 ER50 750-1-04
H12 PERN7 A32 DMI2RBIAS 1 2
F15 PERP7 DMI2RBIAS
For H61:PCIE 7/8 is disable....From intel Jasmine PETN7
F13
H10 PETP7 GND
VCC3 J10 PERN8
RN5 8.2K-8P4R B13 PERP8
1 2 D13 PETN8
SERR_L
PETP8 2 OF 12
REQ1_L 3 4 GPIO19:
REQ2_L 5 6 Boot Device Select Strap.
PERR_L 7 8
U1CPT
RN4 8.2K-8P4R R161 1K-04-O GNT0_L:
IRDY_L 1 2 1 2 GNT0_L No More Information in EDS V0.7
STOP_L 3 4
FRAME_L 5 6
REQ3_L 7 8 GNT1_L:
B B
Boot Device Select Strap.
RN6 8.2K-8P4R
PLOCK_L 1 2 GND
REQ0_L 3 4 GNT2_L:
TRDY_L 5 6 ESI Strap ( Server Only), 20100929
DEVSEL_L 7 8 DON'T Pull Low in Desktop. Change By Andy lu
RN7 8.2K-8P4R GNT3_L:
PCHINTH_L 1 2 Top-Block Swap Override Mode,
PCHINTF_L 3 4 When Sampled Low.
PCHINTE_L 5 6 Stuff for
PCHINTG_L 7 8
Integrated Clock Mode RN13 10K-8P4R-04
RN8 8.2K-8P4R CKG_DMI_N 7 8
PCHINTA_L 1 2 CKG_DMI_P 5 6
PCHINTC_L 3 4 CKG_DOT96_N 3 4
PCHINTD_L 5 6 CKG_DOT96_P 1 2
PCHINTB_L 7 8
Stuff for
GND
Integrated Clock Mode
GNT[0..3]#
GPIO19
have been internal pull high to +VCC3

Boot Device Select:

A BOOT DEVICE GNT1_L GPIO19 A

LPC 0 0
PCI 1 0
Elitegroup Computer Systems
* SPI 1 1
Title
PCH - DMI/PCI/PE/USB
Size Document Number Rev
Custom H61H2-M12 1.0
Date: Wednesday, July 13, 2011 Sheet 14 of 29
5 4 3 2 1
5 4 3 2 1

For H61:SATA port2/3 is disable....From 440377 file


ONLY SATA PORT0 & PORT1 SUPPORT SATA3.0,
ALSO SUPPORT SATA2.0, SATA1.0.
PCHH MOBILE ONLY,
20100923 20100929 PCHC
Add By Andy lu Short By Andy lu NOT FOR DESKTOP.
AT11 R27 CKG_CPU_N
For LPC Debug R151 22-04 CLKOUT_PCI0 CLKIN_GND1_N P27 CKG_CPU_P 1 PCH_CL_CLK1 BA50 AC56 SATA_RX_N4
CLKIN_GND1_P STP60 CL_CLK1 SATA0RXN SATA_RX_N4 22
1 2 SIO33M_R AN14 NON AMT 1 PCH_CL_DATA1 BF50 AB55 SATA_RX_P4
23 SIO33M CLKOUT_PCI1 W53 CK_PD_N
* STP63
1 PCH_CL_RST1_L BF49 CL_DATA1 SATA0RXP AE46 SATA_TX_N4
SATA_RX_P4 22
CLKIN_GND0_N STP59 CL_RST1# SATA0TXN SATA_TX_N4 22
PCI_33M_FB_R AT12 V52 CK_PD_P FROM SIO AE44 SATA_TX_P4
14 PCI_33M_FB CLKOUT_PCI2 CLKIN_GND0_P SATA0TXP SATA_TX_P4 22
R163 22-04 PCH_MEPWROK_R BC46
16,23 PWRGD APWROK
CK_P_33M_LPC 1 2 CK_P_33M_LPC_R AT17 R52 AA53 SATA_RX_N5
D 23 CK_P_33M_LPC CLKOUT_PCI3 CLKOUT_ITPXDP_N SATA1RXN SATA_RX_N5 22 D
N52 Connect to PWROK on the PCH if not supporting M3 BN21 AA56 SATA_RX_P5
CLKOUT_ITPXDP_P PWM0 SATA1RXP SATA_RX_P5 22
AT14 BT21 AG49 SATA_TX_N5
CLKOUT_PCILOOPBACK PWM1 SATA1TXN SATA_TX_N5 22
AE2 BM20 AG47 SATA_TX_P5
CLKOUT_PCIE7N PWM2 SATA1TXP SATA_TX_P5 22
PDG 0.7 33 Ω ± 5% for Single-End (except PCI Clocks) AF1 BN19
AT9 CLKOUT_PCIE7P PWM3 AL50
BA5 CLKOUTFLEX0_GPIO64 P31 SATA2RXN AL49
R150 22-04 AW5 CLKOUTFLEX1_GPIO65 CLKOUT_DMI_N R31
CK_CPU_100M_N 4 CPU GP17_BOMDET1 BT17 SATA2RXP AL56 20100916
CLKOUTFLEX2_GPIO66 CLKOUT_DMI_P CK_CPU_100M_P 4 TACH0_GPIO17 SATA2TXN
1 2 SIO48M_R BA2 GP1_BOMDET2 BR19 AL53
23 SIO48M CLKOUTFLEX3_GPIO67 TACH1_GPIO1 SATA2TXP Change By Andy lu
N56 GP6_BOMDET3 BA22
CLKOUT_DP_N M55 BR16 TACH2_GPIO6 AN46 From Ports 2,3 to Ports0,1
ER43 90.9-1-04
CLKOUT_DP_P Jack 08/10 GP7_BOMDET4
TACH3_GPIO7 SATA3RXN
V_1P05_PCH 1 2 XCLK_RCOMP AL2 GP_V1.05 BU16 AN44
XCLK_RCOMP 12 GP_V1.05 TACH4_GPIO68 SATA3RXP
CKG_14M AN8 AE6 20100921 TP12 1 GP_VDIMM BM18 AN56
REFCLK14IN CLKOUT_PCIE0N AC6 1 GPIO70_USBDET3 BN17 TACH5_GPIO69 SATA3TXN AM55
IN CLKOUT_PCIE0P Del By Andy lu For USB3.0 TP13
THERMAL ALERT BP15 TACH6_GPIO70 SATA3TXP
23 THERMAL ALERT TACH7_GPIO71
Layout Note: AA5 20100910 AN49 SATA_RX_N2
CLKOUT_PCIE1N SATA4RXN SATA_RX_N2 22
W5 STP54 1 SST_CTL BC43 AN50 SATA_RX_P2
PCI Clock Max 15000MILS CLKOUT_PCIE1P Del By Andy lu For PCI Bridge SST SATA4RXP SATA_RX_P2 22
AT50 SATA_TX_N2
SATA4TXN SATA_TX_N2 22
AB12 AT49 SATA_TX_P2
CLKOUT_PCIE2N CK_PE_100M_LAN_L 26 SATA4TXP SATA_TX_P2 22
XTAL_25M_PCH_OUT AJ5 AB14 1 GP22 BA53
XTAL_25M_PCH_IN AJ3 XTAL25_OUT CLKOUT_PCIE2P CK_PE_100M_LAN_H 26 LAN TP19
TP27 1 GPIO38_KMDET BE54 SCLOCK_GPIO22
ER38 1M-04 XTAL25_IN AB9 1 GPIO39_CASE0 BF55 SLOAD_GPIO38 AT46 SATA_RX_N3
CLKOUT_PCIE3N TP23 SDATAOUT0_GPIO39 SATA5RXN SATA_RX_N3 22
1 2 AB8 20100909 GPIO48_CASE1 AW53 AT44 SATA_RX_P3
CLKOUT_PCIE3P 12 GPIO48 SDATAOUT1_GPIO48 SATA5RXP SATA_RX_P3 22
AV50 SATA_TX_N3
Add By Andy lu SATA5TXN SATA_TX_N3 22
X2 X-25M Y9 20101207 AV49 SATA_TX_P3
CLKOUT_PCIE4N PEX1B_100M_N 20 SATA5TXP SATA_TX_P3 22
2 1 Y8
CLKOUT_PCIE4P PEX1B_100M_P 20 PCIEx1_B Add By Jayson
2

AF3 for Down Voltage AF55 CKG_SATA_N


CLKOUT_PCIE5N PEX1A_100M_N 20 CLKIN_SATA_N
3

C35 C34 AG2 AG56 CKG_SATA_P


27P-04 27P-04
CLKOUT_PCIE5P PEX1A_100M_P 20 PCIEx1_A V_1P05_PCH CLKIN_SATA_P
1

C AB3 BF57 SATALED_L V_1P05_PCH C


CLKOUT_PCIE6N AA2 AY20 SATALED# AJ55 SATALED_L 13
CLKOUT_PCIE6P NC_1 SATAICOMPI

1
BC166 AJ53 SATA1RCOMP 1 2
GND AG8 .1U-16VY-04-O SATAICOMPO
CLKOUT_PEG_A_N PEX16_100M_N 20
AG9 BC54 GPIO21_COM2_DET 1 ER57 37.4-1-04
CLKOUT_PEG_A_P PEX16_100M_P 20 PCIEx16 SATA0GP_GPIO21 TP21

2
AY52 GPIO19 1 STP72
AE12 SATA1GP_GPIO19 BB55 GPIO36_TCM_PST_L1
8 of 12 CLKOUT_PEG_B_N SATA2GP_GPIO36 TP26
AE11 GND BG53 GPIO37_TCM 1 TP20
CLKOUT_PEG_B_P SATA3GP_GPIO37 AU56 GPIO16 1
SATA4GP_GPIO16 TP18
BA56 GPIO49 1 STP73
SATA5GP_GPIO49 V_1P05_PCH
STITCHING CAPS. AE54
U1CPT SATA3COMPI AE52 SATA3RCOMP 1 2
SATA3RCOMPO
SATA TP16
AE50 PCH_TP16 1 STP58 R217 49.9-1-04
ER58 750-1-04
SATA_RX_N[2..5] AC52 SATA3RBIAS 1 2
22 SATA_RX_N[2..5] SATA3RBIAS
SATA_RX_P[2..5] 20100923 BB57 A20GATE
22 SATA_RX_P[2..5] A20GATE A20GATE 23
SC10 2 1 10P-04-X-O CK_P_33M_LPC_R BN56 INIT3_3V_L 1 STP70 GND
SATA_TX_N[2..5] Add By Andy lu INIT3_3V# BG56 KBRST_L
22 SATA_TX_N[2..5] For LPC Debug RCIN# KBRST_L 23
BC141 2 1 10P-04-O SIO33M_R AV52 SER_IRQ SER_IRQ 23 07/21
SATA_TX_P[2..5] SERIRQ E56 CPU_THERMTRIP_L
22 SATA_TX_P[2..5] 3 OF 12 THRMTRIP# CPU_THERMTRIP_L 4
BC148 2 1 10P-04-O PCI_33M_FB_R H48 PECI_PCH
PECI PECI_PCH 4
F55 PM_SYNC
PMSYNCH PM_SYNC 4
BC145 2 1 10P-04-O SIO48M_R
1207'10 :
By Jayson added
GND U1CPT
Reserve for
B VCC3 B
Default GPI set to Pull Up: BOM Detect.
R214 1 2 10K-04 CK_PD_P RJ4 10K-04(1-2)
1
R213 1 2 10K-04 CK_PD_N GP1_BOMDET2 2 VCC3 GPIO36_TCM_PST_L, GPIO37_TCM:
3 RN14 10K-8P4R TCM Header In Eanble TCM,
SER_IRQ 1 2 Disable TPM.
R197 1 2 10K-04 CKG_CPU_P Detect USB3.0 control IC GPIO16 3 4
GND GPIO19 5 6
R200 1 2 10K-04 CKG_CPU_N GPIO49 7 8 GPIO16, GPIO49:
VCC3 Reserve for TPM.
RJ3 10K-04(1-2) R180 10K-04
GND 1 THERMAL ALERT 1 2
GP17_BOMDET1 2 R226 10K-04
3 GPIO21_COM2_DET 1 2 1210'10 Jayson:
Del KBRST_L & A20GATE
R227 10K-04-O
R162 1 2 10K-04 CKG_14M GND GPIO36_TCM_PST_L 1 2 (Pull-High)
Stuff for
R222 10K-04-O
Integrated Clock Mode 1 2
CKa GPIO37_TCM
VCC3
GND RJ2 10K-04(1-2)
1 GND
GP6_BOMDET3 2
3 R212 10K-04
CKG_SATA_N 1 2 Stuff for
CLK GEN. R211 10K-04
Integrated Clock Mode
Clock Mode CKa GND CKG_SATA_P 1 2
IDT CV184 Circuit.
X VCC3
* Integrated Clock Mode V RJ1 10K-04(1-2) GND
A A
Buffer Through Mode V 1
X GP7_BOMDET4 2
3

GND
Elitegroup Computer Systems
Title
PCH - SATA / CLK
Size Document Number Rev
Custom H61H2-M12 1.0
Date: Wednesday, July 13, 2011 Sheet 15 of 29
5 4 3 2 1
5 4 3 2 1

Buffer Through Mode /


Integrated Clock Mode
have been changed to F/W Strap. 3VSB
LAD[0..3] PCHD R220 10K-04
23 LPC_AD[0..3] Default: Integrated Clock Mode
Doc. Cougar Point Platform Controller Hub PCH_GP44 1 2
(PCH) Family EDS Update V0.7.1 1 2
STP48 1 LPC_DRQ1_L BA20 AW55 FP_AUD_DETECT R221 10K-04-O
LDRQ1#_GPIO23 BMBUSY#_GPIO0 FP_AUD_DETECT 25
1207'10 : LPC_AD0 BK15 BC56 CLKRUN_L 1 TP24 R219 1K-04
23 LPC_AD0 FWH0_LAD0 CLKRUN#_GPIO32
By Jayson added LPC_AD1 BJ17 BC25 HDA_DOCK_EN_L 1 STP49 IGC_EN_L 1 2 JTAG CLK FILTER: GND
23 LPC_AD1 FWH1_LAD1 HDA_DOCK_EN#_GPIO33
LPC_AD2 BJ20 BL56 PCH_PU_GP34 1 TP22
23 LPC_AD2 FWH2_LAD2 STP_PCI#_GPIO34
LPC_AD3 BG20 BJ57 TP_GPIO35 1 STP71 PCH_GP44
23 LPC_AD3 FWH3_LAD3 GPIO35
1 LPC_DRQ0_L BK17 Integrated Clock: GND
STP43 LDRQ0#
LPC_FRAME_L BG17 BP51 IGC_EN_L H Enable
D 23 LPC_FRAME_L FWH4_LFRAME# GPIO8
LAN_PHY_PWR_CTRL_GPIO12
BK50 LAN_DISABLE_L 1 STP61 20101207 IGC_EN_L (internal PU) * D
BA25 LPC_PME_L L Bypass
HDA_DOCK_RST#_GPIO13 LPC_PME_L 23 Add By Jayson
BM55 TLS_EN H Buffer Through Mode
GPIO15 GPIO15 12 GPIO15 for Down Voltage
HDA_BITCLK BU22 BP53 PCH_SKTOCC_L 1 STP65
24 HDA_BITCLK HDA_RST_L BC22 HDA_BCLK GPIO24_MEM_LED BJ55 ON_DIE_PLL_EN 1 TP25 L Integrated Clock Mode
24 HDA_RST_L
24 HDA_SDIN0
HDA_SDIN0 BD22 HDA_RST#
HDA_SDIN0
GPIO28
SLP_LAN#_GPIO29
BH49 SLP_LAN_L 1 STP62
*
BF22 AV43 PCH_GP20_PU
BK22 HDA_SDIN1 PCIECLKRQ2#_GPIO20 BL54 PCH_GP44
HDA_SDIN2 PCIECLKRQ5#_GPIO44 20100929
BJ22 AV44 PCH_GP45
HDA_SDOUT BT23 HDA_SDIN3 PCIECLKRQ6#_GPIO45 BP55 PCH_GP46 1
Short By Andy lu
24 HDA_SDOUT HDA_SDO PCIECLKRQ7#_GPIO46 TP17
HDA_SYNC BP23 BT53 GP57_5V_DETECT 1 TP16 PCH_GP46
24 HDA_SYNC HDA_SYNC GPIO57 BJ53 PCH_SYSPWROK VR_READY
In Sugar Bay Q series Platform,
SYS_PWROK VR_READY 9 Enable TLS for vPro.
SPI_MOSI AU53 BJ48 RI_L
22 SPI_MOSI SPI_MOSI RI# RI_L 21
SPI_MISO AT55 BK48 PCH_PLTRST_L TLS_EN
22 SPI_MISO SPI_MISO PLTRST# PCH_PLTRST_L 23
SPI_CS_L0 AT57 BC44 PCIE_WAKE_L
22 SPI_CS_L0 SPI_CS0# WAKE# PCIE_WAKE_L 20,26
SPI_CLK AR54 BC41 SLPAMT_L 1 TLS Confidentiality: DFX TEST MODE Rings Oscillator:
22 SPI_CLK SPI_CLK SLP_A# STP51
SPI_CS_L1 AR56 BM53 SLP3_L
SPI_CS1# SLP_S3# SLP3_L 4,11,23
BN52 SLP4_L TLS_EN (internal PD) PCH_GP46 (internal PU)
SLP_S4# SLP4_L 23
PCH_RTCX1 BR39
PCH_RTCX2 BN39 RTCX1 BH50 SLP5_L 1 STP67 H Enable TLS H Enable
RTCRST_L BT41 RTCX2
RTCRST#
SLP_S5#_GPIO63
SUS_STAT#_GPIO61
BN54 LPCPD_L 1231'10 Jayson : *
SRTCRST_L BN37 BA47 SUSCLK 1 STP57 L Disable TLS L Bypass
INTRUDER_L BM38 SRTCRST#
INTRUDER#
SUSCLK_GPIO62
BATLOW#_GPIO72
AV46 GPIO72_BOMDET5 1 STP66
Del TPM reserve LPC *
PWRGD PWRGD BJ38 BP45 SUSACK_L 1 TP14
15,23 PWRGD PWROK SUSACK#
RSMRST_L BK38 BU46 PCH_GP30
23 RSMRST_L RSMRST# SUSWARN#/SUSPWRDNACK/GPIO30
1

C38 INTVRMEN BN41 BG46 DRAM_PWROK


INTVRMEN DRAMPWROK DRAM_PWROK 4
.1U-16VY-04-O DPWROK BT37
DSWODVREN BR42 DPWROK BJ43 PCH_GP27
DSWVRMEN GPIO27
2

BG43 PCH_GP31
GPIO31 BD43 SLP_SUS_L 1 PCH_SPKR
C STP53 C
GND SMBALERT_L BN49 SLP_SUS# BT43 SIO_PWRBTN_L ON_DIE_PLL_EN
SMBALERT#_GPIO11 PWRBTN# SIO_PWRBTN_L 23
SMBCLK BT47
7,8,20,26 SMBCLK SMBCLK
SMBDATA BR49 No Reboot:
7,8,20,26 SMBDATA SMBDATA
SMLK0ALERT_L BU49 BE52 SYS_RST_L On-Die PLL VR:
SML0ALERT#_GPIO60 SYS_RESET# FP_RST_L 4,13
SMLK0_LAN_CLK BT51 BE56 PCH_SPKR PCH_SPKR (internal PD)
SML0CLK SPKR PCH_SPKR 13
SMLK0_LAN_DATA BM50 ON_DIE_PLL_EN (internal PU)
SMLK1ALERT_L BR46 SML0DATA
SML1ALERT#_PCHHOT#_GPIO74
H Enable No Reboot
SMLK1_SIO_CLK BJ46 D53 CPU_PWROK H Enable
23 SMLK1_SIO_CLK
SMLK1_SIO_DATA BK46 SML1CLK_GPIO58 PROCPWRGD CPU_PWROK 4
L Disable *
23 SMLK1_SIO_DATA SML1DATA_GPIO75 * L Disable
BC49 PCH_JTAG_RST_R 1 STP69
TP12 BA43 PCH_JTAG_TCK_R 1
VBAT_IO JTAG_TCK STP56
BC52 PCH_JTAG_TDI 1 TP28
JTAG_TDI BF47 PCH_JTAG_TDO 1
R203 390K-04 4 OF 12 JTAG_TDO STP68
DSWODVREN 1 2 BC50 PCH_JTAG_TMS 1 STP64
R201 1M-04 JTAG_TMS VBAT_IO
INTRUDER_L 1 2 R202 390K-04
INTVRMEN 1 2 HDA_SYNC

3VSB U1CPT
RN9 2.2K-8P4R Integrated 1.05V SUS VRM: On-Die PLL VR Source:
SMLK0_LAN_DATA 2 1
SMLK0_LAN_CLK 4 3 INTVRMEN HDA_SYNC_R (internal PD)
SMLK1_SIO_CLK 6 5
SMLK1_SIO_DATA 8 7 PCH_RTCX1 H Enable H 1.5V
R223 1K-04 PCH_RTCX2 *
PCIE_WAKE_L 1 2 L Disable L 1.8V
RN12 8.2K-8P4R 1 2 CASE *
PCH_GP30 2 1 R206 10M-04
B B
PCH_GP27 4 3 Y1 X-32.768K 1 INTRUDER_L
PCH_GP31 6 5 1 2 1 2
PCH_GP45 8 7 2
1

R218 10K-04
SMBALERT_L 1 2 BC175 BC176 H2X1-B
R209 2.2K-04 18P-04 18P-04 3VSB
2

SMLK0ALERT_L 1 2
R208 10K-04

2
SMLK1ALERT_L 1 2
R186 10K-04 GND R90
LPC_PME_L 1 2 When Deep Sleep not implemented: 1K-04
CLR_CMOS 1.PCH_GP30, PCH_GP27 need to be Pull Up. ME_UNLOCK

1
RN10 2.2K-8P4R 2.VCCDSW3_3 should to be connected to +3VSB. 1 ME_UN_PU
RI_L 2 1 VBAT_IO VBAT_IO_S 1 2 HDA_SDOUT
3.SLP_SUS_L, SUSACK_L left unconnected.
SMBCLK 4 3 2
Width 20 mils 4.SUSWARN_L may be used as GPIO30.(Referance to 1.)
SMBDATA 6 5
LPCPD_L 8 7 H2X1-B
3

R198 680-04
RSMRST_L 2 1 D11 R108 MC45 RSMRST_L DPWROK ME Enable/Disable
BC170 .1U-16VY-04-O BAT54C-S 20K-04 1U-10VY-06 ME_UNLOCK
2

1 2 For platform not supporting


1 1

1
2
3

ER37 deep sleep connect directly 1-2 UNLOCK


1

20K-1-04
1
2
3

GND R104 3VSB_IO to RSMRST#. Float LOCK


1

1K-04
V_1P5_SM RTCRST_L SRTCRST_L 20100929
CLR_CMOS
ER48 200-1-04
Short By Andy lu
2

DRAM_PWROK 1 2 H3X1-R
+VBAT
1

A A
p

VCC3 MC47
BT 1U-10VY-06 BC113
2

R228 10K-04 SK-CR2032-D 1U-10VY-06


1

SPI_CS_L1 1 2
Elitegroup Computer Systems
n

R224 10K-04
PCH_GP20_PU 1 2
R225 10K-04-O
1 2 Title

PCH_GP45 1 2 PCH - MISC, Strap Function


R207 10K-04-O Size Document Number Rev
Custom 1.0
GND H61H2-M12
Date: Wednesday, July 13, 2011 Sheet 16 of 29
5 4 3 2 1
5 4 3 2 1

0504'11 Jayson : PCHF PCHE


DEL DVI

T1 AR4 C_HSYNC R172 2 1 33-04 VGA_HSYNC R215 4.7K-04 M48 AB50


N2 DDPB_HPD CRT_HSYNC AR2 C_VSYNC R164 2 1 33-04 VGA_VSYNC PROC_SEL 1 2 NVR_CLE R47 RESERVED_29 RESERVED_22 Y50
DDPC_HPD CRT_VSYNC 4 PROC_SEL DF_TVS RESERVED_21
M1 Y41 AB49
DDPD_HPD M50 RESERVED_6 RESERVED_14 AB44
Add damping 2010/7/27 RESERVED_4 RESERVED_13
1 DDPB_AUXP R8 M49 U49
STP38 DDPB_AUXP RESERVED_3 RESERVED_12
1 DDPB_AUXN R9 AN6 VGA_RED R170 2 1 150-1-04 U43 R44
STP36 DDPB_AUXN CRT_RED RESERVED_2 RESERVED_11
U14 AN2 VGA_GREEN R165 2 1 150-1-04 J57 U50
U12 DDPC_AUXP CRT_GREEN AM1 VGA_BLUE R166 2 1 150-1-04 RESERVED_1 RESERVED_10 U46
D
N6 DDPC_AUXN CRT_BLUE RESERVED_9 U44 D
R6 DDPD_AUXP RESERVED_8 H50
DDPD_AUXN AM6 RESERVED_7 K46
R14 CRT_IRTN RESERVED_20 L56
R12 DDPB_0P RESERVED_19 J55
M11 DDPB_0N AW1 VGA_DDC_DATA GND GND RESERVED_18 F53
M12 DDPB_1P CRT_DDC_DATA AW3 VGA_DDC_CLK RESERVED_17 H52
0504'11 Jayson : DDPB_1N CRT_DDC_CLK RESERVED_16
H8 AT3 DACREFSET 2 1 E52
DEL DVI K8 DDPB_2P DAC_IREF ER40 1K-1-04 RESERVED_15
L5 DDPB_2N K50
DDPB_3P
091222 Update! RESERVED_28
M3 GND Terminating unused DC NAND interface: K49
L2 DDPB_3N RESERVED_27 AB46
J3 DDPC_0P Y18 PCH_TP6 1 RESERVED_26 G56
DDPC_0N TP6 STP47 If not implemented, the dual channel NAND interface signals, RESERVED_25
G2 Y17 PCH_TP7 1
G4 DDPC_1P TP7 AB18 PCH_TP8 1
STP44 including NV_RCOMP, can be left as No Connect. Y44
DDPC_1N TP8 STP46 RESERVED_24
F3 AB17 PCH_TP9 1 Note: L53
DDPC_2P TP9 STP42 RESERVED_23
F5
E4 DDPC_2N R50
DDPC_3P VCCPNAND which power the DC NAND interface must be powered RESERVED_5
E2 5 OF 12
D5 DDPC_3N even if dual channel NAND interface is not connected since
B5 DDPD_0P it also supplies power to other functions inside PCH.
C6 DDPD_0N
DDPD_1P U1CPT
D7 100120 Update!
B7 DDPD_1N AL12 DDPC_CTRLCLK 1
DDPD_2P DDPC_CTRLCLK STP41 428880_428880_Cougar_Point_Desktop_Ballout_Mech_Package_Rev1p0.zip:
C9 AL14 DDPC_CTRLDATA 1
DDPD_2N DDPC_CTRLDATA STP45 PCHG
E11 Renamed NV_WE#_CK[0:1], NV_RE#_WRB[0:1], NV_RCOMP, NV_RB#,
B11 DDPD_3P
DDPD_3N AL9
NV_DQ9 / NV_IO[0:15], NV_DQS[0:1], NV_CE#[0:3], and NV_ALE H31 C42 FDI_TX_N0
DDPD_CTRLCLK to Reserved(RSVD). TP21 FDI_RXN0 FDI_TX_N0 3
U2 AL8 J31 B43 FDI_TX_P0
SDVO_INTP DDPD_CTRLDATA TP25 FDI_RXP0 FDI_TX_P0 3
C T3
SDVO_INTN
Renamed NV_CLE to DF_TVS. C29
TP29 FDI_RXN1
F45 FDI_TX_N1
FDI_TX_N1 3 C
E29 F43 FDI_TX_P1
TP33 FDI_RXP1 FDI_TX_P1 3
AL15 H41 FDI_TX_N2
SDVO_CTRLCLK FDI_RXN2 FDI_TX_N2 3
W3 AL17 J27 J41 FDI_TX_P2
SDVO_STALLP SDVO_CTRLDATA TP22 FDI_RXP2 FDI_TX_P2 3
U5 L27 C46 FDI_TX_N3
SDVO_STALLN TP26 FDI_RXN3 FDI_TX_N3 3
F28 D47 FDI_TX_P3
TP30 FDI_RXP3 FDI_TX_P3 3
U8 0504'11 Jayson : E27 B45 FDI_TX_N4
SDVO_TVCLKINP TP34 FDI_RXN4 FDI_TX_N4 3
U9 A46 FDI_TX_P4
SDVO_TVCLKINN DEL DVI FDI_RXP4 B47
FDI_TX_P4 3
6 of 12 FDI_RXN5
FDI_TX_N5
FDI_TX_N5 3
J25 C49 FDI_TX_P5
TP23 FDI_RXP5 FDI_TX_P5 3
L25 J43 FDI_TX_N6
TP27 FDI_RXN6 FDI_TX_N6 3
U1CPT C26 H43 FDI_TX_P6
TP31 FDI_RXP6 FDI_TX_P6 3
B27 M43 FDI_TX_N7
TP35 FDI_RXN7 FDI_TX_N7 3
0712'11 Jayson : 0712'11 Jayson : P43 FDI_TX_P7
FDI_RXP7 FDI_TX_P7 3
Change to VCC Change to VCC L22 B51 FDI_FSYNC0
J22 TP24 FDI_FSYNC0 E49 FDI_LSYNC0 FDI_FSYNC0 3
B25 TP28 FDI_LSYNC0 C52 FDI_FSYNC1 FDI_LSYNC0 3
D25 TP32 FDI_FSYNC1 D51 FDI_LSYNC1 FDI_FSYNC1 3
TP36 FDI_LSYNC1 FDI_LSYNC1 3
VCC3 VCC VCC3 VCC H46 FDI_INT
FDI_INT FDI_INT 3
2

2
7 OF 12
1

1
R12 R8 R17
G

G
R9 Q2 6.8K-04 Q1 6.8K-04 U1CPT
2.2K-04
1

1
2.2K-04
2

2
VGA_DDC_CLK S D DDCCLK VGA_DDC_DATA S D DDCDATA
B B

2N7002-S 2N7002-S
0712'11 Jayson :
10-007-015410 ESD Change to VCC
VGA VCC
CONN-15P3R-VGA U2
DDCDATA 1 4 VGA_HSYNC
16
16 2 5
6 DDCCLK 3 6 VGA_VSYNC
FB2 FB80-06-B 6

1
VGA_RED 1 2 RED 1 RED GND 11 ESD-6P BC10
1 11
7 .1U-16VY-04
FB3 FB80-06-B 7

2
VGA_GREEN 1 2 GREEN 2 GRN GND SDATA 12 DDCDATA
2 12
8
FB4 FB80-06-B 8
0712'11 Jayson :
VGA_BLUE 1 2 BLUE 3 BLU GND HSYNC 13 VGA_HSYNC
9
3 13
VCC Change to VCC
9 U1
4 VCC VSYNC 14 VGA_VSYNC RED 1 4 BLUE
1

4 14
10 2 5
ER10 ER11 ER12 BC22 BC23 BC24 BC17 BC16 BC15 10 3 6 GREEN
150-1-04 150-1-04 150-1-04 22P-04-O 22P-04-O 22P-04-O 10P-04-O 10P-04-O 10P-04-O 5 GND GND SCLK 15 DDCCLK
2

1
5 15
ESD-6P BC18
2

1
.1U-16VY-04
17
17 BC11 BC19 BC20 BC9

2
20100929 47P-04-O 10P-04-O 10P-04-O 47P-04-O
2

2
Close to Connector Change By Andy lu
A A

Close to Connector
20100929
Change By Andy lu Elitegroup Computer Systems
Title
PCH - DP/VGA/FDI
Size Document Number Rev
Custom H61H2-M12 1.0
Date: Wednesday, July 13, 2011 Sheet 17 of 29
5 4 3 2 1
5 4 3 2 1

VCC VCC3

1.05V 1.05V

1
D16 MAX 6.2A MAX 6.2A
BAT54C-S
V_1P05_PCH V_1P05_PCH
R145 10-04 PCHI

3
1 2
F20 AC24
PCHJ VCCIO_024 VCCCORE_001
1

1 Close to BF1 V_1P8_SFR F30 AC26


D
BC103 MC64 MAX <1mA V25 VCCIO_025 VCCCORE_002 AC28 D

.1U-16VY-04-O 1U-10VY-06 +V_REF5V BF1 AJ1 VCCVRM_A VCCVRM_A V27 VCCIO_026 VCCCORE_003 AC30
V5REF VCCVRM_01 VCCIO_027 VCCCORE_004
2

R2 VCCVRM_B VCCVRM_B V31 AC32


MAX <1mA VCCVRM_04 R54 VCCVRM_C VCCVRM_C V33 VCCIO_028 VCCCORE_005 AE24
GND GND +V_REF5V_SUS BT25 VCCVRM_03 R56 Y24 VCCIO_029 VCCCORE_006 AE28
V5REF_SUS VCCVRM_02 VCCIO_030 VCCCORE_007

1
20100929 V_1P8_SFR Near PCH. Y26 AE30
MC56 Y30 VCCIO_031 VCCCORE_008 AE32
Change By Andy lu AV28 T55 10U-10VY-08 Y32 VCCIO_032 VCCCORE_009 AE34
3VSB MAX 123mA
VCCSUSHDA VCCDFTERM_01 VCCIO_033 VCCCORE_010

2
5VSB 3VSB T57 Y34 AE36
VCCDFTERM_02 VCCIO_034 VCCCORE_011

1
Close to T55 AG32
AL38 BC184 GND VCCCORE_012 AG34
VCC3 AU20 VCC3_3_05 AN38 .1U-16VY-04 VCCCORE_013 AJ32
VCC3_3_09 VCC3_3_06 VCCCORE_014

2
2

D19 AV20 AA34 AJ34


BAT54C-S MAX 203mA AU22 VCC3_3_10 VCC3 AA36 VCCIO_022 VCCCORE_015 AJ36
VCC3_3_07 BC17 GND VCCIO_023 VCCCORE_016 AL32
VCC3 3.3V VCC3_3_02 BD17 V22 VCCCORE_017 AL34
R190 10-04 VCC3_3_03 BD20 Y20 VCCIO_035 VCCCORE_018 AN32
MAX 16mA 1.05V/1.00V 1.05V
VCC3_3_04 VCCIO_036 VCCCORE_019
3

1
1 2 AN52 Close to AF57 Close to A12 Y22 AN34
VCCSPI SC12 BC125 MAX TBD VCCIO_037 VCCCORE_020 AR32 MAX 1.8A
VCCCORE_021
1

Close to BT25 .1U-16VY-04-X-O .1U-16VY-04 V_CPUVTT AR34


VCCCORE_022

2
BC167 MC80 SC11 V_1P05_ME
.1U-16VY-04 1U-10VY-06 4.7U-16VY-08-X-O A12 AMT Only
VCC3_3_08
2

AF57 GND GND B41 AG24


VCC3_3_01 E41 VCCDMI_02 VCCASW_004 AG26
VCCDMI_01 VCCASW_005

1
GND GND GND AG28
VCCASW_006

1
Close to B41, E41 AJ24 SC15 SC13
BT35 MC72 AL40 VCCASW_007 AJ26 1U-10VY-06-X-O 10U-10VY-08-X-O
VCCSUS3_3_011 VCCIO_008 VCCASW_008

2
100mA up AV30 3VSB 1U-10VY-06 AN40 AJ28
VCCSUS3_3_002 VCCIO_009 VCCASW_009

2
3VSB +V_3P3_DAC AT1 AV32 AN41 AL24
VCCADAC VCCSUS3_3_003 AY31 VCCIO_010 VCCASW_010 AL28
C C
100mA up VCCSUS3_3_004 AY33 GND AG38 VCCASW_011 AN22 GND GND
VCCSUS3_3_005 VCCIO_020 VCCASW_012

1
+VCCA_DPLLA AB1 BJ36 Close to BT35 AG40 AN24
VCCADPLLA VCCSUS3_3_006 VCCIO_021 VCCASW_013
1

Close to AV28 BK36 SC17 AG41 AN26 Close to AJ24, AN22


BC189 100mA up VCCSUS3_3_007 BM36 .1U-16VY-04-X-O VCCIO_007 VCCASW_014 AN28
VCCSUS3_3_008 100mA up VCCASW_015

2
.1U-16VY-04 +VCCA_DPLLB AC2 AT40 AR24
VCCADPLLB VCCSUS3_3_009 VCCASW_016
2

USB Classic Filter AU38 U56 AR26


VCCSUS3_3_010 U31 GND VCCAPLLSATA VCCASW_017 AR28
VCCSUS3_3_001 BA38 VCCASW_018 AR30
100mA up VCCIO_019 VCCASW_019
For platform not supporting AR36
GND AV40 B53 VCCASW_020 AR38
VCCDSW3_3 deep sleep connect directly to +3VSB. V_CPUVTT VCCAPLLEXP VCCASW_021 AU30
D55 1 +VCCIPL_PLL_PCH C54 VCCASW_022 AU36
V_PROC_IO TP15 VCCAFDIPLL VCCASW_023
20100929 B56
V_1P05_PCH V_PROC_IO_NCTF 1 +VCCCLK_PLL_PCH AL5
Change By Andy lu STP37 VCCACLK

1
L9 0-08 A39 V_1P1_USB Close to D55
1 2 +VCCA_DPLLA DCPSUS_03 AA32 PCH_TP24 1 VBAT_IO MC77 BC186 A19 AU34
DCPSUS_01 STP50 VCCAPLLDMI2 VCCASW_003
10U-10VY-08 .1U-16VY-04-O AV36
VCCASW_002

2
MAX <1mA
1

Close to AB1 BU42 AU32


MC54 MC61 VCCRTC VCCASW_001
10U-10VY-08 1U-10VY-06-O GND GND
2

BR54 20100929 AE15


DCPRTC VCCDIFFCLKN_01

1
BT56 V_1P5_RTC_INT Close to BU42 AE17
GND GND DCPRTC_NCTF MC71
Change By Andy lu VCCDIFFCLKN_02 AG15
L10 0-08 1U-10VY-06 VCCDIFFCLKN_03 AJ20 +V_1P05_PCH_SRC
VCCCLKDMI

2
1 2 +VCCA_DPLLB AT41 PCH_TP25 1 STP52 AE40
DCPSUS_02 VCCIO_018 AC20
10 of 12 VCCSSC_01
1

Close to AC1 AV41 PCH_TP26 1 STP55 GND AE20


MC55 MC62 DCPSUSBYP VCCSSC_02
10U-10VY-08 1U-10VY-06-O BA46 PCH_DCPSST
DCPSST
2

B B
AV24
VCCIO_001
1

1
Close to BA46 Close to BR54 Close to A39 AV26
GND GND SC19 BC188 BC173 VCCIO_002 AY25
U1CPT VCCIO_003
L8 0-08 .1U-16VY-04-X-O .1U-16VY-04 .1U-16VY-04-O AY27
VCCIO_004
2

2
1 2 +V_1P05_PCH_SRC
1

Close to AJ20 GND GND GND V36


MC53 MC60 VCCIO_013
10U-10VY-08 1U-10VY-06-O Y36
VCCIO_012
2

AJ38
VCCIO_011
GND GND 9 of 12
Y28
VCCIO_014

U1CPT

VCC3 VCC3 V_1P05_PCH


L11 FB120-06
1 2 +V_3P3_DAC
1

1
A A
MC58 C37 SC20 MC57 MC51 MC79 MC78 SC16 SC18
10U-10VY-08-O 1U-10VY-06 .1U-16VY-04-X-O 10U-10VY-08 10U-10VY-08 1U-10VY-06 1U-10VY-06 1U-10VY-06-X-O 1U-10VY-06-X-O
2

2
GND GND
GND GND
Elitegroup Computer Systems
Title
PCH - PWR
Size Document Number Rev
Custom H61H2-M12 1.0
Date: Wednesday, July 13, 2011 Sheet 18 of 29
5 4 3 2 1
A
B
C
D

5
5

L12 L33 BC15 A26


L17 VSS_0231 TP3 AE49 BC20 VSS_0125 VSS_0005 A29
L38 VSS_0232 TP13 BA36 BC27 VSS_0126 VSS_0006 A42
L41 VSS_0233 TP17 AY36 BC31 VSS_0127 VSS_0007 A49
L43 VSS_0234 TP18 Y14 BC36 VSS_0128 VSS_0008 A9
M20 VSS_0235 TP19 Y12 BC38 VSS_0129 VSS_0009 AA20
M22 VSS_0236 TP20 P22 BC47 VSS_0130 VSS_0010 AA22
M25 VSS_0237 TP1 M38 BC9 VSS_0131 VSS_0011 AA24
M27 VSS_0238 TP4 P25 BD25 VSS_0132 VSS_0012 AA26
M31 VSS_0239 VSS_0296 R25 BD33 VSS_0133 VSS_0013 AA28
VSS_0240 VSS_0295 P36 BF12 VSS_0134 VSS_0014 AA30
VSS_0294 R36 BF20 VSS_0135 VSS_0015 AA38
VSS_0293 L31 BF25 VSS_0136 VSS_0016 AB11
T52 TP2 L36 BF33 VSS_0137 VSS_0017 AB15
T6 VSS_0260 TP5 AL44 BF41 VSS_0138 VSS_0018 AB40
U11 VSS_0261 VSS_0292 AL43 BF43 VSS_0139 VSS_0019 AB41
U15 VSS_0262 VSS_0291 BF46 VSS_0140 VSS_0020 AB43
U17 VSS_0263 BF52 VSS_0141 VSS_0021 AB47
U20 VSS_0264 AE41 BF6 VSS_0142 VSS_0022 AB52
U22 VSS_0265 TP14 AE43 BG22 VSS_0143 VSS_0023 AB57
U25 VSS_0266 TP15 BG25 VSS_0144 VSS_0024 AB6
U27 VSS_0267 BG27 VSS_0145 VSS_0025 AC22
U33 VSS_0268 BA27 BG31 VSS_0146 VSS_0026 AC34
U36 VSS_0269 TP11 BG33 VSS_0147 VSS_0027 AC36
U38 VSS_0270 BG36 VSS_0148 VSS_0028 AC38
U41 VSS_0271 BG38 VSS_0149 VSS_0029 AC4
VSS_0272 VSS_0150 VSS_0030

GND
U47 BH52 AC54
U53 VSS_0273 BH6 VSS_0151 VSS_0031 AE14
V20 VSS_0274 BJ1 VSS_0152 VSS_0032 AE18
V38 VSS_0275 BJ15 VSS_0153 VSS_0033 AE22
V6 VSS_0276 BM46 BK20 VSS_0154 VSS_0034 AE26
VSS_0277 TP10 VSS_0155 VSS_0035

4
4

W1 BK41 AE38
W55 VSS_0278 AG12 BK52 VSS_0156 VSS_0036 AE4
W57 VSS_0279 L_BKLTCTL AG18 BK6 VSS_0157 VSS_0037 AE47
Y11 VSS_0280 L_BKLTEN AG17 BM10 VSS_0158 VSS_0038 AE8
Y15 VSS_0281 L_VDD_EN BM12 VSS_0159 VSS_0039 AE9
Y38 VSS_0282 BM16 VSS_0160 VSS_0040 AF52
Y40 VSS_0283 BM22 VSS_0161 VSS_0041 AF6
Y43 VSS_0284 BM23 VSS_0162 VSS_0042 AG11
Y46 VSS_0285 BM26 VSS_0163 VSS_0043 AG14
Y47 VSS_0286 BM28 VSS_0164 VSS_0044 AG20
Y49 VSS_0287 BM32 VSS_0165 VSS_0045 AG22
Y52 VSS_0288 BM40 VSS_0166 VSS_0046 AG30
Y6 VSS_0289 BM42 VSS_0167 VSS_0047 AG36
VSS_0290 BM48 VSS_0168 VSS_0048 AG43
BM5 VSS_0169 VSS_0049 AG44
A4 BN31 VSS_0170 VSS_0050 AG46
A6 VSS_NCTF_001 BN47 VSS_0171 VSS_0051 AG5
B2 VSS_NCTF_002 BN6 VSS_0172 VSS_0052 AG50
BM1 VSS_NCTF_003 BP3 VSS_0173 VSS_0053 AG53
BM57 VSS_NCTF_004 BP33 VSS_0174 VSS_0054 AH52
BP1 VSS_NCTF_005 BP35 VSS_0175 VSS_0055 AH6
BP57 VSS_NCTF_006 BR22 VSS_0176 VSS_0056 AJ22
BT2 VSS_NCTF_007 BR52 VSS_0177 VSS_0057 AJ30
BU4 VSS_NCTF_008 BU19 VSS_0178 VSS_0058 AJ57
BU52 VSS_NCTF_009 BU26 VSS_0179 VSS_0059 AK52
BU54 VSS_NCTF_010 BU29 VSS_0180 VSS_0060 AK6
BU6 VSS_NCTF_011 BU36 VSS_0181 VSS_0061 AL11
D1 VSS_NCTF_012 BU39 VSS_0182 VSS_0062 AL18
F1 VSS_NCTF_013 C19 VSS_0183 VSS_0063 AL20
VSS_NCTF_014 C32 VSS_0184 VSS_0064 AL22
C39 VSS_0185 VSS_0065 AL26
C4 VSS_0186 VSS_0066 AL30
AY22 D15 VSS_0187 VSS_0067 AL36
C12 VSS_0004 D23 VSS_0188 VSS_0068 AL41

3
3

AE56 VSS_0003 D3 VSS_0189 VSS_0069 AL46


BR36 VSS_0001 D35 VSS_0190 VSS_0070 AL47
AU2 VSS_0002 D43 VSS_0191 VSS_0071 AM3
VSSADAC D45 VSS_0192 VSS_0072 AM52
E19 VSS_0193 VSS_0073 AM57
A54 E39 VSS_0194 VSS_0074 AN11
A52 TS_VSS1 E54 VSS_0195 VSS_0075 AN12
F57 TS_VSS2 E6 VSS_0196 VSS_0076 AN15
D57 TS_VSS3 E9 VSS_0197 VSS_0077 AN17
TS_VSS4 VSS_0198 VSS_0078
GND

12 of 12 F10 AN18
F12 VSS_0199 VSS_0079 AN20
F16 VSS_0200 VSS_0080 AN30
F22 VSS_0201 VSS_0081 AN36
VSS_0202 VSS_0082
PCHL

F26 AN4
U1CPT

F32 VSS_0203 VSS_0083 AN43


F33 VSS_0204 VSS_0084 AN47
F35 VSS_0205 VSS_0085 AN54
F36 VSS_0206 VSS_0086 AN9
F40 VSS_0207 VSS_0087 AR20
F42 VSS_0208 VSS_0088 AR22
F46 VSS_0209 VSS_0089 AR52
F48 VSS_0210 VSS_0090 AR6
F50 VSS_0211 VSS_0091 AT15
F8 VSS_0212 VSS_0092 AT18
VSS_0213 VSS_0093 AT43
VSS_0094 AT47
AV18 VSS_0095 AT52
AV22 VSS_0104 VSS_0096 AT6
AV34 VSS_0105 VSS_0097 AT8
AV38 VSS_0106 VSS_0098 AU24
AV47 VSS_0107 VSS_0099 AU26
AV6 VSS_0108 VSS_0100 AU28
AW57 VSS_0109 VSS_0101 AU5
VSS_0110 VSS_0102
2
AY38 AV12
2

AY6 VSS_0111 VSS_0103


B23 VSS_0112 BA49
BA11 VSS_0113 VSS_0119 BB1
BA12 VSS_0114 VSS_0120 BB3
BA31 VSS_0115 VSS_0121 BB52
BA41 VSS_0116 VSS_0122 BB6
BA44 VSS_0117 VSS_0123 BC14
VSS_0118 VSS_0124
M33
VSS_0241 M36
G54 VSS_0242 M46
H15 VSS_0214 VSS_0243 M52
H20 VSS_0215 VSS_0244 M57
H22 VSS_0216 VSS_0245 M6
H25 VSS_0217 VSS_0246 M8
VSS_0218 VSS_0247
Title

Size

H27 M9
Date:

H33 VSS_0219 VSS_0248 N4


Custom

H6 VSS_0220 VSS_0249 N54


J1 VSS_0221 VSS_0250 R11
J33 VSS_0222 VSS_0251 R15
J46 VSS_0223 VSS_0252 R17
J48 VSS_0224 VSS_0253 R22
J5 VSS_0225 VSS_0254 R4
J53 VSS_0226 VSS_0255 R41
K52 VSS_0227 VSS_0256 R43
Document Number

K6 VSS_0228 VSS_0257 R46


K9 VSS_0229 VSS_0258 R49
VSS_0230 VSS_0259
Wednesday, July 13, 2011

11 of 12
GND
GND

1
1

PCHK
U1CPT

PCH - GND

Sheet
H61H2-M12
19
of
29
Rev
Elitegroup Computer Systems

1.0
A
B
C
D
5 4 3 2 1

3VSB VCC3 +12V


PCI-E X16 Slot SPEC.: PCI-E X1 Slot SPEC.: +12V +12V

+VCC3/S0/3A +VCC3/S0/3A VCC3 VCC3


+V12/S0/5.5A B1
PCIEX16
A1
+V12/S0/0.5A 3VSB
GND PCIE1
+3VSB/0.375A B2 12V PRSNT1* A2 +3VSB/0.375A B1 A1
B3 12V 12V A3 B2 12V_A PRSNT1* A2
B4 12V 12V A4 B3 12V_B 12V_C A3
SMBCLK B5 GND GND A5 B4 12V_D 12V_E A4
7,8,16,26 SMBCLK SMCLK JTAG2 GND1 GND2
SMBDATA B6 A6 SMBCLK B5 A5
7,8,16,26 SMBDATA SMDAT JTAG3 SMCLK JTAG2
B7 A7 SMBDATA B6 A6
D
B8 GND JTAG4 A8 B7 SMDAT JTAG3 A7 D
B9 3.3V JTAG5 A9 B8 GND3 JTAG4 A8
B10 JTAG1 3.3V A10 B9 3.3V_A JTAG5 A9
PCIE_WAKE_L B11 3.3VAUX 3.3V A11 PCIE_RST B10 JTAG1 3.3V_B A10
16,26 PCIE_WAKE_L WAKE# PWRGD PCIE_WAKE_L B11 3.3VAUX 3.3V_C A11 PCIE_RST
________ KEY ________ WAKE# PWRGD
B12 A12 ________ KEY ________
BC74 .22U-16V-04 B13 RSVD_A GND A13 PEX16_100M_P B12 A12
GND REFCLK_+_H PEX16_100M_P 15 RSVD_A GND4
PEG_TX_P0 2 1 PEG_TX_C_P0 B14 A14 PEX16_100M_N BC73 .1U-10VX-04 B13 A13 PEX1A_100M_P
3 PEG_TX_P0 HSOP0_H REFCLK_-_L PEX16_100M_N 15 GND5 REFCLK_+_H PEX1A_100M_P 15
PEG_TX_N0 2 1 PEG_TX_C_N0 B15 A15 14 PEX1A_TX_P1 PEX1A_TX_P1 2 1PEX1A_TX_C_P1 B14 A14 PEX1A_100M_N
3 PEG_TX_N0 HSON0_L GND HSOP0_H REFCLK_-_L PEX1A_100M_N 15
BC71 .22U-16V-04 B16 A16 PEG_RX_P0 14 PEX1A_TX_N1 PEX1A_TX_N1 2 1PEX1A_TX_C_N1 B15 A15
B17 GND HSIP0_H A17 PEG_RX_N0 PEG_RX_P0 3 B16 HSON0_L GND6 A16 PEX1A_RX_P1
PRSNT2*_B17 HSIN0_L PEG_RX_N0 3 GND7 HSIP0_H PEX1A_RX_P1 14
B18 A18 BC70 .1U-10VX-04 B17 A17 PEX1A_RX_N1 PEX1A_RX_N1 14
BC78 .22U-16V-04 GND GND B18 PRSNT2# HSIN0_L A18
____________________ GND8 GND9
PEG_TX_P1 2 1 PEG_TX_C_P1 B19 A19
3 PEG_TX_P1 HSOP1_H RSVD_B
PEG_TX_N1 2 1 PEG_TX_C_N1 B20 A20 PCIEX1-W
3 PEG_TX_N1 HSON1_L GND
BC79 .22U-16V-04 B21 A21 PEG_RX_P1
BC82 .22U-16V-04 B22 GND HSIP1_H A22 PEG_RX_N1 PEG_RX_P1 3 GND GND
PEG_TX_P2 2 1 PEG_TX_C_P2 B23 GND HSIN1_L A23 PEG_RX_N1 3
3 PEG_TX_P2 HSOP2_H GND
PEG_TX_N2 2 1 PEG_TX_C_N2 B24 A24 PCI-E X1 A
3 PEG_TX_N2 HSON2_L GND
BC84 .22U-16V-04 B25 A25 PEG_RX_P2
BC88 .22U-16V-04 B26 GND HSIP2_H A26 PEG_RX_N2 PEG_RX_P2 3
PEG_TX_P3 2 1 PEG_TX_C_P3 B27 GND HSIN2_L A27 PEG_RX_N2 3
3 PEG_TX_P3 HSOP3_H GND
PEG_TX_N3 2 1 PEG_TX_C_N3 B28 A28
3 PEG_TX_N3 HSON3_L GND
BC90 .22U-16V-04 B29 A29 PEG_RX_P3
B30 GND HSIP3_H A30 PEG_RX_N3 PEG_RX_P3 3
B31 RSVD_C HSIN3_L A31 PEG_RX_N3 3
B32 PRSNT2*_B31 GND A32
BC97 .22U-16V-04 GND RSVD_D
____________________
PEG_TX_P4 2 1 PEG_TX_C_P4 B33 A33
3 PEG_TX_P4 HSOP4_H RSVD_E
C PEG_TX_N4 2 1 PEG_TX_C_N4 B34 A34 C
3 PEG_TX_N4 HSON4_L GND
BC100 .22U-16V-04 B35 A35 PEG_RX_P4
BC104 .22U-16V-04 B36 GND HSIP4_H A36 PEG_RX_N4 PEG_RX_P4 3
PEG_TX_P5 2 1 PEG_TX_C_P5 B37 GND HSIN4_L A37 PEG_RX_N4 3
3 PEG_TX_P5
PEG_TX_N5 2 1 PEG_TX_C_N5 B38 HSOP5_H GND A38
PCI-E X1 Slot SPEC.: +12V +12V
3 PEG_TX_N5
BC106 .22U-16V-04 B39 HSON5_L GND A39 PEG_RX_P5 +VCC3/S0/3A VCC3 VCC3
B40 GND HSIP5_H A40 PEG_RX_P5 3
PEG_TX_P6
BC110
2
.22U-16V-04
1 PEG_TX_C_P6 B41 GND HSIN5_L A41
PEG_RX_N5
PEG_RX_N5 3 +V12/S0/0.5A 3VSB PCIE2
3 PEG_TX_P6
PEG_TX_N6 2 1 PEG_TX_C_N6 B42 HSOP6_H GND A42 +3VSB/0.375A B1 A1
3 PEG_TX_N6 HSON6_L GND 12V_A PRSNT1*
BC108 .22U-16V-04 B43 A43 PEG_RX_P6 B2 A2
BC112 .22U-16V-04 B44 GND HSIP6_H A44 PEG_RX_N6 PEG_RX_P6 3 B3 12V_B 12V_C A3
PEG_TX_P7 2 1 PEG_TX_C_P7 B45 GND HSIN6_L A45 PEG_RX_N6 3 B4 12V_D 12V_E A4
3 PEG_TX_P7 HSOP7_H GND GND1 GND2
PEG_TX_N7 2 1 PEG_TX_C_N7 B46 A46 SMBCLK B5 A5
3 PEG_TX_N7 HSON7_L GND SMCLK JTAG2
BC117 .22U-16V-04 B47 A47 PEG_RX_P7 SMBDATA B6 A6
B48 GND HSIP7_H A48 PEG_RX_N7 PEG_RX_P7 3 B7 SMDAT JTAG3 A7
B49 PRSNT2*_B48 HSIN7_L A49 PEG_RX_N7 3 B8 GND3 JTAG4 A8
BC121 .22U-16V-04 GND GND B9 3.3V_A JTAG5 A9
____________________ JTAG1 3.3V_B
PEG_TX_P8 2 1 PEG_TX_C_P8 B50 A50 B10 A10
3 PEG_TX_P8 HSOP8_H RSVD_F 3.3VAUX 3.3V_C
PEG_TX_N8 2 1 PEG_TX_C_N8 B51 A51 PCIE_WAKE_L B11 A11 PCIE_RST
3 PEG_TX_N8 HSON8_L GND WAKE# PWRGD
BC123 .22U-16V-04 B52 A52 PEG_RX_P8 ________ KEY ________
BC126 .22U-16V-04 B53 GND HSIP8_H A53 PEG_RX_N8 PEG_RX_P8 3 B12 A12
PEG_TX_P9 2 1 PEG_TX_C_P9 B54 GND HSIN8_L A54 PEG_RX_N8 3 BC72 .1U-10VX-04 B13 RSVD_A GND4 A13 PEX1B_100M_P
3 PEG_TX_P9 HSOP9_H GND GND5 REFCLK_+_H PEX1B_100M_P 15
PEG_TX_N9 2 1 PEG_TX_C_N9 B55 A55 14 PEX1B_TX_P4 PEX1B_TX_P4 2 1PEX1B_TX_C_P4 B14 A14 PEX1B_100M_N
3 PEG_TX_N9 HSON9_L GND HSOP0_H REFCLK_-_L PEX1B_100M_N 15
BC130 .22U-16V-04 B56 A56 PEG_RX_P9 14 PEX1B_TX_N4 PEX1B_TX_N4 2 1PEX1B_TX_C_N4 B15 A15
BC135 .22U-16V-04 B57 GND HSIP9_H A57 PEG_RX_N9 PEG_RX_P9 3 B16 HSON0_L GND6 A16 PEX1B_RX_P4
GND HSIN9_L PEG_RX_N9 3 GND7 HSIP0_H PEX1B_RX_P4 14
PEG_TX_P10 2 1 PEG_TX_C_P10 B58 A58 BC75 .1U-10VX-04 B17 A17 PEX1B_RX_N4 PEX1B_RX_N4 14
3 PEG_TX_P10 HSOP10_H GND PRSNT2# HSIN0_L
PEG_TX_N10 2 1 PEG_TX_C_N10 B59 A59 B18 A18
3 PEG_TX_N10 HSON10_L GND GND8 GND9
BC138 .22U-16V-04 B60 A60 PEG_RX_P10
BC146 .22U-16V-04 B61 GND HSIP10_H A61 PEG_RX_N10 PEG_RX_P10 3 PCIEX1-W
PEG_TX_P11 2 1 PEG_TX_C_P11 B62 GND HSIN10_L A62 PEG_RX_N10 3
B 3 PEG_TX_P11 HSOP11_H GND 20100909 B
PEG_TX_N11 2 1 PEG_TX_C_N11 B63 A63 GND GND
3 PEG_TX_N11 HSON11_L GND Add By Andy lu
BC142 .22U-16V-04 B64 A64 PEG_RX_P11
BC147 .22U-16V-04 B65 GND HSIP11_H A65 PEG_RX_N11 PEG_RX_P11 3
GND HSIN11_L PEG_RX_N11 3 PCI-E X1 B
PEG_TX_P12 2 1 PEG_TX_C_P12 B66 A66
3 PEG_TX_P12 HSOP12_H GND
PEG_TX_N12 2 1 PEG_TX_C_N12 B67 A67
3 PEG_TX_N12 HSON12_L GND
BC153 .22U-16V-04 B68 A68 PEG_RX_P12
BC158 .22U-16V-04 B69 GND HSIP12_H A69 PEG_RX_N12 PEG_RX_P12 3
PEG_TX_P13 2 1 PEG_TX_C_P13 B70 GND HSIN12_L A70 PEG_RX_N12 3
3 PEG_TX_P13 HSOP13_H GND
PEG_TX_N13 2 1 PEG_TX_C_N13 B71 A71 20100929
3 PEG_TX_N13 HSON13_L GND
BC161 .22U-16V-04 B72 A72 PEG_RX_P13
BC164 .22U-16V-04 B73 GND HSIP13_H A73 PEG_RX_N13 PEG_RX_P13 3 Change By Andy lu
PEG_TX_P14 2 1 PEG_TX_C_P14 B74 GND HSIN13_L A74 PEG_RX_N13 3
3 PEG_TX_P14 HSOP14_H GND
PEG_TX_N14 2 1 PEG_TX_C_N14 B75 A75
3 PEG_TX_N14 HSON14_L GND
BC163 .22U-16V-04 B76 A76 PEG_RX_P14 3VSB VCC3 +12V
BC169 .22U-16V-04 B77 GND HSIP14_H A77 PEG_RX_N14 PEG_RX_P14 3
PEG_TX_P15 2 1 PEG_TX_C_P15 B78 GND HSIN14_L A78 PEG_RX_N14 3
3 PEG_TX_P15 HSOP15_H GND
PEG_TX_N15 2 1 PEG_TX_C_N15 B79 A79
3 PEG_TX_N15 HSON15_L GND

1
BC168 .22U-16V-04 B80 A80 PEG_RX_P15
B81 GND HSIP15_H A81 PEG_RX_N15 PEG_RX_P15 3 BC63 BC61 BC59
CRB V0.7 B82 PRSNT2*_B81 HSIN15_L A82 PEG_RX_N15 3 .1U-16VY-04-O .1U-16VY-04-O .1U-16VY-04-O
RSVD_G GND

2
Change to .22U-X7-04
FROM SIO PCIRST#
PCIEX16-GY PCIE_RST
SIO_PCIRST1_L 23,26
GND GND GND GND GND

1 BC64
10P-04-O PCI-E X1 A Decoupling Cap.
2

20100929
A +12V VCC3 VCC3 +12V A
Change By Andy lu GND
1

1
1

+ +
EC12
470U-16DE
EC13
1000U-6.3DL
BC62
.1U-16VY-04-O
BC58
.1U-16VY-04-O
Elitegroup Computer Systems
2

Title

GND GND GND GND Slot - PCI-EX16/PCI-EX1


Size Document Number Rev
Between PEX16 & PEX1A Custom H61H2-M12 1.0
Date: Wednesday, July 13, 2011 Sheet 20 of 29
5 4 3 2 1
5 4 3 2 1

D
0504'11 Jayson : 0504'11 Jayson : D
DEL DVI DEL DVI
0504'11 Jayson :
DEL DVI Connector

DVI

0504'11 Jayson :
DEL DVI

C C

0504'11 Jayson :
DEL DVI
1202'10 Jayson :
Del HDMI
0504'11 Jayson :
DEL Fuse & Diode

B USBVCC1 USBVCC1 USBVCC1 B


20100929
Change By Andy lu

PS2
1
1
3
5
7

RN1 BC31 COM NRIA RI#


4.7K-8P4R .1U-16VY-04-O NDCDA 1 2 NRXDA
2

NTXDA 3 4 NDTRA Normal -12V High


PSKBM +12V D8 VCC 5 6 NDSRA
2
4
6
8

23 KDATA KDATA 1 2 1 1N4148-S U8 NRTSA 7 8 NCTSA Active +12V Low RI_L


FB8 0-SH-06-O 2 KBDATA P N 1 20 NRIA 9 RI_L 16
3 NC1 12V VCC
FB7 0-SH-06-O 4 GND -RIA 19 2 NRIA H5X2-P10E-B
KCLK 1 2 5 VCC 23 -RIA -DTRA 15 RA1 RY1 6 NDTRA R68
23 KCLK KBCLK 23 -DTRA DA2 DY2

C
6 13 -CTSA 18 3 NCTSA 1K-04
FB10 0-SH-06-O NC2 HOLE1 14 23 -CTSA TXDA 13 RA2 RY2 8 NTXDA CN2 180P-8P4C-O NRIA 1 2 B
HOLE2 23 TXDA DA3 DY3
23 MDATA MDATA 1 2 7 15 -RTSA 16 5 NRTSA NRIA 7 8 QN1
MSDATA HOLE3 23 -RTSA DA1 DY1

1
8 16 RXDA 14 7 NRXDA NCTSA 5 6 2N3904-S
NC3 HOLE4 23 RXDA RA4 RY4

E
1
9 17 -DSRA 17 4 NDSRA NDSRA 3 4 BC67 R67
FB9 0-SH-06-O 10 GND1 HOLE5 23 -DSRA -12V -DCDA 12 RA3 RY3 9 NDCDA NRTSA 1 2 .1U-16VY-04-O 2.2K-04
MCLK 1 2 11 VCC1 23 -DCDA RA5 RY5
23 MCLK MSCLK

2
12 N P 10 11 CN3 180P-8P4C-O
NC4 -12V GND NDTRA 7 8
8
6
4
2

PS2-KB-MS D7 NRXDA 5 6
CN1 1N4148-S ST75185CT-S NTXDA 3 4
180P-8P4C NDCDA 1 2
7
5
3
1

A A

Elitegroup Computer Systems


Title
COM&PS2
Size Document Number Rev
Custom H61H2-M12 1.0
Date: Wednesday, July 13, 2011 Sheet 21 of 29
5 4 3 2 1
5 4 3 2 1

3VSB 3VSB
USBVCC1 USBVCC1
USBVCC1 USBVCC1 USBVCC1
0504'11 Jayson :
F_USB1
USBPWR1 USBPWR1 USBX2 From USBPWR2 change to USBPWR1 USBPWR_F / R
VCC
VCC VCC
DIMM_5VDUAL DIMM_5VDUAL 1-2 VCC *
USBPWR1 USBPWR1
F_USB1 2-3 DIMM_5VDUAL

1
USB 1 2 BC116
1 5 USBF2- 3 1 2 4 USBF3- .1U-16VY-04-O
USB VCC1 VCC 3 4

2
USBR4- 2 6 USBR5- USBF2+ 5 6 USBF3+
USB_F0+ USBR4+ 3 -DATA0 -DATA1 7 USBR5+ 7 5 6 8
14 USB_P0 +DATA0 +DATA1 7 8
14 USB_N0 USB_F0- 4 8 10
D
USB_F1+ GND1 GND 10 D
14 USB_P1
14 USB_N1 USB_F1- G1 G3 H5X2-P9E-W
G2 HOLE2 HOLE G4
USB_F2+ HOLE3 HOLE1
14 USB_P2
14 USB_N2 USB_F2- USBX2
USB_F3+
14
14
USB_P3
USB_N3 USB_F3- USBPWR1 USB x2 & PS/2 & USBLAN F_USB1&2
BC165 .1U-16VY-04
14 USB_P4 USB_R4+ AUGND2 AUGND2 1 2
14 USB_N4 USB_R4-
USB_R5+ USBVCC1 U12 VCC DIMM_5VDUAL VCC DIMM_5VDUAL
14 USB_P5
14 USB_N5 USB_R5- BC29 .1U-16VY-04 USBF2- 1 4 USBF3+ Defaul(1-2) Defaul(1-2)
20100929 1 2 2 5 VCC_DUAL_R1 VCC_DUAL_F1
USBF3- 3 6 USBF2+ USBPWR_R1 USBPWR_F1
Change By Andy lu U3 1 1
0504'11 Jayson : 1 1
DEL SLP_S3_N USB_R4+ USBR4+ USBR5+ 1 4 USBR4- ESD-6P 2 2
USB_R4- USBR4- 2 5 2 3 2 3
USB_R5+ USBR5+ USBR4+ 3 6 USBR5- 3 3
USB_R5- USBR5-
ESD-6P H3X1-WH USBPWR_R1(1-2) H3X1-WH USBPWR_F1(1-2)
20100929
AUGND2
Change By Andy lu

USB_F2+ USBF2+
USB_F2- USBF2-
USB_F3+ USBF3+ JP-W JP-W
F_USB2 USB_F3- USBF3-
0504'11 Jayson :
C ADD Jumper. C
USBPWR1 USBPWR1
SATA F_USB2
SATA_RX_N[2..5] 1 2
15 SATA_RX_N[2..5] 1 2
USBF0- 3 4 USBF1-
SATA_RX_P[2..5] USBF0+ 5 3 4 6 USBF1+
15 SATA_RX_P[2..5]
7 5 6 8 Power of USB VCC_DUAL_R1 VCC_DUAL_F1
SATA_TX_N[2..5] 7 8 10
15 SATA_TX_N[2..5] 10
SATA_TX_P[2..5] H5X2-P9E-W
15 SATA_TX_P[2..5] USBVCC1 R28 0-08 USBPWR1 R102 0-08
2 1 2 1

USBPWR1 USBVCC1 2 1 USBPWR1 2 1


BC132 .1U-16VY-04
Layout Note:
SATA 1 2 F1 FUSE-1.1A-18 F2 FUSE-1.1A-18

SATA2.0 4.5/7.5/15 in 90 Ω ±17.5% U14


USBF0- 1 4 USBF1+ 80 mils 80 mils
2 5
SATA2 USBF1- 3 6 USBF0+
8
HOLE1

1
1 ESD-6P 0504'11 Jayson : + EC5 BC27 + EC26 BC115
GND 2 SATA_TX_P2_C C54 1 2 .01U-25VX-04 SATA_TX_P2 220U-16DE .1U-16VY-04 220U-16DE .1U-16VY-04
A+ 20100929 From SW_Power change to Jumper.
3 SATA_TX_N2_C C50 1 2 .01U-25VX-04 SATA_TX_N2
A- Change By Andy lu

2
4
GND 5 SATA_RX_N2_C C46 1 2 .01U-25VX-04 SATA_RX_N2
B- 6 SATA_RX_P2_C C41 1 2 .01U-25VX-04 SATA_RX_P2 USB_F0+ USBF0+ AUGND2
B+ 7 USB_F0- USBF0-
B
9 GND USB_F1+ USBF1+ B
HOLE2
1228'10 Jayson : 0504'11 Jayson :
USB_F1- USBF1- EC1,EC4 From 100U change to 220U. EC28 From 100U change to 220U.
SATA-7P2R-W

SATA1
8 0504'11 Jayson :
HOLE1 1
GND 2 SATA_TX_P3_C C53 1 2 .01U-25VX-04 SATA_TX_P3 SPI From SW_Power change to Jumper.
A+ 3 SATA_TX_N3_C C49 1 2 .01U-25VX-04 SATA_TX_N3 3VSB 3VSB_SPI
A- 4
GND 5 SATA_RX_N3_C C45 1 2 .01U-25VX-04 SATA_RX_N3 1
B- 6 SATA_RX_P3_C C40 1 2 .01U-25VX-04 SATA_RX_P3 3
B+ 7 2
GND SPI
1

9 BC194
HOLE2 D20 BAT54C-S .1U-16VY-04
SATA-7P2R-W SMD TYPE 16 SPI_MOSI SPI_MOSI
2

16 SPI_MISO SPI_MISO
SATA3 SMD TYPE socket: 11-127-008120 16 SPI_CS_L0 SPI_CS0_N
8 16 SPI_CLK SPI_CLK
HOLE1 1 ROM
GND 2 SATA_TX_P4_C C56 1 2 .01U-25VX-04 SATA_TX_P4 SPI_CSS 1 8
A+ 3 SATA_TX_N4_C C52 1 2 .01U-25VX-04 SATA_TX_N4 SPI_MOS_OO 2 CE# VCC 7 SPI_DC
A- 4 SPI_WP_L 3 SO HOLD# 6 SPI_CLKK
GND 5 SATA_RX_N4_C C47 1 2 .01U-25VX-04 SATA_RX_N4 4 WP# SCK 5 SPI_MOS_II
B- 6 SATA_RX_P4_C C42 1 2 .01U-25VX-04 SATA_RX_P4 GND SI
B+ 7 SPI-ROM-SOCKET 3VSB_SPI
9 GND R233 1K-04
HOLE2 SPI_DC 2 1
SATA-7P2R-W R234 10K-04
A SPI_DEBUG SPI_WP_L 2 1 A
SATA4 1 2
8 3 1 2 4
HOLE1 1 5 3 4 6
GND 5 6 RN15
2 SATA_TX_P5_C C55 1 2 .01U-25VX-04 SATA_TX_P5 7 8
A+
A-
3
4
SATA_TX_N5_C C51 1 2 .01U-25VX-04 SATA_TX_N5 7 8 SPI_MOSI
SPI_CLK
7
5
8
6
SPI_MOS_II
SPI_CLKK
Elitegroup Computer Systems
GND 5 SATA_RX_N5_C C44 1 2 .01U-25VX-04 SATA_RX_N5 H4X2-B SPI_MISO 3 4 SPI_MOS_OO
B- 6 SATA_RX_P5_C C43 1 2 .01U-25VX-04 SATA_RX_P5 SPI_CS0_N 1 2 SPI_CSS Title
B+ FOR DEBUG USE
7
9 GND
# 若上SMD SPI ROM, MP or A5後不上ROM Socket. 33-8P4R USB/SATA/SPI
HOLE2 Size Document Number Rev
SATA-7P2R-W Custom H61H2-M12 1.0
Date: Wednesday, July 13, 2011 Sheet 22 of 29
5 4 3 2 1
5 4 3 2 1

External Connection R96 1 2 10-04 5VSB_ATX Thermal Sensing


3VSB 1 2
3VSB
5VSB 5VSB MC29 1U-10VY-06
VCC3 VCC3 TP6 1 D2 1213'10 Jayson : MC28 1U-10VY-06-O
VCC VCC TP5 1 D1 change to 1U-06 HM_VREF 1 2
VBAT_IO VBAT_IO HM_VREF VBAT_IO_S
V_1P5_SM V_1P5_SM
VCORE VCORE TP4 1
VAXG MC35 1 2 1U-10VY-06
VAXG
VBAT_IO_S R92 1 2 1M-04
BC102 1 2 .01U-25VX-04-O RSMRST- Voltage Sensing

HM_AGND
LRESET-
16 PCH_PLTRST_L SERIRQ HM_VIN3 D13 1N4148-S
D 15 SER_IRQ D
LFRAME- HM_VIN2 P N ATX_PWRGD 1210'10 Jayson : HM_VIN1 ER28 1 2 10K-1-04 VCORE
16 LPC_FRAME_L
HM_VIN1 BC94 1 2 .1U-16VY-04-O
LAD[0..3] LPC PWROK
BC308,BC310,BC311
16 LPC_AD[0..3] 3VSB 預留不上
10U-10VY-08 1 2 MC14 PSON- HM_VIN2 ER32 1 2 10K-1-04 VAXG
PCICLK .1U-16VY-04 1 2 BC93 SLP3- BC96 1 2 .1U-16VY-04-O
15 SIO33M CLK_48M

48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
15 SIO48M U10 HM_VIN3 ER33 1 2 10K-1-04 V_1P5_SM
3VSBSW 1210'10 Jayson : BC99 1 2 .1U-16VY-04-O
12 3VSBSW-

3VSB
VIN1(Vcore)
VIN2(VLDT)
SUS_WARN2#/VIN3(VDIMM)

AGND(D-)
COPEN#(808A)/VIN4(808E)
CIRRX(808A)/VIN5(808E)
VREF
D1+
D2+

5VSB
VBAT
RSMRST#
PWOK
PSON#
S3#
PCIE_RST- Add 3VSB_IO
20,26 SIO_PCIRST1_L
CPU_RST-
4 SIO_PCIRST2_L
SLP4-
16 SLP4_L
PWSIN- ACPI
13 FP_PWRBTN_L
PWSOUT-
16 SIO_PWRBTN_L
4,11,16 SLP3_L SLP3-
PSON- 3VSB_IO 3VSB
13 PSON_L
PWROK
15,16 PWRGD
RSMRST- BIOS SELECTION
16 RSMRST_L
ATX_PWRGD TP1 1 SUS_ACK- 49 32 PWSOUT-
13 ATX_PWRGD SUS_ACK2#/VCORE_EN/GPIO30 PSOUT#/GPIO14

2
SMLK1_SIO_DATA R83 1 2 0-04-O SML1DATA 50 31 PWSIN-
KBRST- PECI R82 2 1 0-04 PECI_R 51 VLDT_EN/GPIO31/SDA PSIN#/GPIO27 30 SLP4- R103 D14
15 KBRST_L PECI/SDA/GPIO32 S5#
GA20 SMLK1_SIO_CLK R81 1 2 0-04-O SML1CLK 52 29 CPU_RST- 0-04 BAT54C-S-O
15 A20GATE GPIO33/SCL PCIRST2#
KDAT DCD- 53 28 PCIE_RST-
21 KDATA GPIO00/SDA/DCD# PCIRST1#

1
KCLK RI- 54 27 SLP_SUS-
21 KCLK KB/MS GPIO01/OVT#/RI#/CIRWB# SLP_SUS#/GPIO26/WDTRST#/RSTCON#

3
MDAT CTS- 55 26 CTRL0-
21 MDATA GPIO02/CIR_LED/CTS# ERP_CTRL0#
MCLK DTR- 56 25 I_VSB3V
21 MCLK GPIO03/CIRTX/DTR# I_VSB3V(808A)/3VSB(808E)
COM RTS- 57 24 3VSBSW
GPIO04/PWM/RTS#/STRAP_PWOK S3_Gate

1
LPCPME_L DSR- 58 23 G_LED1 BC107
16 LPC_PME_L GPIO05/BEEP/DSR# GPIO25/LEDVCC/WDTRST#
G_LED1 SOUT- 59 22 G_LED2
13 G_LED1 GPIO06/SOUT/STRAP4E_2E GPIO24/LEDVSB
G_LED2 SIN- 60 21 5VA_PWOK 1 TP8 .1U-16VY-04 EUP
13 G_LED2 GPIO07/CIRWB#/SIN DPWROK#/GPIO23/WDTRST#/FANIN3

2
H_SKTOCC_N CFAN_TAC1 61 20 ERP_CTRL1- 1 TP7
C
4,9 H_SKTOCC_L
THERMAL_ALERT Other CFAN_PWM1 62 FANIN1 ERP_CTRL1#/GPIO22/PWM 19 THERMAL_ALERT
C

15 THERMAL ALERT FANCTL1 GPIO21/FANIN3/OVT#


TP2 1 63 18 LPCPME_L W/O EUP W EUP
TP3 1 64 FANIN2/GPIO35 GPIO20/PME# 17 Sb
CFAN_TAC1 FANCTL2/GPIO34 SUS_WARN#/MCLK/GPIO13/CIRWB#
13 CFAN_TAC1
2 1
13 CFAN_PWM1
CFAN_PWM1
SMLK1_SIO_DATA
3VSB 3VSB_IO Sb V X

SUS_ACK#/MDAT/GPIO12
16 SMLK1_SIO_DATA
SMLK1_SIO_CLK
16 SMLK1_SIO_CLK HM R109 0-06-O
Sc X V

KDAT/GPIO10/FANIN3
PECI 5VSB 1 2 5VSB_ATX
4 PECI

KCLK/GPIO11/OVT#
Sd
21 -DCDA
DCD-
RI-
R244 0-08-O
page 12 X V
21 -RIA CTS- F71808AU
21 -CTSA DTR-
COM

LFRAME#
LRESET#
21 -DTRA

KBRST#
SERIRQ
RTS-

PCICLK
21 -RTSA

CLKIN
DSR-
Sc

3VCC

GA20
LAD0
LAD1
LAD2
LAD3

GND
21 -DSRA SOUT-
21 TXDA
SIN- 5VSB_ATX EUP
21 RXDA MCLK

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
MDAT 5VSB
VCC3
1 2 KCLK

1
BC92 .1U-16VY-04 KDAT KB / MS
GA20 R99
LRESET- KBRST- 10K-04

D
SERIRQ

2
LFRAME- R100 33K-04
LAD0 CTRL0- 1 2 G MP1
LPC LAD1 APM2315AC

S
1
LAD2 0224'11 Jayson : MC46
LAD3 R102 from 100k change to 33k.
B B
PCICLK 1U-10VY-06

2
CLK_48M 1 5VSB_ATX

1
BC98 BC101
10P-04-O 10P-04-O
2

2
Pull high & Pull low
RN3 4.7K-8P4R
PWROK 1 2 VCC3 1215'10 Jayson :
PSON- 3 4 5VSB_ATX Del R420,R421
PWSIN- 5 6 5VSB_ATX ,R422,R423
Power On Strapping 1213'10 Jayson : SLP_SUS- 7 8 3VSB
R79 1K-04-O 改成 RN15
select 4E
( PIN 59 ) SOUT- 1 2
PCIE_RST- R101 1 2 4.7K-04 3VSB
1231'10 Jayson :
LDC take the place of TPM. 1210'10 Jayson :
PECI R77 1 2 100K-04 Del R416
R80 1K-04 RN17 改電阻
( PIN 57 ) RTS- 1 2 CFAN_TAC1 BC87 1 2 470P-04-O
LPC DEBUG HEADER Electric Test
VCC3 5VSB
PWROK

1
A PIN NO. Symbol Value Description LDC R118 A
LAD3 1 2

D
LAD2 3 4 LFRAME- 4.7K-04
1 Configuration Register I/O port is 4E/4F.(Default) LAD1 5 6 PCIE_RST- MN2

2
PIN 59 STRAP4E_2E LAD0 7 8 CK_P_33M_LPC H_SKTOCC_N G 2N7002-S
9
CK_P_33M_LPC 15
Elitegroup Computer Systems

S
1
0 Configuration Register I/O port is 2E/2F. MC48
J5X2_2MM-10P BC150
.1U-16VY-04 1U-10VY-06-O Title
2

10-342-010181
PIN 57 STRAP_PWOK
1 PWOK(pin 35) for AMD(Default) SIO-F71808A
Size Document Number Rev
0 PWOK(pin 35) for Intel Custom H61H2-M12 1.0
Date: Wednesday, July 13, 2011 Sheet 23 of 29
5 4 3 2 1
5 4 3 2 1

External Connection MIC Bias


+5VA 5VSB
R62 0-06
1 2 D1
Cf Cc BAT54A-S-O
5VSB 5VSB
1 R3 1 2 3.3K-04-O LINE2_RR
LINE2_RR 25
VCC VCC +12V D5 U5 D6 LINE2-VREFO 3
1N4148-S-O 78L05-D-O 1N4148-S-O 2 R2 1 2 3.3K-04-O LINE2_LL
LINE2_LL 25
+12V +12V P N I O N P
VIN VOUT D2
BAT54A-S
VCC3 VCC3 Ch

GND
1
C31 1 R5 1 2 3.3K-04 MIC2_RR
MIC2_RR 25
.1U-16VY-04-O MIC2-VREFO 3
D D
2 R4 1 2 3.3K-04 MIC2_LL
MIC2_LL 25

G
2
16 HDA_RST_L AZ_RST- FB13 0-SH-06-O

1
1 2

1
16 HDA_BITCLK AZ_BIT_CLK FB6 0-SH-06-O EC9 C26 MIC1_VREFO-R R27 1 2 3.3K-04 MIC1_RR
MIC1_RR 25
1 2 100U-16DEL .1U-16VY-04

2
16 HDA_SYNC AZ_SYNC MIC1_VREFO-L R22 1 2 3.3K-04 MIC1_LL
MIC1_LL 25

2
AZ_SDAIN AUGND
16 HDA_SDIN0
AUGND AUGND
Cd
16 HDA_SDOUT AZ_SDOUT
Cj部份之 Vcap
電容請盡量靠近codec
VCAP

Cg Cj

1
AGND AUGND AUGND C22 2 1 47P-04-O C17
10U-10VY-08
PORT-F 25 MIC2_JD ER13 1 2 20K-1-04 LDOOUT

2
* VCC1.5 can remove for non-Intel G4X plateform MIC1_VREFO-R

1
25 LINE2_JD R33 1 2 39.2K-1-04 F_SENSE LINE2-VREFO Reserved for SI
PORT-E MIC2-VREFO EC1 AUGND
25 FRONT_L EC6 2 1 10U-25DE 10U-25DE

2
MIC1_VREFO-L 1201'10 By Jayson Modified.
25 FRONT_R EC8 2 1 10U-25DE
AUGND
C18 1 2 10U-6VX-08

+5VA
AUGND
C C

1
C19 BC30 BC36

CODEC1
10U-10VY-08 .1U-16VY-04 .1U-16VY-04-O

36

35

34

33

32

31

30

29

28

27

26

25

2
PORT-D_R

VrefOut-G
PORT-D_L

SENSE B

VrefOut-D

VrefOut-E

VREF FILT
VrefOut-F

VrefOut-C_L

VrefOut-B_L

AVSS1

AVDD1
AUGND AUGND AUGND AUGND

+5VA 37 24 C4 1 2 10U-6VX-08 LINE1_R LINE1_R 25


VrefOut-A PORT-C_R
38 23 C5 1 2 10U-6VX-08 LINE1_L LINE1_L 25
AVDD2 PORT-C_L
Cb 39 22 C2 1 2 10U-6VX-08 MIC1_R
PORT-A_L PORT-B_R MIC1_R 25
ER14 1 2 5.1K-1-04 JDREF 40 21 C3 1 2 10U-6VX-08 MIC1_L MIC1_L 25
VrefOut-H PORT-B_L
C25 2 1 47P-04-O 41 20
AUGND PORT-A_R CD-R
42 19
AVSS3 CD-G
43
Ca 18
PORT-G_L VT1705CE CD-L
44 17 C9 1 2 10U-6VX-08 MIC2_R
PORT-G_R PORT-F_R MIC2_R 25
45 16 C10 1 2 10U-6VX-08 MIC2_L
PORT-H_L PORT-F_L MIC2_L 25
46 15 EC4 1 2 100U-16DEL LINE2_R
B PORT-H_R PORT-E_R LINE2_R 25 B
47 14 EC7 1 2 100U-16DEL LINE2_L
S/PDIF IN / EAPD PORT-E_L LINE2_L 25
48 13 SENSE-A ER16 1 2 5.1K-1-04
S/PDIF-OUT XO / DVDD_IO SENSE A FRONT_JD 25 PORT-D
DVDD_CORE

DVDD_CORE
ER17 1 2 10K-1-04
BOM Difference

PC_BEEP
XI / DVSS

LINE1_JD 25 PORT-C

RESET#
SYNC
1 2 20K-1-04
DVSS

DVSS
ER18

BCLK
SDO MIC1_JD 25 PORT-B

SDI
AUGND

2
Location ALC662 VT1705CD VT1705CE C27
1

10

11

12
47P-04-O 沒用到可直接短路到VCC3

1
Ca ALC662-VC-GRS VT1705CD VT1705CE
VCC3 For Intel G4X HDMI support : 1.5V (pin1-2)
Cb 20K-1-04 5.1K-1-04 5.1K-1-04 AUGND
1

BC50 AZ_RST- For Normal link : 3.3V (pin2-3)


Cc V X X .1U-16VY-04
AZ_SYNC
2

Cd 2.2K-04 3.3K-04 3.3K-04 V_HDA_SEL VCC3


V_HDA_SEL

1
Ce 75-04 16-04 16-04
AZ_SDAIN C30
Cf X X V .1U-16VY-04-O

2
AZ_SDOUT AZ_BIT_CLK
Cg X V V C29 22P-04-O
1 2
Ch V V X 20100929
Change By Andy lu
Cj X X V
A A
Ck 75-04 33-04 33-04

When you change BOM, remember change GPI to inform


BIOS use different Verb-Table.
Elitegroup Computer Systems
Title
AUDIO VT1705/ALC662 (CHIP)
Size Document Number Rev
Custom H61H2-M12 1.0
Date: Wednesday, July 13, 2011 Sheet 24 of 29
5 4 3 2 1
5 4 3 2 1

External Connection

HDPANEL_DETECT
16 FP_AUD_DETECT

* HDPANEL_DETECT connect to SIO or SB GPIO


for AC97 Panel support
D D

REAR-AUDIO Non re-tasking for rear panel

24 LINE1_JD LINE1_JD 3
4 MIC2_LL
24 LINE1_L LINE1_L R26 1 2 1K-04 LINE1_LL 2
BLUE 24
24
MIC2_LL
MIC2_RR MIC2_RR FRONT-AUDIO VCC3
LINE1_R R24 1 2 1K-04 LINE1_RR 5
Line In LINE2_RR
24 LINE1_R 24 LINE2_RR
1 24 LINE2_LL LINE2_LL

1
AUDIOA

1
C16 C15 AUDIO-3P-HDA R56
20100929 100P-04-O 100P-04-O
Ce 10K-04
F_AUDIO
Change By Andy lu

2
24 MIC2_L R11 1 2 16-04 1 2
24 MIC2_R R10 1 2 16-04 3 4 HDPANEL_DETECT
AUGND AUGND 24 LINE2_R R21 1 2 16-04 5 6 MIC2_JD 24

1
24 FRONT_JD FRONT_JD 8 7 C28
9 R20 1 2 16-04 9 10 .1U-16VY-04
FRONT_L R7 1 2 33-04 FRONT_LL 7
LIME 24 LINE2_L LINE2_JD 24
24 FRONT_L

2
Line Out H5X2-P8E-B
24 FRONT_R FRONT_R R16 1 2 33-04 FRONT_RR 10 AUGND AUGND

1
6 1202'10 Jayson:

1
C AUDIOB C
Ck Vendor modified 16ohm.
1

1
1202'10 Jayson: C7 C8 AUDIO-3P-HDA R19 R18 C14 C13 C11 C12
Vendor modified 33ohm. 20100929 100P-04-O 100P-04-O 100P-04-O

2
Change By Andy lu
2

AUGND AUGND AUGND AUGND AUGND AUGND


AUGND AUGND 22K-04-O 100P-04-O
22K-04-O 100P-04-O 100P-04-O
24 MIC1_RR MIC1_RR
24 MIC1_LL MIC1_LL 20100929
Change By Andy lu
24 MIC1_JD MIC1_JD 13
14
MIC1_L R6 1 2 1K-04 12
PINK
24 MIC1_L
MIC1_R R1 1 2 1K-04 15
Mic In
24 MIC1_R
11
16
1

C6 C1 17
20100929 100P-04-O 100P-04-O AUDIOC
18

AUDIO-3P-HDA
Change By Andy lu
2

AUGND AUGND AUGND

B B

1203'10 Jayson: Del SPDIF-OUT

Line in

16 17

12 13 11 14 15 Front out

7 8 9 10
1 6
2 3 4 5 Mic in

TOP VIEW
A A

FRONT VIEW
Elitegroup Computer Systems
Title
AUDIO VT1705/ALC662 (PANEL)
Size Document Number Rev
Custom H61H2-M12 1.0
Date: Wednesday, July 13, 2011 Sheet 25 of 29
5 4 3 2 1
5 4 3 2 1

新手提醒: LAN_HSOP/N請接到SB的PCIE RX端 LAN_HSIP/N請接到SB的PCIE TX端 LAN_HSIP/N在SB的PCIE TX端要記得放AC coupling cap


BC38 1 2 .1U-16VY-04
External GND 3VSB
LAN1_HSIN
Connection DVDDL LAN1_HSIP ESD1
USBVCC1 USBVCC1 Cb LAN_LED0
LAN_LED1 CK_LAN1_H
MDI1_P1 1
2
4
5
MDI1_P0
3VSB 3VSB VDDCT
VCC3 VCC3 CK_LAN1_L MDI1_N0 3 6 MDI1_N1
AUGND2 AUGND2 1.7V L2 IND-4.7U-S-O
1 2 AVDDL ESD-6P
PCIE_WAKE_UP-
16,20 PCIE_WAKE_L

1
20,23 SIO_PCIRST1_L PCIE_LAN1_RST-
MC9 BC32

40
39
38
37
36
35
34
33
32
31
D
CK_LAN1_H 10U-6VX-08-O .1U-10VX-04-O LAN
Cf D
15 CK_PE_100M_LAN_H

2
15 CK_PE_100M_LAN_L CK_LAN1_L

DVDDL_REG

REFCLK_N
LX

PERX_N
PERX_P

REFCLK_P
LED_1
LED_0

AVDDL

AVDDL
Closed to pin40
14 LAN_TX_P6 LAN1_HSIP GND BC41 1 2 .1U-16VY-04-O 3VSB
14 LAN_TX_N6 LAN1_HSIN
LAN1_HSOP
14 LAN_RX_P6
LAN1_HSON 3VSB 1 30 HSOP1 C21 1 2 .1U-10VX-04 LAN1_HSOP ESD2
14 LAN_RX_N6 VDD33 PETX_P
PCIE_LAN1_RST- 2 29 HSON1 C20 1 2 .1U-10VX-04 LAN1_HSON MDI1_P3 1 4 MDI1_P2
PCIE_WAKE_UP- 3 PERST# PETX_N 28 2 5
USB_LN0
Closed To Pin1 CKREQ_1 4 WAKE# NC 27 R25 1 2 0-04 MDI1_N2 3 6 MDI1_N3
14 USB_N10 3VSB CLKREQ#(VDDCT_REG) TETSMODE
USB_LP0 VDDCT 5 26 SMDATA
14 USB_P10 VDDCT SMDATA
USB_LN1 6 25 SMCLK ESD-6P-O
14 USB_N11
USB_LP1 AVDDL L_XTAL1 7 AVDDL_REG AR8152-B SMCLK 24 DVDDL_G
14 USB_P11 XTLO DVDDL
L_XTAL2 8 23 CKREQ_2 1 TP
XTLI Ca LED_2(CKREQ)

1
SMCLK 9 22 CKREQ1 20100929
7,8,16,20 SMBCLK SMDATA MC7 BC37 AVDDH LAN1_RSET 10 AVDDH_REG AVDDH 21 MDI1_N3
AVDDH

AVDDH(LED2)
7,8,16,20 SMBDATA RBIAS TRX_N3(NC) Short By Andy lu
10U-6VX-08 .1U-10VX-04

TRX_N2(NC)
TRX_P2(NC)

TRX_P3(NC)
AVDDL(NC)

AVDDL(NC)
2

TRX_N0

TRX_N1
ER9 USB_LP0 USBLP_0

TRX_P0

TRX_P1
2.37K-1-04 41 USB_LN0 USBLN_0
GND USB_LP1 USBLP_1

2
USB_LN1 USBLN_1

11
12
13
14
15
16
17
18
19
20
MDI1_P0 MDI1_P3
Ch VDDCT FB5 1
1 2
2 0-06 CKREQ_1 MDI1_N0 AVDDL_G R15 1
1
2 0-04-O
2 .1U-16VY-04-O
AVDDL
Cj 1 2 .1U-16VY-04 USBVCC1
MC6 1U-10VY-06 AVDDL MDI1_N2 BC12 GND BC44
MDI1_P1 MDI1_P2
C MDI1_N1 C
AVDDH_G R14 1 2 0-04-O AVDDH ESD3

Ci 1 2 49.9-1-04 1 2 1000P-04
BC13 1 2 .1U-16VY-04-O Ck USBLP_1 1
2
4
5
USBLP_0
MDI1_P0 ER8 BC8
MDI1_N0 ER7 1 2 49.9-1-04 BC7 1 2 .1U-16VY-04 USBLN_0 3 6 USBLN_1
20100929 R13 1 2 0-04-O 3VSB
MDI1_P1 ER6 1
1
2 49.9-1-04
2 49.9-1-04
BC6 1
1
2 1000P-04
2 .1U-16VY-04
Change By Andy lu MC1 1 2 1U-10VY-06-O Cl ESD-6P
L_XTAL2 MDI1_N1 ER5 BC5

FB12 0-SH-06-O
R29 1 2 1M-04-O L_XTAL1 AUGND2 1 2
R23 1 2 0-04
X1 X-25M DVDDL_G BC25 1 2 .1U-16VY-04
DVDDL
Cm
1 2 Cg MDI1_P2
MDI1_N2
ER4 1
1
2 49.9-1-04-O
2 49.9-1-04-O
BC4 1
1
2 1000P-04-O
2 .1U-16VY-04-O
PIN37 FB1
1
0-SH-06-O
2
ER3 BC3 AUGND2
1

1
3

C24 C23 MDI1_P3 ER2 1 2 49.9-1-04-O BC2 1 2 1000P-04-O


27P-04 27P-04 MDI1_N3 ER1 1 2 49.9-1-04-O BC1 1 2 .1U-16VY-04-O
2

AVDDL BC33 1 2 .1U-16VY-04-O


Close to PIN13
USBVCC1

VDDCT

HW Strapping Cn
B LED0 : 0 -> OC disable B
USBLAN

1
1 -> OC enable 5 1
FB11 USBLN_0 6 VCC VCC 2 USBLN_1
LED1 : 0 -> VDDCT_REG enable 0-06 USBLP_0 7 -DATA1 -DATA0 3 USBLP_1
8 +DATA1 +DATA0 4 3VSB
1 -> VDDCT_REG disable GND GND

2
G3 G1
G4 H_USB3 H_USB1 G2
BOM Difference Cd
AUGND2 H_USB4 H_USB2 AUGND2
AR8151-B AR8152-B AR8161-B LAN_LED0 R40 1 2 330-04 ACTIVE_Y L_TCT 9
1000M 10/100M 1000M
1 MDI1_P0 10 TCT(P01) 19
LAN_LED1 R44 1 2 330-04 LINK_G MDI1_N0 11 TX1+ GLED(P11) 20 LINK_G
0 TX1- OLED(P12)

1
Ca AR8151-B AR8152-B AR8161-B MDI1_P1 12 21 ACTIVE_Y
R30 1 2 5.1K-04 R42 MDI1_N1 13 TX2+ YLED(P13) 22
MDI1_P2 14 TX2- VCC(P14) G5
Cb V X X 0-04 TX3+ H_LAN1
MDI1_N2 15 G6
TX3- H_LAN2

2
Cc USBX2-LAN-1000 USBX2-LAN-100 USBX2-LAN-1000 MDI1_P3 16 G7
MDI1_N3 17 TX4+ H_LAN3 G8
L_RCT 18 TX4- H_LAN4
Cd X V X Closed To PWR Loading Pin RCT(P10)
Ce 0-04 .01U-25VX-04 0-04 BC35 1 2 .1U-10VX-04 PIN24
Ce USBX2-LAN-100
DVDDL

1
Cf V X V BC34 1 2 .1U-10VX-04 PIN34 R43
AVDDL
.01U-25VX-04
Cc
Cg V X X AVDDL BC14 1 2 .1U-10VX-04 PIN31 AUGND2

2
Ch X V X AVDDH BC21 1 2 .1U-10VX-04 PIN22 Link: Green on
Active: Yellow blinking
Ci V V X VDDCT BC28 1 2 .1U-10VX-04 PIN5
AUGND2
A Cj V X V A

Ck V X X
Cl X X V
Closed To PWR Source Pin
Cm V V X
Elitegroup Computer Systems
AVDDL MC5 1 2 1U-10VY-06 PIN6 Title
Cn V V X
AVDDH MC4 1 2 1U-10VY-06 PIN9 AR8151-B / AR8152-B
Size Document Number Rev
Custom H61H2-M12 1.0
Date: Wednesday, July 13, 2011 Sheet 26 of 29

5 4 3 2 1
5 4 3 2 1

ATX P/S WITH 1A STBY CURRENT ATX4P


5VSB 5V 3.3V 12V -12V 12V
+/-5% +/-5% +/-5% +/-5% +/-5% Intel Sandy Bridge CPU Fans
+/-5% Vcore:0.65~1.3V 112Amax
Switching VID
UP6230 VCCP 0.25~1.52V 85A(95W) 12V_200mA
Vaxg:0.65~1.3V 35Amax
4 hases VID
VAXG 0.25~1.52V 25A
D
V_CPU_VTT:1.05V 17Amax SPI D
Switching VTT 1.05V(1V) 8.5A
UP6123 Linear VCC_SA:0.925V(0.85V) 8.8Amax VCC3_30mA
1 phase OP358 VCC_SA 0.925V(0.85V) 8.8A

VCCPLL 1.8V 1A
V_DIMM:1.5V 28.5Amax CRT
VCC Switching
5VDUAL APW 7120 VDDQ 1.5V 4.5A
5VSB P/N MOS VCC_1A fuse

DDR3 DIMM (4) 1333MHz


LDO HDMI/DP
APL5336
LDO VDDQ 15A_S0
3VSB Intel Cougar Point (TDP 5.5W) VCC3_0.5A fuse x 2
1.0A_S3
DDR_VTT:0.75V V_PROC_IO 1.05V 1mA
V_SM_VTT 1.0A_S0
HDMI L.S.
VccDMI 1.05V 0.057A
Linear PCH_CORE:1.05V 6.2Amax VCC3_180mA
OP358 VccCORE 1.05V 1.6A

VccIO 1.05V 4.07A


Flash/NVM
VccADPLLA 1.05V 0.1A
VCC3 _0.3A
VccADPLLB 1.05V 0.1A
C 1.8V_0.1A C

VccCLKDMI 1.05V 0.02A


Non AMT:
VccASW(ME) short to V1P05_PCH VccSSC 1.05V 0.105A

VccDIFFCLKN 1.05V 0.055A


V_ME:1.05V 1.8Amax
VccASW(ME) 1.05V 1.61A

VccDFTERM 1.8V 0.2A


Linear V_SFR:1.8V 1.6Amax
OP358 VccVRM 1.8V 0.159A

Vcc3_3 3.3V 0.409A

VccADAC 3.3V 0.068A


Not support DSW mode:
VccDSW short to 3VSB VccSPI 3.3V 0.02A

VccDSW3_3 3.3V 0.003A

VccSUS3_3 3.3V 0.097A

VccSUSHDA 3.3V 0.01A


B
Battery B
VccRTC 3.3V 6uA(G3) 3V

V5REF 5V 1mA

V5REF_SUS 5V 1mA

VCC3
NEC_D720200
3VDUAL
3VSB P/N MOS VDD3P3 3.3V TBD
Extrenal from V1P05_PCH
VDD1P05 1V TBD

VCC CTRL1P0 internal LVR Output


5VDUAL
5VSB Switch IC
UP7536
SUPER I/O F71808A
3VSB
3VSB 3.3V TBD
USB_5V
VCC3
VCC3 3.3V TBD

BAT 3.3V 3.3V TBD


X16 PCIE Slot per X1 PCIE Slot per PCI Slot per USB X4 Header USB X4 IO USB3.0
A A
3.3V 3A(S0) 3.3V 3A(S0) 5V 5A(S0) VDD VDD
5VDual AUDIO VT1705CE
12V 5.5A(S0) 12V 0.5A(S0) 12V 0.5A(S0) 5VDual 5VDual VCC3
2A
3.3Vaux 0.375A 3.3Vaux 0.375A 3.3Vaux 0.375A 2.0A 2.0A DVDD 3.3V 3.3V 23mA
5VSB
3.3V 7.6A(S0)
Total 1 Slot Total 2 Slots AVDD 5V 38mA
Elitegroup Computer Systems
Total 1 Slot
Title
Power Delivery
Size Document Number Rev
C H61H2-M12 1.0
Date: Wednesday, July 13, 2011 Sheet 27 of 29
5 4 3 2 1
5 4 3 2 1

9 V_1P05_PCH 7 EN CPUVTT
12

CPUVTT RT8121
D D

13 VTT_PWRGD 18 VCORE

38 EN_VTT VCORE
Bi-direction
19 SVDATA
17 VIDSOUT

VCORE RT8859A
40 VR_RDY
19 VR_RDY

Slot:PCIEx16/x1/LAN

21 SIO_PCIRST1_L SVDATA(B37) VCCCORE VCCIO


SIO_PCIRST2_L
C
21 C

21 SIO_PCIRST2_L CMOS 1.1V


RESET#(F36)

12 PCIRST2# 44 PCIRST3#
CPU
PCH Cougar Point Sandy Bridge
20 PLTRST_L
2 FP_PWRBTN_L LRESET 15 PLTRST#(BK48) SYS_PWROK(BJ53) Desktop Processor
35 PANSHW# Socket H2
POWER BUTTON 4 RSMRST_L
RSMRST# 45 RSMRST#(BK38) 16 CPU_PWROK
PROCPWRGD(D53) UNCOREPWRGOOD(J40)
3 3VSB 6 SLP4_L
31 SYS_3VSB SUSC# 37 SLP_S4#(BN52)

7 SLP3_L 15 CPU_BCLK
Super I/O SUSB# 32 SLP_S3#(BM53) CPUCLK(P31/R31) BCLK(W1/W2)
29 3VSB ITE 8758
5 SIO_PWRBTN_L
PWRON# 33 PWRBTN#(BT43)
B B

PWROK DRAMPWROK(BG46)
14 DRAM_PWROK SM_DRAMPWROK(AJ19)
54 ATXPG PWRGD[1..3] 32/18/78
11 PWROK(BJ38)
55 VIN1 36 PSON#

9 8 SYSRST_L
SYS_RESET#(BE52)
+VCC PSON_L
RESET BUTTON

4, 6, [21..23] 16
10 VCC5 PS_ON
ATX_PWRGD
8 PWROK

ATX_POWER
1 3VSB_IO 9 5VSB
A A

Elitegroup Computer Systems


Title
Power Sequence, Reset Diagram
Size Document Number Rev
Custom H61H2-M12 1.0
Date: Wednesday, July 13, 2011 Sheet 28 of 29
5 4 3 2 1
5 4 3 2 1

1129'10 By Jayson modified

M_CLK_A_P/N [1:0]
NOTE: DDR3 Channel A
D

Sugar Bay Platform has two clock mode:


Sandy DDR3
D

1.Integrated Clock Mode (Generate by PCH)


2.Buffer Through Mode (Generate by Clock Gen.)
Bridge M_CLK_B_P/N [1:0]
1333MHz/1066MHz
Desktop Processor
If we choose Integrated Clock Mode, we should Socket H2
DDR3 Channel B
unstuff Clock Gen. circuit.
Please refer to

CK_CPU_100M_P/N
Page.12 PCH - DMI/PCI/PE/USB for CLK IN PD
Page.13 PCH - SATA, SATA CONN for CLK IN PD
Page.14 PCH - MISC, F/W Strap
Page.15 PCH - CLK IO, CKG - CV184 for Option

C C
PEX16_100M_P/N
PCI-E X16

PEX1[A..B]_100M_P/N
PCI-E X1

Cougar
Point PCH
1129'10 By Jayson Del CK505
B B
TPM:
TPM33M Infinine
PCI_33M_FB

LDG33M
LPC_DEBUG
SIO33M
SIO:
SIO48M
A
IT8728 A

Elitegroup Computer Systems


Title
XTL 32.768K XTL 25M
Clock Distribution
Size Document Number Rev
Custom H61H2-M12 1.0
Date: Wednesday, July 13, 2011 Sheet 29 of 29
5 4 3 2 1

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