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# College of Engineering, Pune www.coep.org.

in
Department of Computer Engineering and Information Technology
Course Plan
Course Code: Course: Discrete Structure and Graph Theory

## Teaching Scheme: Lectures- 3 hours/week Examination Scheme: Tests/ Quizzes- 40 Marks

ESE-60 Marks
Academic Year: 2014-15 Class: Second Year B Tech Semester: III

## Sr. Unit Topics covered Lectures Tota

No. l
Set Theory 01
Introduction to Set, subset, proper subset
Combination of sets , Finite and Infinite sets, Countable 01
infinite set
Uncountable infinite sets , Principle of inclusion and 01
1. I exclusion, Problems on principle of inclusion and exclusion 06
Logics and Proofs : 01
Propositions, Conditional Propositions, Logical Connectivity
Proposition calculus, Universal and Existential Quantifiers 01
First order logic, Proofs: Proof Techniques, Mathematical 01
Induction
Relations, Functions, Recurrence Relations 01
Definitions, Properties of Binary Relations
Equivalence Relations and partitions 01
Partial ordering relations and lattices 01
Chains and Anti chains, theorems on chains 01
Warshall’s Algorithm & transitive closure 01
2. II 08
Functions Definitions, Pigeonhole Principle 01
Definition of functions, concept of Pigeonhole Principle
Recurrence Relation, Linear Recurrence Relations With 01
constant Coefficients
Homogeneous Solutions, Total solutions, solutions by the 01
method of generating functions
Graphs 01
Graph Basic terminology, multi graphs and weighted graphs,
paths and circuits
Shortest path Problems, Euler and Hamiltonian paths and 02
3. III
circuits 06
Factors of a graph, planer graph and Kuratrosski graphs and 02
theorem
Graph Coloring cliques , independent sets 01
Trees 01
Trees, rooted trees, path length in rooted trees
4. IV Binary search trees, spanning trees 01 06
Cut set, theorems on cut sets 01
Theorems on spanning trees & circuits 01

Page 1 of 4
Minimal spanning trees, Kruskal’s algorithm for minimal 01
spanning tree.
Prim’s algorithms for minimal spanning tree. 01
Algebraic Systems 01
Concepts of Algebraic Systems, Groups, Semi Groups,
Monoid
5. V Group Permutation, Isomorphism and Automorphisms 01 04
Homomorphism 01
Subgroups and Normal Subgroups 01
Rings, Field.
Lattice 01
Lattices principles of dualing, basic properties
Distributed Lattice and Theorems on Distributed Lattice 01
6. VI
Complimented lattices and Theorems on complimented 01
04
lattices
Boolean lattices & Boolean algebra. 01

2 Text Books:

## 1. C. L. LIU, “Elements of Discrete Mathematics”, 2nd Edition, Tata McGraw-Hill, 2002,

ISBN: 0-07-043476-X.
2. G. Shanker Rao, ”Discrete Mathematical Structures”, New Age International, 2002, ISBN:
81-224-1424-9

3 References:
1. Lipschutz, Lipson, Discrete Mathematics, 2nd Edition, Tata McGraw-Hill, 1999, ISBN 0-
07- 463710--X.
2. V. K. Balakrishnan, Graph Theory, TMH (Recommended for Graph), ISBN 0-07-058718-3
3. B. Kolman, R. Busby and S. Ross, “Discrete Mathematical Structures”, 4th Edition,
Pearson Education, 2002, ISBN 81-7808-556-9
4. J. Tremblay, R. Manohar, “Discrete Mathematical Structures with application to Computer
Science”, McGraw-Hill, 2002 ISBN 0-07-065142-6 (Recommended for prepositional
Calculus)
5. Kenneth H. Rosen: Discrete Mathematics and Its Applications, 5th Edition, Tata McGraw-
Hill, 2003, ISBN 0-07-053047-5

4 . Course Outcomes

## Students will be able to:

CO-1 Introduces the fundamental concepts related to set theory, relations and functions which
are frequently required in advanced courses such as analysis of algorithms.
CO-2 Evaluate the formal language of logic and various proof techniques which are must for
the study of theoretical computer science.
CO-3 Discuss fundamentals of graphs and algebraic structures such as groups and rings which
form the essentials of the mathematics.

Page 2 of 4
5 . Questions

Test 1
Q1 – Logic proof
Q2 - Set theory

Test 2
Q3 – Relations,
Q4 – Functions

## End Semester Exam

Q5 Logic proof, set theory
Q6 – Relations, Functions
Q7 – Graph theory
Q8 – Tress
Q9 – Algebraic systems
Q10 – Boolean lattice and Boolean Algebra

## 6 . Program Outcomes relevant to the Outcomes:

Full listing on URL http://www.coep.org.in/index.php?pid=824

## (1) Graduates will demonstrate basic knowledge in fundamentals of programming,

algorithms and programming technologies and fundamentals of Computer Science.

(3) Graduates will have knowledge of the best practices in software development
in industry.

(4) Graduates will be able to demonstrate the ability to design creative solutions to
real life problems faced by the industry.

(6) Graduates will be able to communicate technical topics in written and verbal
forms.

## (7) Graduates will demonstrate an understanding of the problems most relevant in

time to Computer Engineering and IT industry.

## 7. Mapping of Questions to CO’s: (Sequence of Questions as per item 7)

Questions CO’s
1 1
2 1
3 2
4 2
5 1
6 2
7 2
8 2
9 3
10 3

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8. Mapping of CO’s to PO’s:

CO’s PO’s
1 1,4,7
2 1,4,7
3 1,4,7

9 . Evaluation Scheme:

## Examination Marks Date

Quiz I 20 As per academic schedule
Quiz II 20 As per academic schedule
End Sem Exam 60 As per academic schedule

## (Dr J.V. Aghav) (Dr vandana Inamdar)

Head, Comp IT Dept Course in charge

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College of Engineering, Pune www.coep.org.in
Department of Computer Engineering and Information Technology
Course Plan
Digital Systems
Teaching Scheme: Examination Scheme:
Lectures- 3 hours/week Tests/ Quizzes- 40 Marks
ESE-60 Marks
Academic Year: 2014-15 Class: S. Y.- B.Tech Semester: III

## SN Unit Topic Lecture(s) Total

N
Introduction 1
Number systems- Representation of unsigned and signed integers,
1
Fixed-point representation of real numbers,
Floating-point representation of real numbers, 1
01 I Minimization of Boolean function using Karnaugh Map (up to four 6
1
variable) and Quine - Mclusky methods,
1’s and 2’s complement, SOP-POS, 1
Code conversions- Binary code to gray code and gray to binary,
BCD to Excess – 3,Excess – 3 to , BCD code etc.
Introduction to Design of Combinational Logic Circuits, 1
Gate level design of Small Scale Integration (SSI) circuits, Modular
1
combinational logic elements,
Overview of multiplexer/ demultiplexer, Implementation of
1
Combinational Logic Circuits using mux / demux,
Decoders, Encoders, Priority encoders, Multiplexers and
1
Demultiplexers.
02 7
II Design of Integer Arithmetic Circuits using Combinational Logic:
Design of Combinational Circuits using Programmable Logic
Devices (PLDs): Programmable Read Only Memories (PROMs),
2
Programmable Logic Arrays (PLAs), Programmable Array Logic
(PAL) devices.
Introduction to Design of Sequential Logic Circuits, 1
Latches: RS latch and JK latch, Flip-flops-RS, JK, T and D flip flops,
2
Master-slave flip flops, Edge-triggered flip-flops.
Analysis and Design of Synchronous Sequential Circuits:
Introduction to sequential circuits, Moore machine and Mealy 1
machine,
03 III 7
Characteristic table, Characteristic equation and Excitation table, 1
Analysis of sequential circuits- Flip-flop input expressions, 1
Next state equations, Next state maps, State table and State
transition diagram, State transition diagram, State table, Next state 1
maps, Output maps, Expressions for flip-flop inputs and
Expressions for circuit outputs.

Page 1 of 6
Introduction to Modular sequential logic circuits, 1
Shift registers, Registers, 1
04 IV Counters-Synchronous / Asynchronous, 1 5
Up-down, Ring, Johnson counter. 1
Design of Synchronous / Asynchronous using different flip-flops. 1
Introduction to Algorithm State Machines, 1
ASM charts, notation, design of simple controller, 1
Multiplexer controller method, RTL notation and implementation. 1
05 Introduction to VHDL: Entity, Architecture, Configuration 7
V 2
Declaration,
Data Objects and examples of VHDL codes for simple digital
2
circuits like adder, subtractor, mux, demux, counter etc.
Introduction to Memories, 1
Random access memory, TTL RAM cell, 1
Parameter read write cycles, ROMs EPROM, 1
MOS-static RAM cell, dynamic RAM cell, refreshing, memory
06 VII 1 6
cycles.
Data converters : D/A, A/D conversion techniques, 1
Dual slop, successive approx, application of A/D,D/A converters
1
Sampling theorem, choice of sampling frequency.
Total 38

2. Text Books:

• M Morris Mano “Digital Design” 3rd Edition Prentice Hall, 2001, ISBN-10 / ASIN:
0130621218 ISBN-13 / EAN: 9780130621214
• R.P. Jain, “Modern Digital Electronics”, 3rd Edition, Tata McGraw-Hill, 2003, ISBN 0
– 07 – 049492 – 4
• A.P. Malvino, D. P. Leach and G.Saha, “Digital Principles and Applications,” 7th
Edition, McGraw Hill, 2010

3. Reference Books:

• Wakerly Pearon, “Digital Design: Principles and Practices”, 3rd edition, 4th reprint,
Pearson Education, 2004
• Anand Kumar, “Fundamentals of digital circuits” 1st Edition, PHI publication, 2001
• Mark Bach, “Complete Digital Design”, Tata McGraw Hill, 2005
• Stephen Brown, “Fundamentals of digital logic design with VHDL” 1st Edition, TMH
Publication 2002

## 4. On-line Course Resources:

1. http://www.ece.uic.edu/~dutt/courses/ece465/lect-notes.html
2. http://pdf-ppt.blogspot.com/2011/09/digital-system-design-ppt-pdf.html

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5. List of Assignments/ home works /problems:

Recall
1.1 List different criteria that could be used for optimization of a digital circuit.
1.2 List and describe different problems of digital circuits introduced by the hardware
limitations.

Comprehension
2.1 Describe the significance of different criteria for design of digital circuits
2.2 Describe the significance of different hardware related problems encountered in

Digital circuits.
2.3 Draw the timing diagrams for identified signals in a digital circuit.

Application
3.1 Determine the output and performance of given combinational and sequential circuits.
3.2 Determine the performance of a given digital circuit with regard to an identified
optimization criterion.

Analysis
4.1 Compare the performances of combinational and sequential circuits implemented with
PLDs.
4.2 Determine the function and performance of a given digital circuit.
4.3 Determine the appropriateness of the choice of the ICs used in a given digital circuit.
4.4 Determine the transition sequence of a given state in a state diagram for a given input
sequence.

Synthesis
5.1 Generate multiple digital solutions to a verbally described problem.
5.2 Modify a given digital circuit to change its performance as per specifications.

Evaluation
6.1 Evaluate the performance of a given digital circuit.
6.2 Assess the performance of a given digital circuit with Moore and Melay configurations.

## • CO 1: Introduces the fundamental digital concepts to the students

• CO 2: Introduces the concept of solving problems using digital concepts
• CO 3: Introduces the importance of efficient designing & analysis of digital circuits
• CO 4: Make the students technically more familiar towards Computer hardware &
peripheral design by applying digital circuit knowledge.

7. Questions:

Test- 1 examination:

##  Question 1: Based on Representation of Number Systems,K-map,QM method

examples.
 Question 2: SOP-POS , BCD-GRAY ,GRAY-BCD.

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Test- 2 examination:

##  Question 3: Based on Mux, demux, encoder, decoder.

 Question 4: Based on PLD's.

##  Question 5: Based on application of sequential logic, analysis of components etc.

 Question 6: Understanding of modular sequential circuits, registers, counters etc.
 Question 7: Based on algorithm state charts and notations, application, design and
analysis.
 Question 8: Compare different Memory types, applications, design variations etc.
 Question 9: Types of Conversion techniques, fundamentals of sampling theorem etc
 Question 10: Design of combinational circuits, Analysis of logic circuits.

## (1) Graduates will demonstrate basic knowledge in fundamentals of programming,

algorithms and programming technologies and fundamentals of Computer Science.

## (2) Graduate will demonstrate knowledge of fundamentals of hardware technology relevant

to understanding Computer Science basics.

(3) Graduates will be able to demonstrate the ability to design creative solutions to real life
problems faced by the industry.

(4) Graduates will be able to demonstrate the ability to design creative solutions to real life
problems faced by the industry.

## (9) Graduates will demonstrate good performance at the competitive examinations

like GATE, GRE, CAT for higher education.

## (10) Graduates will be able to demonstrate their qualities of learning and

demonstrating latest technology

## 9. Mapping of Questions to CO’s: (Sequence of Questions as per item 7)

Questions CO’s
1 1,2
2 3
3 4
4 3,4
5 2,3
6 1,2
7 2,3
8 2,3
9 3,4
10 3,4

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10. Mapping of CO’s to PO’s:

CO’s PO’s
1 1,2,3
2 11
3 4,9
4 10

## Examination Marks Date

Quiz I 20 As per academic schedule
Quiz II 20 As per academic schedule
End Sem Exam 60 As per academic schedule

## (Dr J V Aghav) (Prof. V. V. Kamble)

Head, Comp IT Dept Course in charge

Page 5 of 6
College of Engineering, Pune www.coep.org.in
Department of Computer Engineering and Information Technology
Course Plan
Digital Systems Laboratory
Teaching Scheme: Examination Scheme:
Practical- 3 hours/week Practical/Oral Exam: 50 marks
Term work: 50 marks
Academic Year: 2014-15 Class: S. Y.- B.Tech Semester: III

## Sr. No. Suggested List of Assignments

1. Implementation of Boolean function using Gates
2. Code converters:
• Binary to gray
• Gray to binary
• Excess – 3 code to BCD
• BCD to Excess – 3 code.
4. Design of half subtractor , full subtractor.
5. K-map examples implementation
6. Quine-Mc’clusky examples implementation.
7. Design of :
• 3 bit odd Parity Checker
• 4 bit odd Parity Checker
• 3 bit even Parity Checker
• 4 bit even Parity Checker
8. Implementation of Multiplexer and Demultiplexer.
10. Study of flip flops-
• RS flipflop
• D flipflop
• T flipflop
• J-K flipflop
11. Design of Synchronous Counter.
12. Design of Asynchronous counter.
13. Design of up / down counters.
14. Design of Sequence generator.
15. Design of Ring counter.
16. Design of Johnson Counter
17. Study Assignment on VHDL programming.

Lab Outcome:
• Introduces the fundamental digital concepts to the students
• Introduces the concept of solving problems using digital concepts
• Introduces the importance of efficient designing & analysis of digital circuits
• Make the students technically more familiar towards Computer hardware & peripheral
design by applying digital circuit knowledge.

## (Dr J V Aghav) (Prof. V. V. Kamble)

Head, Comp IT Dept Course in charge

Page 6 of 6
College of Engineering, Pune www.coep.org.in
Department of Computer Engineering and Information Technology
Course Plan
Course Code: CT 205 / CT 209 Course: Data Structures/ Data Structures Laboratory

## Teaching Scheme: Lectures- 4 hours/week

Laboratory: 3 hours/week
Examination Scheme: Tests/ Quizzes- 40 Marks
ESE-60 Marks
Academic Year: 2014-15 Class: Second Year B Tech Semester: III

## 1. Lectures and Laboratory Plan

Please note that Data Structures is a 4 credit theory and 2 credit laboratory course.

Page 1 of 9
Instructions about lectures and laboratory schedule
1. Any lecture missed due to a holiday or instructor's absence will be conducted on the next Saturday.
2. 100% attendance is expected in the laboratory sessions.

Page 2 of 9
2. Text Books:

• The C Programming Language, By Kernighan and Ritchie, Published by Prentice Hall of India,
Price: Nearly 130 Rs

## • Fundamentals of Data Structures in C, second edition, By Horowitz, Sahni, Anderson-freed,

3. Reference Books:

1. How to solve it by Computer, By R G Dromey, Published by Prentice Hall of India. Price: Around
100 Rs.

## 4. On-line Course Resources:

http://c-faq.com

http://www.gowrikumar.com/c

## Given as part of Point 1.

Page 3 of 9
6. Learning Outcomes of the Course:

 CO 1: Students should be able to write C programs for solving mathematical problems, array
processing problems, taking care of all input, output possibilities and error conditions.
 CO 2: Students should be able to implement various data structures like stacks, queue, linked
lists, trees, sparse matrices, graphs, hash tables using various strategies involving use of arrays,
pointers, self referential pointers, dynamic memory allocation, structures and given other data
structures.
 CO 3: Students should be able to draw visual representations of various states of data structures.
 CO 4: Students should be able to measure the time taken by a program practically, draw graphs of
performance and critically comment on the observations.
 CO 5: Students should be able to calculate asymptotic time complexity of a program or parts of
program and compare programming solutions using this analysis.
 CO 6: Students should be able to write efficient sorting and searching programs.
 CO 7: Students should be able to solve real life problems by identifying the proper data structures
and algorithms. They should also be able to write applications using given data structures

## 7. Theory and laboratory examinations

All examinations will be open book. Students can carry text books and hand written notes of programs.
Printed programs will not be allowed.

Some of the examinations can be made open time, depending on the availability of class rooms and
possibility of finding time slots convenient to all concerned.

## Theory Examination questions

• There will be no questions of the type “explain, compare, describe, write a short note on,
• All questions will require you to solve problems.
• There will be no choice of questions in the paper.
• Questions can be of the following types (this list is not exclusive and it is only an
indicative list).

Page 4 of 9
Draw diagram of the data structure created by following code:
int main() {

## char a[6], *p, *q;

p = a + 3;

q = a + (p - a) + 2;

q[-2] = 'c';

p[-1] = 'd';

Write a function which returns the index of first occurence of a given character, in a
string.

## For example: if string="somethinges" and ch='e' then the function returns 3.

Write an implementation of a quque of characters using an array and ONLY one index
in the array. (Explanation: You have to write the type-definition and the functions init(),
enqueue(), dequeue(), empty(); for the queue)

Write a function which creates transpose of a sparse matrix. The sparse matrix is
stored using following type definition.

int r, c, v;

}elem;

elem arr[128];

## int nrow, ncol, nelem;

}spm;

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The C type 'int' has a limitation of size. Write an implementation of a new data type
which gives us "integers of unlimited size", using a linked-list type of implementation.
The type will be called "Integer". Write the following functions for your type:

Integer *init(void);

## Integer *add(Integer a, Integer b);

/* Adds two integers a and b, and returns the result as another "Integer" */

The C library has a function 'qsort' for sorting of data of any type. Write a function
which imitates this function, using bubble sort. Desired prototype:

## int (*compare)(const void *, const void *));

The function sorts an array with 'nmemb' elements of size 'size'. The 'base' argument
points to the start of the array. Here 'compare' is a function pointer, for a function
which compares two data elements of the data to be sorted.

Design data structures for an application which manages a library. Write the type
definitions and draw relevent diagrams of the data structure. No need to write any
explanation, your type definitions and diagrams should be self-sufficient.

## node *search(list *l, int val);

Where 'l' is the pointer to the list, 'val' is the value to be searched and the function
returns a pointer to the node having the value 'val'. Use following type definitions:

typedef struct node { int val; struct node *next, *prev; } node;

## What is the output of this program? Explain the reasons.

#define square(x) x * x

int main() {

int i = 10, j = 5;

## printf("%d\n", square(i + j));

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}

Find the time complexity equation, O and Ω for the following code

int g(int n) {

int i;

i = n;

while(i > 5) {

printf("hi\n");

i--;

## int f(int a, int b) {

int i, j;

i = 0;

while(i < b) {

i++;

j = b;

while(j < 0) {

j = j << 1;

int main() {

int n;

scanf("%d", &n);

f(n, n);

g(n);

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}

8. Laboratory Instructions
• Copying programs from internet, submitting programs written by other fellow students (with changes
or without changes) will invite expulsion from the course.
• Not submitting weekly assignments or mini project is allowed. You only loose the marks for that
assignment.
• Late submissions of weekly assignments will not be entertained.
• Use of Moodle
◦ All laboratory work will be done using COEP moodle.
◦ Each student will be responsible for securing access to his/her moodle account by not sharing
◦ Note that moodle is a machine and will dutifully close the submissions on scheduled time.
• Weekly assignments
◦ As indicated in the scheme of lectures and laboratory in Section – 1, there will be one laboratory
assignment to be completed per week.
◦ Each laboratory assignment will be done over the entire week by students.
◦ Each weekly assignment will carry 5 marks. Thus the assignments will carry total 16 * 5 = 80
marks.
◦ The laboratory session (3 hours) will be used for getting the assignment of previous week
evaluated by the lab-incharge.
• Laboratory Tests
◦ There will be two laboratory tests, scheduled at an undeclared time. Each test will carry 10
marks. You will have to write programs for given problems during lab tests. The tests will cover syllabus
completed till that point in that.
◦ To appear for the lab tests, the students must have completed at least 80% of the weekly
assignments.
• Mini Project
◦ Each student will have to complete one mini project during the term. The statement of the
problem will be different for every individual student. The total marks for the mini project will be 10.
• End Semester Exam
◦ The end semester exam will carry 40 marks.
• The total marks out of 180 (as given below) will be converted to out of 100 at the end of the
semester.
ork Marks
Weekly Assignments 16 * 5 = 80
ests 40
oject 20
mester Exam 40
180

Page 8 of 9
8. Program Outcomes relevant to the Outcomes:
Full listing on URL http://www.coep.org.in/index.php?pid=824

(1) Graduates will demonstrate basic knowledge in fundamentals of programming, algorithms and
programming technologies and fundamentals of Computer Science.

(3) Graduates will have knowledge of the best practices in software development in industry.

(4) Graduates will be able to demonstrate the ability to design creative solutions to real life
problems faced by the industry.

## Examination Marks Date

Quiz I 20 As per academic schedule
Quiz II 20 As per academic schedule
End Sem Exam 60 As per academic schedule

## (Dr J V Aghav) Abhijit A.M.

Head, Comp IT Dept Course in charge

Page 9 of 9