A flip-flop in English, is a multivibrator capable of staying in one or two states in an indefinite time in an

absence of disturbances. The passage from one state to another is done by varying its entries.
Depending on the type of said tickets, they can be divided into:

Asynchronous: they only have control inputs. The most used is the RS flip-flop.
Symptoms: in addition to the control inputs it has a synchronism or clock input.
If the control inputs depend on the synchronization they are called synchronous and otherwise
asynchronous. In general, control inputs prevail over synchronous ones.

The synchronism input can be activated by level (high or low) or by edge (rising or falling). Within the
synchronized bistables activated by level are the types RS and D, and inside the assets by flanks the
types JK, T and D.

The flip-flop active flip-flop components are created to eliminate latch failures (bistable, asynchronous
or synchronized by level).
Description

Schedule of the RS flip-flop.

Temporary storage device of 2 states (high and low), whose main inputs allow to be activated:

R: the reset (reset in English), set to 0 or low level of the output.

S: engraving (set in English), set at 1 or high level of output
If none of the inputs is activated, the flip-flop remains in the state it had after the last erase or recorded
operation. In no case should both inputs be activated at the same time, since this causes the direct (Q)
and negated (Q ') outputs to have the same value: a low, if the flip-flop is built with NOR gates, or high ,
if it is built with NAND gates. The problem that both outputs are in the same state is that when you
deactivate both inputs you can not determine the state in which the output would be. Therefore, in
truth tables, the activation of both inputs is considered as an undesired case (N.D.).

Asynchronous RS (Set Reset) Bistable

It only has the R and S inputs. It is internally composed of two NAND or NOR logic gates, as shown in
the following figure

The flip-flop D is very useful when you need to store a single data bit (1 or 0). If an inverter is added to
an S-R flip-flop, we obtain a basic D flip-flop. The operation of a device activated by the negative edge is,
of course, identical, except that the triggering takes place on the falling edge of the clock pulse.
Remember that Q follows D on each flank of the clock pulse.

For this, the temporary storage device is of two states (high and low), whose output acquires the value
of the input D when the synchronism input is activated, C. Depending on the activation mode of said
synchronization input, there are two types:

Active by level (high or low), also called register or latch (latch in English).
Active by flank (up or down).
The characteristic equation of flip-flop D that describes its behavior is: