The 2018 International Power Electronics Conference
Frequency Tracking Burst-Mode
PDM-controlled Class-D Zero Voltage
Soft-Switching Resonant Converter for Inductive
Power Transfer Applications
Yoichiro Tabata, Tomokazu Mishima*, and Tatsuya Kido
Dept. of Marine Engineering, Graduate School of Maritime Sciences, Kobe University
5-1-1, Higashinada, Kobe, Hyogo 658–0022, Japan
E-mail: mishima@maritime.kobe-u.ac.jp
Abstract—A newly developed prototype of zero-voltage
soft-switching (ZVS) high-frequency resonant for induc-
tive power transfer (IPT) applications is presented in
this paper. By adopting the burst mode pulse-density-
modulation (PDM) scheme with resonant frequency track-
ing, the load power can be continuously regulated under the
conditions of full-range soft-switching due to the undamped
resonant currents through the coils, thereby the current
surges which appears with the conventional PDM scheme
can be eliminated effectively. The essential performances on
the output power regulation and soft-switching operations
are demonstrated in experiment using a class of 400 W-
500 kHz prototype, and the validity is evaluated from the
practical point of view.
Keywords—Burst mode pulse-density-modulation (PDM),
Class-D inverter, Inductive power transfer (IPT), resonant
converter, soft-switching.
I. I NTRODUCTION
IPT technology utilizes magnetic coupling to transfer
power across a large air gap, and nowadays its appli-
cations are widely expanded from the battery-powered
mobility such as electric vehicles (EV) as in Fig. 1 and
induction heating for metal surface treatments. Highly
efficient power conversion and high-frequency switching
operation are essential for achieving high-power density.
In addition to the power converter topology and the
sending / receiving coils design, the power control of
the high frequency (HF) inverter is a critical issue for
the IPT[1]-[9]. The circuit topologies and modulation
strategies applicable for IPT are summarized in TABLE I.
The pulse density modulation (PDM) provides a simple
but practical solution for load power control with full-
range of soft switching.
Strategies of PDM are sorted by several type: as pre-
defined switching pattern, delta-sigma modulation, and
burst mode[10][11]. The burst mode PDM is most simple
and easy-to-implement for contactless power and signal
communications in IPT systems. The technical issues
of conventional burst-mode PDM is illustrated in Fig. 2:
while holding the charge of the lossless snubber capacitor
in parallel with the switch, it is forced to discharge when
©2018 IEEJ 329
3Φ UFAC/DC DC/DC DC/HFAC HFAC/DC DC
or
1Φ
Rectifier Boost PFC HF Inverter HF Rectifier Battery
Sending Coil Receiving Coil
Fig. 1. Energy and power process of IPT battery charger applications.
the inverter gets back to switching action, and then the
current surge occurs.
The proposed burst-mode PDM naturally avoids the
surge and related ringing by making use of the second-
order undamped oscillation through sending and receiving
coils. The original idea of the proposed PDM exist in the
incorporation of resonant frequency tracking into the burst
mode PDM for keeping the high power factor and wide
range of ZVS in accordance with variations of coupling
coefficient between the coils. The frequency tracking
allows for maximization of the transferred power in the
situations of misalignment of coil positions and variations
of air gap length[12].
This paper is organized as follows: the circuit op-
eration with the burst mode PDM scheme is described
in Section II. The steady-state analysis based on the
frequency domain equivalent circuit is demonstrated in
Section III, thereby the effectiveness of the frequency
tracking PDM scheme is clarified in principle. The ex-
perimental verifications are presented in Section IV with
comparison of operating waveforms and efficiency, after
which the performances and features of the proposed
converter are summarized in Section V.
II. C IRCUIT T OPOLOGY AND P ULSE M ODULATION
The circuit topology of the proposed converter is
presented in Fig.3. The primary-side, i.e. sending coils-
side high-frequency resonant (HF-R) inverter generates
the resonant current through the series compensation
network L1 -C1 . The class-D rectifier receives the HF-
R current through the series compensation network L2 -
C2 in the secondary-side, i.e. receiving side, and then
transfer the power to the dc load which is represented by
 The 2018 International Power Electronics Conference

TABLE I. C IRCUIT T OPOLOGIES AND P OWER C ONTROL S CHEMES FOR IPT S YSTEMS

Circuit topology Power range Control Pros and cons

Class-D inverter Low-Medium power Asymmetry PWM, PFM, PDM Low voltage-stress
Class-E inverter Low power PAM, PDM Excessive voltage-stress
Full-bridge inverter Medium-High power PS-PWM Increase of devices and components

in output capacitances and stray inductances of the HF-

R inverter are dramatically suppressed. The switching
Coss1
vgs,Q1 operation resumes by turning the low-side switch Q2 off.
Then, the capacitive energy of the high-side switch Q1
Vin
is completely discharged, consequently no surge current
Power rest period Power supply period
appears at the turn-on transition of the high-side switch,
Coss2
vgs,Q1 and the power dissipation is reduced under the high
frequency condition. Another feature is the switching
frequency of the HF-R inverter corresponds to the natural
iQ1 frequency of the converter. Therefore, no high sensitivity
of high-frequency current sensor is required just for
(a) (b) implementing the proposed PDM, which is advantageous
over the alternative solution reported in [10].
Fig. 2. Surge current at the turn-on transition in the conventional burst- The corresponding mode-transitions and equivalent
mode PDM: (a) short circuit loop, and (b) resultant surge and ringings. circuits are shown in Fig.7. They are divided into the
switching and free-oscillation intervals in the burst mode
in io PDM.
Do1
Taking the winding resistance R1 of the sending coil
Vin
Ro Vo and the winding resistance R2 of the receiving coil into
ip C2 is Co
consideration, the impedance parameters are expressed by
M
    
L1 L2
Do2
V̇1 Ż1 −jωLm I˙1
=
0 −jωLm Ż2 I˙2
o Vref
Vdiff +
Dp PI Σ
Vo
(2)
Phase θo θ diff PDM Dead time Gate Q1
LPF Σ PI VCO
Difference + fs Controller Generator Driver Q2
ip θ ref
where the primary and secondary-side impedances
are represented respectively by Ż1 = R1 + j(ωL1 - ωC 1
)
Fig. 3. Class-D ZVS resonant DC-DC converter for IPT systems. 1
and Ż2 = R2 + RL + j(ωL2 - ωC2 ). Transforming (2) gives
1

birth to the admittance parameters as

    
Ro . The active switches Q1 -Q2 operate under the edge- I˙1 1 Ż2 jωLm V̇1
resonant ZVS utilizing a parasitic output capacitance Coss = .
I˙2 Ż1 Ż2 + (ωLm )2 jωLm Ż1 0
of switching power device.
The logic circuit of pulse generator and key wave- (3)
forms are compared in Fig.4 and Fig.5, where the PDM
duty factor Dp is defined by The input power is decided by P1 = {|V̇1 ||I˙1 | = V12
|Ż2 |/Ż1 Ż2 + (ωLm )2 }, and the output power is expressed
Tp,on
Dp = (1) by P2 = RL |I˙2 |2 = V12 (ωLm )2 RL /{Ż1 Ż2 + (ωLm )2 }.
Tp Therefore, the power conversion efficiency is defined as
Note here the PDM cycle fdp (=1/Tp ) should be set as the
specified number of fraction with respect to the switching (ωLm )2 RL
η = . (4)
frequency fs . (RL + R2 ){R1 (RL + R2 ) + (ωLm )2 }

The key idea of the proposed burst mode PDM is to It is understood from (4) that the magnetizing inductance
keep the ON-state of the low-side switch for suspending Lm varies with the position shift and gap-length between
the power transfer interval from the input dc source to the sending and the receiving coils, so that the power
the sending coils by sustaining the undamped resonant transmission efficiency can keep as close to maximum by
current due to the high load quality factor of WPT adjusting the operation frequency around the resonance
system. Accordingly, the oscillation between the parasitic frequency.

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PDM Controlled Pulse PDM Controlled Pulse

JK Flip-Flop JK Flip-Flop
J Out1
J Out1 Switching Pulse Q Q1
Switching Pulse Q Q1
CLK Dead Time Pulse
Dead Time Pulse
CLK Generator
Generator Q Q2
Q Q2 K Pulse
K Pulse Out2
Out2
(a)
(a)

High Frequency Pulse High Frequency Pulse

t t

t t
PDM Controlled Pulse PDM Controlled Pulse

t t
K K

t t
Q Q

t t
Out1 Pulse Out1 Pulse

t t
Out2 Pulse Out2 Pulse

t t
Q1 Pulse Q1 Pulse
OFF OFF
t
t Q2 Pulse
Q2 Pulse
OFF ON
t
iQ t iQ 2
2
t t

ip ip
t t
(b) Proposed PDM pattern of switch-gate pulse sequence.
(b)
Fig. 5. Proposed PDM pattern of switch-gate pulse: (a) pulse sequences,
Fig. 4. Conventional PDM pattern of switch-gate pulse:(a) logic circuit and (b) pulse sequence.
diagram, and (b) pulse sequences.

III. S TEADY-S TATE A NALYSIS and Lm = k 2 L1 . The fundamental-harmonics approx-

The frequency domain analysis is described by the
simplified equivalent circuit of the proposed HF-R in-
verter as illustrated in Fig.8. The leakage and magnetizing
inductances which depend on the gap length between the
two coils are uniquely expressed by Lr = (1 − k 2 )L1
imation (FHA) for the proposed converter justifies the
adoption of equivalent ac resistance Rac = 2aRo /π 2 for
the sake of simplicity.
The voltage conversion ratio depicted in Fig. 8 can be
expressed with the HF transformer winding turns ratio

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vgs,Q1
M M

ON OFF
vgs,Q2 t

OFF ON [Mode 1] [Mode 8]

t
iQ1 vQ1
Vin t M M

ZVS&ZCS ZVS
vQ2 iQ2 [Mode 2] [Mode 7]
Vin t
ZVS ZVS&ZCS
vC1 vC2 M M

t
vL1 iL1
[Mode 3] [Mode 6]

t
M M

vL2 iL2
t [Mode 4] [Mode 5]

vDo1 iDo1 Fig. 7. Voltage and current waveforms during switching one cycle.

Vo t
iDo2 ZCS vDo2 ZCS Do1
C1 C2 a2
Vo t
C1 C2 a 2
Rac
ZCS ZCS vQ2 Us
Ts/2 Ts Do2

t0 t1 t2 t3 t4 t5 t6 t7 t8
Mode 1 2 3 4 5 6 7 8 Fig. 8. Simplified equivalent circuits based on FHA method.

Fig. 6. Voltage and current waveforms during switching one cycle.

5
k = 0.07
 0.078
Voltage Conversion ratio G

a = k L1 /L2 as 4 0.08
1 0.085
G =  3 0.15
 2 2  2
1 1 fr1 fms 2
a 1+ S − S fs + fs (Qr ξ − Qms )
2
(5)
  
fs fr1 fs fms 1
ξ= − − (6)
fr1 fs fms fs

where
 S = Lm /L r ,Zms = a2 Lm /C2 ,Zms = 0
a Lm /C2 ,Z
2 Lr /C1 ,Qms = Zms /Rac and 460 480 500 520 540
r =
fms = 1/(2π Lm C2 /a2 ). Referring to the characteristic Switching frequency fs [kHz]
impedance ratio λms = Zms /Zr obtained from Fig. 9, the
three resonance frequencies are defined respectively under Fig. 9. Voltage conversion ratios versus switching frequency.
the condition of loose coupling coefficient by
1
fr = √ (7)
2π L1 C1

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Γ 2 −4fr 2 fms 2
Γ−
fr1=
2
(8) Receiving coil Do1-
  Do2
Γ + Γ 2 −4fr 2 fms 2
fr2= (9)
2
where Γ=fr 2 +λms fr fms +fms 2. Furthermore, consider-
Sending coil
C2
ing the energy balance between the leakage inductance of
the sending and receiving coils and the switch parasitic C1
capacitances, the turn-off current iQx, off (the suffix x GateDrivers
denotes 1 / 2 for Q1 / Q2 ) which is relevant to the ZVS
condition is given by
DSP
1 1
L1 i2Qx, off > (Coss1 + Coss2 )Vin
2
. (10)
Q1-Q2
2 2
As a result, the lower limit value by which the turn-off Fig. 10. Exterior appearance of the prototype converter.
dv/dt of Q1 and Q2 can be determined as
Vin TABLE II. E XPERIMENTAL C IRCUIT PARAMETERS
iQ, off >  (11)
L1 Item Symbol Value [unit]
(Coss1 +Coss2 )
DC input voltage Vin 100[V]
100 [V]
=  (12) Switching frequency fs 510[kHz]
19 [μH] Output power rating Po 410[W]
(100 [pF]+100 [pF])
Input smoothing capacitor Cin 10[μF]
= 0.32[A] (13) Resonant capacitors C1 ,C2 5.3[nF]
It is possible to satisfy (13) and perform the ZVS oper- Output parasitic capacitance Coss 100 [pF]
ation using the resonant current of primary coils at the Output smoothing capacitor Co 10[μF]
Dead time interval Td 150 [ns]
zero crossing point with the frequency tracking controller.
Load resistor Ro 40[Ω]
Winding turns w1 /w2 5 / 5 [turn]
IV. E XPERIMENTAL V ERIFICATION Self inductance of sending coil L1 19 [μH]
The practical effectiveness of the proposed converter Self inductance of receiving coil L2 19 [μH]
is investigated by experiment. The exterior appearance Mutual inductance of L1 and L2 M 1.52 [μH]
of a 400 W-510 kHz prototype is shown in Fig.10. The Coupling coefficient of L1 and L2 k 0.08
Air gap length between L1 and L2 g 15 [cm]
circuit parameters and specifications are summarized in
TABLE II. ∗ Super Junction-MOSFET : IPW50R190CE, 550[V], 18.5[A]
∗ Do1 -Do2 : C3D20060D, 600[V], 28[A]
The observed voltage and current waveforms are
displayed in Fig.11, where zero-voltage and zero-current
soft-switching (ZVZCS) turn-on and ZVS turn-off op- from the result that both the output voltage and power
erations can be confirmed for the primary-side active can be continuously adjusted for a wide range of load
switches. The operating waveforms with the conventional variations.
and proposed PDM are depicted in Figs.12–14, respec-
The results of power loss analysis at the rated output
tively. It can be confirmed that the inverter current iL1
are shown in Fig.18. It can be seen from the result that
through the primary-side coil is continuously regulated
the switching loss is suppressed by the effect of edge-
in accordance with Dp . The surge currents occur at
resonant ZVS. Thus, it becomes clear that it is necessary
the turn-on transition of each active switch due to the
to reduce the copper loss of the high frequency LITZ
residual capacitive energy in Coss1 and Coss2 , which
wire in the power sending and receiving coils besides
is the phenomenon inherent to the conventional PDM-
suppressing the conduction loss of the switch. Power loss
controlled voltage source class-D inverter. In contrast to
analysis of the prototype converter is revealed in Fig. 18.
that, no surge current emerges at the turn-on transitions
It can be confirmed from the breakdown that the power
with the proposed burst mode PDM.
consumption of switches are reduced than the sending and
The steady-state characteristics of the output power receiving coils, so the elimination of surge and ringing is
versus the PDM duty ratio are presented in Fig.15, where proven by experimental data.
the wide range of power regulation is verified for the
The effectiveness of resonance frequency tracking is
proposed converter. The actual efficiency curve is pre-
confirmed by the open-loop controller against the gap
sented in Fig. 16 and the maximum efficiency is obtained
length variation. The efficiency versus gap length curves
as 72.4 % at Po = 220 W with gap-length g = 15 cm.
are presented in Fig.19 with the frequency variation
The characteristics for the load-resistance variations between 505 kHz–530 kHz for the unique load resistance.
are depicted in Fig.17 when the load resistance of the The resonant frequency slightly declines as the air-
prototype is changed from 25 Ω to 55 Ω. It can be seen gap expands and the coupling coefficient aggravates as

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vgs,Q1:(10V/div) vgs,Q1:(10V/div)
vgs,Q2:(10V/div) vgs,Q2:(10V/div)
iQ1 vQ1
vQ1
vQ2 iQ2
iQ1
vL1:(2kV/div) iL1
vQ2
vL2:(2kV/div) iL2 iQ2
vDo1 ip
iDo1
vDo2 is
iDo2

Fig. 13. Observed voltage and current waveforms at Dp =0.8 with

Fig. 11. Observed waveforms during one switching-cycle at proposed PDM control (100 V/div, 20 A/div, 4 μs/div).
Po = 410 [W] (100 V/div, 20 A/div, 400 ns/div).

vgs,Q1:(10V/div) vgs,Q1:(10V/div)

vgs,Q2:(10V/div) vgs,Q2:(10V/div)

vQ1 vQ1

iQ1 iQ1

vQ2 vQ2

iQ2 iQ2
ip ip

is is

Fig. 14. Observed voltage and current waveforms at Dp =0.2 with

Fig. 12. Observed voltage and current waveforms at Dp =0.8 with proposed PDM control (100 V/div, 20 A/div, 4 μs/div).
conventional PDM control (50 V/div, 10 A/div, 4 μs/div).

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450 Soft switching range Q1,Q2:switching losses

C1,C2:conduction losses
400 Do1,Do2:conduction losses
Output power Po [W]

1.2%
350 Proposed PDM Control 8.9% 2.2%
300 L1:copper losses
250 Q1,Q2:conduction losses 50.7%
200 13.0% Total Power loss
150 167[W]
100
L2:copper losses
50
23.9%
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Pulse density Dp
Fig. 18. Experimental power loss analysis of IPT ZVS-prototype.
Fig. 15. Characteristics of output power vs. pulse density.

100 ZVS range

100 Soft switching range 90 524[kHz] 510[kHz]
Actual efficiency  [%]
90 80
Actual efficiency η [%]

80 70 530[kHz] 518[kHz] 505[kHz]

70 60
fs=505[kHz]
60 50
50 40
40 30
20
30
Proposed PDM Control 10
20
0
10 10 11 12 13 14 15
0 Air gap length g [cm]
0 50 100 150 200 250 300 350 400 450
Output power Po [W] Fig. 19. Actual efficiency versus the air gap length.

Fig. 16. Actual efficiency curves of DC-DC power conversion.

reverse conduction intervals while maintaining the edge-

resonant ZVS operation as mentioned above.
500 ZVS range 200
The actual efficiency characteristics are compared
in Figs.20 and 21 for the conventional and proposed
Output voltage Vo [V]
Output power Po [W]

400
150 burst mode PDM schemes. The higher power and higher
300
efficiency can be observed over the whole range under
the same duty cycle of Dp by the proposed PDM. The
100
efficiency is improved with the proposed PDM, espe-
200 cially 29.4 % of efficiency escalation can be observed as
Output power Po 50 maximum at the pulse Dp = 0.5. Thus, the practical
100 effectiveness of the proposed PDM control is actually
Output voltage Vo verified herein.
0 0
20 30 40 50 V. C ONCLUSION
Road resistor Ro [Ω]
A burst mode PDM controlled ZVS class-D resonant
converter for IPT systems has been proposed, which is
Fig. 17. Characteristic the load variation under same gap.
featured by resonant frequency tracking for high power
factor and wide range of soft switching. The validity
of the proposed converter has been demonstrated by
demonstrated in Fig. 9. This graph shows the effectiveness experiment, and the advantageous technologies over the
of the frequency tracking that can suppress the MOSFET conventional PDM scheme has been clarified. The power

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30
Proposed PDM Control
20
10 Conventional PDM Control
0
0 10 20 30 40 50 60 70 80 90 100
Output power Po [W]

Fig. 21. Actual efficiency curves of DC-DC power conversion.

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