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Design of Overcurrent Protection Circuit for GaN

HEMT
Bo Huang, Yan Li, Trillion Q. Zheng, Yajing Zhang
School of Electrical Engineering
Beijing Jiaotong University
Beijing, China
13121410@bjtu.edu.cn

Abstract—A suitable for high frequency applications with switching devices, it is always been the hotspot of research
gallium nitride high-electron-mobility transistor overcurrent in switching device. In large power application in which
protection (OCP) circuit has been put forward. The proposed IGBTs are widely used, the operating reliability requirements
circuit depends on the detection of the drain-source voltage of of IGBT are higher, so studies on its protection circuits,
GaN HEMT to judge the overcurrent fault, then turn off the especially OCP circuit, have a very early start. So far, the
GaN HEMT rapidly and send a fault signal to the technology of its overcurrent protection is more mature [5]-
microprocessor in the switching period which the overcurrent [6]. Silicon carbide (SiC) switch as a promising device
fault happened within the frequency of a few hundred which is expected to take the place of IGBT has gradually
kilohertz to several megahertz. Through analysis and
been commercialized, and the studies on its OCP circuit are
experiment, it has been shown that the proposed circuit has the
heating up. Among them, the technology of OCP circuit of
advantages of short-time protection, simple circuit structure
and strong capability of anti-interference as well as a higher SiC JFET is more mature than the SiC MOSFET’s, and a
reliability in high frequency and small and medium-sized good achievement has been made by the University of
power applications. Tennessee on the OCP circuit of SiC MOSFET [7]-[9]. With
regard to Si power MOSFET, on account of its widely use in
I. INTRODUCTION small power occasions and its low cost, adding an OCP
circuit in its drive circuit is uneconomical. On the contrary,
Gallium nitride high-electron-mobility transistor the research on GaN HEMT is still in the state of beginning
(HEMT) is a relatively new technology compared to silicon as well as the focus of the research is on the characteristic of
power MOSFETs which is introduced in the middle of GaN HEMT and the performance of its drive circuit, and
1970’s. Owning the features of higher breakdown voltage, there are no publications found discussing its OCP circuit.
increased operating temperature, higher switching frequency, Meanwhile, on the reason that GaN HEMT is easier
lower on-stage resistance and smaller size, it is expected to interfered on account of its high switching speed and the risk
take the place of silicon power MOSFETs in the future [1]. of overcurrent fault is increasing simultaneously, combined
In recent years, because of its superior characteristics and the with its high cost, the research on its OCP circuit is
development of high-power-density packaging technology, indispensable.
GaN HEMT has emerged as promising devices for high
switching frequency applications and gone through a rapid In this paper, an overcurrent protection circuit is
development. In recent years, in order to cater to the implemented to protect GaN HEMT under overcurrent fault
development tendency of high frequency, high power density condition. The organization of the paper is as follows:
and high efficiency in power electronics, as well as the section Ⅱintroduces the structure and the characteristics of
technology of silicon power MOSFET keeping close to its GaN HEMT. Section Ⅲ shows the operating principle and
bottleneck theory, more and more manufacturers go in to the the circuit design of the proposed overcurrent protection
research and production of GaN HEMT [2]-[4]. circuit. The simulation results and the prototype
In many key areas such as aviation and electric experimental results are shown in section Ⅳ. Section Ⅴ
automobile which use GaN HEMT to achieve high provides conclusions for this paper.
performance, in order to avoid the damage of GaN HEMT
II. CHARACTERISTIC OF GAN HEMT
and improve the reliability of the converters, protection
circuits are taken into consideration in the design of its drive The basic structure of enhancement mode power GaN
circuit. The common protection circuits include driver HEMT from Efficient Power Conversion Corporation (EPC)
protection circuit, overvoltage protection circuit, overcurrent is shown in Fig. 1. GaN transistor is a lateral device and it is
protection circuit and over-temperature protection circuit. built on a silicon substrate to simplify fabrication and reduce
Because overcurrent fault accounts for most of the faults of cost. On the top of the silicon substrate lies an aluminum
nitride (AlN) isolation layer to isolate the GaN from the

978-1-4799-5776-7/14/$31.00 ©2014 IEEE 2844


silicon substrate. On the next layer, a thick layer of highly III. OPERATING PRINCIPLE AND CIRCUIT DESIGN
resistive up-doped GaN is grown and used as a base of the The OCP circuits are mainly by detecting the drain
GaN transistor, then a thin layer of highly conductive AlGaN current of GaN HEMT I directly or indirectly to determine
lies on the GaN layer. Due to the AlGaN layer, the surface of whether the overcurrent fault occurs. Commonly there are
GaN layer and AlGaN layer creates a two dimensional two methods to detect the drain current. First, we can
electron gas (2DEG) layer and makes the GaN transistor a cascade a very small resistance R on the GaN HEMT, and
high electron mobility transistor (HEMT). A depletion the voltage of the resistance is VR (VR I · R). By detecting
region which is under the grid electrode is been created by
the voltage of the resistance, it can realize the judgment of
adding a metal layer to realize the same driving mode as
the overcurrent fault. But in this method in order to reduce
enhancement mode silicon power MOSFET.
the loss of the resistance, the value of the resistance R should
match the drain-source on-state resistance of the GaN HEMT
R _ or even smaller, which leads to a very small voltage
signal VR , so it is susceptible to interference. Second, we can
detect the drain-source voltage of GaN HEMT V to realize
the detection of its drain current I . In this method, when the
GaN HEMT is in turn-on state, the drain-source voltage V ,
the drain current I and the drain-source on-state resistance
R _ have the relationship of V I · R _ . So we can
realize the overcurrent fault judgment by detecting the
Fig. 1. Structure of enhancement mode GaN HEMT voltage V . Furthermore, as silicon power MOSFET, GaN
HEMT is also a device of positive temperature characteristic
The parameters of the GaN HEMT EPC2010 are shown that the drain-source on-state resistance R _ will increase
in table Ⅰ. From the table we can know, the gate threshold with the rising of temperature, when the overcurrent fault
voltage of the device is just 1.4V, which is far below the occurs, V change more obvious compared with VR .
silicon power MOSFET’s, which leads to an easier Therefore, the method of judging the overcurrent fault by
conduction false. Its parasitic capacitors, which include input detecting the drain-source voltage V is better.
capacitor (C ) and output capacitor (C ), are also smaller
than the silicon power MOSFET, so as to realize higher In this paper, a OCP circuit for GaN HEMT is proposed,
switching speed and smaller switching loss. For the reason which is mainly by detecting the drain-source voltage of
that the output characteristic curve of EPC2010 from its GaN HEMT to realize the detection of overcurrent Fault.
The schematic diagram of the protection circuit is shown in
datasheet just includes the first quartile workspace, and the
Fig. 3.
device could operate in the third quartile workspace, in this
paper a new output characteristic curve is presented, which
includes the workspaces first quartile and third quartile. The
new output characteristic curve of EPC2010 is shown in Fig. Vo1
Q Vo 2
2.
TABLE Ⅰ. PARAMETER OF EPC2010
Vds 200V Id (continue) 12A Rg Vth Vo 3
Vgs -5V - 6V Id (pulse) 60A
Vgs(th) 1.4V Rds(on) 18mΩ
Ciss 480pF Qg 5nC
Coss 270pF Qgd 1.7nC
Fig. 3. Schematic diagram of proposed overcurrent protection
Crss 9.2pF Qgs 1.3nC

As shown in Fig. 3, the proposed overcurrent protection


consists of sampling circuit, judging circuit and processing
circuit. The effect of sampling circuit is the detection of
drain-source voltage of GaN HEMT and the judging circuit
is used to judge the short circuit fault according to the output
of the sampling circuit. After overcurrent fault has been
detected, the processing circuit shuts off the GaN HEMT
rapidly and sends a fault signal to the microprocessor. The
schematic diagram of sampling circuit is shown in Fig. 4.

Fig. 2. Output characteristics of EPC2010

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addition, four resistances and an op-amp compose a
D2 differential amplification circuit, which is used to obtain the
VG RF0 difference of VC and VF , and then enlarge the difference N
R1 R3
times (N R F /R ). The relationship between the output of
R0 sampling circuit V and the drain current I can be given as
D1 equation (1), where V can realize the function of enlarging
Q R2 the drain-source voltage V when GaN HEMT is in turn-on
R0 state.
Csp VF1 RF0
V N·R _ ·I  (1)

After sampling circuit has succeeded sampling and


Fig. 4. Schematic diagram of sampling circuit
realized to amplify it, the work passes on to judging circuit.
In Fig. 4, Q is the GaN HEMT, D and D are the diodes, The signal which is the output of the sampling circuit,
compares with the threshold voltage of the judging circuit
R ~R are the resistances, C is the capacitor, VF is the
. When is higher than , the output of the judging
voltage of DC source and VG is the output pulse signal circuit is of high level. On the contrary, when is
(which has the same logic as the gate drive signal of GaN
smaller than , is of low level. Because _ doesn’t
HEMT). Then introduction of the detailed operating
change too much with the change of and equation (1), we
principle of the sampling circuit is shown in Fig. 5.
can choose a suitable which is corresponding to the
threshold current of the OCP circuit. When the overcurrent
D2 fault occurs, transfer from a low level to a high level,
VG and trigger the action of the processing circuit. Then GaN
R1 R3 HEMT is shut off by hardware circuit. At the same time the
processing circuit also sends an overcurrent signal to the
D1 microprocessor to inform that there is an overcurrent fault
Q R2 occurred. We can choose a suitable lockout time by
changing the parameter of processing circuit so that the
Csp microprocessor has enough time to take action about the
overcurrent fault.
The proposed OCP circuit judges the overcurrent fault
(a) On-state condition by detecting the voltage VC which detects the drain current
I indirectly. Because the voltage of the capacitor changes
by charging and discharging during the switch transition and
D2 some energy is need to participate in both two processes, the
proposed circuit has a strong anti-interference ability. In
R1 R3 addition, for the threshold voltage of the judging circuit V ,
it can be figured out precisely from the threshold current of
D1 the protection circuit I , , R _ of GaN HEMT and the
Q R2 amplification factor of differential amplification circuit N.
Therefore the proposed overcurrent circuit is more precise
and flexible and it is suitable for all kinds of GaN HEMTs.
Csp
IV. SIMULATION AND EXPERIMENTAL VALIDATION
In order to verify the feasibility of the proposed OCP
(b) Off-state condition circuit for GaN HEMT, we have done the simulation which
Fig. 5. Operating principle of the sampling circuit is based on the model of EPC2010 and through the LTspice
simulation software to simulate the severe overcurrent fault
As shown in Fig. 5(a), when Q is in on-state condition, and the protective effect of the protection circuit. In the
the pulse signal VG is of high level, then the diode D turns simulation, in order to consider time delay of the circuit and
on and D turns off, so C is charging through R and R the effects of the parasitic parameters, real device models
until its voltage VC reaches V VF ( VF is the forward were selected in the most of the component in the simulation.
voltage of the diode D ). On the contrary, as shown in Fig. The simulation result of the OCP circuit and the test circuit is
6(b), when Q is in off-state condition the pulse signal VG is shown in Fig. 6.
of low level, the diode D turns off and D turns on, so C
is discharging through R and R until its voltage VC down
to VF ( VF is the forward voltage of the diode D ). In

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(a) Simulation waveform (a) Experiment waveform

(b) Simulation waveform


(b) Experiment waveform
Fig. 6. Simulation result Fig. 7. Experimental result

As shown in Fig. 6(a), is the gate-source voltage of the The experimental waveform , , I and , , I are
GaN HEMT, is the output signal of the digital signal respectively shown in Fig. 7(a) and Fig. 7(b). In the
experiment, the proposed OCP circuit can limit the drain
processor (DSP), is the drain current of GaN HEMT and
current to about 38A within 203ns. For the reason that the
is the output signal of the processing which low level
parasitic parameters of the test circuit and the protection
stands for pulse lockout and high level stands for pulse circuit can’t be taken full consideration, as well as the
release. When a severe overcurrent fault occurred, the difference of the time delay between the practical
proposed protection circuit can timely detect the fault and do components and their simulation models, the preventive
the response that shutting off the GaN HEMT in the first and effect of the proposed overcurrent circuit in the experiment is
keeping the lockout condition for the time of . In Fig. worse than the one in simulation. The time delay of every
6(b), is the voltage of the capacitor , is the circuit in the experiment is compared in Table Ⅱ.
threshold voltage of the judging circuit and is the drain-
source voltage of GaN HEMT. From the simulation TABLE Ⅱ. COMPARISON OF TIME DELAY
waveform, the proposed protection circuit can detect the
overcurrent fault under 80 ns and limit the drain current to Sampling Judging Processing Total
25.5A within 180 ns. delay delay delay delay
120ns 35ns 48ns 203ns
In order to verify the feasibility of the proposed circuit
further, we have built an experimental prototype which As shown in Table Ⅱ, the time delay of sampling circuit
included the OCP circuit and overcurrent test circuit. The almost takes up three-fifths the total time delay. Reducing
device used for experimental test is the 200V/12A/25mΩ the capacitance of capacitor C can shorten the sampling
discrete GaN HEMT (EPC2010) from EPC Corporation delay which shortening the total time delay of the proposed
which is introduced briefly in section Ⅱ . From the test overcurrent circuit. But the voltage of C is easier to be
circuit we can get a surging current of the GaN HEMT from interfered by switching noise or other interference sources
0A to 60A in a very short time to simulate a severe and probably resulting in false trigger of the protection
overcurrent fault. The experimental waveform is shown in circuit. So we should take a perfect compromise between
Fig. 7. anti-jamming capability and time delay of the proposed
overcurrent circuit when choosing the capacitance of
capacitor C .

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V. CONCLUSION
In this paper, an overcurrent protection circuit for GaN
HEMT which is suitable for high frequency application has
been put forward. The proposed protection circuit depends
on the detection of drain-source voltage of GaN HEMT to
judge the overcurrent fault and can shut off the device timely,
sending an overcurrent fault signal to the microprocessor at
the same time. Simulation and prototype experiment have
been done to verify the feasibility of the proposed circuit. In
the simulation verification, the proposed protection circuit
can limit the drain current of the GaN HEMT to 25.5A
within 180ns. While in the experimental verification it can
limit the drain current to 37.8A within 203ns under severe
overcurrent fault condition. Both the simulation and the
experimental verification show that the proposed overcurrent
protection circuit has the characteristics of short-time
protection, simple circuit structure and strong capability of
anti-interference, as well as a positive meaning in improving
the reliability of high frequency, small and medium-sized
power applications of GaN HEMT.
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