Sandy Bridge (SNB) Client Configuration, formerly Gesher, is Intel's successor to

Westmere, a 32 nm process 5 Compatibility

 6 Compiler support
o 6.1 CPUID
 7 Architecture
o 7.1 Key changes from Westmere
 7.1.1 New instructions
o 7.2 Block Diagram
 7.2.1 Entire SoC Overview (dual)
 7.2.2 Entire SoC Overview (quad)
 7.2.3 Individual Core
 7.2.4 Gen6
o 7.3 Memory Hierarchy
 8 Overview
 9 System Architecture
o 9.1 Cache Architecture
 9.1.1 Cache Box
 9.1.1.1 Logic design techniques
o 9.2 Ring Interconnect
o 9.3 System Agent
 9.3.1 Power
 10 Core
o 10.1 Pipeline
 10.1.1 Broad Overview
 10.1.2 Front-end
 10.1.2.1 Fetch & pre-decoding
 10.1.2.1.1 Branch Predictor
 10.1.2.1.2 Instruction Queue & MOP-Fusion
 10.1.2.2 Decoding
 10.1.2.2.1 MSROM & Stack Engine
 10.1.2.3 New µOP cache & x86 tax
 10.1.2.4 Allocation Queue
 10.1.2.4.1 µOP-Fusion & LSD
 10.1.3 Execution engine
 10.1.3.1 Renaming & Allocation
 10.1.3.2 Optimizations
 10.1.3.3 Scheduler
 10.1.3.3.1 New 256-bit extension
 10.1.3.3.2 Scheduler Ports & Execution Units
 10.1.3.4 Retirement
 10.1.4 Memory subsystem
 11 Configurability
o 11.1 Fused features
o 11.2 Physical layout
 12 Testability
 13 Clock Domains
o 13.1 Overclocking
 14 Power
o 14.1 Active power optimization
 14.1.1 New thermal capacitance model
 14.1.2 Turbo Boost Technology 2.0
 o 14.2 Idle power optimization
 15 Graphics
o 15.1 Hardware Accelerated Video
 16 Sockets/Platform
 17 Die
o 17.1 System Agent
o 17.2 Core
o 17.3 Core Group
o 17.4 Dual-Core (GT1)
o 17.5 Dual-Core (GT2)
o 17.6 Quad-Core
o 17.7 Wafer
o 17.8 Additional Shots
 18 All Sandy Bridge Chips
 19 References
 20 Documents

Etymology

Sandy Bridge was originally called Gesher which literally means "bridge"