Save trees use e-Question Paper Go green DOWNLOAD THIS FREE AT www.viuresource.com ww | [| | 's Fifth Semester B.E. Degree Examination, Dec.2017/Jan.2! Verilog HDL Time: 3 hrs. Magis: 80 Note: Answer any FIVE full questions, choosing one full question, *b Mipdute. Module-1 19. Explain «typical design flow for designing VLSI IC eireuit fing the Wek diagram. (6 Marks) '. Explain top down design methodology and bottom up deffin oars) OR 2 a With a block diagram of 4-bit Ripple carry counter. shierarchy. (10 Marks) Explain the trends in Hardware Description s) (06 Marks) 3a. With a neat block diagram, explain the 'b. Explain the following data types with @ Nets Gi). Register Integer jog module. (06 Marky verilog: | (9) Time Register. 10 Marks) 4 4. Explain the port connection rules (06 Marks) b. Explain the two methods of con to external signals with an example. (10 Marks) 5a, What are Rise, Fall and :7 How they are specified in verilog? (06 Marks) Design a 2-t0-1 mult tales are as ollows: if and bufifl gates. The delay specification for these Min_[ Typ | Max. ] vy a | 3 a es Tun-of | 5 | 6 | 7 Write and stimulus in verilog (10 Markey oR 6 a Write flow level of abstraction for 4-£0-1 multiplexer using. conditional operators ro) b. ye dataflow description for 4-bit Full adder with carry lookahead, (0 Marks) Modute-4 7 aQpxpigip tne biocking assignment statements and non-blocking assignment statements with -vait examples, (08 Marks) fe a note on the following loop statements: TF While loop i) forever boop. (08 Marks) 102 BRANCHES | ALL SEMESTERS | NOTES | QUESTON PAPERS | LAB MANUALS A Viuresource Go Green initiativeSave trees use e-Question Paper Go green DOWNLOAD THIS FREE AT www.viuresource.com me OR Explain sequential and parallel blocks with examples. 0 og) Write a veritog program for 8-10-1 mukiplexer using case statement. ) Module-5 ° [Explain the synthesis process with a black diagram, (os marks) Write a VHDL program for two 4-bit comparator using data low dex (0s Marks) oR Explain the declaration of constant, variable and signal i@VHPMgugdexample. (08 Marks) 1. Write a VDI. program for heifadder in behavioral dM@iption (03 Marks) ve ve & x « 2of2 BRANCHES | ALL SEMESTERS | NOTES | QUESTON PAPERS | LAB MANUALS A Viuresource Go Green initiative