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Chapter

01. Ans: (a)


1 Basics of Semiconductor
(Solutions for Vol‐1_Classroom Practice Questions)

V
 3800 
1 L
Sol: N D  5  10 22  9
cm 3 5
10  3800 
= 5 ×10 cm–3
13 100  10 1
According to mass action law = 1900 cm/sec
np  n i2
04. Ans: (d)
n n p n  n i2 Sol: For the n-type semiconductor with
N D p n  n i2 (∵nn ≃ND) n = ND and p  n i2 / N D , the hole
n i2 concentration will fall below the intrinsic
pn  value because some of the holes recombine
ND
with electrons

pn 
1.5 10  10 2

05. Ans: (c)


5 1013
1015
= 4.5 ×106 cm–3 Sol: N A  acceptor / cm 3
1.6
n = 4000 cm2/V-sec
02. Ans: (b) p = 2000 cm2/V-sec
Sol: According to law of mass action n.p  n i2 p = p q p
Where ni = intrinsic carrier concentration. = NAqp (∵ 100% doping efficiency)
ND = doping concentration for a 1015
  1.6  10 19  2000
n- type material. 1.6
Majority carrier concentration = 0.2 mho/cm
n  ND
06. Ans: (d)
n2 Sol: According to mass action law.
p i
np  n i2
ND
n n p n  n i2
1 n p p p  n i2
p
ND
n p N A ≃ n i2
N D p n ≃ n i2
03. Ans: (b)
Sol: V = 5V
L = 100 mm 07. Ans: (a)
n = 3800 cm2/V-sec
Sol: RH = 3.6×10–4 m3/c
p = 1800 cm2/V-sec
Vdn = nE  = 9× 10–3 –m
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:3: Postal Coaching Solutions

Let us consider n-type semiconductor Jdrift = [nn+pp]


1 J ‘’
RH 
nq 
1 Charge concentration
n
qR H
1 11. Ans: (c)

1.6 10  3.6 10  4
19
Sol: Dn = 20 cm2/s
= 1.736 ×1022 m–3 n = 1600 cm2/Vs
D kT
  VT
08. Ans: (b)  q
Sol: At equilibrium 20
No. of e density = No. of hole density  VT   12.5 mV
1600
∵ given e density is n(x1) = 10 n(x2)
 n(x1) is majority 12. Ans: (d)
 n(x2) is minority Sol: Conductivity of a semiconductor,
 P(x2) = 10P(x1)   ( n n  p P ) q
Where, µn → mobility of electrons
09. Ans: (b) µp → mobility of holes
Sol:  p  3  10 3   m n → electron concentration
p = 0.12 m2/V-sec p → hole concentration
VH = 60mV q → electron charge
1
p 
p 13. Ans: (c)
1 Sol: NA = 2.29 × 1016
3  103  N 
p q p E Fi  E Fp  kT ln A 
1  ni 
p
3  10 1.6  10 19  0.12
3  2.29  1016 
 0.02586 ln 
10 
P = 1.736 × 1016 m–3  1 . 5  10 
1 = 0.3682 eV
RH 
pq ≃ 0.37 eV
1

1.736  10  1.6  10 19
16

14. Ans: (b)


= 360 m3/C
Sol: Given,
2 wires  W1 & W2
10. Ans: (b)
d2 = 2d1 where d = diameter of wire
Sol: Jdrift = nnqE + pPqE
L2 = 4L1 where L = length of wire
Jdrift = [(n.q)n + (p.q)p]E
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:4: Electronic Devices & VLSI

Relation between resistances of 17. Ans: (a)


W1 & W2 Sol: In intrinsic semiconductor,
.L L d No. of e = No. of holes
R  2 r
A r 2
.L 4L L 18. Ans: (a)
R  R 2 Sol: In P-type, as doping increases hole
d 2
d 2
d
 concentration p increases. According to
4
n2
L1 mass action law n p  i  electron
pp
R 1 d12 L1 d 22 L1 2d1 
2
  2  2 concentration decreases.
R 2 L 2 d1 L 2 d1 4L1
2
d2
19. Ans: (b)
R
 1 1  R1 = R2 Sol: In intrinsic semiconductor, electron hole
R2 pairs are generated due to external energy 
true. electron mobility is 2 to 3 times more
15. Ans: (c) than hole mobility  true. Both the
Sol: Hall voltage, VH is inversely proportional to statements are true but statement II is not a
carrier concentration correct explanation of statement I
V P P
 H2  1  1
VH1 P2 2P1 20. Ans: (a)
1 Sol: Both (A) and (R) are true, (R) is the correct
 VH 2  VH1 explanation of (A)
2

16. Ans: (b) ..........


CB CB
D kT
Sol:   VT Eg
 q ..........
23 Eg
0.36  1.38  10  300 VB VB
D 
1.6  10 19
n-type P-type
= 9.315×10-3m2/sec
Diffusion length, L = D
 9.315  10 3  340  10 6
= 1.77×10-3m

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2

PN Junction Diode
Chapter

01. Ans: (c) 04. Ans: (c)


Sol: p+
VG
VT
VS
VT
N Sol: 1 mA = IGO(e – 1) = ISO(e – 1)

IGO e0.718 /( 20.026 )


= 0.1435 /(10.026 )  4000 = 4  103
ISO e

05. Ans: (c)


Sol: In a PN Junction diode the dynamic
E I I
conductance g m  , gm  C
In P+, ‘+’ indicates heavily region and ‘n’ V VT
indicates lightly doped region. i.e. gm  IC

06. Ans: (d)


02. Ans: (a) Sol: i – v characteristic of the diode
v  0.7
2V0  1 1  i  A , v  0.7 V ….. (1)
Sol: w =
q N  N  500
 D A
From the given circuit, Loop equation :
w2 V0  VR 2 v = 10 – 1000 i, v  0.7 V ….. (2)
=
w1 V0  VR1
1 k

w2 0.8  (7.2) i
= + +
2m 0.8  (1.2) 10 V v
 
w2 = 4 m.

Eliminating ‘v’ from (1) and (2) :


03. Ans: (a)
10  1000 i  0.7 9.3
 AeDP p n 0 AeDn n P 0  i    2i
Sol: I    500 500

 LP Ln  9.3 3.1
3i  , i A  6.2 mA
AeDp p no 500 500
 I
LP
I eD P p no 07. Ans: (b) 20 

A LP Sol: Given,
1.602  10 19 12  1012 V = 0.498 V
 5.5 V 0.498 V
1 10 3 I
VT = 2 mV
= 1.92 mA/cm2
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:6: Electronic Devices & VLSI

5.5  0.498 09. Ans: (b)


 I
20 Sol: For either Si (or) Ge
= 0.2501  250 mA dV
 – 2.5 mV/0C
dT
08. Ans: (a)
To maintain constant current
Sol: Given I12  I1  32
V2  700mV  V = – 2.5  10-3 V
Given T1 = 40C T2 =? 40  20 o C o
C
 T2 T1
  V2 = 650 mV  660 mV
I12  I1  2 10 

 
10. Ans: (b)
 T210T1  A C 
I1  32  I1  2 
 Sol: C = 0 r  = 0 r
  d A d
T2  T1
11.7  8.85  1012
2 25 10 =
10  10 6
T  T1 = 10 F
 2 5
10
T2  T1 = 50 T2 = 50 +T1
T2 = 90C

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3

Zener Diode
Chapter

01. Ans: (d) Given that, Vz = 6V


Sol: Izmin = 5mA
Rs = 200 
Rmin  ILmax
+ IL=50mA 10  6 4
I   80 mA
50 50
30V + I = Izmin + ILmax
RL
10V
− ILmax = 75 mA

Vz 6
R L min    80 
I L max 75 10 3
Vs = 30 – 10 = 20V
Vs2 04. Ans: (b)
Power dissipation = Sol: In –ve cycle of i/p diode forward biased, so
Rs
replace by short circuit, so o/p = i/p with
20 2 –12V in o/p only option ‘b’ exists, so using
=
200 method of elimination answer is b.
=2W
05. Ans: (d)
Sol: Given circuit,
02. Ans: (c) R
Sol: Power rating of Zener diode = 5 mW
` I Z VZ  5  10 3 +10V
12V +
3
5  10 5V 100mA to
IZ   1 mA RZ
V0 = 5V
5 500mA
: Current flows through
the circuit is = 1 mA Ze Given, source voltage
10  5 Vs = 12V
RZ   5K
1m ILmin = 100 mA
ILmax = 500 mA
03. Ans: (b) Vz = 5V
Sol: I 50
Iz min = 0A
IZ IL
Vs  Vz
+ R 
I z min  I L max
R
10V
 12  5
R
500mA
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:8: Electronic Devices & VLSI

7  10 3 08. Ans: (a)


R Sol:
500
 In PN junction diode break down depends
70 on doping. As doping increases
R  R = 14 
5 breakdown voltage decreases.
 In Zener diode breakdown is less than
06. Ans: (c)
6V
Sol: Given circuit,
 It has Negative Temperature coefficient
1K (operate in R. B)
 Avalanche diode breakdown greater than
6.3 6 V.

Vi=13V V0 09. Ans: (b)


6.3 Sol: ‘A’ is correct and ‘R’ is correct but ‘R’ is
Not the correct explanation of ‘A’ because
DC voltage stabilizer circuit can be
implemented by using other components
V0 = 0.6 + 6.3 = 6.9 V like Op-Amp also. There is no need that
only Zener diode to be used.
07. Ans: (a)
Sol: The ideal characteristic of a stabilizer is
constant output voltage with low internal
resistance

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4

Special Purpose Diodes


Chapter

01. Ans: (a) 04. Ans: (a)


Sol: Tunnel diode Sol:
It is highly doped S.C (1 : 103) Symbol Circuit Applications
name
It is an abrupt junction (step) with both LED Direct
sides heavily doped made up of Ge (or) Band gap
GaAs
It carries both majority and minority
currents. Tunnel Fast
It can be used as oscillator diode Switching
Operate in Negative Resistance region circuits
Operate as fast switching device Varactor Electronic
diode Tuning
02. Ans: (c)
Sol: The values of voltage (VD) across a tunnel-
diode corresponding to peak and valley 05. Ans: (a)
currents are VP and VV respectively. The Sol: The tunnel diode has a region in its voltage
range of tunnel-diode voltage VD for which current characteristics where the current
the slope of its I-VD characteristics is decreases with increased forward voltage
negative would be VP  VD < VV known as its negative resistance region.
This characteristic makes the tunnel diode
03. Ans: (c) useful in oscillators and as a microwave
Sol: Schottky diode is made of metal and amplifier.
semiconductor to decrease the switching
times, hence it can be used for high
frequency applications.

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5

Bipolar Junction Transistor


Chapter

01. Ans: (b) 05. Ans: (a)


Sol:  = /(1+) = 0.9803 Sol: Given  = 0.995, IE = 10mA,
 =  Ico = 0.5mA
ICEO = (1 + ) ICBO
   = 0.9803/0.995
= 0.9852   
I CEO  1  I CBO
 1  
02. Ans: (d) ICEO = (1+199)  0.5  10-6
Sol: IC = 4mA ICEO = 100A
r0  20k
VA 06. Ans: (b)
r0  Sol: ICBO is greater than ICO. Reverse leakage
IC
current double for every Ten degrees rise in
VA temperature.
 20k
IC
VA > 20k × IC 07. Ans: (b)
VA > 20 × 103 × 4 × 10–3 Sol: Given base width WB = 5010–6 cm
VA > 80 Base doping NB = 21016 cm–3
r0= &  = 10–12 F/cm
03. Ans: (d) qN B WB2
Vpunch 
Sol: VA = 100 V 2
IC = 1 mA
VCE = 10 V 

1.6  10 19  2  1016  50  10  6 2

2  10 12
 V 
ICQ 1  CE  = IC 1.6  2  2500
VA  Vpunch   103  4V
 2
If VA   IC = ICQ
1 08. Ans: (a)
 IC = ICQ =
10 Sol:  = 0.98
1
100 IB = 40 µA
= 0.909 mA ICBO = 1 µA
 0.98
   49
04. Ans: (b) 1   1  0.98
Sol: The phenomenon is known as “Early For a CE active BJT
Effect” in a bipolar transistor refers to a IC =  IB + (1+) ICBO
reduction of the effective base-width caused = 49 × 40 × 10–6 + 50 × 10–6
by the reverse biasing of the base-collector
= 2.01 mA
junction.
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: 11 : Electronic Devices & VLSI

09. Ans: (b) 12. Ans: (b)


Sol: ICBO = 0.4 µA Sol:
ICEO = 60 µA Junction Region of
operation
ICEO = (1+) ICBO E-B C-B
I
1    CEO
I CBO F. B F.B Saturation
Region
60 F.B R.B Active Region
 = 150
0.4 R.B F.B Inverse active
 = 150 – 1 Region
= 149 R.B R.B Cut-off Region


1  13. Ans: (c)
149 Sol: High power transistors are made of Si to
 = 0.993
150 withstand high temperature
: Silicon is an indirect band gap material.
10. Ans: (c)
Sol: Variation of base width due to reverse
biased voltage across collector - base
junction is known as “Early Effect”.
E C
p n
n
WB
– +
VEB VCB
+ B –

As VCB increases, effective base width (WB)


decreases

11. Ans: (a)


Sol: ‘A’ and ‘R’ are correct and ‘R’ is the
correct explanation of ‘A’.
At very high temperature, extrinsic
semiconductors will behave as intrinsic i.e.,
charge carriers will remains constant.

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6

Junction Field Effect Transistor


Chapter

01. Ans: (d) 04. Ans: (d)


Sol: VG  4.2 V to 4.4 V Sol: ID
ID  2.2 mA to 2.6 mA
I D
gm 
VGS

(2.6  2.2)  10 3
 Vds
4.4  4.2
Vp
= 2 m℧ Drain current remains constant at pinch off
region even if the drain voltage increases.
05. Ans: (c)
02. Ans: (c)
Sol: ID Sol: JFET acts as a voltage controlled current
source
IDSS
06. Ans: (a)
Sol: Mobility of electron is higher than mobility
Vgs of hole
Vt Si
Vgs = Vt ID = 0 Electron mobility : 1350 cm 2 / v  s
Hole mobility : 450 cm 2 / v  s
Vgs = 0 ID = IDSS
Ge
03. Ans: (b) Electron mobility : 3600 cm 2 / v  s
Sol: IDmax = IDss = 10 mA Hole mobility : 1800 cm 2 / v  s
VP = –4V : Low leakage current means high input
VGS = –1 V impedance
: Reverse bias increases, channel width
 V 
2 reduces (wedge shaped)
I D  I DSS 1  GS 
 VP  07. Ans: (c)
2 Sol: VP = –8 V
 1 
3
IDSS = 12 mA
 10 10 1  
 4
From the given circuit,
2
3 VG = –5 V
 10 10 3   
4 VS = 0 V
= 5.625 mA VGS = –5 V
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: 13 : Electronic Devices & VLSI

VDS at which pinch –off region means 11. Ans: (a)


(VDS)min = VGS – VP 2I DSS 2  25  10 3
= –5 – (–8) Sol: g m 0   =5
Vp 10
= –5 + 8
=3V
12. Ans: (b)
08. Ans: (d) Sol: BJT is current controlled current source
Sol: P. Voltage controlled device –FET (3)
(Ri = 0 ; Ro = )
Q. Current controlled device –BJT (1)
Gain  B.W is high
R. Conductivity modulation device--
FET is voltage controlled current source
IMPATT diode (4)
(Ri =  ; Ro = 0)
S. Negative conductance device -UJT (2)
Gain  B.W is low
09. Ans: (d) UJT is a negative resistance device and can
Sol: IDSS = 12 mA be used as an oscillator
VP = –6 V UJT can be used as switch but can’t be
VGS = 0 V amplification
VDS = 7 V
At VGS = 0V, ID = IDSS 13. Ans: (a)
Sol: In FET majority carriers only exist.
  V 
2

= 12mA  I D  I DSS 1  GS
  In BJT majority & minority carriers exist.
  VP  
 
14. Ans: (a)
Sol: D
10. Ans: (d)
Sol: N – channel FET
Device : Application G
A. Diode Rectifier (3) S
Input resistance of FET is of the order of
B. Transistor Amplifier (1) tens (or) hundreds of mega ohms (Ms)
C. Tunnel Oscillator (2)
: Vgs is reverse bias.
diode
D. Zener Reference : In reverse bias very small leakage current
diode Voltage (4) ICO flows through the gate

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7

Optoelectronic Devices
Chapter
01. Ans: (a) 03. Ans: (b)
Sol: Sol: Avalanche photo diodes are preferred over
100 PIN diodes in optical communication
because Avalanche photo diodes are
(APDs), extracted from avalanche gain and
excess noise measurement and higher
+
sensitivity. PIN diodes generate more noise.

0.4V
04. Ans: (c)
By KVL, Sol: Photo diode always operates in reverse bias.
0.4 – 100× 1.8 × 10–3–VP = 0 When no light falls on photo diode, Small
amount of reverse saturation current flows
VP = 0.4 – 100 ×1.8 ×10–3 through the device called “dark current”.
= 0.22 V 05. Ans: (a)
VP = rp I Sol: Give,
V Eg = 1.12 eV,; 1 = 1.1 m
rp  P
I 2 = 0.87 m; Eg2 =?
0.22 12400 A 0 1
 Eg   Eg
1.8 10 3  
= 122.22 
E g1 2

02. Ans: (b) E g2 1
Sol: If illumination doubled then current passing 1 1.1
through the photo diode is doubled  E g 2  E g1   1.12 
2 0.87
ID = 21.8 = 3.6mA = 1.416 eV
Voltage across photo diode is 06. Ans: (a)
= 0.4 – 3.610–3 100 Sol: Sensitivity of photo diode depends on light
= 0.4 – 0.36 intensity and depletion region width.
Vp = rpIp
07. Ans: (d)
Vp 24  1.8
rp  Sol: I D  = 0.02707 A = 27.07 mA
Ip 820
0.04
  10 3 08. Ans: (c)
3.6
= 0.01111103 Sol: Photo diode operate in R.B: Photo diode
works on the principle of photo electric
= 11.11 effect.
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: 15 : Electronic Devices & VLSI

09. Ans: (b) 13. Ans: (d)


Sol: Voltage across PN junction diode resulting Sol: LED: F.B
in current which in turn produce photons Photo diode: R.B
and light output. This inversion mechanism
also called injection electro luminescence Zener diode: R.B
observed in LED’s. Ordinary diode: F.B
Tunnel diode: F.B
10. Ans: (b) Variable capacitance diode: R.B
Sol:  = 890 Ao Avalanche diode: R.B
1.24  10 6
 m
EG 14. Ans: (c)
Sol: Tunnel diode is always operated in forward
1.24  10 6
 bias and light operated devices are operated
890  10 10 in reverse bias. (Avalanche photo diode).
= 13.93 eV
15. Ans: (b)
11. Ans: (d) Sol: LED’s and LASER’s are used in forward
Sol: Solar cell converts optical (sunlight) energy bias.
into electrical energy. Photo diodes are used in reverse bias.

12. Ans: (b)


Sol: R = 0.45 A/W
P0 = 50 µW
I
R P
P0
IP = R P0
= 0.45 × 50
= 22.5 µA
Load current = IP + I0
= 22.5 µA + 1µA
= 23.5 µA

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8

MOSFET
Chapter

01. Ans: (c) = 1011 holes


Sol: VT = 1 0
VDS = 5 – 1 = 4 V
VGS = 3 – 1 = 2 V 05. Ans: (b)
Sol: 1) since it has n-type source & drain, it is
VGS  VT = 2 – 1 = 1 V n-channel MOSFET.
VDS > VGS  VT 2) Drain current flows only when VGS > 2V,
4 > 1  Saturation it implies it has threshold voltage (Vth)
of +2V
 It is enhancement type MOSFET.
02. Ans: (d)
3) VTh = +2V
Sol: In active region (or) saturation region,
W
channel is pinched off. Number of carriers 4) g m   n C ox VGS  VTh ,
present in the channel decreases from source L
end to drain end due to potential increases transconductance depends upon electron
from source to drain. mobility.

03. Ans: (d) 06. Ans: (b)


I D2 K n [VGS 2  VT ]2  A
Sol:  Sol: C sbo  si
I D1 K n [VGS1  VT ]2 d
d = 10 nm
I D2 [1400  400] 2
 si = rsi 0
1 mA [900  400] 2 = 11.7 8.9  1012 F/m
I D 2  4 mA

04. Ans: (d)


Sol: A = 1 sq m = 1012 m2
n+ n+
d = 1 m = 1 106 m
ND = 1019/cm3
ni = 1010
A = (0.21) + (0.21) + (0.21)
No. of holes = concentration  volume
Volume = A  d = 1018 m = 3(0.21) = 0.6  1012 m2

n i2 10 20 11.7  8.9 10 12  0.6  10 12


p   19 C sbo 
n 10 10 10 9
10 holes / cm 3 10  10 6 holes / m 3 Csbo = 6.24  1015
 No. of holes = 101061018  7 fF

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: 17 : MOSFET

In practical IC, this cap will provided to si


front and back sides also then area may be C d  C dep A  A
d
A = (0.61012) + (0.21) + (0.21) si
d A
A = 0.68  1012 m2 Cd
11.7  8.9 10 12  0.68  10 12 110 12
C sbo   7fF  (110 4 ) cm  0.857 m
10 10 9 7 12
10
6
07. Ans: (a)
Sol: Lov =  = 20 m 10. Ans: (b)
d = 10 nm, w = 1 m Sol: VTh = 0.5V
VG = 3V
rsi = 11.7, rox = 3.9
0 = 8.9  1012 F/m Pinch-off occurs when
VD = VG – VTh = 3 – 0.5 = 2.5V

Cov = Cox w Lov  ox w L ov
t ox 11. Ans: (a)
rox 0 Sol:
 w L ov
t ox
3.9  8.9  10 12  1  10 6  20  10 9

110 9 M1 M2
15
= 0.69  10 = 0.69 fF  0.7 fF

08. Ans: (a)


Sol: A = 1  104 cm2
20A
si = 1  1012 F/cm
ox = 3.5  1013 F/cm V

C0 = 7 pF 0.5 0.5
 A 2.5V 3V
C 0  C ox A  ox
t ox
ox 3.5 10 13 110 4
t ox  A V  2.5 V  3
C0 7 10 12 20  
0.5 0.5
= 5106 cm = 50 nm V = 7.75 Volts
09. Ans: (b) 7.75  2.5
I D1  10.5A
0.5
C0Cd
Sol:  1 pF 7.75  3
C0  Cd I D2   9.5 A
0.5
7 Cd 7
 1 C d  pF
Cd  7 6
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9

Biasing
Chapter

04. Ans: (b)


Biasing Sol: AC analysis,

01. Ans: (c) Vin 2M Vgs gmVgs 20K 2K Vout
V  VD 20V  12V
Sol: R D  DD   3.2 K
ID 2.5mA –
In self bias Zi
Z0
VGS = ID RS
2
 V  Zi = 2M, Z0  20K || 2K
I D  I DSS 1  GS 
 Vp 
 20
 Z0  K
 ID  11
VGS  VP 1  

 I DSS 
VGS = 1.06 V 05. Ans: (a)
V 1
R S  GS   400   V 
2

 I D  2 .5 Sol: I D  I DSS 1  GS 
 Vp 
02. Ans: (b) 2
  2
3
Sol: VG = VGS + ID RS  10  10 1   5.625mA
  8 
16  8
ID   4.4 mA
1.8 K KVL at output loop,

16  47
 
 20  2  103 I D  VDS  0
VG   5.45 V
138 
VDS  20  2  103  5.625  10 3 
VG  VGS 5.4  (2V) = 8.75V
RS    1.68K
ID 4.4 m

06. Ans: (b) (By Printing Mistake in Volume-I


03. Ans: (c)
Answer (c) is wrong, Correct answer is (b))
Sol: VDS = VDD  ID(RD + RS)
= 30 V – 4 mA(3.3K + 1.5K) Sol: By observing,

VDS = 10.8 V The circuit is common drain i.e., source


follower circuit.
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: 19 : Postal Coaching Solutions

VCC 02. Ans: (b)


Sol: Av(dB) = 20 log10 Av
Vin VCCS 50 = 20 log10 Av
gm = 0.01S
Rm = 10 m A v 10 (5 / 2 )  316.228
V0

03. Ans: 6.123 106 Hz


100K Sol: Small signal equivalent

1 Cgd
R 0  rd || R s ||
gm
G
= 10 M || 100 K || 100  gmVgs rd RD RL Cds
= 100  S

FREQUENCY ANALYSIS
rd||RD||RL
C1 C2 gmVgs Cds
= 8.33k
01. Ans: (d)
Sol:
RD  1 
P0 = 30W C 2  Cgd 1   ,
 Av 
Av = mid-band,
RL = 5
2
gain = gm(rd||RD||RL) = –16.66
V
P0  0
Req
RL
30  5 = V02
Ceq
V0 = 12.25 V
V0
AV 
Vi  1 
C 2  2pF1   = 2.12 pF
Av (dB) = 20 log10 Av   16.66 
20 = 20 log10 Av 1
fH 
Av = 101 = 10 2C eq R eq
V0
10 Ceq = 1 + 2.12 = 3.12 pF, Req = 8.33k
Vi
V 12.25 fH = 6.123 106 Hz
Vi  0  V  1.225 V
10 10
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: 20 : Electronic Devices & VLSI

6V
MOSFET BIASING
IDS1

M1
01. Ans: (b) + 5V 5V W
Sol: VT = 0.8   4
 L 1
Kn = 30  106
 W1   W  o Vx
      40 m1 IDS2
 L 1  L  2 M2
VD1  5 W
V0
  1
I D1  I D2  L 2

m2
 4(5  Vx  Vt ) 2  1Vx  Vt 
2
1 W

 n C ox   VGS1  VT  2

2  L 1  VGS1  VG  Vx  5  Vx 
1 W
  n C ox   VGS2  VT
2
  2
 2(5  Vx  Vt )  (Vx  Vt )
 L 2
VGS1  VD1  V0  Vx = 3V
= +5 – V0 04. Ans:  -7
VGS2  VG1  VS Sol:
= V0 – 0 = V0 gmVgs rd
 W  W
  5  V0   0.8    V0  0.8
2 2
rge G Rb//RL
L
 1 L
 2
V0 = 2.5V
Rs
02. Ans: (a)

Sol:  W  VGS  VT 2   W  VGS  VT 2


 L 1
1
 L 2
2
gmVgs rd RD
G
RD//RL
40 (4.2 – V0)2 = 15(V0 – 0.8)2 20//20K
V0 = 2.91 V Rs = 10K

03. Ans: (c)


Sol: From figure IDS1 = IDS2.  g m rd R D
AV 
R D  R s  rd  g m rD .R s
1
2
W
 n C 0 x   VGS1  Vt 2
 L 1 5  10K 10K

10K  1K  10K  5mA / V.10K.1K
=
1
2
W
 n C 0 x   VGS2  Vt  
2

 L 2  7.042
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: 21 : Postal Coaching Solutions

05. Ans: (d)  V 


2

V2 gmRs I D  I DSS 1  GS 


Sol:  ----- (1)  VP 
Vi 1  g m R s
2
V1  g m R D  1 
3
 ----- (2)  6  10 1  
Vi 1  g m R s RD  3
+ = 10.667 mA
(1)  (2)  V1 From the given circuit
V2 Rs  VS = ID × 0.75 k
 +
V1  R D Vi  RD
2
V2 = 10.667×10–3×0.75×103
 =8V
V2  1 VGSQs = 1 V

V1 2 VG – VS= 1 V
V1 = 2V2 VG = VS + 1
=9V
18R 2
06. Ans: (c) 9
Sol: IDSS = 6 mA R 2  110M
VP = –3 V  R2 = 110 M
VGSQ = 1V

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10

CMOS & Device Technology


Chapter

01. Ans: (c) 04.


Sol: A B  C   DE Sol: A  B C . clk
After option (c) as above answer
y  A  B C .1
02. Ans: (a)
y  A  B C  A B  C
Sol: x 1  x 2
05. Ans: (b)
03. Ans: (d) 1
Sol: Vdd Sol: n 
2Nf

1
n 10 8 sec 10 n sec
OUT 2  5 10 10 6

P Q

Device Technology Key

+VDD 01. (c) 02. (b) 03. No Answer


04. (b) 05. (a)

O/P

AND gate

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