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1
Department of Electronics & Communication Engineering, National Institute of Technology, Rourkela-
769008, Odisha, India
2
Department of Electrical Engineering, Indian Institute of Technology, Patna-801103, Bihar, India
*
pktiwari@iitp.ac.in, 91-612-3028351
quadruple gate MOSFET have been developed by considering the quantum confinement effects.
The 3D Poisson’s and 2D Schrödinger’s equations have been solved analytically to obtain the
threshold voltage and subthreshold current of ultrathin dual-metal quadruple gate MOSFET with
minimum cross-section of 3 nm×3 nm. The integrated charge at the threshold condition is
obtained by considering minimum sub-band energy levels with a square potential well
approximation for a two dimensional (width and height) carrier confinement. The subthreshold
characteristics have been analyzed by varying different device parameters like channel cross-
section, gate length ratio, gate metal work functions and gate oxide thickness. Further, the effect
of 2D charge carrier confinement on drain induced barrier lowering (DIBL) has also been
discussed using the proposed model. The proposed models are validated against the numerical
Key words: ultrathin MOSFETs, Quantum confinement effects, Bohm quantum potential,
The nanoscale multigate (MG) MOSFET structures have been of great interest owing to their
attractive electrostatic properties and potential applications [1-3] that cannot be achieved with
their conventional counterparts [4-5]. Among the innovative MG MOSFET structures [6-11],
quadruple-gate (QG) MOSFETs are found to be attractive building blocks for ultra large scale
integrated (ULSI) circuits [9-13]. In quadruple-gate (QG) MOSFET, the surrounded gate
electrodes produce maximum electric field in the channel region to minimize short-channel
effects [9-13]. Further, the optimization of short-channel effects has been achieved by ultrathin
channel thickness and gate engineering techniques [12-13]. In ultrathin QG MOSFETs, the
quantum mechanical effects (QMEs) start dominating as the width and height are scaled beyond
8 nm [13-14]. Because of the charge carrier confinement in nanoscale devices, the quantized
energy levels lead to reduction in gate capacitance, shift in threshold voltage and degradation of
subthreshold slope etc. [14-15]. Therefore, the quantum confinement effects need to be
Many attempts have been made to include the quantum mechanical effects in MOSFET devices
[13-16]. Firstly, in 1993 Omura et. al. [14] predicted the shift in threshold voltage due to the
quantization of charge carriers in a thin silicon layer. Later, Colinge et. al. [16] observed the
threshold voltage for a small cross-sectional tri-gate SOI MOSFETs. But, the work [16] was
based on only numerical simulation results. Kumar et. al. [9] presented the quantum threshold
voltage model for a triple gate MOSFETs. The authors [9] thoroughly observed the effects of
carrier confinement and effective mass variation of charge carrier on threshold voltage; however
the model [9] was limited to long channel devices. Further, Kumar et.al. [13] developed a
threshold voltage model for quad-gate nanowire MOSFETs by solving the Poisson’s and
Schrödinger equations. The authors [13] successfully explained the effect of charge carrier
In our previous work [12], the gate engineering technique was employed on quadruple gate
MOSFETs and the models of threshold voltage and DIBL were analyzed for short-channel
devices. However, the model [12] was restricted to cross-section of 10 nm×10 nm to avoid the
complexity owing to quantum confinement effects [14-15]. The act of further downscaling of the
cross-section of dual-metal (DM) QG MOSFETs beyond the 10 nm regimes makes the device
more prone to the effects like quantization of charge carriers, tunneling and hot-carrier induced
effects [14-15]. Therefore in this work a quantum model of dual-metal quadruple gate (DMQG)
MOSFETs is proposed.
In this work, the analytical models of the subthreshold characteristics like threshold voltage and
subthreshold current for ultrathin DMQG MOSFETs have been proposed. The Poisson-
Schrodinger equations have been solved analytically to obtain the discrete energy levels in
channel region, which is required for the calculation of inversion charge density to formulate the
subthreshold characteristic models. For simplification, the parabolic potential well at virtual
cathode position has been approximated to square potential well. The proposed quantum models
are validated against the numerical simulation results obtained from ATLAS 3D device simulator
[17].
2. Modeling
The three dimensional simulated structure of ultrathin dual-metal quadruple gate (DMQG)
MOSFET, obtained by using 3D ATLAS device simulator has been shown in Fig.1. The lightly
SiO2 of thickness t ox = 1 nm. Covering this dielectric layer, two different metals are surrounded
side by side, with work functions ∅𝑚1 and ∅𝑚2 , (where ∅𝑚1 > ∅𝑚2 ). In this way, the metal with
higher work function (∅𝑚1 ) works as control gate whereas the metal with lower work function
(∅𝑚2 ) functions as screen gate. By keeping ∅𝑚1 near source-end, the channel region gets
virtually divided into two regions. The region I under the control gate of length L1 governs the
electron flow and maintains the electrostatic control in the device, whereas the region II under
the screen gate of length L2 aims to minimize the variations in the electrical characteristics
The proposed model is limited to subthreshold regime of ultrathin DMQG MOSFETs. Thus, in
weak inversion regime the inversion charge concentration is ignored such that the 3D Poisson
equation can be approximated to Laplace equation [10, 12] and the Poisson-Schrodinger
equations could be decoupled and solved analytically. Thus, the 3D Laplace equation is given as
where, 𝜙𝑘 (𝑥, 𝑦, 𝑧) is the channel potential, which is assumed to follow the parabolic distribution
and is given as
2𝑥 2𝑦 2 2
𝜙𝑘 (𝑥, 𝑦, 𝑧) = 𝜙̂𝑘 (0,0, 𝑧) (1 − ( 𝑎 ) ) (1 − ( 𝑏 ) ) + 𝑉𝑔𝑠 − 𝑉𝐹𝐵𝑘 (2)
where 𝑘 = 1, 2 denotes the potential distribution in the channel region I and channel region II
respectively and 𝜙̂𝑘 (0,0, 𝑧) is the center channel potential distribution. Following our previous
work [12], the channel potential distribution is obtained by solving the Eq. (1) with the help of
Eq. (2) and appropriate boundary conditions as mentioned in [10-12]. The expression of channel
𝑧⁄ ) 𝑧 2𝑥 2 2𝑦 2
𝜙1 (𝑥, 𝑦, 𝑧) = ( 𝑘1 𝑒 ( 𝜆 − 2𝐵1 sinh (𝜆)) (1 − ( 𝑎 ) ) (1 − ( 𝑏 ) ) + 𝑉𝑔𝑠 − 𝑉𝐹𝐵1 (0 ≤ 𝑧 ≤ 𝐿1 )
(3)
𝑧⁄ ) 𝑧 𝑧−𝐿1 2𝑥 2
𝜙2 (𝑥, 𝑦, 𝑧) = ( 𝑘1 𝑒 ( 𝜆 − 2𝐵1 sinh (𝜆) + (𝑉𝐹𝐵2 − 𝑉𝐹𝐵1 ) (1 + cosh ( ))) (1 − ( 𝑎 ) ) (1 −
𝜆
2𝑦 2
( 𝑏 ) ) + 𝑉𝑔𝑠 − 𝑉𝐹𝐵2 (𝐿1 ≤ 𝑧 ≤ 𝐿1 + 𝐿2 ) (4)
𝐿
1 𝑘1 𝑒 ((𝐿1 +𝐿2 )⁄𝜆) −𝑘2 −𝑉𝑑𝑠 −(𝑉𝐹𝐵1 −𝑉𝐹𝐵2 ) cosh( 2 )
𝜆
where, 𝐵1 = 2 ( 𝐿 +𝐿 ) (5)
sinh( 1 2 )
𝜆
′ ′ ′
𝑎 = 𝑊 + 2𝑡𝑜𝑥 and 𝑏 = 𝐻 + 2𝑡𝑜𝑥 are the extended body width and height respectively, 𝑡𝑜𝑥 =
𝑡𝑜𝑥 𝜀𝑠𝑖
is electro-statically extended silicon layer thickness [10], where 𝜀𝑠𝑖 and 𝜀𝑜𝑥 are the relative
𝜀𝑜𝑥
𝑁𝑎 𝑁𝑑
permittivity of silicon and silicon oxide. 𝑉𝑏𝑖 = 𝑉𝑇 𝑙𝑛 ( ) be the built-in potential, Vfbk =
𝑛𝑖 2
Eg N
𝜙mk − (χsi + 2q + VT ln ( na )) is the flat band voltage of the regions 1 and 2 with k = 1 and 2,
i
𝐾𝑇
respectively; χsi is the electron affinity and 𝐸𝑔 is energy band gap of the silicon; and 𝑉𝑇 = is
𝑞
The threshold voltage of ultrathin devices is defined as the value of gate voltage at which the
inversion charge density (Qinv ) reaches to a critical charge (Qth ) which is obtained from
numerical simulation [10, 12-13]. The classical approach of finding the inversion charge in
2𝑥 2 2𝑦 2
where, 𝜙𝑣𝑐 (𝑥, 𝑦) = 2√B1 (k1 − B1 ) (1 − ( 𝑎 ) ) (1 − ( 𝑏 ) ) + 𝑉𝑔𝑠 − 𝑉𝐹𝐵1 (9)
The virtual cathode potential 𝜙𝑣𝑐 (𝑥, 𝑦) is a locus of minimum potential values distributed along
x- and y- directions at virtual cathode position Zmin . The virtual cathode position is obtained by
𝜕𝜙1 (0,0,𝑧)
solving the equation = 0, and given as
𝜕𝑉𝑔𝑠
λ k
Zmin = − 2 (ln (B1 − 1)) (10)
1
𝑎𝑏
where, λ is the characteristic length given by [12 ], λ =
√8(𝑎2 +𝑏2 )
Solving Eq. (8) at 𝑉𝑔𝑠 = Vth,C and Qinv,C = Qth gives the classical threshold voltage expression
as given in [12].
In ultrathin DMQG MOSFETs, the electron energy gets quantized due to the 2D structural
confinement in both x- and y- directions. The quantized sub-band energy levels could be
ℏ2 𝜕 2 𝜓 ℏ2 𝜕 2 𝜓
+ 2𝑚 + (𝐸 − 𝐸𝑐,𝑚𝑖𝑛 )𝜓 = 0 (11)
2𝑚𝑥 𝜕𝑥 2 𝑦 𝜕𝑦 2
where, 𝜓 represents wave function of electron, 𝐸 is confined energy levels, 𝐸𝑐 is minimum
energy level in the conduction band, ℏ is the reduced plank constant and 𝑚𝑥 , 𝑚𝑦 are the electron
From the numerical simulation of ultrathin DMQG MOSFET, it is evident that the potential
Solving Eq. (11) with a parabolic potential well will be a complex mathematical practice. Hence,
to reduce the complexity in solving the Eq.(11), the parabolic well has been approximated with
square potential well by considering the bottom of the potential well as the minima of conduction
𝐸𝑔 3𝑎 3𝑏
𝐸𝑐,𝑚𝑖𝑛 = − 𝑞𝜙𝑣𝑐 (𝑥 = , 𝑦 = 14) (12)
2 14
Solving Eq.(11) with variable separable technique gives the solutions as [13],
4 𝑛𝑥 𝜋(𝑥−(𝑎⁄2)) 𝑛𝑦 𝜋(𝑦−(𝑏⁄2))
𝜓𝑛𝑥 𝑛𝑦 (𝑥, 𝑦) = √𝑎.𝑏 sin ( ) sin ( ) (13)
𝑎 𝑏
where, 𝑛𝑥 = 1,2 … and 𝑛𝑦 = 1,2 …. are the principal quantum number and 𝑁 = 1,2,3 are three
different series of quantized energy levels for silicon MOSFET with <100> orientation [8] and is
given as
ℏ2 𝜋 2 1 𝑛 2 1 𝑛𝑦 2
𝐸1 (𝑛𝑥 , 𝑛𝑦 ) = (𝑚 ( 𝑎𝑥 ) + 𝑚 ( 𝑏 ) ) (15)
2 𝑙 𝑡
ℏ2 𝜋 2 1 𝑛 2 1 𝑛𝑦 2
𝐸2 (𝑛𝑥 , 𝑛𝑦 ) = (𝑚 ( 𝑎𝑥 ) + 𝑚 ( 𝑏 ) ) (16)
2 𝑡 𝑙
ℏ2 𝜋 2 1 𝑛 2 1 𝑛𝑦 2
𝐸3 (𝑛𝑥 , 𝑛𝑦 ) = (𝑚 ( 𝑎𝑥 ) + 𝑚 ( 𝑏 ) ) (17)
2 𝑡 𝑡
where, 𝑚𝑙 = 0.916×𝑚0 and 𝑚𝑡 = 0.19×𝑚0 are the longitudinal and transversal effective
where, 𝑁1𝐷 (𝐸, 𝐸𝑛𝑥 𝑛𝑦 ) is 1D density of states (DOS) and 𝑓(𝐸) is the Fermi-Dirac distribution
function:
1
𝑚𝐷 −
2
𝑁1𝐷 (𝐸, 𝐸𝑛𝑥 𝑛𝑦 ) = √ . (𝐸 − 𝐸𝑛𝑥 𝑛𝑦 ) (19)
2𝜋ℏ2
1
𝑓(𝐸) = 1+𝑒𝑥𝑝((𝐸− 𝐸 (20)
𝐹 )⁄𝐾𝑇 )
where, 𝑚𝐷 is the effective mass of electron perpendicular to the direction of quantization (𝑚𝐷 =
The quantum inversion charge density in Eq.(18) is dependent on gate voltage via the position of
fermi level with respect to minimum value of quantized energy level and with respect to different
energy levels. However, in weak inversion region the fermi level is found to be much below the
conduction band energy level. Therefore, using Boltzmann statistics the quantum inversion
𝑚𝐷 𝑘𝑇 𝐸𝐹 −𝐸𝑛𝑥 𝑛𝑦
𝑄𝑖𝑛𝑣,𝑄 = 𝑞 ∑𝑁 ∑𝑛𝑥 ∑𝑛𝑦 √( ) 𝑒𝑥𝑝 ( ) (21)
2ℏ2 𝑘𝑇
Using Eqs.(12), (14)-(17), the quantum inversion charge density given in Eq.(21) could be
rewritten as
it is found that the lowest energy level 𝐸𝑛𝑥 𝑛𝑦 with 𝑛𝑥 = 1 and 𝑛𝑦 = 1 has most of the electrons.
Hence, to obtain the quantum charge density, only one energy level has been considered [8, 13].
Thus, the quantum charge density obtained in Eq. (22) could be rewritten with 𝑛𝑥 = 1 and 𝑛𝑦 =
1 as
𝐸𝐹 −𝐸𝑐,𝑚𝑖𝑛
𝑄𝑖𝑛𝑣,𝑄 = 𝑞𝑒𝑥𝑝 ( ).Υ (23)
𝑘𝑇
where,
Following the definition of threshold voltage for ultrathin MOSFETs [12, 13], the quantum
charge density (𝑄𝑖𝑛𝑣,𝑄 ) at the virtual cathode is equated to the critical charge (𝑄𝑇𝐻 ). However,
there is no standard value to find the critical threshold charge. So, using 3D atlas simulator the
critical threshold charge is calibrated for each devices and an average charge is found to 𝑄𝑇𝐻 =
The threshold voltage of ultrathin DMQG MOSFETs is obtained by equating the right hand side
of Eq. (23) to 𝑄𝑇𝐻 at 𝑉𝑔𝑠 = 𝑉𝑇𝐻,𝑄 , which gives the following equation
𝐸𝑔 𝑄
1.33√𝐵1′ (𝑘1′ − 𝐵1′ ) + 𝑉𝑇𝐻 − 𝑉𝐹𝐵1 = 𝑇𝐻
− 𝐸𝐹 + 𝑉𝑇 𝑙𝑛 ( 𝑞.Υ ) (25)
2
Further simplification of Eq. (25) gives the analytical equation of threshold voltage for an
𝐿1 +𝐿2 2
Where 𝑐1 = 1 − 1.77 (𝑠𝑒𝑐ℎ ) (27)
𝜆
𝐿1 +𝐿2 𝐸𝑔
𝐿1 +𝐿2 𝑄
𝑐2 = (1.77(𝑉𝑏𝑖 + 𝑉𝐹𝐵1 ) + 𝐶0 )𝑒 ( ) 𝑇𝐻
2𝜆 . 𝑠𝑒𝑐ℎ ( ) − 2 ( 2 − 𝐸𝐹 + 𝑉𝑇 𝑙𝑛 ( 𝑞.Υ )) − 2𝑉𝐹𝐵1 − 𝐶0
2𝜆
(28)
𝐸𝑔 𝑄 2
𝑇𝐻
𝑐3 = ( 2 − 𝐸𝐹 + 𝑉𝑇 𝑙𝑛 ( 𝑞.Υ ) + 𝑉𝐹𝐵1 ) − 1.77(𝐶0 (𝑉𝑏𝑖 + 𝑉𝐹𝐵1 ) − 𝐶0 2 ) (29)
𝐿 +𝐿 𝐿 +𝐿
( 1 2) ( 1 2) 𝐿 𝐿 2
𝑉𝑏𝑖 (𝑒 𝜆 −1)+𝑉𝐹𝐵1 (𝑒 𝜆 −𝑐𝑜𝑠ℎ 2 )+2𝑉𝐹𝐵2 (𝑠𝑖𝑛ℎ 2 ) −𝑉𝑑𝑠
𝜆 𝜆
𝐶0 = 𝐿 +𝐿 (30)
2𝑠𝑖𝑛ℎ 1 2
𝜆
Using Eq. (26), the drain induced barrier lowering (DIBL) of ultrathin DMQG MOSFET could
be expressed as [12]
𝑉𝑇𝐻,𝑄 | − 𝑉𝑇𝐻,𝑄 |
𝑉𝑑𝑠,ℎ𝑖𝑔ℎ 𝑉𝑑𝑠,𝑙𝑜𝑤
𝐷𝐼𝐵𝐿 = − (31)
𝑉𝑑𝑠,ℎ𝑖𝑔ℎ −𝑉𝑑𝑠,𝑙𝑜𝑤
Using the quantum inversion charge obtained in Eq. (23), the subthreshold current for ultrathin
DMQG MOSFET could be modeled using the Pao-Sah’s double integral formula [18-21]. The
modified Pao-Sah’s double integral equation for ultrathin DMQG MOSFETs is given as [20].
𝑉
𝜇𝑉𝑇 (1−𝑒𝑥𝑝(− 𝑑𝑠 ))
𝑉𝑇
𝐼𝐷 = 𝐿1 −1 𝐿1 +𝐿2 −1 (32)
∫0 𝑄𝑖𝑛𝑣,𝑄1 𝑑𝑧+∫𝐿 𝑄𝑖𝑛𝑣,𝑄2 𝑑𝑧
1
where, 𝜇 is mobility of electrons; 𝑄𝑖𝑛𝑣,𝑄𝑘 is the quantum inversion charge in the channel region I
The quantum inversion charge given in Eq. (23) is obtained by integrating the density of sates
and Fermi-Dirac function in the channel region I at virtual cathode. Having higher metal work
function to control gate than screen gate, it has been assumed that the inversion charge in
channel region I would provide major contribution in total subthreshold current of ultrathin
DMQG MOSFETs. Hence, Eq. (32) could be rewritten neglecting 𝑄𝑖𝑛𝑣,𝑄2 and replacing 𝑄𝑖𝑛𝑣,𝑄1
with 𝑄𝑖𝑛𝑣,𝑄 given in Eq. (23), and the subthreshold current is given as
𝑉𝑑𝑠
𝐼𝐷 = 𝜇𝑉𝑇 (1 − 𝑒𝑥𝑝 (− )) 𝑄𝑖𝑛𝑣,𝑄 𝐿1 (33)
𝑉𝑇
In fact, the present proposed model of Eq. (26) is an improved and extended version of threshold
voltage models reported in references [12-13]. Further, the proposed model can also be used to
In this section, the threshold voltage and subthreshold current for ultrathin DMQG MOSFETs
have been analyzed by varying device parameters like gate length ratio, difference of gate metal
work function, varying channel thickness (𝑊 = 𝐻). The developed analytical results are
validated by comparing with numerical simulation results obtained from 3D ATLAS device
simulator from SILVACO [17]. The Bohm quantum potential (BQP) model has been
incorporated in the numerical simulation, which could be calibrated to match the Poisson-
Schrodinger solver to address the quantum confinement effects in ultrathin DMQG MOSFETs
[22-23]. The BQP model ensures good calibration for silicon or non-silicon materials, planar or
non-planar devices with proper fitting parameters. The BQP model provides better convergence
properties when compared to other quantum models. Further, the Fermi-Dirac statistics has also
been included in the model [22-23]. The BQP model is initiated using the command line BQP.N
Figure 2 shows the variation of threshold voltage with channel length for different gate length
ratios. For higher gate length ratio, (𝐿1 : 𝐿2 = 2: 1), the threshold voltage falls to nearly 20 mV as
the channel length is reduced from 90 nm to 20 nm. Whereas, in case of low gate length ratio
(𝐿1 : 𝐿2 = 1: 2), the threshold voltage falls by 50 mV for the same channel length variation. This
high fall of threshold voltage in case of 𝐿1 : 𝐿2 = 1: 2 is due to the decreased electrostatic control
in the channel region. Hence from Fig.3, it may be deduced that considering larger part of
control gate could minimize the threshold voltage roll-off. Further, in Fig.3, the quantum
confinement effect on the threshold voltage has also been shown by comparing the quantum
threshold voltage model with the classical threshold voltage model [12], for a gate length
ratio 𝐿1 : 𝐿2 = 2: 1. It is observed that due to the quantum carrier confinement effects the
quantum threshold voltage has an incremental shift with respect to classical threshold voltage
[12] of DMQG MOSFET having 5 nm×5 nm crosssection. Figure 3 shows the effect of screen
gate metal work function over the quantum threshold voltage. When the gate metal work
function difference [∅𝑚1 (= 4.8 ev) − ∅𝑚2 (= 4.6⁄4.3⁄4.1 ev)] increases by considering
constant control gate work function, the minimum value of the channel potential is observed to
be increasing [12], which results in reduced threshold voltage. Clearly, increasing the metal work
function difference from 0.2 eV to 0.7 eV, the quantum threshold voltage is reduced from 0.379
V to 0.358 V respectively for 20 nm channel length with gate length ratio of 1:1.Therefore, it is
noted that the devices with low value of screen gate metal work function, in other words for large
metal work function difference, will be having high threshold voltage roll-off. It is also important
to note from both Fig. 2 and Fig. 3 that the dual-metal-gate structure has a strong impact over the
The variation of the quantum, 𝑉𝑇𝐻,𝑄 and classical,𝑉𝑇𝐻,𝐶 threshold voltage differences for
threshold voltage due to the quantum confinement effects is shown along the y-axis and the
channel length variation along the x-axis of Fig. 4. Because of the addition of short-channel
effects to the quantum confinement effects, the difference of threshold voltages (𝑉𝑇𝐻,𝑄 − 𝑉𝑇𝐻,𝐶 )
increases for short-channel devices when compared to long channel devices. Further, it is
observed that with decreasing cross-sectional area the difference of quantum and classical
threshold voltage increases. This difference in threshold voltage is due to the effect of two
dimensional confinements of charge carriers in the channel regions. As the channel cross-section
is decreased from 10 nm×10 nm to 3 nm×3 nm, the difference of quantum and classical
threshold voltage is increased from 5 mV to 62 mV for channel length of 50 nm. In Fig. 5, the
variation of subthreshold current is plotted against the gate to source voltage for different gate
length ratios. The effect of gate length ratio could be observed by considering 𝐿1 : 𝐿2 = 1: 1 as
reference. In case of low gate length ratio (𝐿1 : 𝐿2 = 1: 2), the electric field control over the
charge carrier weakens as the control gate length is decreased and thus the leakage current
gate will strengthen the electric field over the charge carriers and helps in reducing the leakage
currents. Figure 6 shows the subthreshold current variations against the gate to source voltage for
different channel thicknesses (W = H = 10⁄8⁄5/3 nm). Varying the channel thickness from 10
nm to 3 nm, the subthreshold current decreases from 10−11A to 10−14 A respectively. This is
because of strong quantization of charge carriers and increased electrostatic control over the
charge carriers in the ultrathin channel region. Figure 7displays the effect of drain voltage on
threshold voltage. This variation in threshold voltage due to the drain voltage is estimated by
drain induced barrier lowering (DIBL) which is defined in Eq. (31). The DIBL has significant
value as the channel length is scaled beyond 35 nm for a DMQG MOSFET. For reducing the
channel length from 35 nm to 20 nm, the DIBL value increases from 2 mV/V to 15.2 mV/V
respectively as shown in Fig. 7. This effect of drain voltage on threshold voltage could be
minimized by selecting larger screen gate length. Further, it is noticed from Fig.7 that the
DMQG devices show better resistance to the drain voltage when compared to quadruple gate
(QG) MOSFETs.
Conclusion:
The present work deals with the subthreshold characteristics of ultrathin DMQG MOSFETs
which have been derived by an analytical model considering quantum confinement effects. The
proposed models are obtained from 3D Poisson’s and 2D Schrodinger’s equations and are
capable of predicting the subthreshold characteristic for ultrashort and ultrathin body devices
competently. For high performance of the proposed device, it would be preferred to consider
ultrathin channel cross-section, the minimum metal gate work function difference and large
control gate length. Further, the DIBL of ultrathin DMQG MOSFETs has also been compared
with QG MOSFETs and it is inferred that the DMQG MOSFETs possess high resistance towards
drain voltage fluctuations. The presented model results are in perfect agreement with the 3D
References:
Captions to Figures
Fig.2 Threshold voltage variation against the channel length with gate length ratio (𝐿1 : 𝐿2 ) as a
varying parameter.
Fig.3 Quantum threshold voltage variation against the channel length with different screen gate
work functions (𝜙𝑚2 ).
Fig.4 Variation of difference of quantum and classical threshold voltages along the channel
length for different channel cross-sections.
Fig.5 Subthreshold current variation with gate to source voltage for different gate length ratios (
L1 : L2 ).
Fig.6 Subthreshold current variation with gate to source voltage for different gate channel cross-
sections
Fig.7 DIBL variation against the channel length for different gate length ratios (𝐿1 : 𝐿2 ).