electronics

Article
An Effective Switching Algorithm for Single Phase
Matrix Converter in Induction Heating Applications
Anand Kumar 1, * ID , Pradip Kumar Sadhu 1 , Dusmanta Kumar Mohanta 2 and
Maddikara Jaya Bharata Reddy 3
1 Department of Electrical Engineering, Indian Institute of Technology, Indian School of Mines,
Dhanbad 826004, India; pradip@iitism.ac.in
2 Department of Electrical and Electronics Engineering, Birla Institute of Technology, Mesra, Ranchi 835215,
India; dkmohanta@bitmesra.ac.in
3 Department of Electrical and Electronics Engineering, National Institute of Technology, Trichy 620015, India;
jbreddy@nitt.edu
* Correspondence: anand.2016dr0084@ee.ism.ac.in; Tel.: +91-977-193-0334




Received: 26 June 2018; Accepted: 16 August 2018; Published: 18 August 2018


Abstract: Prevalent converters for induction heating (IH) applications employ two-stage conversion
for generating high-frequency magnetic field, namely, AC to DC and then DC to high-frequency
AC (HFAC). This research embarks upon a direct conversion of utility AC to high frequency AC
with the design of a single-phase matrix converter (SPMC) as a resonant converter using a modified
switching technique for IH application. The efficacy of the proposed approach is validated through
different attributes such as unity power factor, sinusoidal input current and low total harmonic
distortion (THD). The developed prototype-embedded system has high pragmatic deployment
potential owing to its cost effectiveness using Arduino mega 2560 and high voltage/current as
well as low switching time IXRH40N120 insulated-gate bipolar transistor (IGBT). Different results
of the prototype-embedded system for IH application have been verified using Matlab Simulink
environment to corroborate its efficacy.

Keywords: Arduino 2560; bi-directional switches; induction heating; resonant converter; resonant
frequency and single-phase matrix converter

1. Introduction
The recent trend shows that the industrial as well as domestic induction heating (IH) has become
extremely popular because of its unique advantages such as higher efficiency, reduced heating time
and environmental friendliness. To implement the IH for different appliances, a high-frequency
(HF) alternating electromotive force (e.m.f.) is required that typically lies between 20 KHz to
100 KHz depending on the type of applications such as brazing, melting processes and for domestic
cooking [1–4]. In the last few decades, various new topologies of HF resonant inverter have been
proposed to generate H.F alternating e.m.f. [5]. However, ongoing research and development are
entering into a new phase ensuring cost-effectiveness [6,7], increased cooling capabilities [8] and high
efficiency [9,10] within the field of electrical power conversion and process.
The conventional IH system follows two stages: (a) rectification [11,12] and (b) HF resonant
inverter operation [13–15]. In the first stage, DC power is obtained using a full bridge diode rectifier.
After rectification, a small value of inductor and capacitor is connected to obtain DC with ripple content
ensuring unity input power factor [12]. This high ripple DC link voltage acts as a power supply for the
HF resonant inverter (Figure 1a). This is also an indirect method for the conversion of supply/grid
frequency to HFAC.

Electronics 2018, 7, 149; doi:10.3390/electronics7080149 www.mdpi.com/journal/electronics

Electronics 2018, 7, 149 2 of 17
Electronics 2018, 7, x FOR PEER REVIEW 2 of 17

Various
Various topologies
topologies ofof
HFHF resonant
resonant inverters
inverters have
have been
been developed
developed such
such asas the
the half-bridge
half-bridge series
series
resonant inverter (HB-SRI) [16], full bridge series resonant inverter (FB-SRI) [17], single switch
resonant inverter (HB-SRI) [16], full bridge series resonant inverter (FB-SRI) [17], single switch
topology[18]
topology [18]etc.
etc.Although,
Although,these theseconverters
convertershavehavebeen
beendesigned
designedusingusinginsulated-gate
insulated-gatebipolar
bipolar
transistor (IGBT) because of its higher current/voltage handling capability, reduced control
transistor (IGBT) because of its higher current/voltage handling capability, reduced control complexity
andcomplexity and
less cost. In less cost.
addition, IGBTs In should
addition,haveIGBTs shouldrecovery
low reverse have low timereverse
and high recovery
switchingtimefrequency.
and high
It switching
can be seenfrequency.
that owingIttocan be seen
different that in
stages owing to different stages
the conventional in the
IH system, itsconventional IH system, its
efficiency is automatically
efficiencyMoreover,
reduced. is automatically
indirectreduced.
method Moreover,
of conversionindirect
uses method
reactiveofenergy
conversion
storage uses reactive Thus,
elements. energy
storage
this methodelements.
makes theThus, this method
converter bulkymakes the converter
and unnecessary bulky
losses and across
occur unnecessary losses
the diode. occur across
Additionally,
the diode.
two-stage Additionally,
conversion of ACtwo-stage conversionincreases
to HFAC conversion of AC tothe HFAC conversion
number increases
of components usedthealong
number
withof
components used along with complex control algorithms (such as Phase Locked Loop (PLL),
complex control algorithms (such as Phase Locked Loop (PLL), Proportional Integral Derivative (PID)
andProportional
Fuzzy logicIntegral Derivative
controller) (PID)high
for obtaining and power
Fuzzy factor,
logic controller) for obtaining
low total harmonic high(THD)
distortion poweratfactor,
the
low total harmonic distortion (THD) at the input side and good power quality [19,20]. Overall, these
input side and good power quality [19,20]. Overall, these existing topologies increase the cost as well
asexisting topologies
complexity increase the cost as well as complexity of the controller.
of the controller.

POT

IH coil
Iac
Idc Idc Iac
R0,L0
1 − φ AC Cr
50HZ

V0
Vdc
Vm
t t t

(a)

Iac Iac

Cr L0
230Vr.m.s R0
50Hz

BIDIRECTIONAL
SWITCH
(S1,S2,S3,S4)

(b)
Figure1.1.(a)(a)Conventional
Figure ConventionalIHIHTopology
Topology and
and (b)(b) Block
Block diagram
diagram ofof proposed
proposed topology.
topology.

Because of some preceding demerits, the popularity of I0 an indirect method started decreasing

and therefore, researchers started focussing on a direct methodR0of AC conversion L0 [21]. However,
230V Power Circuit of
a lot of work50Hz
has been done in this fieldSPMC
and has been widely used in several applications [22,23].
Cr
By employing direct AC–AC converters, reductions in both component count, as well as intermediate
DC link reactive element, have been accomplished [24,25]. Matrix converters, Cycloconverter and
AC voltage controllers are examples of direct AC–AC conversion. Recent research shows that with
230V
the evolution of these direct AC–AC converters and their various advanced control techniques, it is
Proposed Controller
possible to avail it in many applications such as traction system, industrial as well as domestic IH.
12V Vg1
The matrix converters are newly advanced converters
uC (AC–AC) that enables high
Isolation
power density and
S1a,S4a,S3a,S2a
ZCD
eliminates DC link components with improved Vg INT0
operational life [26].
Circuit Vg2
INT1 TLP250 S2b,S3b,S4b,S1b
Currently, direct AC–AC conversion is being applied for IH applications [27–29]. All these
converters use HB–SRI, which relies on four-quadrant equivalent switching devices that are
combination of two anti-series IGBTs. Diode In [30], a SiC based AC to AC converter for domestic IH
12Vdc
Rectifier
Electronics 2018, 7, 149 3 of 17

has been proposed, which uses solely four switches and only single stage energy conversion has been
achieved. Moreover, single-phase matrix converter (SPMC) (which is the part of Matrix Converter)
may also be used for IH applications [31]. Numerous studies have been done related to SPMC and its
switching algorithm but because of its complicacy, less use of SPMC has been seen for IH application
till date [21,32]. However, some authors have proposed a suitable switching algorithm ensuring unity
power factor, commutation strategy and low THD for SPMC in IH applications [33,34]. But these
switching algorithms seem too complicated. Therefore, in this article, to enhance potency and eliminate
DC link components, a SPMC (direct AC–AC converter) is proposed using modified technique to
make it appropriate for IH applications (Figure 1b). This modified switching algorithm/technique
requires only two pulse width modulation (PWM) signal to operate SPMC as a frequency changer or
as resonant converter for IH applications and these pulses has been generated through embedded
system. Due to requirement of less number of PWM signals, the overall cost and complexity of the
controller reduces.
The major contribution of this research is to develop an effective switching pattern such that
SPMC works as a resonant converter and hence, can be applied for IH applications. In pursuance
of this goal, switching frequency is kept higher than the resonant frequency so as to ensure zero
voltage switching (ZVS). The high power factor, sinusoidal input current and low THD have been
major achievements for improving its efficacy considerably. The proposed prototype system is in
full agreement with recent developments in embedded technology Arduino mega 2560 and high
voltage/current as well as low switching time IXRH40N120 IGBT (Appendix A, IXYS Corporation,
Santa Clara, CA, USA). Another unique feature of the proposed technique based on embedded system
is that it utilizes a single stage conversion of 50–60 Hz AC power to HFAC directly (i.e., as a frequency
changer) without any intermediate DC link element using proposed switching algorithm and it has
been congruous with simulated results. Using this technique, a higher frequency can be generated to
meet the criteria of IH system.
The rest of the article is divided into five sections. In Section 2, the modified switching algorithm
for SPMC as a resonant converter for IH application is extensively explained. Simulation results
using modified switching algorithm for SPMC as a resonant converter for IH application has been
done in MATLAB Simulink environment and is presented in Section 3 for validation. Finally,
the hardware/experimental results have been shown in Section 4 which validates the simulation
results and the main conclusion of the proposed article is given in Section 5.

2. Single-Phase Matrix Converter and Its Modified Switching Technique for Induction Heating
(IH) Applications

2.1. Single-Phase Matrix Converter (SPMC)

In this presented work, modified switching technique has been developed for SPMC topology to
generate high frequency directly from grid/supply frequency. SPMC topology was first invented by
Zuckerberger in 1997. It consists of a matrix of input and output lines with four bidirectional switches
which connect the 1-ø input to 1-ø output (Figure 2a,b). Each bidirectional switch has the capability of
conducting current as well as blocking voltage of both polarities simultaneously depending on the
control signal. Generally, common emitter configuration is used for making bi-directional switches for
SPMC. It is also referred to as 2 × 2 order matrix converter. Actually, SPMC can be operated in many
types of converters such as controlled rectifier (AC–DC), inverter (DC–AC), a boost converter (DC–DC)
and as a cycloconverter (AC–AC) [35]. However, in this article, only SPMC as a frequency changer or
as resonant converter is discussed, which is appropriate for the IH applications. This section discusses
how input frequency can be synthesized with the help of this SPMC configuration using modified
switching technique and makes it essential for IH applications.
Electronics 2018, 7, x FOR PEER REVIEW 2 of 17

Various topologies of HF resonant inverters have been developed such as the half-bridge series
resonant inverter (HB-SRI) [16], full bridge series resonant inverter (FB-SRI) [17], single switch
topology [18]7,etc.
Electronics 2018, 149 Although, these converters have been designed using insulated-gate bipolar 4 of 17
transistor
Electronics(IGBT)
2018, 7, x because of its higher current/voltage handling capability, reduced control
FOR PEER REVIEW 4 of 19
complexity and less cost. In addition, IGBTs should have low reverse recovery time and high
switching frequency. It can be seen that owing to different stages Siain the conventional
Sib IH system, its
efficiency is automatically reduced. Moreover, indirect method of conversion uses reactive energy

1-ø AC Supply,50Hz

Load(R,RL,RLC)
storage elements. Thus, thisS1method Smakes 2 the converter bulkyIGBT
and unnecessary losses occur across
Diode
the diode. Additionally, two-stage conversion of AC to HFAC conversion increases the number of
components used along with complex control algorithms (such as Phase Locked Loop (PLL),
Proportional Integral Derivative S3 (PID)
S4 and Fuzzy logic controller)
Diode for obtaining
IGBThigh power factor,
low total harmonic distortion (THD) at the input side and good power quality [19,20]. Overall, these
existing topologies increase the cost as well as complexity of the controller.
i=1,2,3,4

(a) (b)
Figure
Figure 2. 2. (a)
(a)1-ø
1-ømatrix
matrixconverter
convertertopology
topologyand
and(b)(b)bi-directional
bi-directionalswitch
POT switch(common
(commonemitter
emitter
configuration mode).
configuration mode). IH coil
Iac
Idc Idc
2.2.2.2. Proposed Switching Technique for for SPMC in IH Applications
Iac
Proposed Switching Technique SPMC in IH Applications R0,L0
1 − φ AC Cr
proposed switching technique, only two PWM signal (i.e., Vg1 and Vg2) is required to
In the50HZ
In the proposed switching technique, only two PWM signal (i.e., Vg1 and Vg2 ) is required to
operate SPMC as a resonant converter for IH applications. Regarding the generation of these pulses,
operate SPMC as a resonant converter for IH applications. Regarding the generation of these pulses,
a controller has been designed which is based on embedded V0 system. The IH system based on SPMC
a controller has been designedVdc which is based on embedded system. The IH system based on SPMC
topology using proposed controller which generates pulses Vg1 and Vg2 is shown in Figure 3. In this
Vm
topology using proposed t controller which t generates pulses Vg1 and Vg2 is shown int Figure 3. In this
figure, the proposed controller comprises of zero crossing detector (ZCD), microcontroller unit and
figure, the proposed controller comprises of zero crossing detector (ZCD), microcontroller unit and
isolation circuit. For generation of pulses, the AC voltage (230 Vr.m.s) is stepped down to 12 Vr.m.s.
isolation circuit. For generation of pulses, the AC (a) voltage (230 Vr.m.s ) is stepped down to 12 Vr.m.s .
Subsequently, this stepped down AC is given to ZCD block that is used to synchronize the pulses
Subsequently, this stepped down AC is given to ZCD block that is used to synchronize the pulses (Vg1
(Vg1 and Vg2) with the input AC supply. Now this output ofacZCD is fed to the microcontroller Atmega
and Vg2 ) with the input AC supply. INow ac
this output of ZCD Iis fed to the microcontroller Atmega 2560,
2560, which detects the rising and falling edge of the pulse, i.e., Vg (generated from the ZCD).
which detects the rising and falling edge of the pulse, i.e., Vg (generated Cr L0 from the ZCD). According to
According to the program fed to the microcontroller, when it detects the rising edge of the pulse (Vg),
the program fed to the 230V microcontroller, when it detects the rising edge of the pulse (Vg ), it generates
it generates the pulse (V g1) of 10 ms (if the 100 Hz output of the converter is required). When it detects
r.m.s
R0
the pulse (Vg1 ) of 10 ms (if the 100 Hz output of the converter is required). When it detects the falling
50Hz
the falling edge, again it generates a pulse (Vg2) of 10 ms, but this pulse is in complete phase opposition
edge, again it generates a pulse (Vg2 ) of 10BIDIRECTIONAL
ms, but this pulse is in complete phase opposition from
from previous pulses, shown in Figure 4b. For SWITCH generating a higher frequency of the pulse, the time
previous pulses, shown in Figure 4b. For generating a higher frequency of the pulse, the time period
period of the pulses should be considered less
(S1,S during programming. The detailed explanation of
2,S3,S4)
of the pulses should be considered less during programming. The detailed explanation of prototype
prototype implementation and the experimental results of this proposed controller regarding
(b)proposed
implementation and the experimental results of this controller regarding generation of pulses
generation of pulses (Vg1 and Vg2) have been well explained in section 4.
(Vg1 and Vg2 ) have been well explained in Section 4.
Figure 1. (a) Conventional IH Topology and (b) Block diagram of proposed topology.

I0
I0
230V Power Circuit of R0 L0
Power Circuit R0 L0
230V
50Hz SPMCof Cr
50Hz SPMC Cr

230V
230V Proposed Controller
Proposed Controller
12V Vg1
S1a,S4a,S3a,S2a
12V uC Isolation Vg1 S1a,S4a,S3a,S2a
ZCD Vg uC INT0 Isolation
Circuit Vg2
ZCD Vg INT0INT1 Circuit
TLP250 Vg2 S2b,S3b,S4b,S1b
INT1 TLP250 S2b,S3b,S4b,S1b

Diode
Diode 12Vdc
Rectifier 12Vdc
Rectifier

Figure 3. Proposed IH system using SPMC topology incorporated with proposed controller.
Figure 3. Proposed IH system using SPMC topology incorporated with proposed controller.
Now, with the help of these two pulses (Vg1 and Vg2), frequency synthesization has been well
presented. The proposed configuration (power circuit of SPMC as in Figure 3) of SPMC as a frequency
changer/resonant converter for IH applications is shown in Figure 4a–c which shows the waveform
Electronics 2018, 7, 149 5 of 17

Now, with the help of these two pulses (Vg1 and Vg2 ), frequency synthesization has been well
presented. The proposed configuration (power circuit of SPMC as in Figure 3) of SPMC as a frequency
Electronics 2018, 7, x FOR
changer/resonant PEER REVIEW
converter for IH applications is shown in Figure 4a–c which shows the waveform 5 of 19 of

SPMC as a frequency changer (i.e., at 100 Hz output) and as a resonant converter (i.e., at high frequency
of SPMC as a frequency changer (i.e., at 100 Hz output) and as a resonant converter (i.e., at high
of output) using proposed control technique. In Figure 4a, Vi is the input supply voltage, Ls and Cf
frequency of output) using proposed control technique. In Figure 4a, Vi is the input supply voltage,
are the input inductor and filter capacitor respectively, that are used to reduce the electromagnetic
Ls and Cf are the input inductor and filter capacitor respectively, that are used to reduce the
interference (EMI) effect and also prevent the HF component of voltage/current (generated from the
electromagnetic interference (EMI) effect and also prevent the HF component of voltage/current
load side). Four bidirectional switches are used and each of them is a combination of two IGBTs and
(generated from the load side). Four bidirectional switches are used and each of them is a combination
two diodes. It is already known that the resonant inverter works at a resonant frequency (Equation (1)).
of two IGBTs and two diodes. It is already known that the resonant inverter works at a resonant
However,
frequencyfor the IH application,
(Equation (1)). However,the switching
for the IHfrequency of the
application, the resonant
switchinginverter
frequency should be resonant
of the kept higher
or lower than
inverter should theberesonant frequency
kept higher or lower to than
ensure
thezero voltage
resonant switching
frequency (ZVS) or
to ensure zerozero current
voltage switching
switching
(ZCS)
(ZVS) or zero current switching (ZCS) conditions for reducing the switching losses across switcheshas
conditions for reducing the switching losses across switches [36]. In this work, ZVS condition
[36]. achieved
been In this work, ZVS condition
by maintaining the has been achieved
switching frequencyby higher
maintaining
than thetheresonant
switching frequencyTohigher
frequency. analyze
than
the the resonant
system behaviour, frequency.
IH coil Toand
analyze the system
its load can be behaviour,
modelled as IH the
coil series
and itsequivalent
load can beofmodelled
R0 and L0 ,
as the series equivalent of R0 and L0, which is already shown in Figure 4a. In addition,
which is already shown in Figure 4a. In addition, the resonating capacitor (C r ) is the resonating
connected in series
capacitor
with R0 and (CrL) 0istoconnected
create theinseries with R0 and
seriesresonance L0 to create the series resonance condition.
condition.

S1a D2 S2b D4
Vin

Ls D1 S1b D3
S2a t
Vi=VmSinωt

Vout
IH LOAD
Cf
t

R0 L0 Cr
Vg1
S3b S4a
D6 D8 (S1a,S4a,S3a,S2a)
t
Vg2
D5 D7 S4b (S2b,S3b,S4b,S1b)
S3a t
0 t1 t2 t3 t4
(a) (b)

Vin

Vout
t

Vg1
(S1a,S4a,S3a,S2a)
t
Vg2
(S2b,S3b,S4b,S1b)
t
0
(c)
Figure 4. Power circuit of SPMC and its output voltage waveform (a) SPMC as a resonant converter
Figure 4. Power circuit of SPMC and its output voltage waveform (a) SPMC as a resonant converter
for (IH) application; (b) Output voltage waveform of SPMC as frequency changer operation (at 100
for (IH) application; (b) Output voltage waveform of SPMC as frequency changer operation (at 100 Hz
Hz output) and (c) Output voltage waveform of SPMC as resonant converter (at HF output) using
output) and (c) Output voltage waveform of SPMC as resonant converter (at HF output) using modified
modified switching technique.
switching technique.

The operation of the SPMC using modified switching technique for IH application can be
understood by using 4 modes of operation according to the polarity of the input voltage. Modes 1
Electronics 2018, 7, x FOR PEER REVIEW 6 of 19

and 2 are explained for the positive half cycle and Modes 3 and 4 are explained for the negative half
cycle.
Mode
Electronics 1 (0
2018, < t < t1): In the positive half cycle, switches S1a, S4a, S2b, S3b are forward biased and
7, 149 6 ofS17
3a,

S2a, S4b, S1b are reverse biased. Forward biased switches can be turned ON at any time between 0 to t1
by applying the pulses (Vg1 and Vg2). During this time 0 < t < t1, among the forward biased switches
The operation of the SPMC using modified switching technique for IH application can be
only two switches (i.e., S1a and S4a) are receiving PWM signal (Vg1) shown in Figure 4b. Owing to this,
understood by using 4 modes of operation according to the polarity of the input voltage. Modes 1 and
only S1a and S4a will be turned ON to create a path for the load current that is,
2 are explained for the positive half cycle and Modes 3 and 4 are explained for the negative half cycle.
S1a → D1 → load → S 4a → D7 shown in Figure 5a.
Mode 1 (0 < t < t1 ): In the positive half cycle, switches S1a , S4a , S2b , S3b are forward biased and
S3a , Mode
S2a , S4b2, (t
S1b1 <are
t < reverse
t2): Thisbiased.
mode is also forbiased
Forward the positive halfcan
switches cycle. In thisON
be turned mode, since
at any switches
time between S1a
and S 4a are not receiving PWM signal (V g1 ), these switches get turned OFF.
0 to t1 by applying the pulses (Vg1 and Vg2 ). During this time 0 < t < t1 , among the forward biased Now in this mode, among
the forward
switches biased
only twoswitches,
switches only (i.e., two switches
S1a and S4a ) are and S3b) are
(S2breceiving PWM receiving
signal PWM signal (V
(Vg1 ) shown ) shown4b.
ing2Figure in
Figure 4b. Owing to this, S 2b and S 3b will be turned ON. Now, the path
Owing to this, only S1a and S4a will be turned ON to create a path for the load current that is, for the load current becomes
b →→ D3S→ D7 → S 3b →
reverse
S1a → i.e.,
D1 →S 2load load
4a → shown in D shown
Figure
5 5a. in Figure 5b.

S2b
S1a S2b S2a S1a
S1b S1b S2a
Io Io
Vi(t) IH LOAD Vi(t) IH LOAD

S3b S3a S4a S4b S3b S3a S4a S4b

(a) (b)
Figure
Figure5.
5.Positive
Positive mode
mode of
of operation (a) Mode
operation (a) Mode 11 and
and (b)
(b) Mode
Mode2.2.

Mode 3 (t2 < t < t3): In the negative half cycle, switches S1a, S4a, S2b, S3b are reverse biased and S3a,
Mode 2 (t1 < t < t2 ): This mode is also for the positive half cycle. In this mode, since switches
S2a, S4b, S1b are forward biased. Forward biased switches can be turned ON at any time between t2 to
S1a and S4a are not receiving PWM signal (Vg1 ), these switches get turned OFF. Now in this mode,
t3 by applying the pulses (Vg1 and Vg2). During this time t2 < t < t3, among the forward biased switches
among the forward biased switches, only two switches (S2b and S3b ) are receiving PWM signal (Vg2 )
only two switches (i.e., S3a and S2a) are receiving PWM signal (Vg1) shown in Figure 4b. Owing to this,
shown in Figure 4b. Owing to this, S2b and S3b will be turned ON. Now, the path for the load current
only S3a and S2a will be turned ON to create a path for the load current that is,
becomes reverse i.e., S2b → D3 → load → S3b → D5 shown in Figure 5b.
S3a → D6 → load → S 2 a → D4 shown in Figure 6a.
Mode 3 (t2 < t < t3 ): In the negative half cycle, switches S1a , S4a , S2b , S3b are reverse biased and
3 < t < t4): This mode is also for the negative half cycle. In this mode, since switches S3a
S3a , Mode
S2a , S4b4, (t
S1b are forward biased. Forward biased switches can be turned ON at any time between
and S 2a are not receiving PWM signal (Vg1), these switches gets turned OFF. Now in this mode, among
t2 to t3 by applying the pulses (Vg1 and Vg2 ). During this time t2 < t < t3 , among the forward biased
the forward
switches biased
only twoswitches,
switches only(i.e., two switches
S3a and S2a ) are and S1b) are
(S4breceiving PWMreceiving
signal PWM signal (V
(Vg1 ) shown ) shown4b.
ing2Figure in
Figure
Owing4b. toOwing
this, only S3a Sand
to this, 4b and S1b will be turned ON. Now, the path for the load current becomes
S2a will be turned ON to create a path for the load current that is,
reverse
S3a → D
Electronics i.e., S
6 →7,4load
2018, →
xb FOR D
→PEER→ → D→
load
8S2a REVIEW S1b → in
4 shown
shown6a.
D2Figure in Figure 6b. 7 of 19
The aforementioned four modes of operations have been applied and are illustrated in Figures
5 and 6.

S1a S2b S2a S1a S1b S2a

S1b S2b
Io Io
Vi(t) IH LOAD Vi(t) IH LOAD

S3b S3a S4a S4b S3a S4a S4b

S3b

(a) (b)
Figure
Figure6.6.Negative
Negativemode
mode of
of operation
operation (a) Mode 33 and
(a) Mode and (b)
(b) Mode
Mode4.4.

From the above modes of operation it can be concluded that SPMC can work as a frequency
changer device as well as resonant converter. From the circuit diagram shown in Figure 4a, it can be
seen that there are two paths for load current in each half cycle. In the positive half cycle, the two
paths for the load current are S1a, D1, load, S4a, D7 and S2b, D3, load, S3b, D5, respectively. In the negative
half cycle, the two paths for the load current are S4b, D8, load, S1b, D2 and S3a, D6, load, S2a, D4,
Electronics 2018, 7, 149 7 of 17

Mode 4 (t3 < t < t4 ): This mode is also for the negative half cycle. In this mode, since switches
S3a and S2a are not receiving PWM signal (Vg1 ), these switches gets turned OFF. Now in this mode,
among the forward biased switches, only two switches (S4b and S1b ) are receiving PWM signal (Vg2 )
shown in Figure 4b. Owing to this, S4b and S1b will be turned ON. Now, the path for the load current
becomes reverse i.e., S4b → D8 → load → S1b → D2 shown in Figure 6b.
The aforementioned four modes of operations have been applied and are illustrated in
Figures 5 and 6.
From the above modes of operation it can be concluded that SPMC can work as a frequency
changer device as well as resonant converter. From the circuit diagram shown in Figure 4a, it can be
seen that there are two paths for load current in each half cycle. In the positive half cycle, the two paths
for the load current are S1a , D1 , load, S4a , D7 and S2b , D3 , load, S3b , D5 , respectively. In the negative half
cycle, the two paths for the load current are S4b , D8 , load, S1b , D2 and S3a , D6 , load, S2a , D4 , respectively.
Therefore, in this proposed switching algorithm, in each half cycle, the direction of load current could
be changed depending on the time period of the conduction of switches. In other words, the desired
output frequency of the load voltage/current depends on the switching frequency of the switches.
Due to its frequency changer operation, it can be applied in IH application which has been shown in
Figure 4c. By using the above modes of operation, switches’ operation status is given in Table 1.

Table 1. Switches operation status of SPMC.

Input Voltage (Vin ) Mode Switches Status Time Interval Output Voltage (Vout )
(S1a /S4a ) ON
Mode 1 0 to t1 Vout > 0
Vin > 0 (S2b /S3b ) OFF
(S1a /S4a ) OFF
Mode 2 t1 to t2 Vout < 0
(S2b /S3b ) ON
(S3a /S2a ) ON
Mode 3 t2 to t3 Vout > 0
Vin < 0 (S4b /S1b ) OFF
(S3a /S2a ) OFF
Mode 4 t3 to t4 Vout < 0
(S4b /S1b ) ON

There are several merits of the proposed switching strategy over conventional techniques [21].
Some of them are:
• Compared to a previous switching strategy, the modified switching strategy has a simple but
unique generation capability of resonant frequency or switching frequency which is the basic
need of SPMC as a resonant converter for IH application.
• Using this modified/proposed switching technique, SPMC can achieve a high frequency current
very easily but using traditional/conventional switching technique, SPMC can generate only
integral multiple of input supply frequency i.e., 50 Hz, 100 Hz, 150 Hz and so on. That is why
previous switching topology cannot be applied in the field of IH applications.
• Also, the design of the controller for the proposed technique is quite simple because it needs to
generate only two pulses as compared to previously developed switching techniques in which
four pulses are needed for synthesization of frequency. Owing to this, the proposed technique
reduces the design complexity of the controller.
• The proposed switching technique can be applied for both operation of SPMC i.e., as a frequency
changer or as resonant converter.
Consequently, the proposed configuration of SPMC for IH applications shown in Figure 4a has
been modelled as an RLC circuit, which consists of a resistor (Ro ), an inductor (Lo ) and a capacitor (Cr )
can be used to analyze the system behavior. It should also be noted that, at the resonant frequency,
maximum output power is transferred to the load. Owing to this, a practical converter for IH
applications always works at equal to or greater than the resonant frequency. For analyzing the
circuit of SPMC as a resonant converter for IH applications, the following equations have been applied:
Electronics 2018, 7, 149 8 of 17

2.2.1. Resonant Frequency

1
fr = √ (1)
2π L0 Cr
In terms of angular resonant frequency:

1
ωr = √ (2)
L0 Cr

2.2.2. Characteristics Impedances

s
L0 1
Zeq = = = 2π f r L0 (3)
Cr 2π f r Cr
In terms of angular frequency:
s
L0 1
Zeq = = = ωr L 0 (4)
Cr ωr Cr

2.2.3. Load Quality Factor

Zeq 2π f r L0 1
Q= = = (5)
R0 R0 2π f r R0 Cr
In terms of angular frequency:

Zeq ωr L 0 1
Q= = = (6)
R0 R0 ωr R0 Cr

2.2.4. Output Impedance of Equivalent Circuit (Figure 4a)

    
1 1
Zeq = R0 + j 2π f r − = R0 1 + jQ 2π f n − (7)
2π f r Cr 2π f n
s 2 
1
Zeq = R0 1 + Q2 2π f n − (8)
2π f n
n  o
2π f
where 2π f n = 2π f r , ϕ = arg{ Z (2π f )} = arctan Q 2π f n − 2π1f n ≥ 0.

2.2.5. Fundamental Output Voltage

( )
Vd , 0 < 2π f s t < π
V0 = (9)
−Vd , π < 2π f s t < 2π
2Vd
Vm =
π

2.2.6. Ieq , That Is, Load Current Flowing Through Tank

i Lo = Im sin(ωt − ϕ) (10)
Vm 2Vd 2Vd cos ϕ 2Vd
where Im = = = = .
| Zeq | π | Zeq |
r
πRo 
πRo 1+ Q2 2π f n − 2π1f
n
Electronics 2018, 7, 149 9 of 17

2.2.7. The Output Power

2 R0 2Vd2
Pout = Im =  2  (11)
2 
1
πRo 1 + Q2 2π f n − 2π f n

In Equation (11), at ωn = 2π f n = 1, the circuit becomes resonant, therefore, maximum power is

transferred to the load. Moreover, output power could be varied with the help of a different value of
quality factor (Q).
Electronics 2018, 7, x FOR PEER REVIEW 10 of 19
3. Simulation Results and Its Discussion
Table 2. Parameters used for the simulation.
To validate the modified proposed technique, simulation has been done in MATLAB/SIMULINK
(R2012a, Dhanbad, Symbol
Jharkhand, India) Parameters
environment by using parameters Value given in Table 2. Firstly,
simulation has beenVdone in Input Voltage
for the general SPMC under R (100 Ω) 230 load
Vr.m.s to create different output
L s Filter inductance 20 mH
frequencies, that is, 100 Hz, 150 Hz and 200 Hz, by using the modified proposed technique with
experimental validation. Cf Subsequently,Filtersimulation
Capacitance has been done for 3the uFSPMC as a resonant converter,
f Fundamental Frequency 50 Hz
which works at a switching frequency of 25 kHz (Table 2) in order to validate the modified technique.
Cr Resonant Capacitor 0.8 uF
Various results and waveforms of voltage and current have been taken along with THD of the input
L0 Coil Inductance 52.7 uH
current through the simulation. Figure 7a shows the PWM controller that generates pulses (Vg1
R0 Coil Equivalent Resistance 5Ω
and Vg2 ) of different frequencies. Figure 7b depicts the simulation results of pulses waveform (Vg1
P0 Output Power for heating 1100 W
and Vg2 ), generated by fs the PWM controllerFrequency
Resonance are given to the switches of SPMC converter to generate
output voltage/current of a different step Frequency)
up frequency. The frequency 25 kHzand duty cycle of this pulse
(Switching
is maintained at 25
Figure 8a,b kHz the
shows andwaveforms
50% respectively.
of the inputBy changing theVtime
voltage (230 period of this PWM controller,
r.m.s) and input current. Figure 8c
the desired
shows the output
value offrequency
THD in inputcan be achieved.
current which Basically,
was found in this study,
to be 2.60%. SPMC as a resonant
To achieve this lowconverter
THD
value, a passive filter has been used which is an essential part of SPMC when it needs to operate as at
for IH application is focused upon. This direct AC–AC converter has been designed to operate
a resonant
resonantconverter
frequency for(switching
IH system.frequency)
The HF switching results
of 25 kHz, in theisgeneration
which greater than of HF
theharmonics
frequencythatas per
− 6 − 6
has an inherent
calculation tendency (1),
from equation to back
withflow towards the of
the parameters supply side ×
L0 = 52.7 and10deteriorate
and Cr =the
0.8power
× 10 quality,
to satisfy
resulting
the criteriain
ofaZVS.
wide variety of problem like distortion in the grid voltage/current. Thus, the low value
of THD of 2.60% in input current ensures the attenuation of HF harmonics and makes the power supply
of IH system practically viable. Table 2. Parameters used
As aforementioned, for the simulation.
first simulation has been done for generating 100 Hz
output using proposed switching technique which is shown in Figure 9a,b. Figure 10 shows the typical
Symbol Parameters Value
simulated results of output voltage and load current for SPMC as a resonant converter in IH applications.
The root mean V square
in (RMS) value of output voltage
Input and load current are 225.2 230
Voltage V and 5.162 A, which
Vr.m.s
Ls
have been calculated from the continuous FilterRMS
inductance
block. Therefore, average output 20 mHpower can be
Cf Filter Capacitance 3 uF
calculated by using the product of these two RMS values. Here, for the calculation of maximum
f Fundamental Frequency 50 Hz
output averageCpower, ideally cos φ (power Resonantfactor) is taken as unity because 0.8
Capacitor it is
uFknown that at
r
resonant frequency,
L0 capacitive reactance and Coil inductive
Inductancereactance becomes equal,52.7 butuH it is not the case
for practical purposes.
R0 Coil Equivalent Resistance 5Ω
P0 Output
= PPower
VI cosfor
φ; heating
cos φ ≈ 1 1100 W
fs Resonance Frequency (Switching Frequency) 25 kHz
P 225.2× 5.162×=1 1162 W
=

PWM Generator

S1a,S4a,S3a,S2a

NOT Gate
S2b,S3b,S4b,S1b
(a) (b)
Figure 7. (a) PWM Controller; (b) Simulation results of pulses i.e., Vg1 and Vg2 (180° out of phase).
Figure 7. (a) PWM Controller; (b) Simulation results of pulses i.e., Vg1 and Vg2 (180◦ out of phase).
Electronics 2018, 7, 149 10 of 17

Figure 8a,b shows the waveforms of the input voltage (230 Vr.m.s ) and input current. Figure 8c
shows the value of THD in input current which was found to be 2.60%. To achieve this low THD
value, a passive filter has been used which is an essential part of SPMC when it needs to operate as
resonant converter for IH system. The HF switching results in the generation of HF harmonics that
has an inherent tendency to back flow towards the supply side and deteriorate the power quality,
resulting in a wide variety of problem like distortion in the grid voltage/current. Thus, the low value of
THD of 2.60% in input current ensures the attenuation of HF harmonics and makes the power supply
of IH system practically viable. As aforementioned, first simulation has been done for generating
100 Hz output using proposed switching technique which is shown in Figure 9a,b. Figure 10 shows
the typical simulated results of output voltage and load current for SPMC as a resonant converter in
IH applications. The root mean square (RMS) value of output voltage and load current are 225.2 V
and 5.162 A, which have been calculated from the continuous RMS block. Therefore, average output
power can be calculated by using the product of these two RMS values. Here, for the calculation of
maximum output average power, ideally cos φ (power factor) is taken as unity because it is known
that at resonant frequency, capacitive reactance and inductive reactance becomes equal, but it is not
the case for practical purposes.
P = V I cos φ; cos φ ≈ 1

P = 225.2 × 5.162 × 1 = 1162 W

Electronics 2018, 7, x FOR PEER REVIEW 11 of 19

(a)

(b)

(c)
Figure8.8.Simulated
Figure Simulatedwaveforms
waveformsofof(a)
(a)input
inputvoltage
voltage(V(V)in)(b)
(b)input
inputcurrent
current(I (I)in)and
and(c)(c)THD
THDanalysis
analysisof
in in
of input current (I
input current (Iin ). in).
 (c)
(c)
Figure
Electronics 2018, 7, 8.
149Simulated waveforms of (a) input voltage (Vin) (b) input current (Iin) and (c) THD analysis 11 of 17
Figure 8. Simulated
of input current (Iin). waveforms of (a) input voltage (Vin) (b) input current (Iin) and (c) THD analysis
of input current (Iin).

(a) (b)
(a) (b)
Figure 9. Simulated waveforms of (a) Output voltage (Vout) and (b) Output current (Iout) at 100 Hz.
Figure 9. Simulated
Figure waveforms
9. Simulated waveformsofof(a)
(a)Output
Output voltage (Voutout
voltage (V ) and
) and (b)(b) Output
Output current
current (Iout) (I
atout
100) at
Hz.100 Hz.

(a) (b)
(a) (b)
Electronics 2018, 7, x FOR PEER REVIEW 12 of 19
Figure 10.
Electronics (a)
2018, Simulated
7, x waveform
FOR PEER REVIEW of output voltage (Vout ) and (b) simulated waveform of12output
of 19
current (Iout10.
Figure ) as(a)
a resonant
Simulatedconverter
waveformfor
of IH application.
output voltage (Vout) and (b) simulated waveform of output
Figure
current10.
(Iout(a)
) asSimulated
a resonantwaveform
converter of
foroutput voltage (Vout) and (b) simulated waveform of output
IH application.
current (Iout) as a resonant converter for IH application.
Figure 11 depicts the simulated result of the output average power. In this study, the passive filter
has been Figure
designed 11 depicts
to protectthe simulated
from the result of the output
high-frequency average power.
component at theIninput
this study,
side. theThepassive
equivalent
filterFigure 11 depicts
has been designed the simulated
to protect result
from ofthethe output averagecomponent
high-frequency power. In this study,
at the inputtheside.
passive
The
circuit of
filter the passive
has been filter
designed is shown
to protect in Figure 12a. From this figure, it can be observed that Zeq is too
equivalent circuit of the passive filter from the in
is shown high-frequency
Figure 12a. Fromcomponent atitthe
this figure, can input side. The
be observed that
highequivalent circuit
at aofhigher
thefrequency
passive filter is shown in Figure 12a. From this figure,prevents
it can bethe
observed
flow ofthat
at a higher resonant (switching frequency), which prevents the flow of HF component
Zeq is too high resonant frequency (switching frequency), which HF
Zcomponent
currenteq isat
too high
the gridat a higher
side. resonant
The frequency
simulated (switching
voltage frequency),
waveform which
across the prevents
filter
current at the grid side. The simulated voltage waveform across the filter capacitor the
capacitor flow isofshown
HFis in
component
Figureshown
12b. in current
Figure
This at the
12b.shows
figure grid
This figure side.
how shows The
the HFhow simulated voltage
the HF component
component waveform
has beenhas across
been blocked
blocked the filter capacitor
at the side.
at the input input side. is
shown in Figure 12b. This figure shows how the HF component has been blocked at the input side.

Figure 11. Simulation results of output average power (P).

Figure 11.Simulation
Figure11. resultsofofoutput
Simulation results output average
average power
power (P). (P).
in)in)

Ls
(V(V

Ls
Voltage

IHIH
Voltage

Zeq
Load

Zeq Cf
Load

Cf
Input
Input

Passive Filter
Passive Filter
(a) (b)
(a) (b)
Figure 12. (a) Passive filter and (b) voltage across capacitive filter.
Figure 12. (a) Passive filter and (b) voltage across capacitive filter.
Figure 12. (a) Passive filter and (b) voltage across capacitive filter.
In this section, various simulation results of the proposed SPMC as a resonant converter for IH
In this section, various simulation results of the proposed SPMC as a resonant converter for IH
application using the modified switching technique and its performance analysis have been
application using the modified switching technique and its performance analysis have been
provided. As aforementioned, the RLC circuit, which is modeled as an IH load, has been used for
provided. As aforementioned, the RLC circuit, which is modeled as an IH load, has been used for
analysis. In the next section, prototype implementation of SPMC as a resonant inverter and its results
analysis. In the next section, prototype implementation of SPMC as a resonant inverter and its results
has been discussed.
has been discussed.
Electronics 2018, 7, 149 12 of 17

In this section, various simulation results of the proposed SPMC as a resonant converter for IH
application using the modified switching technique and its performance analysis have been provided.
As aforementioned, the RLC circuit, which is modeled as an IH load, has been used for analysis.
In the next section, prototype implementation of SPMC as a resonant inverter and its results has
Electronics
been 2018, 7, x FOR PEER REVIEW
discussed. 13 of 19

4. Prototype
4. Prototype Implementation and Its
Implementation and Its Results
Results
To verify
To verify the
the converter
converter performance
performance followed
followed by by simulation
simulation result
result of
of SPMC,
SPMC, based
based on
on proposed
proposed
switching technique
switching techniquefor forIHIH application,
application, a prototype
a prototype laboratory
laboratory set upset
hasup hasdeveloped
been been developed with
with resistive
resistive
load whichload which in
is shown is Figure
shown13. in Figure
When this13. converter
When thisneeds converter needs to be
to be operated as aoperated
resonantas a resonant
converter for
converter
IH for IH
application, IHapplication,
coil could beIH coil could
connected be connected
instead instead
of resistive load. of
Anresistive
embedded load. An embedded
technology-based
technology-based
Arduino mega 2560Arduino(Mousermega 2560 (Mouser
electronics, Banglore, electronics, Banglore,
India) is used India) is PWM
for generating used for
for generating
the gate of
PWM
the for the In
switches. gate
thisofstudy,
the switches.
firstly, a In this study,
prototype firstly,
of the SPMC a prototype of thefor
has been tested SPMC hasoutput
100 Hz been tested for
(i.e., as a
100 Hz output (i.e., as a frequency changer operation) using the modified technique. For this, only
frequency changer operation) using the modified technique. For this, only the resistive load is assumed.
the resistive load
Subsequently, thisisconverter
assumed.has Subsequently,
been tested asthis converterinverter
a resonant has been fortested as a resonant
IH application inverter
using the same for
IH application
modified usingtothe
technique showsame themodified
uniquenesstechnique to showtechnique.
of developed the uniqueness of developed technique.

Bi-directional
Switch

(a) (b)
Figure
Figure 13.
13. Experimental
Experimental setup
setup of
of (a)
(a) SPMC
SPMC and its (b)
and its (b) bi-directional
bi-directional switch.
switch.

The implementation of the hardware circuit is divided into four parts: (a) designing of Power
The implementation of the hardware circuit is divided into four parts: (a) designing of Power
circuit; (b) ZCD circuit; (c) controller; (d) isolation and protection circuit. For designing of the power
circuit; (b) ZCD circuit; (c) controller; (d) isolation and protection circuit. For designing of the power
circuit, eight IGBTs and eight diodes have been used. Two IGBTs and two diodes have been used for
circuit, eight IGBTs and eight diodes have been used. Two IGBTs and two diodes have been used
making one bidirectional switch. In this study, four bidirectional switches have been used for a
for making one bidirectional switch. In this study, four bidirectional switches have been used for a
prototype implementation of the power circuit of SPMC, which has been shown in the Figure 13b. It
prototype implementation of the power circuit of SPMC, which has been shown in the Figure 13b.
is known that ZCD is used to detect every zero crossing of input AC voltage for synchronization of
It is known that ZCD is used to detect every zero crossing of input AC voltage for synchronization of
pulses. ZCD has been implemented with the help of Opamp IC741 (Fairchild semiconductor, San
pulses. ZCD has been implemented with the help of Opamp IC741 (Fairchild semiconductor, San Jose,
Jose, CA, United States), which works as a voltage amplifier. A synchronized pulse (Vg) generated
CA, United States), which works as a voltage amplifier. A synchronized pulse (Vg ) generated from
from the ZCD is given to interrupt pin of Atmega 2560 (Mouser electronics, Banglore, India) (i.e.,
the ZCD is given to interrupt pin of Atmega 2560 (Mouser electronics, Banglore, India) (i.e., digital
digital pin 2 and digital pin 3) which is assigned as INT0 and INT1, detects the rising and falling edge
pin 2 and digital pin 3) which is assigned as INT0 and INT1, detects the rising and falling edge of the
of the pulse i.e., Vg (generated from the ZCD). As explained in section 2.2, that according to program
pulse i.e., Vg (generated from the ZCD). As explained in Section 2.2, that according to program fed
fed to the microcontroller, when it detects the rising edge of the pulse (Vg), it generates the pulse (Vg1)
to the microcontroller, when it detects the rising edge of the pulse (Vg ), it generates the pulse (Vg1 )
of 10 ms (if the 100 Hz output of the converter is needed). Similarly, when it detects the falling edge,
of 10 ms (if the 100 Hz output of the converter is needed). Similarly, when it detects the falling edge,
again microcontroller generates a pulse (Vg2) of 10 ms, but this pulse is in complete phase opposition
again microcontroller generates a pulse (Vg2 ) of 10 ms, but this pulse is in complete phase opposition
from previous pulse. The experimental validation of synchronized pulse is shown in Figure 14a,b
from previous pulse. The experimental validation of synchronized pulse is shown in Figure 14a,b
shows the validity of synchronization of output voltage with respect to pulses (Vg1 and Vg2).
shows the validity of synchronization of output voltage with respect to pulses (Vg1 and Vg2 ).
Electronics 2018, 7, 149 13 of 17
Electronics 2018, 7, x FOR PEER REVIEW 14 of 19

Electronics 2018, 7, x FOR PEER REVIEW 14 of 19

ZCD Pulses generated from µC
Output(Vg)
ZCD Pulses generated from µC
Output(Vg)

225.8Vr.m.s
225.8Vr.m.s
µC
Output(Vg1 & Vg2)
µC Output Voltage
Output(Vg1 & Vg2)
Output Voltage
(a) (b)
Figure 14.
14. (a) (a)
(a) Experimental
Experimental results of
of ZCD
ZCD and
andmicrocontroller
microcontrolleroutput.
output.(b) (Scale: 5 V/div) and (b)
Figure results (Scale: 5 V/div) and (b)
experimental
experimental validation
Figure 14. validation
(a) of synchronized
Experimental
of synchronized output
results of ZCD and
output w.r.t. pulses. (Scale:
microcontroller
w.r.t. pulses. (Scale: output
output. voltage,
(Scale:
output 75V/div
5 V/div)
voltage, 75 V/div and
and (b)
and
Time, 10 ms/div).
experimental
Time, 10 ms/div). validation of synchronized output w.r.t. pulses. (Scale: output voltage, 75 V/div and
Time, 10 ms/div).
After the synchronized pulses (Vg1 and Vg2) generation, it is given to the isolation circuit which
After the synchronized pulses (Vg1 and Vg2 ) generation, it is given to the isolation circuit which
isolatesAfter
the converter (higher power
the synchronized pulses level) andVg2
(Vg1 and controller partit(lower
) generation, is givenpower
to thelevel). Thecircuit
isolation supplywhichfor the
isolates the converter (higher power level) and controller part (lower power level). The supply for the
microcontroller and isolation
isolates the converter (highercircuit
power is given
level) andthrough
controller a diode rectifier,
part (lower powerwhich is The
level). shown in the
supply for block
the
microcontroller
microcontroller and isolation
isolationcircuit is given
giventhrough aa diode rectifier, which
whichisisshown
shownininthetheblock
block
diagram of Figure and
3. Subsequently, circuit
an is
isolation through
circuit has diode
beenrectifier,
prepared which is also called the gate
diagram
diagram of of
Figure
Figure 3.3.Subsequently,
Subsequently, anisolation
an isolationcircuit
circuit
hashas been
been prepared
prepared which which iscalled
is also also called
the gatethe
driver circuit. For this, TLP250 optocoupler has been used. The circuit diagram and prototype
gate driver
driver circuit.For
circuit. For this,TLP250
TLP250 optocoupler has beenused.
used.TheThecircuit
circuitdiagram
diagramand andprototype
prototype
implementation of thethis,
isolation or optocoupler
driver circuithas arebeen
shown in Figure 15a,b, respectively. The output
implementation
pulses (Vg1 and Vg2)offrom
implementation of the the isolation
isolation oror driver
driver
the isolation circuit
circuit
circuit are shown
are
are given to theinswitches
shown in Figure 15a,b,
Figure 15a,b,
of SPMCrespectively.
respectively. The output
The
power circuit.
output
pulses
pulses (Vg1(Vand
g1 and
Vg2Vg2
) )from
fromthetheisolation
isolation circuit
circuit are given
given totothe
theswitches
switchesofofSPMC
SPMCpower power circuit.
circuit.
Vcc(9V)
Vcc(9V)

1 8
I/P from 1 8
I/PuCfrom 1K
O/P to Gate
AC uC 2 7 1K
O/P to Gate of
terminals
470uF 100ohm 2 TLP250 7
12VAC TLP250 terminals
MOSFETsof
12V 470uF 100ohm
3 6
MOSFETs
3 6 44K
44K

4 5
4 5

G1 G2
G1 G2
(a)
(a)

Zero
Zero Crossing
Crossing
Detector Circuit
Detector Circuit

Isolationor
Isolation orDriver
Driver Circuit
Circuit

(b)
(b)
Figure 15. (a) Circuit diagram and its (b) experimental setup of isolation or driver circuit.
Figure 15.
Figure 15. (a)
(a) Circuit
Circuit diagram
diagram and
and its
its (b)
(b) experimental
experimental setup
setup of
of isolation
isolation or
or driver
driver circuit.
circuit.
As discussed in section 2.2, proposed controller comprises of three main units i.e., ZCD unit,
As discussed
discussed inin section 2.2,
2.2, proposed
proposed controller
controller comprises
comprises of three main
main units i.e.,
i.e., ZCD
ZCD unit,
unit,
microcontroller
As unitSection
and isolation circuit unit. On combining theseof
three units, theunits
three detailed hardware
microcontroller unit
circuit diagram
microcontroller and
of and
unit isolation
the controller
circuit
is shown
isolation circuit unit. On
in the
unit. combining
OnFigure these three units, the detailed hardware
16. these three units, the detailed hardware
combining
circuit diagram
circuit diagram of
of the
the controller
controllerisisshown
shownin inthe
theFigure
Figure16.
16.
Electronics 2018, 7, 149 14 of 17
Electronics 2018, 7, x FOR PEER REVIEW 15 of 19
Electronics 2018, 7, x FOR PEER REVIEW 15 of 19
Vcc(9V)
12V
1K Vcc(9V)
12V
1K
12V 1 8
uC 100ohm 1 S1a,S4a,S3a,S2a
12V 8 1K
uC
ATMEGA8 100ohm 2 1a,S4a,S3a,S2a
SO/P
TLP250 7 1K to Gate
AC 1K ATMEGA8
INT0 2TLP250 7
230V 12V terminals of
O/P to Gate
AC 1K INT0 3 6 44K IGBTs of
230V 12V terminals
12V INT1 3 6 44K IGBTs
12K
12V INT1
4 5
12K 4 5
GND
G1 G2
GND
G1 Vcc(9V)
G2
Vcc(9V)

1 8
100ohm 1 8 1K S2b,S3b,S4b,S1b
100ohm 2 7 1K SO/P 3b,S
2b,Sto 4b,S1b
Gate
TLP250
2 TLP250 7 terminals of
O/P to Gate
3 6 44K IGBTs of
terminals
3 6 44K IGBTs
4 5
4 5
G1 G2
G1 G2
Figure 16.
Figure 16. Circuit
Circuitimplementation
implementationofofproposed
proposedcontroller forfor
controller SPMC as as
SPMC a resonant converter
a resonant for for
converter IH
Figure 16. Circuit implementation of proposed controller for SPMC as a resonant converter for IH
applications.
IH applications.
applications.
As aforementioned, using the modified technique, SPMC is operated first as a frequency changer
As aforementioned,
As aforementioned,using usingthe the modified
modifiedtechnique,
technique,SPMCSPMCis is operated
operated first
first as
as aa frequency
frequency changer
changer
(which converts 50 Hz grid frequency to 100 Hz with the input of 230 Vr.m.s) with a resistive load and
(which converts
(which converts 50 50 HzHz grid
gridfrequency
frequencytoto100 100HzHzwith
withthetheinput
input of of
230 Vr.m.s
230 ) with
Vr.m.s a resistive
) with loadload
a resistive and
later, it is tested as a resonant converter for IH application. Figure 17a,b shows the experimental
later, it is tested as a resonant converter for IH application. Figure 17a,b shows the experimental
and later, it is tested as a resonant converter for IH application. Figure 17a,b shows the experimental
results of SPMC as a frequency changer (at 100 Hz output voltage/current) and SPMC as a resonant
results of
results of SPMC
SPMC as as aafrequency
frequencychangerchanger(at(at100
100Hz Hzoutput
outputvoltage/current)
voltage/current) and and SPMC
SPMC as as aa resonant
resonant
converter for IH applications at a frequency of 25 kHz which validate simulation results. As seen
converterfor
converter forIH IHapplications
applicationsatat a frequency
a frequency of kHz
of 25 25 kHz which
which validate
validate simulation
simulation results.
results. As seenAs from
seen
from the Figure 17a,b, current and voltage are almost in the same phase. So experimentally, the load
from
the the Figure
Figure 17a,b, 17a,b,
currentcurrent and voltage
and voltage are almost
are almost in thephase.
in the same same phase. So experimentally,
So experimentally, the loadthe load
power
power factor in case of when SPMC has operated as a frequency changer (i.e., at 100 Hz output on
powerinfactor
factor case ofin when
case ofSPMC
whenhas SPMC has operated
operated as a frequency
as a frequency changer changer
(i.e., at 100(i.e.,
Hzatoutput
100 Hzonoutput
resistiveon
resistive load) was found to be 0.98 which is quite close to unity. In the case of when SPMC has operated
resistive load) was found to be 0.98 which is quite close to unity. In the case of when SPMC has operated
load) was found to be 0.98 which is quite close to unity. In the case of when SPMC has operated as
as resonant converter for IH applications was found to be 0.91. Figure 18 shows the experimental result of
as resonant
resonant converter
converter forfor
IHIH applications
applications was
was found
found toto
bebe0.91.
0.91.Figure
Figure1818shows
showsthe theexperimental
experimentalresult
resultof of
output voltage with respect to input current which validate that output is perfectly synchronized with
output voltage
output voltage with
with respect
respect toto input
input current
current which
which validate
validate that
that output
output isisperfectly
perfectly synchronized
synchronized with with
input supply. The value of THD for the input current is experimentally found to be 3.91% which is quite
input supply.
input supply. The Thevalue
valueofofTHDTHD forfor
thethe
input current
input is experimentally
current is experimentally found to beto
found 3.91% which
be 3.91% is quite
which is
low. Various experimental results of voltage and current waveform under R load or IH coil have been
low. Various
quite low. Variousexperimental
experimentalresults of voltage
results and current
of voltage waveform
and current waveformunder R load
under or IHor
R load coil
IHhave been
coil have
taken in a 200 MHz digital signal oscilloscope (DSO) using a current sensor probe to verify the
takentaken
been in a in200a 200
MHz MHzdigital signal
digital oscilloscope
signal oscilloscope (DSO)
(DSO) using
using a acurrent
currentsensor
sensorprobeprobe to verify the
to verify the
validity of proposed/modified switching algorithm. It has been found that, the proposed technique
validity of
validity of proposed/modified
proposed/modified switching switching algorithm.
algorithm. It It has been found
has been found that,
that, the
the proposed
proposed technique
technique
can be used in the field of IH applications.
can be
can be used
used inin the
the field
field of
of IH
IH applications.
applications.

Output Voltage
Output Current(100Hz) Output
(220VVoltage
r.m.s)
Output Current(100Hz) (220Vr.m.s)
2A2A r.m.sr.m.s
225.8V
225.8V

Output Current (6A)

Output Voltage(100Hz)
Output Current (6A)
Output Voltage(100Hz)
(a) (b)
(a) (b)
Figure 17. (a) Experimental verification of simulated output voltage and current at 100 Hz i.e., as a
Figure 17.
17. (a)
(a) Experimental
Experimental verification
verification of
of simulated
simulated output
output voltage
voltage and
and current
current at
at 100 Hz
Hz i.e.,
i.e., as
as aa
frequency
Figure changer. (Scale: output voltage, 75 V/div; output current, 1 A/div and time,100
10 ms/div) and
frequency changer.
changer. (Scale:
(Scale: output voltage, 75
75V/div; output current, 1 A/div andand
time, 10 ms/div) and
(b) experimental
frequency validation of output
output voltage
voltage, and current
V/div; output ofcurrent,
SPMC as a resonant
1 A/div converter
time, for IH
10 ms/div)
(b) experimental validation of output voltage and current of SPMC as a resonant converter for IH
applications
and at 25 KHz.
(b) experimental (Scale: Output
validation voltage,
of output 35 and
voltage V/div; output
current of current,
SPMC as2aA/div).
resonant converter for IH
applications at 25 KHz. (Scale: Output voltage, 35 V/div; output current, 2
applications at 25 KHz. (Scale: Output voltage, 35 V/div; output current, 2 A/div).A/div).
Electronics 2018, 7, 149 15 of 17
Electronics 2018, 7, x FOR PEER REVIEW 16 of 19

THD=3.91% Input Current (50Hz)

2.1A
225.8Vr.m.s
Output Voltage (100Hz)

Figure
Figure 18. Experimental
18. Experimental results
results ofof outputvoltage
output voltagew.r.t.
w.r.t. input
input current
current(Scale:
(Scale:Output
Outputvoltage, 75 V/div;
voltage, input
75 V/div;
current, 1 A/div; and Time, 10 ms/div).
input current, 1 A/div; and Time, 10 ms/div).

5. Conclusion
5. Conclusions
In this proposed work, a cogent switching algorithm has been employed for direct conversion of
In this proposed work, a cogent switching algorithm has been employed for direct conversion
utility frequency to HFAC through SPMC topology for IH applications. The algorithm requires less
of utility frequency to HFAC through SPMC topology for IH applications. The algorithm requires
number of components along with fewer PWM signals as compared to the conventional IH system, thus
less number of components along with fewer PWM signals as compared to the conventional IH
leading to reduction in the cost and complexity of the controller. This direct AC to high frequency AC
system, thus leading
conversion based to
onreduction
proposed in the cost algorithm
switching and complexity of the
enhances the controller. This direct
overall efficiency of theACIHto high
system.
frequency AC conversion based on proposed switching algorithm enhances the overall
Various simulation and experimental results corroborate the potential pragmatic applications of the efficiency
of the IH system.
SPMC Various
as a resonant simulation
converter andproposed
using the experimental results
switching corroborate
technique the 25
to generate potential pragmatic
kHz current/voltage
applications of thethe
directly from SPMC50 Hzas agrid
resonant converter
frequency. It hasusing the proposed
the additional switching
ability technique
of reducing to generate
switching losses by
incorporating a ZVS condition, high power factor and low input THD which improve the power
25 kHz current/voltage directly from the 50 Hz grid frequency. It has the additional ability of quality
reducing
at the input
switching lossesside.
by incorporating a ZVS condition, high power factor and low input THD which
improve the power quality at the input side.
Author Contributions: A.K. and P.K.S. developed the concept and also wrote this research article. A.K. designed
andContributions:
Author performed all A.K.
the experiment. D.K.M. and
and P.K.S. developed theM.J.B. thoroughly
concept analyzed
and also wrote thisthe data, article.
research simulation
A.K.results and
designed
and performed all the experiment. D.K.M. and M.J.B.R. thoroughly
experimental results. All authors in this paper contributed equally.analyzed the data, simulation results and
experimental results. All authors in this paper contributed equally.
Funding: This research received no external funding.
Funding: This research received no external funding.
Acknowledgments: Authors acknowledges the “Indian Institute of Technology (Indian School of Mines),
Acknowledgments: Authors acknowledges the “Indian Institute of Technology (Indian School of Mines),
Dhanbad,
Dhanbad, India”India” for providing
for providing infrastructure
infrastructure support.
support.
Conflicts
Conflicts of Interest:
of Interest: The authors
The authors declare
declare no conflict
no conflict of interest.
of interest.

Appendix A

Table A1. List of components used for experimental design and their specification.

Components Specification/Ratings
GBT (IXRH40N120) (1200 V, 55 A)
diode (10A7) (700 V, 10 A)
microcontroller Atmega 2560
op-amp IC741
diode (1N4007) (1000 V, 1 A)
centre taped transformer (12–0–12) V, 2 A
TLP250 25 kHz
IC Socket base 8 pin DIP
heat sink for IGBT
resistance 1 K, 12 K, 100 Ω, 44 K
capacitor 470 µF
IH coil Litz wire based
Electronics 2018, 7, 149 16 of 17

References
1. Acero, J.; Burdio, J.M.; Barragan, L.A.; Navarro, D.; Alonso, R.; Ramon, J.; Monterde, F.; Hernandez, P.;
Llorente, S.; Garde, I. Domestic induction appliances. IEEE Ind. Appl. Mag. 2010, 16, 39–47. [CrossRef]
2. Sarnago, H.; Lucia, O.; Mediano, A.; Burdio, J.M. Modulation scheme for improved operation of an
RB-IGBT-based resonant inverter applied to domestic induction heating. IEEE Trans. Ind. Electron. 2013, 60,
2066–2073. [CrossRef]
3. Sarnago, H.; Lucía, O.; Mediano, A.; Burdío, J.M. Class-D/DE dual-mode-operation resonant converter for
improved-efficiency domestic induction heating system. IEEE Trans. Power Electron. 2013, 28, 1274–1285.
[CrossRef]
4. Lucia, O.; Burdio, J.M.; Millan, I.; Acero, J.; Puyal, D. Load-adaptive control algorithm of half-bridge series
resonant inverter for domestic induction heating. IEEE Trans. Ind. Electron. 2009, 56, 3106–3116. [CrossRef]
5. Lucía, O.; Maussion, P.; Dede, E.; Burdío, J.M. Induction heating technology and its applications:
Past Developments, current Technology, and future challenges. IEEE Trans. Ind. Electron. 2011, 61, 2509–2520.
[CrossRef]
6. Mishima, T.; Takami, C.; Nakaoka, M. A new current phasor-controlled ZVS twin half-bridge high-frequency
resonant inverter for induction heating. IEEE Trans. Ind. Electron. 2014, 61, 2531–2545. [CrossRef]
7. Saha, B.; Kim, R.Y. High Power Density Series Resonant Inverter Using an Auxiliary Switched Capacitor
Cell for Induction Heating Applications. IEEE Trans. Power Electron. 2014, 29, 1909–1918. [CrossRef]
8. Lucía, O.; Burdío, J.M.; Millán, I.; Acero, J.; Barragán, L.A. Efficiency-oriented design of ZVS half-bridge
series resonant inverter with variable frequency duty cycle control. IEEE Trans. Power Electron. 2010, 25,
1671–1674. [CrossRef]
9. Sarnago, H.; Lucía, O.; Pérez-Tarragona, M.; Burdío, J.M. Dual-Output Boost Resonant Full-Bridge
Topology and its Modulation Strategies for High-Performance Induction Heating Applications. IEEE Trans.
Ind. Electron. 2016, 63, 3554–3561. [CrossRef]
10. Singh, B.; Pandey, R. Improved Power Quality Buck-Boost Converter fed LLC Resonant Converter for
Induction Heater. In Proceedings of the 2016 IEEE 6th International Conference on Power Systems (ICPS),
New Delhi, India, 4–6 March 2016; pp. 1–6.
11. Pham, H.; Fujita, H.; Ozaki, K.; Uchida, N. Dynamic analysis and control of a zone-control induction heating
system. In Proceedings of the 2011 IEEE conference of Energy Conversion Congress and Exposition(ECCE),
Phoenix, AZ, USA, 17–22 September 2011; pp. 4093–4100.
12. Fujita, H.; Akagi, H. Pulse-Density-Modulated Power Control of a 4 kW, 450 kHz Voltage-Source Inverter for
Induction Melting Applications. IEEE Trans. Ind. Appl. 1996, 32, 279–286. [CrossRef]
13. Grajales, L.; Sabatk, J.A.; Wang, K.R.; Tabisz, W.A.; Lee, F.C. Design of a 10 kW, 500 kHz Phase-Shift Controlled
Series-Resonant Inverter for Induction Heating. In Proceedings of the 1993 IEEE Industry Applications
Conference Twenty-Eighth IAS Annual Meeting, Toronto, ON, Canada, 2–8 October 1993; pp. 843–849.
14. Yilmaz, I.; Ermiş, M.; Çadirci, I. Medium-frequency induction melting furnace as a load on the power system.
IEEE Trans. Ind. Appl. 2012, 48, 1203–1214. [CrossRef]
15. Millan, I.; Burdio, J.M.; Acero, J.; Lucia, O.; Liorente, S. Series resonant inverter with selective harmonic
operation applied to all-metal domestic induction heating. IET Power Electron. 2011, 4, 587–592. [CrossRef]
16. Koertzen, H.W.; Van Wyk, J.D.; Ferreira, J.A. Design of the half-bridge series resonant converters for
induction cooking. In Proceedings of the Power Electronics Specialist Conference (PESC), Atlanta, GA, USA,
18–22 June 1995; pp. 729–735.
17. Dawson, F.P.; Jain, P. A Comparison of Load Commutated Inverter Systems for Induction Heating and
Melting Applications. IEEE Trans. Power Electron. 1991, 6, 430–441. [CrossRef]
18. Koertzen, H.W.; Ferreira, J.A.; Van Wyk, J.D. A comparative study of single switch induction heating
converters using novel component effectivity concepts. In Proceedings of the 23rd Annual IEEE Power
Electronics Specialists Conference (PESC), Toledo, Spain, 29 June–3 July 1992; pp. 298–305.
19. Jimenez, O.; Lucia, O.; Urriza, I.; Barragan, L.A.; Mattavelli, P.; Boroyevich, D. An FPGA-based
gain-scheduled controller for resonant converters applied to induction cooktops. IEEE Trans. Power Electron.
2014, 29, 2143–2152. [CrossRef]
20. Nagarajan, B.; Sathi, R.R. Phase locked loop based pulse density modulation scheme for the power control
of induction heating applications. J. Power Electron. 2015, 15, 65–77. [CrossRef]
Electronics 2018, 7, 149 17 of 17

21. Idris, Z.; Hamzah, M.K.; Saidon, M.F. Implementation of single-phase matrix converter as a direct AC–AC
converter with commutation strategies. In Proceedings of the 2006 37th IEEE Power Electronics Specialists
Conference, Jeju, South Korea, 18–22 June 2006; pp. 1–7.
22. Li, H.L.; Hu, A.P.; Covic, G.A. A direct AC–AC converter for inductive power-transfer systems. IEEE Trans.
Power Electron. 2012, 27, 661–668. [CrossRef]
23. Arevalo, S.L.; Zanchetta, P.; Wheeler, P.W.; Trentin, A.; Empringham, L. Control and implementation of a
matrix-converter-based AC ground power-supply unit for aircraft servicing. IEEE Trans. Ind. Electron. 2010,
57, 2076–2084. [CrossRef]
24. Kolar, J.W.; Schafmeister, F.; Round, S.D.; Ertl, H. Novel three-Phase AC–AC sparse matrix converters.
IEEE Trans. Power Electron. 2007, 22, 1649–1661. [CrossRef]
25. Trentin, A.; Zanchetta, P.; Clare, J.; Wheeler, P. Automated optimal design of input filters for direct ac/ac
matrix converters. IEEE Trans. Ind. Electron. 2012, 59, 2811–2823. [CrossRef]
26. Yamamoto, E.; Hara, H.; Uchino, T.; Kawaji, M.; Kume, T.J.; Kang, J.K.; Krug, H.P. Development of MCs and
its applications in industry. IEEE Ind. Electron. Mag. 2011, 5, 4–12. [CrossRef]
27. Hosseini, S.H.; Sharifian, M.B.; Sabahi, M.; Yazdanpanah, A.; Gharehpetian, G.H. Bi-directional power
electronic transformer for induction heating systems. In Proceedings of the 2008 Canadian Conference on
Electrical and Computer Engineering, Niagara Falls, ON, Canada, 4–7 May 2008; pp. 347–350.
28. Kim, Y.; Okuma, S.; Iwata, K. Characteristics and Starting Method of a Cycloconverter With a Tank Circuit
for Induction Heating. IEEE Trans. Power Electron. 1988, 3, 236–244. [CrossRef]
29. Sugimura, H.; Mun, S.P.; Kwon, S.K.; Mishima, T.; Nakaoka, M. Direct AC–AC resonant converter using
one-chip reverse blocking IGBT-Based bidirectional switches for HF induction heaters. In Proceedings of
the 2008 IEEE International Symposium on Industrial Electronics, Cambridge, UK, 30 June–2 July 2008;
pp. 406–412.
30. Salehifar, M.; Moreno-eguilaz, M.; Sala, V.; Romeral, L. A Novel AC–AC Converter Based SiC for Domestic
Induction Cooking Applications. In Proceedings of the 2013 28th Twenty-Eighth Annual IEEE Applied Power
Electronics Conference and Exposition (APEC), Long Beach, CA, USA, 17–21 March 2013; pp. 3216–3223.
31. Nguyen-Quang, N.; Stone, D.A.; Bingham, C.M.; Foster, M.P. Single phase matrix converter for radio
frequency induction heating. In Proceedings of the International Symposium on Power Electronics,
Electrical Drives, Automation and Motion (SPEEDAM), Taormina, Italy, 23–26 May 2006; pp. 614–618.
32. Mohite, S.B.; Gujarathi, P.K. A Design and Implementation of a Novel Multimode Single Phase Matrix
Converter. In Proceedings of the 2010 IEEE Power Electronics Electrical Drives Automation and Motion
SPEEDAM, Pisa, Italy, 14–16 June 2010; pp. 1227–1230.
33. Nguyen-Quang, N.; Stone, D.A.; Bingham, C.M.; Foster, M.P. A three-phase to single-phase matrix converter
for high-frequency induction heating. In Proceedings of the 2009 13th European Conference on Power
Electronics and Applications, Barcelona, Spain, 8–10 September 2009; pp. 1–10.
34. Nguyen-Quang, N.; Stone, D.A.; Bingham, C.M.; Foster, M.P. Comparison of single-phase matrix converter
and H-bridge converter for radio frequency induction heating. In Proceedings of the 2007 European
Conference on Power Electronics and Applications, Aalborg, Denmark, 2–5 September 2007; pp. 1–7.
35. Jose, P.S.; Deepika, N.C.; Nisha, S.N. Applications of single phase matrix converter. In Proceedings of the
2011 International Conference on Emerging Trends in Electrical and Computer Technology, Nagercoil, India,
23–24 March 2011; pp. 386–391.
36. Kumar, A.; Sadhu, M.; Das, N.; Sadhu, P.K.; Roy, D.; Ankur, G. A Survey on High-Frequency Inverter and
Their Power Control Techniques for Induction Heating Applications. J. Power Technol. 2011, 97, 201–213.

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