A FPGA Project with MYRIO

Y. Ege1, H. Çıtak2, M. Çoramık1*

1
Necatibey Education Faculty and the Department of Physics, Balıkesir University, Balıkesir
10100, Turkey
2
Balıkesir Vocational High School, Electric Program, Balıkesir University, Balıkesir 10145,
Turkey

Abstract
FPGA is an integrated circuit whose hardware structure can be changed according to the desired
function. The main difference between microprocessor and FPGA is the fact that FPGA’s hardware is not
a fixed structure. FPGA can be programmed by the user application. Transistors, memory in the
microprocessor and connections are pre-defined according to operations (addition, multiplication, I/O
control,etc.). The user has this operation made “sequentially” in accordance with his/her own purpose.
Logic cells in the FPGA are fixed. Functions performed by these logic cells and connections are
determined by the user. Graphical programming software called LabVIEW can be used for programming
FPGA. In this study, a project designed on LabVIEW FPGA module has been tested on MyRIO which has
a Xilinx FPGA board. In the paper, compiling and loading procedure of the project on MyRIO will be
explained in detail.
Keywords: FPGA, MyRIO, LabVIEW, I/O Control.

1. INTRODUCTION
Field Programmable Gate Array (FPGA) technology was first discovered by Ross Freeman in 1985 from the
founders of Xilinx. At the moment, Xilinx and Altera are the two largest FPGA manufacturers in the world.
The FPGA consists mainly of Logic Cells, Input/Output Blocks (IO Blocks) and Interconnections (Fig. 1).

Fig.1. Internal structure of FPGA

As you can see from Figure 1, it is the Logic Cells that make up the main structure of the FPGA. In a logic
cell, there are one Lookup Table (LUT), one D Flip-Flop and one 2-to-1 Mux (Fig.2).

*
Corresponding author. Tel.: +90-266-241 2762: fax: +90-266-249 5005.
E-mail address: mustafacoramik@hotmail.com (M. Çoramık).

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Fig. 2. Internal structure of Logic Cells

The LUTs in the logic cell are tiny memories (RAM) that perform a logic operation. An LUT with having N
number of inputs writes out a 2N number of memory. Complex and massive programs are created as a result
of the combination of thousands of Logic Cells. According to the program loaded on the FPGA, the
interconnection of the logic cells is provided with matrix-shaped data paths and programmable switches. A
FPGA project identifies the function of each logic cell and the state of the programmable switches (on / off),
and this logic describes the connections between the cells [1,2,3].
On the FPGA board, there are dedicated pins and user pins. There are 3 types of dedicated pins divided
according to the specific functions they perform in the FPGA. These are; ‘The Power Pins’ (the pins that
provide power and ground connection for the FPGA), ‘The Configuration Pins’ (the pins used for
downloading program to the FPGA), and ‘The Clock Pins’ (special pins reserved for Clock signals). User
pins are standard I/O pins, and they are configurable. These pins are divided into three categories: Input,
Output and Input/Output. Each I/O pin is connected to a single I/O cell in the FPGA. Power to I/O cells is
provided by VCCIO. Formerly, the FPGAs have more than one VCCIO pin, and yet all the pins were
supplied with the same voltage. The I/O cells, in recently fabricated FPGAs, can be divided into groups, and
these groups can be supplied with different voltage values [4].
The FPGA is usually designed for synchronous processing. In other words, the FPGA designs are ‘Clock’
based and, the D flip-flops in the FPGA alter their state with the relief of the clock signal. In synchronous
designs, a single clock signal must trigger all flip-flops at the same time. Otherwise, there will be electrical
and temporal problems in the FPGA. FPGA manufacturers have developed a special internal link called
"Global Routing" or "Global Line" in order to overcome these problems. This connection ensures that the
Clock signal reaches all the flip-flops in the FPGA synchronously. Therefore, the voltage supply of clock
signal should be provided at the pins reserved for the Clock of the FPGA [5].
The main and fundamental difference between FPGA and microprocessor is; FPGAs do not have a fixed
hardware structure but are programmable according to the user's application needs. Moreover, the FPGAs can
operate in parallel processing. On the other hand, the microprocessors are usually more useful for routine
control of certain circuits. For example, employing FPGA for simple functions such as turning on and off any
device on a computer can be considered as exaggerated. Various ordinary microprocessors (such as the PIC
series) can easily perform such tasks. On the contrary, if processing a high-resolution video data from a
computer is the required task, the use of FPGA is a more rational option since such applications require
processing of a large amount of data instantly. For this reason, FPGAs -capable of parallel processing- are
more reasonable option for such tasks. Besides, since the user, who determines the hardware structure of
FPGA, can also program the FPGA to store a large amount of data in a few Clock cycles. Contrarily, since
the stream of data is limited by the microprocessor's data bus (16 bit, 32 bit, etc.) and processing speed, it is
not possible to achieve the same by using a microprocessor. So, FPGAs are considered better fit for
performance-intensive applications such as intensive data processing, and the microprocessors are rather for
routine control applications [6].
However, when compared to programming PIC, Atmel, and many other microcontrollers, the programming
phase of FPGA is much more difficult at first. In FPGA programming, the HDL (Hardware Description
Language) hardware description language is used is VHDL, Verilog, Abel languages, which are very
different and complicated than conventional C programming. Besides, programming FPGA with LabVIEW
FPGA Module, a product of National Instruments, became much easier [4,7].
In this regard, a MyriO with a Xilinx FPGA board used in this study is tested with a project designed on
LabVIEW FPGA module. The study compiles the project and explains the loading procedure on MyRIO in
detail.

2. MATERIAL AND METHOD

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In our work, we used NI MyRIO-1900 with Xilinx FPGA board for FPGA project (Fig.3). The NI MyRIO-
1900 is a portable and programmable device that can be used in systems such as control, robotics, and
mechatronics. The NI MyRio-1900 device -having analog input (AI), analog output (AO), digital input and
output (DIO), power output, audio input and output channels- can be connected to a computer via USB or
wireless. The device has analog input channels (12 bit, 500 kS / s) in the range of 0 to 5 V and 2 to ± 10 V.
There are 2 analogue output channels (12 bit, 345 kS / s) which can yield an output between 0 - 5 V and 4, ±
10 V. The number of channels that can be used as digital input and output is 40. The device with Xilinx Z-
7010 processor has terminals that output +3.3 V, +5.0 V, +15.0 V and -15.0 V.

Fig. 3. NI MyRIO-1900 and accessories

For a FPGA project;

1. Install the drivers for the NI MyRIO-1900 device and the FPGA module on the computer.
2. The LabVIEW program opens and the "create project" button is pressed. Then "MyRIO custom FPGA
project" is selected in the interface that opens.
3. The project name and how to connect to MyRIO is determined.
4. The main folder for the project is populated at the specified location.
5. Then, right click on "FPGA Target" in the interface shown in Fig.4 and select "New - VI". This will create
a new VI under "FPGA Target". Also, block diagram and front panel of VI will be displayed.

Fig. 4. FPGA project creation interface

6. After the LabVIEW project is developed in the VI, it will be saved under the registered name.

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7. Finally, the project is run. Hence, the FPGA in the NI MyRIO-1900 device is configured according to the
chipset.
Figure 5 shows the front panel and block diagram of the example FPGA project "Digital Port Input and
Output" developed for the NI 9375.

(a)

(b)
Fig. 5. Sample FPGA Project a) Front Panel, b) Block Diagram

3. CONCLUSION and RECOMMENDATION

In this study, how to create a FPGA project with the LabVIEW program and to load it into the FPGA chip on
any target device is explained in detail. NI MyRIO-1900 was selected as the target device in the study. This
device has both FPGA and Real Time features. The FPGA program developed vanishes when the device is
disconnected from power supply. So, if the device is going to be used again, the FPGA program needs to be
re-installed. A configuration member can be employed to avoid such consequence. Microcontrollers or Boot-
PROM can be used as a configuration element.

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The ability to perform parallel operations is the most important feature of a FPGA chip. The chip is arranged
according to the installed program. For instance, this feature can provide as much serial communication
output on the chip as required, however it is not possible to achieve this with a microcontroller available in
the market or with a device that only has a Real Time feature. Hence, the user should determine the targets of
the project well. An RT project developed within the scope of the study can summarize this situation. In the
project, it is aimed to display the voltage values of 8 magnetic sensors on the Pmod CLS LCD screen. The
DIO0-DIO3, AI0 and UART serial communication outputs of the NI MyRIO-1900 are used for this operation
(Appendix-A). Since there are 2 UART serial communication outputs available on the device used for the
project, sensor voltage values are displayed on the LCD screen in sequence and with time loss.
However, the Xilinx compiler tools may not work with Windows 8 and above. It is expected to receive an
error on the local compile server. In order to solve this problem, it should be worked at a Xilinx Compilation
Tools installed Windows 7, and the connection should be made by following "Connect to a network compile
server" option. Alternatively, LabVIEW FPGA Compile Farm Toolkit can be used to compile on the NI
server.

APPENDIX A

Fig. 6. An RT Project

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[3] Kaya, A., Gömülü Sistemler ve Uygulama Alanları, Akademik Bilişim Konferansları, 2008.
[4] Sarıtaş, E., Karataş, S., Her Yönüyle FPGA ve VHDL, ISBN/Barkod: 9786053551294, Palme Yayınevi, Ankara 2013.

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[5] Alçin, F.Ö., Alan Programlanabilir Kapı Dizisi ile Sigma Delta Modülatörün Gerçeklenmesi, Fırat Üniversitesi Fen
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