SpyGlass 4 6 Training PDF

Getting Started with
SpyGlass®
SpyGlass 4.6.0
Atrenta Confidential © 2011 Atrenta Inc.

SpyGlass Training User Tracks
Getting Started with SpyGlass • Pre-Requisites: None - Recommended for all users.
SpyGlass-CDC • Pre-Requisites: Getting Started with SpyGlass or Equivalent
SpyGlass-DFT • Pre-Requisites: Getting Started with SpyGlass or equivalent
SpyGlass DFT-DSM • Pre-Requisites: SpyGlass-DFT
SpyGlass DFT-MBIST • Pre-Requisites: Getting Started with SpyGlass or equivalent
SpyGlass Constraints/TXV • Pre-Requisites: Getting Started with SpyGlass or equivalent
SpyGlass-LP • Pre-Requisites: Getting Started with SpyGlass or equivalent

SpyGlass-PE/PR • Pre-Requisites: Getting Started with SpyGlass or equivalent
SpyGlass: Tcl Interface • Pre-Requisites: Getting Started with SpyGlass or equivalent
SpyGlass: Methodology
• Pre-Requisites: Getting Started with SpyGlass or equivalent
Configuration System
2
Getting Started with SpyGlass: Agenda
SpyGlass Flow Overview
 Lab #1 – Basic UI invocation and goal execution/analysis
SpyGlass Design Read

 Lab #2 – Reading a multi language design into SpyGlass
Goal Selection and Setup

 Lab #3 – Selecting and setting up multiple goals. Running goals
Run Analysis and Debug

 Lab #4 – Analyzing the results and debugging techniques
Integrating SpyGlass into a Design Flow

 Lab #5 - Demonstration of block handoff with reports like dashboard and datasheet
3
SpyGlass Flow Overview

SpyGlass flow
Methodology & Goal
RTL/Netlist Reports
Files
SGDC Files SpyGlass® Waivers

(SDC, CPF, UPF,..)
Debug Capabilities
(HDL navigator,
Tech Libraries Waveform Viewer,
(.lib, .plib) Schematic Viewer,
Module/Instance/Message
Additional Command Options Tree etc.)
Design Read Goal Setup and Run Analyze Results
Project based Session Management

5
SpyGlass Console UI Environment
Simple intuitive environment which guides the user step-by-step
through setting up a design and running and debugging analysis on it.
Setup the Setup goals
design for Review results
and execute and debug
analysis analysis
6
Setting up design
Add HDL
files directly
Add a files list

containing HDL files
7
Goal selection
A goal is a set of checks that you would like to run on the design
 The example below shows the we will run synthesis goal Click on
„Analyze
Results‟ to
After see the result
selecting the for
goal press highlighted
Run button goal
Review the
help
Select the information
goal(s) of associated
interest with the goal
The session
log will echo
the progress
of the run
8
Understanding SpyGlass Output
SpyGlass reports the results of the analysis as messages
 All violations have a severity (label as well as class) and a message
 Violation severity classes are
• FATAL: Analysis can no longer proceed and must exit
• ERROR: A possible design or setup error which can impede analysis or may
result in incorrect results
• WARNING: This is a potential problem and may or may not be a design
error
• INFO: Informational messages for auxiliary rules that help in debug as well
as information about different rule reports being generated
SpyGlass generates a number of reports providing details of the
analysis
 Multiple standard reports with different formats indicating the following

• Summary of checks reported for the analysis based on input
• moresimple, summary, moresimple_sevclass etc.
 Some reports are generated when a certain goal/rule analysis is performed
• For example, Audit.rpt is created when audit goals are run and contains
details on design statistics, instance and module hierarchies
9
Results review
Once goal(s) run is complete, select the related line in the goal list and
click „Analyze Results‟ to view the results of that run and access
debug capabilities
Double-
Module/Instance clicking
tree shows the message
hierarchy highlights
related RTL
source code
Show the
Links to drivers/loads
debug for the
utilities selected RTL
signal
Goal Help for

message Change the view if you want
Session log captures selected
browser to group by different
the progress of run message
combination- default is
Message Tree wrt. severity
10
Invoking SpyGlass
% spyglass
 Invokes SpyGlass GUI with default settings
% spyglass –project test_project.prj

 Invokes SpyGlass GUI with the setup from test_project.prj file
% spyglass –project test_project.prj -designread

 Invokes SpyGlass GUI with the setup from test_project.prj file ready to run the
design read process
% spyglass –project test_project.prj –designread -batch

 Invokes SpyGlass in batch mode with the setup from test_project.prj file and runs
design read process
% spyglass –project test_project.prj –batch –goal initial_rtl/lint/synthesis

 Invokes SpyGlass in batch mode with the setup from test_project.prj file and runs
the “synthesis” goal from the initial RTL stage
11
Lab 1: Basic UI invocation and goal analysis
Lab duration: 15 minutes
After completing this lab, you should be able to:
Perform design read on a sample design

Run synthesis goal
Review the results and explore different debug methods
12
SpyGlass Design Read

Design Read steps
• Identify the source files and libraries to be read

• Expand the included files from the source file lists
Design Read • Setup design macros and parameters
Setup
• Any syntax related issues are reported (messages starting with

STX)
• Missing module definitions (Black boxes)
• Elaboration errors
Analyze & • Synthesis errors
Resolve Issues

14
Language Support
Verilog
 Fully compliant to LRM IEEE 1364-2001 (Verilog-2001)
VHDL
 Fully compliant to LRM IEEE 1076-1993 (VHDL-93)
 Synthesizable Constructs support based on June 2009 synthesizable
subset published by Synopsys Design Compiler (June 2009)
SystemVerilog
 Fully compliant to LRM IEEE 1800-2005
 Verilog2005 is a subset of the above standard and hence also
supported
 Full support for SystemVerilog design constructs but only syntax
compliance checks for SystemVerilog testbench and SystemVerilog

assertion constructs
Full support for any combination of the above
 Default analysis mode is “mixed”

15
Specifying RTL files to read
Adding Files directly
read_file –type verilog verilog_file.v
read_file –type vhdl vhdl_file.vhd
Enabling SystemVerilog in your

design
set_option enableSV yes
read_file –type verilog sv_file.sv
Adding a source file list

read_file –type sourcelist sources.f

16
Specifying Libraries…Technology
Technology Libraries (.lib) are
better suited for SpyGlass
analysis as compared to the
simulation libraries
 SpyGlass reads the .lib file and
converts to an internal format with
.sglib extension
 SpyGlass needs the synthesizable
description of the cells and hence
better to use .lib models as
opposed to behavioral model
You specify the library to be
used for analysis as follows
read_file –type gateslib <Path to .lib

file>/my_cells.lib
set_option
enable_gateslib_autocompile yes

17
Specifying Libraries…Verilog
Adding the +incdir option from simulation
scripts
set_option incdir <Path to dir to include in search>
Adding the –v option from simulation

scripts
set_option v <Verilog lib file>
Adding the –y option (along with +libext)

from simulation scripts
set_option y <Path to dir to verilog lib dirs>
set_option libext { .v }
 You can also add +incdir/-v/-y options in your
source list and SpyGlass will automatically
interpret it
libs.f
-y ../lib1
-v ../lib2/cells.v
+libext+.v
..
18
Specifying Libraries…VHDL
In case of logical library pre-compilation
 Need to map the logical library to physical path
 Need to change logical work to respective logical library
Define a logical library and its physical path
set_option lib vhdl_lib <physical path to vhdl_lib>
Setting “work” to be the user defined lib
set_option work vhdl_lib

19
Handling hierarchy, macros, parameters / generics
Specify the single top level design unit

 set_option top <topDUName>
Verilog `define directives
 Based on the conditional code in RTL, ensure that respective macros are defined
 set_option define {macro1=value1 macro2=value2..}
Verilog parameters
 In case of parameterized modules, if you want to override parameter value (from
that of initialized ones)
 set_option param {<module>.<param1>=<value> <module>.<param2>=<value2>..}
VHDL Generics
 In case of VHDL generic based design too, user can override them using same
option
 set_option param {<entity>.<generic1>=<value1> <entity>.<generic2>=<value2>..}
Note : parameters/generics is a way to “pass in” the instantiated values

of these parameters when the module being analyzed is at “top”

20
Black boxes in SpyGlass
SpyGlass will create a blackbox when it is unable to completely read a
design unit in the design
The AnalyzeBBox rule group reports several kinds of black box,
described by the sub-rules below
 The ErrorAnalyzeBBox rule reports the following scenarios:
• definition is missing
• DesignWare components used but „set_option dw yes„ is not specified
• design unit could not be synthesized due to synthesis errors
 The WarnAnalyzeBBox rule reports the following scenarios:
• functional view is missing in the given .lib/.sglib files
• definition is empty or masked completely by pragmas
 The InfoAnalyzeBBox rule reports the following scenarios:
• „set_option stop' is used in project and the definition of that DU is present
Check the presence of these rule messages after Design-Read (enable

„Synthesize Netlist‟ checkbox) and resolve
 SpyGlass infers the port interface based on instantiation of the blackboxes

21
Saving the setup
SpyGlass stores all the
information into a project file
 This is generated by File->Save
Project
Project file is Tcl based and can

take normal Tcl commands
Once you have the starting

project file, you may manually
update it rather than saving
from UI which will otherwise
flatten the environment

variables and relative paths

22
Running Design Read
Select the „Run Design Read‟ tab and click „Run‟ to run design read
 Note that this only reads your design into Atrenta Console – further analysis
happens later.
Click here
to run
design read
In-line help
gives more
information on
Review status after
the selected
design read is complete
message(s)
and fix issues that arise

23
Lab #2: Design Read
Setup a pre-compiled library
Reference it in the design read
Review blackboxes
 Example of missing definition
Edit project file to create the missing references
Re-run design read in batch


24
Module Review
Reviewed SpyGlass language support
Looked at how SpyGlass design read is setup
Reviewed the contents of the project file
Reviewed Blackbox management

25
Goal Selection and Setup

Goals Selection & Setup steps
• Setup analysis boundaries for the design

Central • Includes managing blackboxes, indentifying clocks and resets, etc.
Setup
• Select which goals need to be run at the current stage of the design
• Goals determine the checks you want to perform on a current version of
Goal the design
Selection
• Setup goals, as applicable, to ensure that analysis remains meaningful

• Not all goals need to be setup but if you don’t setup the goals that
should, the results will be misleading
Goal Setup • In case user wants to create different setups for same goal- they can
make use of scenarios

27
SpyGlass Constraints
Methodology & Goal
RTL/Netlist Reports
Files
Waivers
SGDC Files SpyGlass®
(SDC, CPF, UPF,..)
Debug Capabilities
(HDL navigator,
Tech Libraries Waveform Viewer,
(.lib, .plib) Schematic Viewer,
Additional Command Options Module/Instance/Message
Tree etc.)
SpyGlass Design Constraints (SGDC) control the analysis performed

 SGDC provides additional design data to the tool that is not readily apparent
from the RTL
 Similar to Timing constraints from SDC or power intent constraints from CPF/UPF

28
Creating an SGDC file
Use existing constraints files
 SpyGlass can automatically read a user‟s SDC file and convert it into SGDC
set_option sdc2sgdc yes (you can enable it from Set Read Options tab of UI too)
 SpyGlass reads CPF and UPF natively
Create SGDC using setup manager
Different stages of
modeling and creating
constraints
Use the in-context

help to understand
the usage of setup
as well as about
parameters
Progress Bar
indicates the
progress in
modeling
Use „Next‟ for

moving to next
stage of the
wizard

29
Overview of SGDC File
Scoping based on design unit
Clock definitions for CDC/DFT

analysis
Can define domain and period too
Reset definitions for CDC analysis
SDC Constraints file to read

Domain information for constraints
UPF File to read (also supports CPF)
Testmode signal definition

Define active value
Activity definition for vector-less

estimation

30
Goal selection
Use the „Goal Setup & Run‟ window to select and run goal(s) in Atrenta
Console (note – the GuideWare/New_RTL methodology is opened by
default in Atrenta Console)
Additional tabs for
initial/common setup
information and goal
specific setups
Select the Review the

goal(s) of help
interest information
associated
with the goal

31
Goal Setup
Select the „Setup Goal‟ tab once you have selected specific goal(s)
and can add additional input like SGDC file and changing parameter
values and other command line options (if required) before running
Add the
SGDC file(s),
if applicable
List of Parameters
applicable for the
selected goal
Use the in-context

help to understand
the usage of setup
as well as about
parameters

32
Goal Setup (with Scenarios)
In case of multiple scenarios of same goal or to make comparative
analysis for same goal- user can create scenarios to avoid overwriting
of goal results as follows
Select Tools-
>Preferences to edit UI
view settings
Enable the scenario

checkbox to get it
enabled

33
Goal Setup (with Scenarios)
Once scenarios are enabled through Tools->Preferences, it will be
visible on Goal Setup view (in setup goal)
Specify the
scenario Change
name parameter
settings (if
Run the scenario in batch mode using
goal@scenario option required)
Add the
SGDC file(s),
if applicable
Add goal
specific
options (if
applicable) Add –scenario option to
current_goal command in project
Click on file to setup in batch mode

„Create
Scenario‟
button to start
with

34
Run Goal
Use the „Goal Setup & Run‟ window to run the selected goal(s)
Press Run
button to run the
selected goals
The session log

will echo the
progress of the
run

35
Running SpyGlass in batch mode
Once the setup is complete, SpyGlass can be invoked in batch mode
The following will use the settings in test.prj file to

 Invoke design read
spyglass –batch –project test.prj –designread
 Run goal initial_rtl/lint/connectivity
spyglass –batch –project test.prj –goal initial_rtl/lint/connectivity
 Run design read and the goal initial_rtl/lint/connectivity and
initial_rtl/lint/simulation
spyglass –batch –project test.prj –designread –goal ‘initial_rtl/lint/connectivity,
initial_rtl/lint/simulation’
 Run all the goals under lint
spyglass –batch –project test.prj –goal ‘initial_rtl/lint/*’

• Note: the goal must be placed in quotes when wildcard is used
36
Lab-3: Goal Setup and Run
Select a methodology
 Change to New_RTL methodology
Run setup manager

Save the setup
Select goals
 connectivity, simulation, synthesis and structure goals.
Run goals
 Debug the results

37
Module Review
Introduced SGDC and how to create it
Introduced Central Setup in SpyGlass
Reviewed Goal selection and setup
Running the Goal


38
Run Analysis and Debug

Understanding SpyGlass Results
Methodology & Goal
Design
Files
SGDC Files
SpyGlass® Reports
(SDC, CPF, UPF,..)
Tech Libraries
(.lib, .plib) Fix by changing RTL
Messages
Fix by changing setup
Ignore for now
Debug Ignore forever

40
Analysis and Debug Flow
• Review the results to see if any SYNTH_XXXX errors are present.
SYNTH • These errors indicate that SpyGlass was not able to synthesize the block and hence
no analysis has been done “on” or “through” them
Errors
• These messages indicate that there is a design issue which can result in design
failure
Errors • These issues should be fixed
• These messages indicate that the issue can cause unpredictable behavior in
downstream tools or a mismatch between the two downstream tools
Warning • These messages may be fixed or waived based on the designer style
• These messages will tell you where you need to look for reports and other
information related to a rule (e.g. spreadsheet with power saving opportunity)
Info

41
Goal analysis and debug
Once goal run is complete, select the related line in the goal list and
click „Analyze Results‟ to view the results of that run and access
debug capabilities
Double-
Module/Instance clicking
tree shows the message
hierarchy highlights
related RTL
source code
Links to Show the

debug drivers/loads
utilities for the
selected RTL
signal
Change the view if you want

Goal to group by different
message/ combination- default is Help for
violation Message Tree grouped by selected
browser severity message

42
Analyze Results: Different Reports
User can generate the reports from Reports menu (default is
moresimple in batch mode) to review result across teams. There are
additional goal specific reports too
Different reports can be

generated using Reports
menu

43
Summary of commonly used reports
Report Name Report Overview
moresimple Default report generated as part of batch runs which includes all
necessary information like rule name, file name, line number,
severity label, weight of the message and the violation message as
dumped by the respective rules
moresimple_sevcla Similar to the moresimple report with an additional information
ss displaying the severity class.
sign_off Lists summary and detailed information about the SpyGlass

analysis run, e.g. header includes design unit, number of messages
reported, waived, working directory etc. followed by different
sections with information related to policy, rules, parameters,
constraints, waiver and violations
summary Displays a summary list of message counts by each particular rule
type along with the severity class and rule short help.
waiver Automatically generated whenever one or more rules are waived
during a SpyGlass analysis run indicating which waive command
has waived how many violation messages and which ones.
elab_summary Gives user the details about parameter/generic values in terms of
actual vs. default such that user can validate and debug.
44
Analyze Results: Schematic Usage
As part of debugging, user can use the schematic view after double-
clicking the message and opening it
You can find objects,
trace fanin/fanout from
any net as well as can
create constraint from
schematic
Incremental Sch
button will open
schematic logic
showing the
violation
Schematic legend
Schematic Log window
Gate symbol indicates the color scheme
Waiver Interface indicates the objects that
indicates the for different highlighted
is selected in schematic
message has objects in schematic
view and can be used for
schematic view copying the object name
using RMB
45
Analyze Results: Incremental Schematic Usage
Use Preferences button to
change highlight color etc. (for
both type of schematic)
Double click on a terminal to Go up Zoom

highlight and expand it
out
use “Undo Load to IS” button Zoom fit Zoom in
in case of mistake
Dotted lines for a net means

there are more components
connected to it
Double click on a dotted net to

display other connected
component to it.
Ctrl+click on a terminal or port

will expand all connected nets
and not just to the immediate
net connected to it

46
Analyze Results: Modular Schematic Usage
Double click inside a module
to go down hierarchy
Double click on a net to Go up Zoom

highlight
0.5
Zoom fit Zoom in
To start tracing on specific
net/object in incremental
schematic (but not part of
violation)- it can be done
starting with Modular
schematic – using RH click->
„Load to IS‟ option (but need to
keep IS opened)
Modular schematic is not suggested for debugging violation on large designs due to capacity limitations but
it is useful on small designs to get the complete view of design. Otherwise use it to highlight the starting
point for trace in IS (using the Load to IS utility)

47
Analysis Aids: Schematic Debug
Use Edit->Show Case Analysis or ctrl+A (in selective mode in IS)- to
see case analysis propagation (test_mode in DFT) in highlighted parts
of incremental schematic
Use RH-click on any terminal (of instance) and select „Show
Input/Output Cone‟ to trace the fanin/fanout respectively.

48
Analysis Aids: RTL X-probing & Navigation
Use RTL cross-probing to locate the violated objects in the RTL from rule message.
Use HDL Navigation:
 To trace the load and drivers of a RTL object like net, register
 To know about the object width and hierarchy information

49
Analysis Aids: Incremental Schematic Viewer
For faster debugging of rule violations(with schematic data populated)
 Avoid using the full schematic based debugging as may lead to performance issues, especially
on big designs.

50
Analysis Aids: Modular Schematic
For viewing the Block level view for the design, Modular Schematic(MS) view can be
used as shown below (sometimes called “full schematic”).
Sequential
Block
Vectored assignment
Combinationa
l Block

51
Analysis Aids: Rule Setup during Analysis
Use „Edit Parameters‟ feature of a violation message to fine tune the checking
scope of a rule if not aligned with user‟s expectations.

52
Analysis Aids: Message Search
Use Advanced Search option to quickly search/check for the violation message on
desired design objects/keywords.

53
Managing messages
Methodology & Goal
Design
Files
SGDC Files
SpyGlass® Reports
(SDC, CPF, UPF,..)
Tech Libraries
(.lib, .plib) Fix by changing RTL
Messages Enabled by Waivers

Fix by changing setup
Ignore for now
Debug Ignore forever

54
SpyGlass Waivers
A waiver is a mechanism to hide specific rule violations
 Hide a violation known to be fixed at a later point of the design flow
 Hide false (or minor) violation which will not be fixed
 Ignore violations for DU/Block without complete functionality
 Hide violations that will not be looked at right now (temporary waivers)
 At SOC integration to hide violations with specific blocks
 Hide exceptions to design policies or company practices
 Hide certain violations from 3rd party IP
Waivers do not stop the violations from occurring.
 The waived violations are just hidden from standard view/reports
Waivers are provided to SpyGlass in a waiver file
 Filename typically uses the “.swl” file extension and contains waive commands
 Multiple waiver files are allowed

 In case of multiple waivers- specify the default one with „set_option
default_waiver_file <waiverFile>‟ option in project file
User should document the waivers using “–comment” field
 This field is printed in the waiver report
55
Waivers in the UI
Waivers are easily created in the UI using the right-click menu
Fills in du, rule, msg and initial comment (username, date, time)
Opens the Waiver User Interface ( )

56
Waiver User Interface
Disable Add
Previously
All or specific /Delete
unmatched but
waivers waivers
waived here
File management
(right-click menu to
Add waiver files
Enable waiver files
Remove waiver files
Set default waiver
file)
Escape
metacharacters in
the message
(-regexp must be
on)
Fields to edit selected waiver Enable -regexp

57
Recommendations for good waivers
Do not define waivers with line numbers
 Designs change and line numbers move
Always include –rule with –msg rather than a list of rules
 Helps improve migration
 Use –ignorerule (set_goal_option ignorerule) to skip running the rule altogether
Limit regular expressions to the design specific objects
 Don‟t include the single or double quotes in the regular expression
If your message includes “*” or “?” put it in q%% quotes
 Typically happens when equations are in the message
Apply regular expressions carefully
 Escape existing meta characters before starting – UI can simplify this
 Utilize the message counts in the UI to make sure waiver is not over applied
Always use the –comment field to add comments your waivers

Review your waivers by looking at the Waiver report
 You may be waiving much more than you intended

58
Hierarchical Waivers
SpyGlass allows you to define waivers at the leaf level and then promote
them in the design hierarchy so the users don’t see the same issues in
future runs read_file –type waiver top.swl This must be added to
the project file to apply
waive –import sub_system ss.swl the waiver
Chip Top waive –import block1 b1.swl
Full path to
Module name block waiver
(scope of waiver) file
b1.swl Block-1 Sub System ss.swl
Sub-block-1 sb1.swl
waive –import sub-block-1 sb1.swl

waive –import sub-block-2 sb2.swl
Sub-block-2 sb2.swl waive –import sub-block-3 sb3.swl
Sub-block-3 sb3.swl
59
Organizing Messages using Tagging
Use violation tagging to manage the violations in an organized and priority
based manner as desired/needed by the user

60
Lab-4: SpyGlass analysis & debug
Review the errors from the run in Lab-3
 Analyze and fix black-boxes due to synthesis
Change RTL to fix black-box error and re-read of the design
Re-run of analysis in batch
Review errors
 Fix the errors for each goal, starting with lint and then to other goals
Re-run analysis after fixing each goal


61
Module Review
Reviewed the order in which the violations must be reviewed and fixed
Introduced the utilities available to debug the violations
Looked at waivers in managing the violations

62
Integrating SpyGlass into a
Design Flow

SpyGlass Platform in a SoC Flow
Methodology
SpyGlass
GuideWare GuideWare GuideWare

FOU1 FOU2 FOU3
Atrenta Console (setup, flow execution & debug)
RTL block RTL block RTL block RTL/IP RTL SoC Netlist Layout
Spec
development refinement handoff inspection integration handoff handoff
Verification Synthesis P&R Tapeout
Block Block Handoff Chip Chip Netlist Handoff Signoff

review 1 Review 2 Review Review 1 Review 2 Review
SpyGlass
Reports
Quality
SpyGlass
Reports
Trend
Datasheet
SpyGlass
& kits
64
SoC Integration and IP Iterations
IP Maturity IP Maturity IP Maturity IP Maturity

Level-1 Level-2 Level-3 Level-4
SoC Integ-1 SoC Integ-2 SoC Integ-3

To ensure that IP can be easily integrated into the SoC, the IP provider
must ensure that the SoC integrator sees the same view
 This is enabled by ensuring that all the relevant information with
respect to the is packaged by the IP provider
 SoC integrator then qualifies the IP the way it is packaged before
integrating it.
65
Dashboard Report for Quality and Trend Analysis
Dashboard report generation for Design Life Cycle Management
 Dashboard report generation for trend analysis
 Consolidated dashboard view of quality and objective metrics is useful for
management review
66
Dashboard report generation command
You can generate dashboard report (html and csv) both from batch
and UI
Prerequisites :
 requires the license feature „dashboard‟
 configuration file (projects and success criteria file)
UI mode usage:
 Tools -> Dashboard report (followed by entry of configuration file and success
criteria file as a minimum)
Batch mode usage:
 %spyglass –gen_aggregate_report dashboard –config_file <configuration file> -
reportdir <directory to generate report>
 Configuration file will contain name of the project file(s) and path to the success
criteria file
 Template of a configuration file is present under $SPYGLASS_HOME/auxi (file :
dashboard_criteria_template)
67
SpyGlass Datasheet for IP Management
68
Lab-5: Packaging a block for integration
Create a stand-alone package and validate the results you got from the
previous lab
Generate a datasheet report
Generate a dashboard report

69
Where to Look for Help

Documentation
Use the Help menu of the SpyGlass Graphical User Interface.
 Help  On-Line Help for searchable HTML-based system
 Help  On-Line Manuals for printable documents
The „spyhelpviewer‟ and „spydocviewer‟ utilities are the batch mode

equivalent of the above.
71
Release Information
The following files can be found at the top-level of install directory:
SpyGlass_ReadMe.pdf: Download and installation information
SpyGlass_ReleaseNotes.pdf: What‟s new in this release
SpyGlass_FixedIncidents_RelNotes.pdf: Problem reports fixed in this release
SpyGlass_KPNS.pdf: Known problems in this release and workarounds

72
Technical Support
Atrenta Support Portal

www.atrenta.com/support.htm
Provides access to the following;
 Support system - to submit, view status
and resolve support tickets.
 Latest up to date training material
 Download the latest SpyGlass release,
release notes and What‟s New
document
 Product FAQ
 And much more...
E-mail
support@atrenta.com
Sending email to support@atrenta.com will

automatically create a new ticket in the
Atrenta support system. You should then
go and view and update the ticket via the
Support Portal.
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Thank you!

SpyGlass 4 6 Training PDF

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Getting Started with

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SpyGlass-CDC • Pre-Requisites: Getting Started with SpyGlass or Equivalent

SpyGlass-DFT • Pre-Requisites: Getting Started with SpyGlass or equivalent

SpyGlass DFT-DSM • Pre-Requisites: SpyGlass-DFT

SpyGlass DFT-MBIST • Pre-Requisites: Getting Started with SpyGlass or equivalent

SpyGlass Constraints/TXV • Pre-Requisites: Getting Started with SpyGlass or equivalent

SpyGlass-LP • Pre-Requisites: Getting Started with SpyGlass or equivalent

SpyGlass-PE/PR • Pre-Requisites: Getting Started with SpyGlass or equivalent

SpyGlass: Tcl Interface • Pre-Requisites: Getting Started with SpyGlass or equivalent

SpyGlass Design Read

Goal Selection and Setup

Run Analysis and Debug

Integrating SpyGlass into a Design Flow

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Methodology & Goal

SGDC Files SpyGlass® Waivers

Design Read Goal Setup and Run Analyze Results

Project based Session Management

Add a files list

 Multiple standard reports with different formats indicating the following

Goal Help for

% spyglass –project test_project.prj

% spyglass –project test_project.prj -designread

% spyglass –project test_project.prj –designread -batch

% spyglass –project test_project.prj –batch –goal initial_rtl/lint/synthesis

After completing this lab, you should be able to:

Perform design read on a sample design

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• Identify the source files and libraries to be read

• Any syntax related issues are reported (messages starting with

Design Read Goal Setup and Run Analyze Results

compliance checks for SystemVerilog testbench and SystemVerilog

Design Read Goal Setup and Run Analyze Results

Enabling SystemVerilog in your

Adding a source file list

Design Read Goal Setup and Run Analyze Results

read_file –type gateslib <Path to .lib

Design Read Goal Setup and Run Analyze Results

Adding the –v option from simulation

Adding the –y option (along with +libext)

Design Read Goal Setup and Run Analyze Results

Specify the single top level design unit

 set_option param {<entity>.<generic1>=<value1> <entity>.<generic2>=<value2>..}

Note : parameters/generics is a way to “pass in” the instantiated values

Design Read Goal Setup and Run Analyze Results

Check the presence of these rule messages after Design-Read (enable

Design Read Goal Setup and Run Analyze Results

Project file is Tcl based and can

Once you have the starting

flatten the environment

Design Read Goal Setup and Run Analyze Results

Design Read Goal Setup and Run Analyze Results

Reference it in the design read

Edit project file to create the missing references

Re-run design read in batch

Design Read Goal Setup and Run Analyze Results

Looked at how SpyGlass design read is setup

Reviewed the contents of the project file

Reviewed Blackbox management

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• Setup analysis boundaries for the design

• Setup goals, as applicable, to ensure that analysis remains meaningful