NTHL040N65S3F

Power MOSFET, N-Channel,

SUPERFET) III, FRFET),
650 V, 65 A, 40 mW
Description www.onsemi.com
SUPERFET III MOSFET is ON Semiconductor’s brand−new high
voltage super−junction (SJ) MOSFET family that is utilizing charge
VDSS RDS(ON) MAX ID MAX
balance technology for outstanding low on-resistance and lower gate
charge performance. This advanced technology is tailored to minimize 650 V 40 mW @ 10 V 65 A
conduction loss, provide superior switching performance, and
withstand extreme dv/dt rate.
D
Consequently, SUPERFET III MOSFET is very suitable for the
various power system for miniaturization and higher efficiency.
SUPERFET III FRFET MOSFET’s optimized reverse recovery
performance of body diode can remove additional component and
improve system reliability. G
Features
• 700 V @ TJ = 150°C S
• Typ. RDS(on) = 32 mW
• Ultra Low Gate Charge (Typ. Qg = 158 nC)
• Low Effective Output Capacitance (Typ. Coss(eff.) = 1366 pF)
• 100% Avalanche Tested
• These Devices are Pb−Free and are RoHS Compliant

Applications GD
S
• Telecom / Server Power Supplies
TO−247 long leads
• Industrial Power Supplies CASE 340CH
• EV Charger
• UPS / Solar MARKING DIAGRAM

$Y&Z&3&K
NTHL
040N65S3F

$Y = ON Semiconductor Logo
&Z = Assembly Plant Code
&3 = Data Code (Year & Week)
&K = Lot
NTHL040N65S3F = Specific Device Code

ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.

© Semiconductor Components Industries, LLC, 2017 1 Publication Order Number:

May, 2018 − Rev. 6 NTHL040N65S3F/D
 NTHL040N65S3F

ABSOLUTE MAXIMUM RATINGS (TC = 25°C, Unless otherwise noted)

Symbol Parameter NTHL040N65S3F Unit
VDSS Drain to Source Voltage 650 V
VGSS Gate to Source Voltage − DC ±30 V
− AC (f > 1 Hz) ±30
ID Drain Current − Continuous (TC = 25°C) 65 A
− Continuous (TC = 100°C) 45
IDM Drain Current − Pulsed (Note 1) 162.5 A
EAS Single Pulsed Avalanche Energy (Note 2) 1009 mJ
IAS Avalanche Current (Note 2) 9 A
EAR Repetitive Avalanche Energy (Note 1) 4.46 mJ
dv/dt MOSFET dv/dt 100 V/ns
Peak Diode Recovery dv/dt (Note 3) 50
PD Power Dissipation (TC = 25°C) 446 W
− Derate Above 25°C 3.57 W/°C
TJ, TSTG Operating and Storage Temperature Range −55 to +150 °C
TL Maximum Lead Temperature for Soldering, 1/8″ from Case for 5 seconds 300 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Repetitive rating: pulse−width limited by maximum junction temperature.
2. IAS = 9 A, RG = 25 W, starting TJ = 25°C.
3. ISD ≤ 32.5 A, di/dt ≤ 200 A/ms, VDD ≤ 400 V, starting TJ = 25°C.

THERMAL CHARACTERISTICS
Symbol Parameter NTHL040N65S3F Unit
RqJC Thermal Resistance, Junction to Case, Max. 0.28 _C/W
RqJA Thermal Resistance, Junction to Ambient, Max. 40

PACKAGE MARKING AND ORDERING INFORMATION

Part Number Top Marking Package Packing Method Reel Size Tape Width Quantity
NTHL040N65S3F NTHL040N65S3F TO−247 Tube N/A N/A 30 Units

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 NTHL040N65S3F

ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)

Symbol Parameter Test Conditions Min. Typ. Max. Unit
OFF CHARACTERISTICS
BVDSS Drain to Source Breakdown Voltage VGS = 0 V, ID = 1 mA, TJ = 25_C 650 − − V
VGS = 0 V, ID = 1 mA, TJ = 150_C 700 − − V
DBVDSS/DTJ Breakdown Voltage Temperature ID = 15 mA, Referenced to 25_C − 0.63 − V/_C
Coefficient
IDSS Zero Gate Voltage Drain Current VDS = 650 V, VGS = 0 V − − 10 mA
VDS = 520 V, TC = 125_C − 213 −
IGSS Gate to Body Leakage Current VGS = ±30 V, VDS = 0 V − − ±100 nA
ON CHARACTERISTICS
VGS(th) Gate Threshold Voltage VGS = VDS, ID = 6.5 mA 3.0 − 5.0 V
RDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 32.5 A − 32 40 mW
gFS Forward Transconductance VDS = 20 V, ID = 32.5 A − 48 − S
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance VDS = 400 V, VGS = 0 V, f = 1 MHz − 5940 − pF
Coss Output Capacitance − 140 − pF
Coss(eff.) Effective Output Capacitance VDS = 0 V to 400 V, VGS = 0 V − 1366 − pF
Coss(er.) Energy Related Output Capacitance VDS = 0 V to 400 V, VGS = 0 V − 247 − pF
Qg(tot) Total Gate Charge at 10V VDS = 400 V, ID = 32.5 A, VGS = 10 V − 158 − nC
(Note 4)
Qgs Gate to Source Gate Charge − 48 − nC
Qgd Gate to Drain “Miller” Charge − 60 − nC
ESR Equivalent Series Resistance f = 1 MHz − 1.1 − W
SWITCHING CHARACTERISTICS
td(on) Turn-On Delay Time VDD = 400 V, ID = 32.5 A, − 41 − ns
VGS = 10 V, Rg = 2.2 W
tr Turn-On Rise Time (Note 4) − 41 − ns
td(off) Turn-Off Delay Time − 101 − ns
tf Turn-Off Fall Time − 29 − ns
SOURCE-DRAIN DIODE CHARACTERISTICS
IS Maximum Continuous Source to Drain Diode Forward Current − − 65 A
ISM Maximum Pulsed Source to Drain Diode Forward Current − − 162.5 A
VSD Source to Drain Diode Forward VGS = 0 V, ISD = 32.5 A − − 1.3 V
Voltage

trr Reverse Recovery Time VGS = 0 V, ISD = 32.5 A, − 145 − ns

dIF/dt = 100 A/ms
Qrr Reverse Recovery Charge − 737 − nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Essentially independent of operating temperature typical characteristics.

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 NTHL040N65S3F

TYPICAL PERFORMANCE CHARACTERISTICS

200 300
VGS = 10.0V *Notes:
8.0V 1. VDS = 20V
100
7.0V
100 2. 250 ms Pulse Test
6.5V
6.0V

ID, Drain Current[A]

ID, Drain Current[A]

5.5V
o
150 C

10
10 o
25 C

*Notes: o
−55 C
1. 250 ms Pulse Test
o
2. T C = 25 C
1 1
0.2 1 10 20 2 3 4 5 6 7 8
VDS, Drain−Source Voltage[V] VGS, Gate−Source Voltage[V]

Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics

0.05 1000
o
*Note: T C = 25 C *Notes:
1. VGS = 0V
Drain−Source On−Resistance [W]

100 2. 250 ms Pulse Test

IS, Reverse Drain Current [A]

0.04 10 150 C
o
RDS(ON),

VGS = 10V
1
o
VGS = 20V 25 C

0.03 0.1
o
−55 C
0.01

0.02 0.001
0 50 100 150 200 0.0 0.5 1.0 1.5 2.0
ID, Drain Current [A] VSD, Body Diode Forward Voltage [V]

Figure 3. On−Resistance Variation Figure 4. Body Diode Forward Voltage

vs. Drain Current and Gate Voltage Variation vs. Source Current and Temperature
1000000 10
*Note: ID = 32.5A
VGS, Gate−Source Voltage [V]

100000
Ciss 8
VDS = 130V
10000
Capacitances [pF]

V = 400V
DS
6
1000 Coss

100 *Note: 4
1. VGS = 0V
10 2. f = 1MHz

Ciss = C gs + Cgd (C ds = shorted)

Crss
2
1 C
oss = Cds + Cgd
Crss = Cgd

0.1 0
0.1 1 10 100 1000 0 40 80 120 160
VDS, Drain−Source Voltage [V] Qg, Total Gate Charge [nC]

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

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 NTHL040N65S3F

TYPICAL PERFORMANCE CHARACTERISTICS (Continued)

1.2 2.5
*Notes: *Notes:
Drain−Source Breakdown Voltage

1. VGS = 0V 1. VGS = 10V

Drain−Source On−Resistance
2. ID = 15mA 2.0 2. ID = 32.5A
1.1
BVDSS, [Normalized]

RDS(on), [Normalized]
1.5
1.0
1.0

0.9
0.5

0.8 0.0
−50 0 50 100 150 −50 0 50 100 150
o o
TJ, Junction Temperature [ C] TJ, Junction Temperature [ C]

Figure 7. Breakdown Voltage Variation Figure 8. On−Resistance Variation

vs. Temperature vs. Temperature

500 80

30m s
100
100m s
ID, Drain Current [A]

60
ID, Drain Current [A]

1ms
10 10ms
DC
40
1 Operation in This Area
is Limited by R DS(on)

*Notes: 20
0.1 o
1. TC = 25 C
o
2. TJ = 150 C
3. Single Pulse
0.01 0
1 10 100 1000 25 50 75 100 125 150
o
TC, Case Temperature [ C]
VDS, Drain−Source Voltage [V]

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
45

30
EOSS [m J]

15

0
0 130 260 390 520 650
VDS, Drain to Source Voltage [V]

Figure 11. Eoss vs. Drain to Source Voltage

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 NTHL040N65S3F

TYPICAL PERFORMANCE CHARACTERISTICS (Continued)

2
r(t), NORMALIZED EFFECTIVE TRANSIENT

DUTY CYCLE−DESCENDING ORDER

1

D = 0.5
THERMAL RESISTANCE

0.2
0.1
0.1 PDM
0.05
0.02
0.01
t1
t2
0.01 NOTES:
ZqJC(t) = r(t) x RqJC
RqJC = 0.28 oC/W
SINGLE PULSE Peak TJ = PDM x ZqJC(t) + TC
Duty Cycle, D = t1 / t2
0.001
−5 −4 −3 −2 −1 0 1 2
10 10 10 10 10 10 10 10
t, RECTANGULAR PULSE DURATION (sec)

Figure 12. Transient Thermal Response Curve

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 NTHL040N65S3F

VGS
RL Qg

VDS Qgs Qgd

VGS

DUT
IG = Const.

Charge

Figure 13. Gate Charge Test Circuit & Waveform

RL VDS
VDS 90% 90% 90%

VGS VDD
RG

10% 10%
DUT VGS
VGS
tr tf
td(on) td(off)

ton toff

Figure 14. Resistive Switching Test Circuit & Waveforms

L
E AS + 1 @ LI AS
2
VDS 2

BVDSS
ID
IAS

RG
VDD ID(t)

DUT VDD
VGS VDS(t)

tp
Time
tp

Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms

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 NTHL040N65S3F

+
DUT

VSD

ISD
L

Driver
RG
Same Type
as DUT
VDD

VGS
− dv/dt controlled by RG
− ISD controlled by pulse period

Gate Pulse Width

D+
Gate Pulse Period
VGS
10 V
(Driver)

IFM, Body Diode Forward Current

ISD di/dt
(DUT)

IRM

Body Diode Reverse Current

Body Diode Recovery dv/dt

VDS
VSD VDD
(DUT)

Body Diode
Forward Voltage Drop

Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms

SUPERFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or
other countries.
FRFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other
countries.

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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

TO−247−3LD
CASE 340CH
ISSUE O
DATE 31 OCT 2016

DOCUMENT NUMBER: 98AON13853G Electronic versions are uncontrolled except when

accessed directly from the Document Repository. Printed
STATUS: ON SEMICONDUCTOR STANDARD versions are uncontrolled except when stamped
“CONTROLLED COPY” in red.
NEW STANDARD:
© Semiconductor Components Industries, LLC, 2002 http://onsemi.com Case Outline Number:
October, DESCRIPTION:
2002 − Rev. 0 TO−247−3LD 1 PAGE 1 OFXXX2
 DOCUMENT NUMBER:
98AON13853G

PAGE 2 OF 2

ISSUE REVISION DATE

O RELEASED FOR PRODUCTION FROM FAIRCHILD TO247G03 TO ON SEMICON- 31 OCT 2016
DUCTOR. REQ. BY J. LETTERMAN.

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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
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Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

© Semiconductor Components Industries, LLC, 2016 Case Outline Number:

October, 2016 − Rev. O 340CH
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