Grid Synchronization Method Based on a
Quasi-Ideal Low-Pass Filter Stage and a
Phase-Locked Loop
Eider Robles, Salvador Ceballos, Josep Pou∗ , Jordi Zaragoza∗ , and Igor Gabiola
Robotiker-Tecnalia Technologic Corporation, Energy Unit, Basque Country, SPAIN, Email: erobles@robotiker.es
∗ Technical University of Catalonia, Department of Electronic Engineering, Catalonia, SPAIN
Abstract— This paper proposes a new phase-locked loop (PLL)
scheme for detection of the positive sequence in three-phase
systems. The scheme includes the use of the Park transformation
and moving average filters (MAF). Performance of the MAF is
mathematically analyzed and represented in Bode diagrams. The
analysis allows proper selection of the optimal filter’s window
width for its application in d-q transformed variables. The
proposed detector scheme allows fast detection of the grid voltage
positive sequence (within one grid voltage cycle). The MAF
completely eliminates any oscillation multiple of the frequency
for what it is designed. Thus, this algorithm is not affected by
the presence of imbalances or harmonics in the electrical grid.
Furthermore, although it is designed to operate under constant
frequency, it can also operate properly well in the presence of
small grid frequency variations. Performance of the entire PLL-
based detector is verified through simulation and experiment. It
shows very good performance under several extreme grid voltage
conditions.
I. I NTRODUCTION
Detection of the fundamental-frequency positive-sequence
component of the utility voltage under unbalanced and dis-
torted conditions is a major issue nowadays. Many synchroniz-
ing methods have been presented during the last years. Some
of them are based on a PLL including a feedback loop with
the purpose of controlling a magnitude which is dependent on
the voltage phase angle [1]-[4].
In the case of three-phase systems, the dynamic response of
some methods, such as the one in [5], is good under balanced
grid voltages, but very slow when they are designed to operate
under grid voltages that are unbalanced or distorted. A fast
PLL method is presented in [6] which can cancel out the
influence of certain harmonics; however, its implementation is
highly complex and should be limited to cancel the effect of
only a few harmonics. A PLL-based synchronization method
is used in [7] which shows good performance, even under
voltage imbalances and distortion. However, its implementa-
tion requires solving some practical problems related to the
normalization of the detected angle.
Other kind of synchronization algorithms are based on the
instantaneous symmetrical components theory [8]-[10]. Some
of them have a quick dynamic response and can work with
variable frequency, but grid harmonics are only attenuated and
not completely cancelled.
The synchronization method presented in this paper is
based on a quasi-ideal low-pass filter stage, using moving
978-1-4244-1668-4/08/$25.00 ©2008 IEEE 4056
average filters and Park transformations, and a PLL stage. This
method allows fast detection of the positive sequence of the
grid voltages and is no longer affected by the presence of
imbalances or harmonics in the electrical grid.
II. C HARACTERIZATION OF GRID VOLTAGES
Grid voltages can be considered a positive sequence with
the addition of a negative and zero sequence (unbalanced
voltages). They can also include harmonic components which
can be either balanced or unbalanced (harmonic distortion).
The objective of a positive sequence detector is to determine
the magnitude and phase of the positive sequence fundamental
component disregarding all unwanted components in the grid
voltages.
A simplified representation of the grid voltages containing
only the fundamentals and a harmonic set, which can be a
positive o negative sequence, is given in the following:
⎡ ⎤ ⎡ ⎤
va cos(ωt)
⎣ vb ⎦ = V+1 ⎣ cos(ωt − 2π/3) ⎦ +
vc cos(ωt + 2π/3)
⎡ ⎤
cos(nωt + θn )
+Vn ⎣ cos(nωt − 2π/3 + θn ) ⎦ , (1)
cos(nωt + 2π/3 + θn )
in which n is an integer number from −∞ to +∞ different
from +1. V+1 and Vn are the amplitudes of the fundamentals
and the harmonics, respectively. Note that for n = −1 the
second term in (1) corresponds to a fundamental negative
sequence.
The voltage vector can be represented in d-q coordinates
through the Park transformation, using a synchronous ref-
erence frame rotating at the fundamental frequency. If this
transformation is applied to the voltages in (1), the following
vd and vq components are obtained:
   
vd 3 cos(θo )
= V+1 +
vq 2 sin(θo )
 
 3 cos[(n − 1)ωt + θo + θn ]
+Vn , (2)
2 sin[(n − 1)ωt + θo + θn ]
where the angle θo corresponds to the initial position of
the d axis in the d-q transformation. It is quite common to
synchronize the d axis with the voltage vector (θo = 0); hence,
under ideal grid voltages, the component in the q axis (vq ) is The magnitude and phase expressions are respectively:
zero and the component in
the d axis (vd ) is constant and takes √
 2
the maximum value V+1 32 .
On the other hand, according to (2), voltage imbalances
and distortion will cause oscillations in the two components
(vd and vq ). The frequency of these oscillations is (n − 1)ω.
Therefore, one can conclude that:
- A negative sequence and odd-order harmonics generate
even-order frequency oscillations, and
- even-order harmonics generate odd-order frequency oscil-
lations.
III. M OVING AVERAGE F ILTER (MAF)
Application of the MAF operator to an input signal x(τ ) is
given by  t width of the MAF should be increased to Tw = T .
1
x̄(t) = x(τ )dτ . (3)
Tw t−Tw
A performance example of the MAF is shown in Fig. 1.
The filter provides the mean value of the input signal using a
base time or window width Tw . There is always an intrinsic
delay related to the window width; therefore, the larger Tw ,
the slower the detection dynamic. If the input signal contains
sinusoidal components of an integer multiple of the equivalent
frequency of the MAF (fw = 1/Tw ), the output signal will be
a constant value.
Selection of the window width is an important issue. De-
pending on it, the MAF is able to perform as an ideal low-pass
filter for some input frequency components.
For a better understanding of the MAF the transfer function
has been obtained and analyzed. Given an input signal:
x(t) = A sin(kωt + θ), (4)
where k is the harmonic order and ω = 2π/T . The output of
the MAF will be:
A they are clean from any distortion or imbalance. That’s why
x(t) = {cos(kωt − θ) − cos[kω(t − Tw ) + θ]}. (5)
kωTw
Applying the Laplace transform to (4) and (5) the transfer
function for θ = 0 becomes as follows:
X(s) s[1 − cos(kωTw )] − kω sin(kωTw )
GM AF (s) = = .
X(s) (kω)2 Tw
(6)
Substituting s = jkω the following expression is obtained:
X(jkω) j[1 − cos(kωTw )] − sin(kωTw )
GM AF (jkω) = = .
X(jkω) kωTw
(7)
Fig. 1. Performance example of the MAF.
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|GM AF (jkω)| = 1 − cos(kωTw ) and (8)
kωTw
1 1
ϕ[GM AF (jkω)] = arctan[ − ]. (9)
tan(kωTw ) sin(kωTw )
Fig. 2 shows the Bode diagram of this transfer function in
which the frequency axis has been normalized (f /fw =
Tw /T ). In this representation, the window width of the MAF
is Tω = T /2.
When using the MAF to filter d-q components, if Tw = T /2
the d-q even-order oscillations from odd-order harmonics and a
negative sequence would be completely removed. If significant
even-order harmonic amplitudes are expected, the window
IV. N EW PLL BASED ON MAF
Fig. 3 shows the structure of the proposed positive sequence
detector. Firstly, the grid voltage vector is transformed us-
ing a synchronous reference frame rotating at fundamental
frequency (ωf ) and with an arbitrary angular position (θf ).
The components vd and vq may contain oscillations due to
harmonics and a negative voltage sequence. Both components
are thus filtrated through the MAF; therefore, if an appropriate
window width is used, v d and v q will be constant and
containing only the positive sequence of the grid voltages.
As shown in Fig. 4, the v q component is not necessarily zero
because the angle used in the Park transformation is arbitrary.
Thus, the voltage vector is not on the d axis, but on another d
axis of a reference frame rotating at ωgrid with an unknown
angular position θ+ .
In this scheme, the d-q output variables of the MAF are
transformed back into a-b-c components with the same arbi-
trary angle θf . The obtained signals (v a , v b , v c ) correspond to
the fundamental positive sequence grid voltages and therefore
this stage is considered to perform as a quasi-ideal filter
for the three-phase voltage components. The variables are
again transformed into d-q coordinates, but in this case the
synchronization angle (θ+ ) is obtained by a classical control
loop that forces the component v q+ to be zero through a PI
regulator. The output of the PI (ω + ) is integrated to obtain θ+ .
It should be remarked that, in this scheme, the PI regulator
parameters are tuned to achieve a quick response of the PLL
because unwanted oscillations are not expected in the v q+
component. This is a significant advantage compared with
other methods [5] which do not include the filtering stage
presented in this paper.
V. S IMULATION R ESULTS
Some simulation results from the proposed positive se-
quence detector are shown in this section. Some results are
compared with a basic PLL positive-sequence detector, which
corresponds to the right-hand part of the scheme shown in Fig.
3. In this case, the low-pass filter based on MAFs is not used.
 Fig. 2. Bode diagram of the MAF.

Fig. 3. Structure of the proposed PLL.

Fig. 4. Synchronization diagram of the proposed PLL.

In all the simulations the rms line-to-neutral grid voltage is

100 V at 50 Hz.
Fig. 5 shows system responses under a 100% single-phase
voltage dip. Observe that the proposed positive-sequence de-
tector has a very good performance, rapidly eliminating the
error in the detected angle. On the other hand, in the basic PLL
structure, the detected angle has a significant error. This is due
to the fundamental negative sequence that appears because of
the unbalanced voltage dip. Therefore, in such a process, the
basic PLL detector does not provide good reference signals Fig. 5. Simulation results. Comparison responses under a voltage dip.
for proper control of a power system. Similarly, the proposed
positive-sequence detector is compared in Fig. 6 with the basic
PLL detector. In this case, a fifth harmonic set is added to the VI. E XPERIMENTAL R ESULTS
fundamentals. Again, the proposed detector operates very well
while the detected angle from the basic PLL has an excessive The proposed algorithm was programmed in a DSP board
error. TMS320F2812 and some experimental results were obtained.
In Fig. 7, the proposed positive-sequence detector is tested A three-phase generator CMC-156 from Omicron was used to
under extremely bad grid voltage conditions. A fifth harmonic provide the grid voltages. All the tests were performed with a
set is added to the fundamentals and a 100% single-phase line-to-neutral voltage of 100 Vrms 50 Hz, unless other values
voltage dip is produced at the same time. In this case, the specified.
proposed detector operates very well and the error produced Fig. 8 presents the main variables of the proposed positive-
in the transition is eliminated in half a line period (10 ms). sequence detector. It shows the grid voltages, the d-q compo-

4058
Fig. 6. Simulation results. Comparison responses under harmonic distortion
(fifth harmonic).
Fig. 8. Experimental results. Single-phase voltage dip produced at the instant
40 ms.

Fig. 7. Simulation results from the proposed positive-sequence detector under
a voltage dip and a fifth-harmonic set.
nents before and after the MAF, the d-q synchronized variables
in the PLL, and the detected angle. An abrupt shortcircuit
occurs at t=40 ms (a 100% single-phase voltage dip). Observe
the oscillations that contain the d-q components before the
MAF and how they appear completely atenuated after the
MAF. The oscillations are produced because a fundamental
negative sequence appears due to the voltage dip process. The
vq component of the syncrhonized variables in the PLL is zero,
forced by the PI controler, and vd provides information about
the amplitude of the positive-sequence fundamental voltages.
Finally the angle is obtained.
Fig. 9 shows the grid voltages, the d-q synchronized vari-
ables in the PLL, and the detected angle. A fifth harmonic of
40% of the fundamental is included and also a 70% voltage dip
is produced at the instant 45 ms. Observe the fast detection of
the fundamental amplitude change. There is no change in the
positive-sequence phase during this process, as the detected
angle shows.
In Fig. 10, a 90-degree change of phase in all the three
phases is produced at the instant t=55 ms. Note that after this
adverse operating conditions the new detected phase is quickly
adjusted.
Finally, Fig. 11 shows a voltage dip process when the grid
frequency is 52 Hz. In such a case, the positive-sequence
detector operates well although a small steady-state error is
produced in the detected phase (less than 1.5%).

4059
Fig. 9. Experimental results. A fifth harmonic set is added at the instant 45
ms and a three-phase voltage dip is produced simultaneously.
Fig. 10. Experimental results. Phase jump in all the three phases at the
instant 55 ms.
VII. C ONCLUSION
In this paper a new PLL has been presented for positive
sequence detection in a three-phase system. The structure is
based on a MAF that guarantees complete cancellation of the
effects produced by grid voltage imbalances and harmonics
on the detected variables. Moreover, the parameters of the PI
controllers are tuned to achieve a wide closed-loop bandwidth;
thus, the dynamic response of the system is significantly
improved. Simulation and experimental results have been
presented, which verify good performance of the system in
the presence of harmonics, imbalances, and phase changes
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Fig. 11. Experimental results. Voltage dip process operating at 52 Hz.
in the grid voltages. Performance of the presented PLL has
proved considerably better than the basic PLL design. In
addition, its performance is better in the presence of harmonics
than the newest and more sophisticated positive-sequence
detectors. On the other hand, it has a similar dynamic response
and behavior in the presence of voltage dips. However, a
remarkable advantage of the proposed system is its simplicity
compared to those with a similar performance. Furthermore,
although the PLL is designed for a determined frequency, its
behavior is also acceptable when slight frequency changes
occur. Future work is focused on an adaptive PLL structure
able to operate under large frequency changes.
ACKNOWLEDGMENT
This work was supported by the Ministerio de Ciencia
y Tecnologia of Spain under Projects ENE2007-67033-C03-
03 and ENE2007-67033-C03-01, and the Basque Country
Government.
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